| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm-nsp-ax.dtsi | 13 /delete-property/ dma-coherent;
17 /delete-property/ dma-coherent;
21 /delete-property/ dma-coherent;
25 /delete-property/ dma-coherent;
29 /delete-property/ dma-coherent;
33 /delete-property/ dma-coherent;
37 /delete-property/ dma-coherent;
41 /delete-property/ dma-coherent;
45 /delete-property/ dma-coherent;
49 /delete-property/ dma-coherent;
[all …]
|
| H A D | bcm-nsp.dtsi | 219 dma-coherent;
229 dma-coherent;
239 dma-coherent;
249 dma-coherent;
259 dma-coherent;
270 dma-coherent;
323 dma-coherent;
331 dma-coherent;
339 dma-coherent;
475 dma-coherent;
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/broadwell/ |
| H A D | uncore-interconnect.json | 12 …n till first of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-coherent traffic.…
21 … is waiting for data return from memory controller. Account for coherent and non-coherent requests…
31 …"BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries that are in Dir…
36 …"PublicDescription": "Each cycle count number of valid coherent Data Read entries that are in Dire…
41 … "Total number of Core outgoing entries allocated. Accounts for Coherent and non-coherent traffic.…
50 … "BriefDescription": "Number of Core coherent Data Read entries allocated in DirectData mode",
55 … "PublicDescription": "Number of Core coherent Data Read entries allocated in DirectData mode.",
|
| /linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | uncore-interconnect.json | 12 "BriefDescription": "Each cycle counts number of any coherent requests at memory controller that were issued by any core.",
22 "BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory controller that were issued by any core.",
32 "BriefDescription": "Each cycle counts number of valid coherent Data Read entries. Such entry is defined as valid when it is allocated until deallocation. Does not include prefetches.",
42 "BriefDescription": "Each cycle counts number of all outgoing valid entries in ReqTrk. Such entry is defined as valid from its allocation in ReqTrk until deallocation. Accounts for Coherent and non-coherent traffic.",
52 "BriefDescription": "Each cycle counts number of valid coherent Data Read entries. Such entry is defined as valid when it is allocated until deallocation. Does not include prefetches.",
62 "BriefDescription": "Total number of all outgoing entries allocated. Accounts for Coherent and non-coherent traffic.",
71 "BriefDescription": "Counts number of all coherent Data Read entries. Does not include prefetches.",
|
| /linux/rust/kernel/ |
| H A D | dma.rs | 59 /// such as [`Coherent::zeroed`].
68 /// Set up the device's DMA coherent addressing capabilities.
76 /// such as [`Coherent::zeroed`].
95 /// such as [`Coherent::zeroed`].
114 /// such as [`Coherent::zeroed`].
214 /// use kernel::dma::{attrs::*, Coherent};
218 /// let c: Coherent<[u64]> =
219 /// Coherent::zeroed_slice_with_attrs(dev, 4, GFP_KERNEL, attribs)?;
361 /// CPU-owned DMA allocation that can be converted into a device-shared [`Coherent`] object.
363 /// Unlike [`Coherent`],
560 impl<T: AsBytes + FromBytes + KnownSize + ?Sized> From<CoherentBox<T>> for Coherent<T> { global() implementation
595 pub struct Coherent<T: KnownSize + ?Sized> { global() struct
602 impl<T: KnownSize + ?Sized> Coherent<T> { global() implementation
705 impl<T: AsBytes + FromBytes> Coherent<T> { global() implementation
951 impl<T> Coherent<[T]> { global() implementation
964 impl<T: KnownSize + ?Sized> Drop for Coherent<T> { global() implementation
984 unsafe impl<T: KnownSize + Send + ?Sized> Send for Coherent<T> {} global() implementation
990 unsafe impl<T: KnownSize + ?Sized + AsBytes + FromBytes + Sync> Sync for Coherent<T> {} global() implementation
992 impl<T: KnownSize + AsBytes + ?Sized> debugfs::BinaryWriter for Coherent<T> { global() implementation
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/alderlake/ |
| H A D | uncore-interconnect.json | 12 …"BriefDescription": "Each cycle counts number of any coherent request at memory controller that we…
22 …"BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory…
54 …"BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is…
64 …"BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This ev…
73 …d from its allocation in ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.…
82 …"BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is…
92 …"BriefDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores,…
101 …"BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This ev…
|
| /linux/tools/perf/pmu-events/arch/x86/alderlaken/ |
| H A D | uncore-interconnect.json | 12 …"BriefDescription": "Each cycle counts number of any coherent request at memory controller that we…
22 …"BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory…
54 …"BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is…
64 …"BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This ev…
73 …d from its allocation in ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.…
82 …"BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is…
92 …"BriefDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores,…
101 …"BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This ev…
|
| /linux/tools/perf/pmu-events/arch/x86/amdzen4/ |
| H A D | data-fabric.json | 4 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 0.",
12 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 1.",
20 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 2.",
28 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 3.",
36 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 4.",
44 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 5.",
52 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 6.",
60 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 7.",
68 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 8.",
76 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 9.",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/haswell/ |
| H A D | uncore-interconnect.json | 3 …. Aperture requests (snoops) appear as NC decoded internally and become coherent (snoop L3, access…
8 …. Aperture requests (snoops) appear as NC decoded internally and become coherent (snoop L3, access…
22 …n till first of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-coherent traffic.…
31 … is waiting for data return from memory controller. Account for coherent and non-coherent requests…
41 … "Total number of Core outgoing entries allocated. Accounts for Coherent and non-coherent traffic.…
|
| /linux/tools/perf/pmu-events/arch/x86/ivybridge/ |
| H A D | uncore-interconnect.json | 21 …ing for data returning from the memory controller. Accounts for coherent and non-coherent requests…
30 …are waiting for data return from memory controller. Account for coherent and non-coherent requests…
40 … is waiting for data return from memory controller. Account for coherent and non-coherent requests…
50 …"BriefDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores,…
|
| /linux/tools/perf/pmu-events/arch/x86/sandybridge/ |
| H A D | uncore-interconnect.json | 21 …ing for data returning from the memory controller. Accounts for coherent and non-coherent requests…
30 …are waiting for data return from memory controller. Account for coherent and non-coherent requests…
40 … is waiting for data return from memory controller. Account for coherent and non-coherent requests…
50 …"BriefDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores,…
|
| /linux/tools/perf/pmu-events/arch/x86/tigerlake/ |
| H A D | uncore-interconnect.json | 12 "BriefDescription": "Each cycle counts number of any coherent request at memory controller that were issued by any core.",
22 "BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory controller that were issued by any core.",
54 "BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is defined as valid when it is allocated till deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_TRK_OCCUPANCY.RD]",
64 "BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches [This event is alias to UNC_ARB_TRK_REQUESTS.RD]",
74 "BriefDescription": "Each cycle count number of all outgoing valid entries in ReqTrk. Such entry is defined as valid from it's allocation in ReqTrk till deallocation. Accounts for Coherent and non-coherent traffic.",
83 "BriefDescription": "Each cycle count number of 'valid' coherent Data Read entries . Such entry is defined as valid when it is allocated till deallocation. Doesn't include prefetches [This event is alias to UNC_ARB_REQ_TRK_OCCUPANCY.DRD]",
93 "BriefDescription": "Total number of all outgoing entries allocated. Accounts for Coherent and non-coherent traffic.",
102 "BriefDescription": "Number of all coherent Dat
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/skylake/ |
| H A D | uncore-interconnect.json | 12 …ts after LLC miss till return of first data chunk. Accounts for Coherent and non-coherent traffic.…
21 … is waiting for data return from memory controller. Account for coherent and non-coherent requests…
49 …"BriefDescription": "Number of Core coherent Data Read requests sent to memory controller whose da…
58 …"BriefDescription": "Number of Core coherent Data Read requests sent to memory controller whose da…
|
| /linux/drivers/net/ethernet/mellanox/mlx4/ |
| H A D | icm.c | 79 void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent) in mlx4_free_icm() argument
87 if (coherent) in mlx4_free_icm()
133 gfp_t gfp_mask, int coherent) in mlx4_alloc_icm() argument
141 /* We use sg_set_buf for coherent allocs, which assumes low memory */ in mlx4_alloc_icm()
142 BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); in mlx4_alloc_icm()
171 chunk->coherent = coherent; in mlx4_alloc_icm()
173 if (!coherent) in mlx4_alloc_icm()
185 if (coherent) in mlx4_alloc_icm()
203 if (coherent) in mlx4_alloc_icm()
220 if (!coherent && chunk) { in mlx4_alloc_icm()
[all …]
|
| H A D | icm.h | 60 bool coherent; member
81 gfp_t gfp_mask, int coherent);
82 void mlx4_free_icm(struct mlx4_dev *dev, struct mlx4_icm *icm, int coherent);
127 if (iter->chunk->coherent) in mlx4_icm_addr()
135 if (iter->chunk->coherent) in mlx4_icm_size()
|
| /linux/arch/arc/boot/dts/ |
| H A D | axc003.dtsi | 94 * Mark DMA peripherals connected via IOC port as dma-coherent. We do
97 * only AXS103 board has HW-coherent DMA peripherals)
98 * We don't need to mark pgu@17000 as dma-coherent because it uses
103 dma-coherent;
107 dma-coherent;
111 dma-coherent;
115 dma-coherent;
|
| H A D | axc003_idu.dtsi | 101 * Mark DMA peripherals connected via IOC port as dma-coherent. We do
104 * only AXS103 board has HW-coherent DMA peripherals)
105 * We don't need to mark pgu@17000 as dma-coherent because it uses
110 dma-coherent;
114 dma-coherent;
118 dma-coherent;
122 dma-coherent;
|
| /linux/arch/arc/plat-hsdk/ |
| H A D | platform.c | 88 static int __init hsdk_tweak_node_coherency(const char *path, bool coherent) in hsdk_tweak_node_coherency() argument
99 prop = fdt_getprop(fdt, node, "dma-coherent", &ret); in hsdk_tweak_node_coherency()
106 /* need to remove "dma-coherent" property */ in hsdk_tweak_node_coherency()
107 if (dt_coh_set && !coherent) in hsdk_tweak_node_coherency()
108 ret = fdt_delprop(fdt, node, "dma-coherent"); in hsdk_tweak_node_coherency()
110 /* need to set "dma-coherent" property */ in hsdk_tweak_node_coherency()
111 if (!dt_coh_set && coherent) in hsdk_tweak_node_coherency()
112 ret = fdt_setprop(fdt, node, "dma-coherent", NULL, 0); in hsdk_tweak_node_coherency()
120 pr_err("failed to tweak %s to %scoherent\n", path, coherent ? "" : "non"); in hsdk_tweak_node_coherency()
191 bool coherent = !!arc_hsdk_axi_dmac_coherent; in hsdk_init_memory_bridge_axi_dmac() local
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/meteorlake/ |
| H A D | uncore-interconnect.json | 3 …"BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory…
22 "BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches",
58 …: "Total number of all outgoing entries allocated. Accounts for Coherent and non-coherent traffic.…
|
| /linux/drivers/misc/ocxl/ |
| H A D | Kconfig | 3 # Open Coherent Accelerator (OCXL) compatible devices
11 tristate "OpenCAPI coherent accelerator support"
17 Coherent Accelerator Processor Interface (OpenCAPI) devices.
|
| /linux/drivers/cpuidle/ |
| H A D | cpuidle-cps.c | 16 STATE_WAIT = 0, /* MIPS wait instruction, coherent */
17 STATE_NC_WAIT, /* MIPS wait instruction, non-coherent */
79 .desc = "non-coherent MIPS wait",
133 pr_cont("coherent wait\n"); in cps_cpuidle_init()
136 pr_cont("non-coherent wait\n"); in cps_cpuidle_init()
|
| /linux/drivers/infiniband/hw/mthca/ |
| H A D | mthca_memfree.c | 88 void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm, int coherent) in mthca_free_icm() argument
96 if (coherent) in mthca_free_icm()
138 gfp_t gfp_mask, int coherent) in mthca_alloc_icm() argument
145 /* We use sg_set_buf for coherent allocs, which assumes low memory */ in mthca_alloc_icm()
146 BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); in mthca_alloc_icm()
173 if (coherent) in mthca_alloc_icm()
184 if (coherent) in mthca_alloc_icm()
207 if (!coherent && chunk) { in mthca_alloc_icm()
218 mthca_free_icm(dev, icm, coherent); in mthca_alloc_icm()
236 __GFP_NOWARN, table->coherent); in mthca_table_get()
[all …]
|
| /linux/Documentation/devicetree/bindings/dma/ |
| H A D | marvell,xor-v2.yaml | 42 dma-coherent: true
48 - dma-coherent
60 dma-coherent;
|
| /linux/arch/arm64/boot/dts/marvell/ |
| H A D | armada-ap810-ap0.dtsi | 76 dma-coherent;
84 dma-coherent;
92 dma-coherent;
100 dma-coherent;
|
| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | vidioc-reqbufs.rst | 162 :ref:`V4L2_MEMORY_FLAG_NON_COHERENT <V4L2-MEMORY-FLAG-NON-COHERENT>`.
172 .. _V4L2-MEMORY-FLAG-NON-COHERENT:
181 - A buffer is allocated either in coherent (it will be automatically
182 coherent between the CPU and the bus) or non-coherent memory. The
189 allocate the buffer in non-coherent memory. The flag takes effect
|