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/linux/include/linux/i3c/
H A Dccc.h14 /* I3C CCC (Common Command Codes) related definitions */
56 * struct i3c_ccc_events - payload passed to ENEC/DISEC CCC
60 * Depending on the CCC command, the specific events coming from all devices
69 * struct i3c_ccc_mwl - payload passed to SETMWL/GETMWL CCC
81 * struct i3c_ccc_mrl - payload passed to SETMRL/GETMRL CCC
121 * struct i3c_ccc_defslvs - payload passed to DEFSLVS CCC
150 * struct i3c_ccc_enttm - payload passed to ENTTM CCC
154 * Information passed to the ENTTM CCC to instruct an I3C device to enter a
174 * struct i3c_ccc_getpid - payload passed to GETPID CCC
183 * struct i3c_ccc_getbcr - payload passed to GETBCR CCC
[all …]
H A Dmaster.h15 #include <linux/i3c/ccc.h>
352 * dynamic address (RSTDAA CCC), we need to make sure no one is trying
409 * should send an ENTDAA CCC command and then add all devices
414 * @supports_ccc_cmd: should return true if the CCC command is supported, false
417 * all CCC commands are supported.
418 * @send_ccc_cmd: send a CCC command
449 * IRQ) and then send the ENEC CCC command (with the IBI flag set)
452 * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI
/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dcore.c185 struct i3c_ccc_cmd *ccc) in i3c_hci_send_ccc_cmd() argument
190 bool prefixed = raw && !!(ccc->id & I3C_CCC_DIRECT); in i3c_hci_send_ccc_cmd()
191 unsigned int nxfers = ccc->ndests + prefixed; in i3c_hci_send_ccc_cmd()
196 ccc->id, ccc->rnw, ccc->ndests, ccc->dests[0].payload.len); in i3c_hci_send_ccc_cmd()
207 ccc->id, true); in i3c_hci_send_ccc_cmd()
212 xfer[i].data = ccc->dests[i].payload.data; in i3c_hci_send_ccc_cmd()
213 xfer[i].data_len = ccc->dests[i].payload.len; in i3c_hci_send_ccc_cmd()
214 xfer[i].rnw = ccc->rnw; in i3c_hci_send_ccc_cmd()
215 ret = hci->cmd->prep_ccc(hci, &xfer[i], ccc->dests[i].addr, in i3c_hci_send_ccc_cmd()
216 ccc->id, raw); in i3c_hci_send_ccc_cmd()
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dmicrochip,mpfs-ccc.yaml4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#
20 const: microchip,mpfs-ccc
31 The CCC PLL's have two input clocks. It is required that even if the input
72 compatible = "microchip,mpfs-ccc";
/linux/fs/unicode/
H A Dmkutf8data.c151 * defined. The CCC of a non-defined code point is 0.
154 * with a non-zero CCC that occur between two characters with
155 * a CCC of 0, or at the begin or end of a string.
156 * The unicode standard guarantees that all CCC values are
159 * Code points with CCC 0 are known as stoppers.
163 * The CCC of a decomposable character is the same as the CCC
167 * These do affect normalization, as they all have CCC 0.
1341 int ccc; member
1381 if (left->ccc != right->ccc) in nfdi_equal()
1398 if (left->ccc != right->ccc) in nfdicf_equal()
[all …]
/linux/drivers/power/supply/
H A Daxp20x_battery.c963 int ccc = info->constant_charge_current_max_ua; in axp209_set_battery_info() local
969 /* Set max to unverified value to be able to set CCC */ in axp209_set_battery_info()
970 axp_batt->max_ccc = ccc; in axp209_set_battery_info()
972 if (ccc <= 0 || axp20x_set_constant_charge_current(axp_batt, ccc)) { in axp209_set_battery_info()
974 "couldn't set ccc from DT: fallback to min value\n"); in axp209_set_battery_info()
975 ccc = 300000; in axp209_set_battery_info()
976 axp_batt->max_ccc = ccc; in axp209_set_battery_info()
977 axp20x_set_constant_charge_current(axp_batt, ccc); in axp209_set_battery_info()
987 int ccc = info->constant_charge_current_max_ua; in axp717_set_battery_info() local
1017 axp_batt->max_ccc = ccc; in axp717_set_battery_info()
[all …]
/linux/drivers/clk/microchip/
H A Dclk-mpfs-ccc.c58 * mpfs_ccc_lock prevents anything else from writing to a fabric ccc
204 pll_hw->name = devm_kasprintf(dev, GFP_KERNEL, "ccc%s_pll%u", in mpfs_ccc_register_plls()
216 return dev_err_probe(dev, ret, "failed to register ccc id: %d\n", in mpfs_ccc_register_plls()
267 { .compatible = "microchip,mpfs-ccc", },
275 .name = "microchip-mpfs-ccc",
H A DMakefile5 obj-$(CONFIG_MCHP_CLK_MPFS) += clk-mpfs-ccc.o
/linux/drivers/i3c/master/
H A Ddw-i3c-master.c702 struct i3c_ccc_cmd *ccc) in dw_i3c_ccc_set() argument
708 if (ccc->id & I3C_CCC_DIRECT) { in dw_i3c_ccc_set()
709 pos = dw_i3c_master_get_addr_pos(master, ccc->dests[0].addr); in dw_i3c_ccc_set()
719 cmd->tx_buf = ccc->dests[0].payload.data; in dw_i3c_ccc_set()
720 cmd->tx_len = ccc->dests[0].payload.len; in dw_i3c_ccc_set()
722 cmd->cmd_hi = COMMAND_PORT_ARG_DATA_LEN(ccc->dests[0].payload.len) | in dw_i3c_ccc_set()
727 COMMAND_PORT_CMD(ccc->id) | in dw_i3c_ccc_set()
737 ccc->err = I3C_ERROR_M2; in dw_i3c_ccc_set()
744 static int dw_i3c_ccc_get(struct dw_i3c_master *master, struct i3c_ccc_cmd *ccc) in dw_i3c_ccc_get() argument
750 pos = dw_i3c_master_get_addr_pos(master, ccc->dests[0].addr); in dw_i3c_ccc_get()
[all …]
H A Drenesas-i3c.c730 struct i3c_ccc_cmd *ccc) in renesas_i3c_send_ccc_cmd() argument
737 if (ccc->id & I3C_CCC_DIRECT) { in renesas_i3c_send_ccc_cmd()
738 pos = renesas_i3c_get_addr_pos(i3c, ccc->dests[0].addr); in renesas_i3c_send_ccc_cmd()
751 cmd->rnw = ccc->rnw; in renesas_i3c_send_ccc_cmd()
755 switch (ccc->id) { in renesas_i3c_send_ccc_cmd()
758 DATBAS_DVSTAD(ccc->dests[0].addr) | in renesas_i3c_send_ccc_cmd()
759 DATBAS_DVDYAD(*(u8 *)ccc->dests[0].payload.data >> 1)); in renesas_i3c_send_ccc_cmd()
769 NCMDQP_RNW(ccc->rnw) | NCMDQP_CMD(ccc->id) | in renesas_i3c_send_ccc_cmd()
773 if (ccc->rnw) { in renesas_i3c_send_ccc_cmd()
774 cmd->rx_buf = ccc->dests[0].payload.data; in renesas_i3c_send_ccc_cmd()
[all …]
H A Dsvc-i3c-master.c1565 /* cmd->xfer is NULL if I2C or CCC transfer */ in svc_i3c_master_start_xfer_locked()
1618 /* No software support for CCC commands targeting more than one slave */ in svc_i3c_master_supports_ccc_cmd()
1623 struct i3c_ccc_cmd *ccc) in svc_i3c_master_send_bdcast_ccc_cmd() argument
1625 unsigned int xfer_len = ccc->dests[0].payload.len + 1; in svc_i3c_master_send_bdcast_ccc_cmd()
1641 buf[0] = ccc->id; in svc_i3c_master_send_bdcast_ccc_cmd()
1642 memcpy(&buf[1], ccc->dests[0].payload.data, ccc->dests[0].payload.len); in svc_i3c_master_send_bdcast_ccc_cmd()
1647 cmd->addr = ccc->dests[0].addr; in svc_i3c_master_send_bdcast_ccc_cmd()
1648 cmd->rnw = ccc->rnw; in svc_i3c_master_send_bdcast_ccc_cmd()
1669 struct i3c_ccc_cmd *ccc) in svc_i3c_master_send_direct_ccc_cmd() argument
1671 unsigned int xfer_len = ccc->dests[0].payload.len; in svc_i3c_master_send_direct_ccc_cmd()
[all …]
/linux/arch/mips/include/asm/
H A Dpgtable-bits.h203 * 64-bit, R1 or earlier: CCC D V G [S H] M A W R P
204 * 32-bit, R1 or earlier: CCC D V G M A W R P
205 * 64-bit, R2 or later: CCC D V G RI/R XI [S H] M A W P
206 * 32-bit, R2 or later: CCC D V G RI/R XI M A W P
/linux/tools/perf/tests/
H A Dsubcmd-help.c40 TEST_ASSERT_VAL("wrong cmd", is_in_cmdlist(&cmds, "ccc") == 0); in test__uniq_cmdnames()
54 add_cmdname(&cmds1, "ccc", 3); in test__exclude_cmdnames()
79 TEST_ASSERT_VAL("cannot find cmd", is_in_cmdlist(&cmds1, "ccc") == 1); in test__exclude_cmdnames()
/linux/arch/x86/include/asm/
H A Darchrandom.h26 : "=@ccc" (ok), [out] "=r" (*v)); in rdrand_long()
37 : "=@ccc" (ok), [out] "=r" (*v)); in rdseed_long()
H A Dbitops.h151 : "=@ccc" (oldbit) in arch___test_and_set_bit()
176 : "=@ccc" (oldbit) in arch___test_and_clear_bit()
187 : "=@ccc" (oldbit) in arch___test_and_change_bit()
223 : "=@ccc" (oldbit) in variable_test_bit()
H A Dsignal.h86 asm("btl %2,%1" : "=@ccc"(ret) : "m"(*set), "Ir"(_sig-1)); in __gen_sigismember()
/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi263 compatible = "microchip,mpfs-ccc";
271 compatible = "microchip,mpfs-ccc";
279 compatible = "microchip,mpfs-ccc";
287 compatible = "microchip,mpfs-ccc";
/linux/arch/x86/boot/
H A Dbitops.h30 asm("btl %2,%1" : "=@ccc" (v) : "m" (*p), "Ir" (nr)); in variable_test_bit()
/linux/drivers/i3c/
H A Dmaster.c71 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
952 * Send a ENTDAA CCC command to start a DAA procedure.
954 * Note that this function only sends the ENTDAA CCC command, all the logic
1003 * i3c_master_disec_locked() - send a DISEC CCC command
1008 * Send a DISEC CCC command to disable some or all events coming from a
1024 * i3c_master_enec_locked() - send an ENEC CCC command
1029 * Sends an ENEC CCC command to enable some or all events coming from a
1045 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1048 * Send a DEFSLVS CCC command containing all the devices known to the @master.
1263 * while expecting shorter length from this CCC command. in i3c_master_getmxds_locked()
[all …]
/linux/fs/smb/client/
H A Dcifsroot.c28 char addr[sizeof("aaa.bbb.ccc.ddd")]; in parse_srvaddr()
/linux/Documentation/gpu/amdgpu/display/
H A Dmpo-cursor.svg402 sodipodi:nodetypes="ccc" />
408 sodipodi:nodetypes="ccc" />
414 sodipodi:nodetypes="ccc" />
/linux/tools/perf/bench/
H A Dfind-bit-bench.c46 : "=@ccc" (oldbit) in asm_test_bit()
/linux/samples/kfifo/
H A Drecord-example.c59 "ccc",
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v13_0_7_pptable.h30 #define SMU_13_0_7_PP_PLATFORM_CAP_POWERPLAY 0x1 // This cap indicates whether CCC need to s…
/linux/arch/arm64/kvm/
H A Demulate-nested.c584 #define CCC(id, fn) \ macro
587 static const complex_condition_check ccc[] = { variable
588 CCC(CGT_CNTHCTL_EL1PCTEN, check_cnthctl_el1pcten),
589 CCC(CGT_CNTHCTL_EL1PTEN, check_cnthctl_el1pten),
590 CCC(CGT_CNTHCTL_EL1NVPCT, check_cnthctl_el1nvpct),
591 CCC(CGT_CNTHCTL_EL1NVVCT, check_cnthctl_el1nvvct),
592 CCC(CGT_CPTR_TTA, check_cptr_tta),
593 CCC(CGT_MDCR_HPMN, check_mdcr_hpmn),
2405 if (ARRAY_SIZE(ccc)) in __compute_trap_behaviour()
2406 b |= ccc[id - __COMPLEX_CONDITIONS__](vcpu); in __compute_trap_behaviour()

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