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/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-srggb10-ipu3.rst20 sRGB / Bayer formats with 10 bits per sample with every 25 pixels packed
21 to 32 bytes leaving 6 most significant bits padding in the last byte.
40 - G\ :sub:`0001low`\ (bits 7--2)
42 B\ :sub:`0000high`\ (bits 1--0)
43 - B\ :sub:`0002low`\ (bits 7--4)
45 G\ :sub:`0001high`\ (bits 3--0)
46 - G\ :sub:`0003low`\ (bits 7--6)
48 B\ :sub:`0002high`\ (bits 5--0)
52 - G\ :sub:`0005low`\ (bits 7--2)
54 B\ :sub:`0004high`\ (bits 1--0)
[all …]
H A Dpixfmt-srggb14p.rst24 bits per colour. Every four consecutive samples are packed into seven
25 bytes. Each of the first four bytes contain the eight high order bits
27 significants bits of each pixel, in the same order.
63 - G\ :sub:`01low bits 1--0`\ (bits 7--6)
65 B\ :sub:`00low bits 5--0`\ (bits 5--0)
67 - B\ :sub:`02low bits 3--0`\ (bits 7--4)
69 G\ :sub:`01low bits 5--2`\ (bits 3--0)
71 - G\ :sub:`03low bits 5--0`\ (bits 7--2)
73 B\ :sub:`02low bits 5--4`\ (bits 1--0)
87 - R\ :sub:`11low bits 1--0`\ (bits 7--6)
[all …]
/linux/drivers/crypto/hisilicon/sec2/
H A Dsec_crypto.h97 * mac_len: 0~4 bits
98 * a_key_len: 5~10 bits
99 * a_alg: 11~16 bits
104 * c_icv_len: 0~5 bits
105 * c_width: 6~8 bits
106 * c_key_len: 9~11 bits
107 * c_mode: 12~15 bits
111 /* c_alg: 0~3 bits */
116 * a_len: 0~23 bits
117 * iv_offset_l: 24~31 bits
[all …]
/linux/include/sound/
H A Dcs8403.h24 SND_CS8403_DECL void SND_CS8403_DECODE(struct snd_aes_iec958 *diga, unsigned char bits) in SND_CS8403_DECODE() argument
26 if (bits & 0x01) { /* consumer */ in SND_CS8403_DECODE()
27 if (!(bits & 0x02)) in SND_CS8403_DECODE()
29 if (!(bits & 0x08)) in SND_CS8403_DECODE()
31 switch (bits & 0x10) { in SND_CS8403_DECODE()
35 if (!(bits & 0x80)) in SND_CS8403_DECODE()
37 switch (bits & 0x60) { in SND_CS8403_DECODE()
43 switch (bits & 0x06) { in SND_CS8403_DECODE()
50 switch (bits & 0x18) { in SND_CS8403_DECODE()
56 switch (bits & 0x60) { in SND_CS8403_DECODE()
[all …]
/linux/arch/sparc/include/asm/
H A Dpcic.h50 #define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */
51 #define PCI_SIZE_0 0x44 /* 32 bits */
52 #define PCI_SIZE_1 0x48 /* 32 bits */
53 #define PCI_SIZE_2 0x4c /* 32 bits */
54 #define PCI_SIZE_3 0x50 /* 32 bits */
55 #define PCI_SIZE_4 0x54 /* 32 bits */
56 #define PCI_SIZE_5 0x58 /* 32 bits */
57 #define PCI_PIO_CONTROL 0x60 /* 8 bits */
58 #define PCI_DVMA_CONTROL 0x62 /* 8 bits */
63 #define PCI_INTERRUPT_CONTROL 0x63 /* 8 bits */
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-peripherals-opp.dtsi9 opp-hz = /bits/ 64 <12750000>;
15 opp-hz = /bits/ 64 <12750000>;
21 opp-hz = /bits/ 64 <12750000>;
27 opp-hz = /bits/ 64 <12750000>;
33 opp-hz = /bits/ 64 <20400000>;
39 opp-hz = /bits/ 64 <20400000>;
45 opp-hz = /bits/ 64 <20400000>;
51 opp-hz = /bits/ 64 <20400000>;
57 opp-hz = /bits/ 64 <40800000>;
63 opp-hz = /bits/ 64 <40800000>;
[all …]
H A Dtegra30-peripherals-opp.dtsi59 opp-hz = /bits/ 64 <12750000>;
66 opp-hz = /bits/ 64 <12750000>;
73 opp-hz = /bits/ 64 <12750000>;
80 opp-hz = /bits/ 64 <25500000>;
87 opp-hz = /bits/ 64 <25500000>;
94 opp-hz = /bits/ 64 <25500000>;
101 opp-hz = /bits/ 64 <27000000>;
108 opp-hz = /bits/ 64 <27000000>;
115 opp-hz = /bits/ 64 <27000000>;
122 opp-hz = /bits/ 64 <51000000>;
[all …]
H A Dtegra20-peripherals-opp.dtsi49 opp-hz = /bits/ 64 <36000000>;
56 opp-hz = /bits/ 64 <47500000>;
63 opp-hz = /bits/ 64 <50000000>;
70 opp-hz = /bits/ 64 <54000000>;
77 opp-hz = /bits/ 64 <57000000>;
84 opp-hz = /bits/ 64 <100000000>;
91 opp-hz = /bits/ 64 <108000000>;
98 opp-hz = /bits/ 64 <126666000>;
105 opp-hz = /bits/ 64 <150000000>;
112 opp-hz = /bits/ 64 <190000000>;
[all …]
H A Dtegra30-cpu-opp.dtsi11 opp-hz = /bits/ 64 <51000000>;
17 opp-hz = /bits/ 64 <51000000>;
23 opp-hz = /bits/ 64 <51000000>;
29 opp-hz = /bits/ 64 <102000000>;
35 opp-hz = /bits/ 64 <102000000>;
41 opp-hz = /bits/ 64 <102000000>;
47 opp-hz = /bits/ 64 <204000000>;
54 opp-hz = /bits/ 64 <204000000>;
61 opp-hz = /bits/ 64 <204000000>;
68 opp-hz = /bits/ 64 <312000000>;
[all …]
H A Dtegra20-cpu-opp.dtsi11 opp-hz = /bits/ 64 <216000000>;
18 opp-hz = /bits/ 64 <216000000>;
25 opp-hz = /bits/ 64 <312000000>;
31 opp-hz = /bits/ 64 <312000000>;
37 opp-hz = /bits/ 64 <456000000>;
44 opp-hz = /bits/ 64 <456000000>;
50 opp-hz = /bits/ 64 <456000000>;
56 opp-hz = /bits/ 64 <608000000>;
62 opp-hz = /bits/ 64 <608000000>;
68 opp-hz = /bits/ 64 <608000000>;
[all …]
/linux/include/linux/mfd/da9052/
H A Dreg.h178 /* STATUS REGISTER A BITS */
188 /* STATUS REGISTER B BITS */
198 /* STATUS REGISTER C BITS */
208 /* STATUS REGISTER D BITS */
218 /* EVENT REGISTER A BITS */
228 /* EVENT REGISTER B BITS */
238 /* EVENT REGISTER C BITS */
248 /* EVENT REGISTER D BITS */
258 /* IRQ MASK REGISTERS BITS */
261 /* TSI EVENT REGISTERS BITS */
[all …]
/linux/arch/parisc/include/asm/
H A Delf.h61 #define R_PARISC_DIR21L 2 /* Left 21 bits of eff. address. */
62 #define R_PARISC_DIR17R 3 /* Right 17 bits of eff. address. */
63 #define R_PARISC_DIR17F 4 /* 17 bits of eff. address. */
64 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
66 #define R_PARISC_PCREL21L 10 /* Left 21 bits of rel. address. */
67 #define R_PARISC_PCREL17R 11 /* Right 17 bits of rel. address. */
68 #define R_PARISC_PCREL17F 12 /* 17 bits of rel. address. */
69 #define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
70 #define R_PARISC_DPREL21L 18 /* Left 21 bits of rel. address. */
71 #define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-peripherals-opp.dtsi10 opp-hz = /bits/ 64 <12750000>;
16 opp-hz = /bits/ 64 <12750000>;
22 opp-hz = /bits/ 64 <12750000>;
28 opp-hz = /bits/ 64 <12750000>;
34 opp-hz = /bits/ 64 <20400000>;
40 opp-hz = /bits/ 64 <20400000>;
46 opp-hz = /bits/ 64 <20400000>;
52 opp-hz = /bits/ 64 <20400000>;
58 opp-hz = /bits/ 64 <40800000>;
64 opp-hz = /bits/ 64 <40800000>;
[all …]
/linux/arch/arc/include/asm/
H A Ddisasm.h32 #define BITS(word, s, e) (((word) >> (s)) & (~((-2) << ((e) - (s))))) macro
34 #define MAJOR_OPCODE(word) (BITS((word), 27, 31))
35 #define MINOR_OPCODE(word) (BITS((word), 16, 21))
36 #define FIELD_A(word) (BITS((word), 0, 5))
37 #define FIELD_B(word) ((BITS((word), 12, 14)<<3) | \
38 (BITS((word), 24, 26)))
39 #define FIELD_C(word) (BITS((word), 6, 11))
41 #define FIELD_s12(word) sign_extend(((BITS((word), 0, 5) << 6) | \
42 BITS((word), 6, 11)), 12)
46 #define FIELD_s9(word) sign_extend(((BITS(word, 15, 15) << 8) | \
[all …]
/linux/lib/
H A Dbitmap.c17 * bitmaps provide an array of bits, implemented using an
18 * array of unsigned longs. The number of valid bits in a
22 * The possible unused bits in the last, partially used word
28 * carefully filter out these unused bits from impacting their
38 const unsigned long *bitmap2, unsigned int bits) in __bitmap_equal() argument
40 unsigned int k, lim = bits/BITS_PER_LONG; in __bitmap_equal()
45 if (bits % BITS_PER_LONG) in __bitmap_equal()
46 if ((bitmap1[k] ^ bitmap2[k]) & BITMAP_LAST_WORD_MASK(bits)) in __bitmap_equal()
56 unsigned int bits) in __bitmap_or_equal() argument
58 unsigned int k, lim = bits / BITS_PER_LONG; in __bitmap_or_equal()
[all …]
/linux/drivers/net/ipa/reg/
H A Dipa_reg-v4.5.c6 #include <linux/bits.h>
32 /* Bits 22-31 reserved */
80 /* Bits 22-23 reserved */
82 /* Bits 25-31 reserved */
97 /* Bits 8-31 reserved */
105 /* Bits 8-15 reserved */
114 /* Bits 1-3 reserved */
116 /* Bits 5-7 reserved */
118 /* Bits 9-11 reserved */
120 /* Bits 13-31 reserved */
[all …]
H A Dipa_reg-v4.2.c6 #include <linux/bits.h>
31 /* Bits 21-31 reserved */
67 /* Bits 30-31 reserved */
78 /* Bits 22-23 reserved */
80 /* Bits 25-31 reserved */
95 /* Bits 8-31 reserved */
103 /* Bits 8-15 reserved */
112 /* Bits 1-3 reserved */
114 /* Bits 5-7 reserved */
116 /* Bits 9-11 reserved */
[all …]
H A Dipa_reg-v5.5.c6 #include <linux/bits.h>
39 /* Bits 17-18 reserved */
44 /* Bits 28-29 reserved */
95 /* Bits 29-31 reserved */
110 /* Bits 8-31 reserved */
118 /* Bits 8-15 reserved */
125 /* Valid bits defined by ipa->available */
131 /* Bits 1-3 reserved */
133 /* Bits 5-31 reserved */
140 /* Bits 18-31 reserved */
[all …]
H A Dipa_reg-v3.5.1.c6 #include <linux/bits.h>
18 /* Bits 5-31 reserved */
46 /* Bits 22-31 reserved */
57 /* Bits 22-23 reserved */
59 /* Bits 25-31 reserved */
74 /* Bits 8-31 reserved */
88 /* Bits 1-3 reserved */
90 /* Bits 5-7 reserved */
92 /* Bits 9-11 reserved */
94 /* Bits 13-31 reserved */
[all …]
H A Dipa_reg-v5.0.c6 #include <linux/bits.h>
45 /* Bits 28-29 reserved */
96 /* Bits 29-31 reserved */
111 /* Bits 8-31 reserved */
119 /* Bits 8-15 reserved */
126 /* Valid bits defined by ipa->available */
132 /* Bits 1-3 reserved */
134 /* Bits 5-31 reserved */
141 /* Bits 18-31 reserved */
148 /* Bits 0-1 reserved */
[all …]
/linux/Documentation/userspace-api/media/rc/
H A Drc-protos.rst32 This IR protocol uses manchester encoding to encode 14 bits. There is a
38 .. flat-table:: rc5 bits scancode mapping
81 done to keep it compatible with plain rc-5 where there are two start bits.
88 .. flat-table:: rc-5-sz bits scancode mapping
91 * - rc-5-sz bits
130 This rc-5 extended to encoded 20 bits. The is a 3555 microseconds space
133 .. flat-table:: rc-5x-20 bits scancode mapping
136 * - rc-5-sz bits
185 The scancode is a 16 bits value, where the address is the lower 8 bits
186 and the command the higher 8 bits; this is reversed from IR order.
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-echo.dts148 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
158 led-cur = /bits/ 8 <12>;
159 max-cur = /bits/ 8 <15>;
165 led-cur = /bits/ 8 <12>;
166 max-cur = /bits/ 8 <15>;
172 led-cur = /bits/ 8 <12>;
173 max-cur = /bits/ 8 <15>;
185 led-cur = /bits/ 8 <12>;
186 max-cur = /bits/ 8 <15>;
192 led-cur = /bits/ 8 <12>;
[all …]
/linux/drivers/media/radio/si470x/
H A Dradio-si470x.h41 #define DEVICEID_PN 0xf000 /* bits 15..12: Part Number */
42 #define DEVICEID_MFGID 0x0fff /* bits 11..00: Manufacturer ID */
45 #define SI_CHIPID_REV 0xfc00 /* bits 15..10: Chip Version */
46 #define SI_CHIPID_DEV 0x0200 /* bits 09..09: Device */
47 #define SI_CHIPID_FIRMWARE 0x01ff /* bits 08..00: Firmware Version */
50 #define POWERCFG_DSMUTE 0x8000 /* bits 15..15: Softmute Disable */
51 #define POWERCFG_DMUTE 0x4000 /* bits 14..14: Mute Disable */
52 #define POWERCFG_MONO 0x2000 /* bits 13..13: Mono Select */
53 #define POWERCFG_RDSM 0x0800 /* bits 11..11: RDS Mode (Si4701 only) */
54 #define POWERCFG_SKMODE 0x0400 /* bits 10..10: Seek Mode */
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-op1.dtsi14 opp-hz = /bits/ 64 <408000000>;
19 opp-hz = /bits/ 64 <600000000>;
23 opp-hz = /bits/ 64 <816000000>;
27 opp-hz = /bits/ 64 <1008000000>;
31 opp-hz = /bits/ 64 <1200000000>;
35 opp-hz = /bits/ 64 <1416000000>;
39 opp-hz = /bits/ 64 <1512000000>;
49 opp-hz = /bits/ 64 <408000000>;
54 opp-hz = /bits/ 64 <600000000>;
58 opp-hz = /bits/ 64 <816000000>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p.dtsi18 opp-hz = /bits/ 64 <300000000>;
22 opp-hz = /bits/ 64 <403200000>;
26 opp-hz = /bits/ 64 <499200000>;
30 opp-hz = /bits/ 64 <595200000>;
34 opp-hz = /bits/ 64 <710400000>;
38 opp-hz = /bits/ 64 <806400000>;
42 opp-hz = /bits/ 64 <902400000>;
46 opp-hz = /bits/ 64 <1017600000>;
50 opp-hz = /bits/ 64 <1113600000>;
54 opp-hz = /bits/ 64 <1209600000>;
[all …]

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