Home
last modified time | relevance | path

Searched full:a9 (Results 1 – 25 of 287) sorted by relevance

12345678910>>...12

/linux/arch/xtensa/lib/
H A Dstrncpy_user.S45 # a9/ tmp
64 movi a9, 3
65 bnone a11, a9, .Laligned
69 EX(11f) l8ui a9, a3, 0 # get byte 0
71 EX(10f) s8i a9, a11, 0 # store byte 0
72 beqz a9, .Lret # if byte 0 is zero
79 EX(11f) l8ui a9, a3, 0 # get byte 0
81 EX(10f) s8i a9, a11, 0 # store byte 0
82 beqz a9, .Lret # if byte 0 is zero
86 EX(11f) l8ui a9, a3, 1 # get byte 0
[all …]
H A Dchecksum.S185 a9 = temp
205 extui a9, a10, 0, 2
206 beqz a9, 1f /* branch if both are 4-byte aligned */
224 EX(10f) l32i a9, a2, 0
226 EX(10f) s32i a9, a3, 0
228 ONES_ADD(a5, a9)
230 EX(10f) l32i a9, a2, 8
232 EX(10f) s32i a9, a3, 8
234 ONES_ADD(a5, a9)
236 EX(10f) l32i a9, a2, 16
[all …]
H A Dstrnlen_user.S42 # a9/ tmp
72 EX(10f) l32i a9, a4, 4 # get next word of string
74 bnone a9, a5, .Lz0 # if byte 0 is zero
75 bnone a9, a6, .Lz1 # if byte 1 is zero
76 bnone a9, a7, .Lz2 # if byte 2 is zero
77 bnone a9, a8, .Lz3 # if byte 3 is zero
83 EX(10f) l32i a9, a4, 4 # load 4 bytes for remaining checks
88 bnone a9, a5, .Lz0 # if byte 0 is zero
89 bnone a9, a6, .Lz1 # if byte 1 is zero
120 EX(10f) l8ui a9, a4, 4 # get byte 0
[all …]
H A Dumulsidi3.S120 /* Add pp1 and pp2 into a6 with carry-out in a9. */
123 movi a9, 0
126 addi a9, a9, 1
128 /* Shift the high half of a9/a6 into position in a9. Note that
131 src a9, a9, a6
138 addi a9, a9, 1
142 add wh, wh, a9
H A Dmemcopy.S53 * a9/ tmp
218 l32i a9, a3, 12
222 __src_b a8, a8, a9
225 __src_b a9, a9, a6
226 s32i a9, a5, 12
308 * a9/ tmp
482 l32i a9, a3, 4
486 __src_b a8, a9, a8
488 __src_b a9, a6, a9
489 s32i a9, a5, 0
/linux/arch/xtensa/mm/
H A Dmisc.S66 l32i a9, a3, 4
68 s32i a9, a2, 4
71 l32i a9, a3, 12
73 s32i a9, a2, 12
76 l32i a9, a3, 20
78 s32i a9, a2, 20
81 l32i a9, a3, 28
83 s32i a9, a2, 28
178 l32i a9, a3, 4
180 s32i a9, a2, 4
[all …]
/linux/arch/arm/boot/dts/calxeda/
H A Dhighbank.dts22 compatible = "arm,cortex-a9";
41 compatible = "arm,cortex-a9";
60 compatible = "arm,cortex-a9";
79 compatible = "arm,cortex-a9";
114 compatible = "arm,cortex-a9-twd-timer";
121 compatible = "arm,cortex-a9-twd-wdt";
128 compatible = "arm,cortex-a9-gic";
144 compatible = "arm,cortex-a9-pmu";
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca9.dts6 * Cortex-A9 MPCore (V2P-CA9)
42 compatible = "arm,cortex-a9";
49 compatible = "arm,cortex-a9";
56 compatible = "arm,cortex-a9";
63 compatible = "arm,cortex-a9";
141 compatible = "arm,cortex-a9-scu";
146 compatible = "arm,cortex-a9-twd-timer";
152 compatible = "arm,cortex-a9-twd-wdt";
158 compatible = "arm,cortex-a9-gic";
177 compatible = "arm,cortex-a9-pmu";
[all …]
H A Darm-realview-pbx-a9.dts28 * This is the RealView Platform Baseboard Explore for Cortex-A9
31 model = "ARM RealView Platform Baseboard Explore for Cortex-A9";
51 compatible = "arm,cortex-a9";
57 compatible = "arm,cortex-a9";
82 compatible = "arm,cortex-a9-scu";
87 compatible = "arm,cortex-a9-twd-timer";
94 compatible = "arm,cortex-a9-twd-wdt";
101 compatible = "arm,cortex-a9-pmu";
110 compatible = "arm,cortex-a9-gic";
H A Darm-realview-eb-a9mp.dts27 model = "ARM RealView EB Cortex A9 MPCore";
30 * This is the Cortex A9 MPCore tile used with the
40 compatible = "arm,cortex-a9";
47 compatible = "arm,cortex-a9";
54 compatible = "arm,cortex-a9";
61 compatible = "arm,cortex-a9";
/linux/Documentation/devicetree/bindings/arm/
H A Darm,scu.yaml13 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided
18 - Cortex-A9: see DDI0407E Cortex-A9 MPCore Technical Reference Manual
28 - arm,cortex-a9-scu
44 compatible = "arm,cortex-a9-scu";
/linux/arch/xtensa/kernel/
H A Dcoprocessor.S169 s32i a9, a1, PT_AREG9
199 /* Set new owner (a9). */
201 GET_THREAD_INFO (a9, a1)
202 l32i a4, a9, THREAD_CPU
203 s32i a9, a0, EXC_TABLE_COPROCESSOR_OWNER
204 s32i a4, a9, THREAD_CP_OWNER_CPU
210 l32i a4, a9, THREAD_CPENABLE
218 s32i a4, a9, THREAD_CPENABLE
245 add a2, a2, a9
251 l32i a9, a1, PT_AREG9
H A Dmcount.S53 movi a9, ftrace_trace_function
54 l32i a9, a9, 0
56 bne a9, a11, 1f
68 callx0 a9
/linux/arch/arm/boot/dts/st/
H A Dstih407-clock.dtsi28 * A9 PLL.
30 clockgen-a9@92b0000 {
34 clockgen_a9_pll: clockgen-a9-pll {
41 clk_m_a9: clk-m-a9 {
43 compatible = "st,stih407-clkgen-a9-mux";
53 arm_periph_clk: clk-m-a9-periphs {
125 clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
131 clock-output-names = "clk-m-a9-ext2f-div2";
H A Dstih410-clock.dtsi31 * A9 PLL.
33 clockgen-a9@92b0000 {
37 clockgen_a9_pll: clockgen-a9-pll {
47 clk_m_a9: clk-m-a9 {
49 compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
59 arm_periph_clk: clk-m-a9-periphs {
130 clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
136 clock-output-names = "clk-m-a9-ext2f-div2";
H A Dstih418-clock.dtsi31 * A9 PLL.
33 clockgen-a9@92b0000 {
37 clockgen_a9_pll: clockgen-a9-pll {
47 clk_m_a9: clk-m-a9 {
49 compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";
59 arm_periph_clk: clk-m-a9-periphs {
130 clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {
136 clock-output-names = "clk-m-a9-ext2f-div2";
/linux/arch/arm/boot/dts/actions/
H A Dowl-s500.dtsi32 compatible = "arm,cortex-a9";
39 compatible = "arm,cortex-a9";
46 compatible = "arm,cortex-a9";
54 compatible = "arm,cortex-a9";
62 compatible = "arm,cortex-a9-pmu";
89 compatible = "arm,cortex-a9-scu";
94 compatible = "arm,cortex-a9-global-timer";
101 compatible = "arm,cortex-a9-twd-timer";
108 compatible = "arm,cortex-a9-twd-wdt";
115 compatible = "arm,cortex-a9-gic";
/linux/Documentation/devicetree/bindings/arm/cpu-enable-method/
H A Dnuvoton,npcm750-smp10 Compatible CPUs: "arm,cortex-a9"
14 This enable method needs valid nodes compatible with "arm,cortex-a9-scu" and
26 compatible = "arm,cortex-a9";
35 compatible = "arm,cortex-a9";
/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-dt.txt31 compatible = "arm,cortex-a9";
45 compatible = "arm,cortex-a9";
51 compatible = "arm,cortex-a9";
57 compatible = "arm,cortex-a9";
/linux/arch/xtensa/include/asm/
H A Dinitialize_mmu.h209 addx4 a9, a8, a3
210 l32i a9, a9, 0
211 or a9, a9, a6
212 wptlb a9, a5
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm63138.dtsi27 compatible = "arm,cortex-a9";
35 compatible = "arm,cortex-a9";
96 compatible = "arm,cortex-a9-scu";
101 compatible = "arm,cortex-a9-gic";
110 compatible = "arm,cortex-a9-global-timer";
117 compatible = "arm,cortex-a9-twd-timer";
125 compatible = "arm,cortex-a9-twd-wdt";
/linux/Documentation/devicetree/bindings/clock/st/
H A Dst,clkgen-mux.txt13 "st,stih407-clkgen-a9-mux"
23 clk_m_a9: clk-m-a9@92b0000 {
25 compatible = "st,stih407-clkgen-a9-mux";
H A Dst,clkgen-pll.txt28 clockgen-a9@92b0000 {
32 clockgen_a9_pll: clockgen-a9-pll {
38 clock-output-names = "clockgen-a9-pll-odf";
/linux/arch/arm/mach-bcm/
H A Dbcm63xx_smp.c22 /* Size of mapped Cortex A9 SCU address space */
26 * Enable the Cortex A9 Snoop Control Unit
29 * cores present. We assume we're running on a Cortex A9 processor,
70 /* The BCM63138 SoC has two Cortex-A9 CPUs, CPU0 features a complete in scu_a9_enable()
158 pr_warn("SMP: Cortex-A9 SCU setup failed\n"); in bcm63138_smp_prepare_cpus()
/linux/Documentation/devicetree/bindings/timer/
H A Darm,global_timer.yaml13 Cortex-A9 are often associated with a per-core Global timer.
20 - arm,cortex-a9-global-timer
43 compatible = "arm,cortex-a9-global-timer";

12345678910>>...12