| /linux/arch/xtensa/lib/ |
| H A D | memcopy.S | 49 * a5/ dst 76 s8i a6, a5, 0 77 addi a5, a5, 1 96 s8i a6, a5, 0 97 addi a5, a5, 1 98 _bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then 107 s8i a6, a5, 0 108 s8i a7, a5, 1 109 addi a5, a5, 2 117 mov a5, a2 # copy dst so that a2 is return value [all …]
|
| H A D | usercopy.S | 47 * a5/ dst 70 mov a5, a2 # copy dst so that a2 is return value 95 EX(10f) s8i a6, a5, 0 96 addi a5, a5, 1 98 bbci.l a5, 1, .Ldstaligned # if dst is now aligned, then 106 EX(10f) s8i a6, a5, 0 107 EX(10f) s8i a7, a5, 1 108 addi a5, a5, 2 128 EX(10f) s8i a6, a5, 0 129 addi a5, a5, 1 [all …]
|
| H A D | memset.S | 44 mov a5, a2 # copy dst so that a2 is return value 65 add a6, a6, a5 # a6 = end of last 16B chunk 68 EX(10f) s32i a3, a5, 0 69 EX(10f) s32i a3, a5, 4 70 EX(10f) s32i a3, a5, 8 71 EX(10f) s32i a3, a5, 12 72 addi a5, a5, 16 74 blt a5, a6, .Loop1 79 EX(10f) s32i a3, a5, 0 80 EX(10f) s32i a3, a5, 4 [all …]
|
| H A D | checksum.S | 47 extui a5, a2, 0, 2 48 bnez a5, 8f /* branch if 2-byte aligned */ 51 srli a5, a3, 5 /* 32-byte chunks */ 53 loopgtz a5, 2f 55 beqz a5, 2f 56 slli a5, a5, 5 57 add a5, a5, a2 /* a5 = end of last 32-byte chunk */ 78 blt a2, a5, .Loop1 81 extui a5, a3, 2, 3 /* remaining 4-byte chunks */ 83 loopgtz a5, 3f [all …]
|
| H A D | mulsi3.S | 48 srai a5, a3, 16 50 mul16u a6, a5, a2 59 rsr a5, ACCLO 62 slli a5, a5, 16 63 add a2, a4, a5 72 xor a5, a2, a3 /* Top bit is 1 if one input is negative. */ 100 movltz a2, a3, a5 127 movltz a2, a3, a5
|
| H A D | divsi3.S | 16 do_nsau a5, a6, a2, a8 /* udividend_shift = nsau (udividend) */ 18 bgeu a5, a4, .Lspecial 20 sub a4, a4, a5 /* count = udivisor_shift - udividend_shift */ 45 neg a5, a2 46 movltz a2, a5, a7 /* return (sign < 0) ? -quotient : quotient */
|
| /linux/arch/xtensa/include/asm/ |
| H A D | initialize_mmu.h | 105 addi a5, a2, -XCHAL_SPANNING_WAY 106 add a4, a4, a5 113 add a5, a2, a4 114 3: idtlb a5 115 iitlb a5 116 add a5, a5, a4 117 bne a5, a2, 3b 126 movi a5, XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_TLB_WAY 128 wdtlb a4, a5 129 witlb a4, a5 [all …]
|
| /linux/arch/xtensa/kernel/ |
| H A D | align.S | 193 movi a5, 8 194 access_ok a3, a5, a6, a2, .Linvalid_instruction 197 l32i a5, a3, 0 199 __src_b a3, a5, a6 # a3 has the data word 209 extui a5, a4, INSN_OP1, 4 210 _beqi a5, OP1_L32I, .Lload_w 211 bnei a5, OP1_L8UI, .Lload16 239 extui a5, a4, INSN_OP0, 4 # get insn.op0 nibble 242 _beqi a5, OP0_L32I_N, .Lload # L32I.N, jump 243 addi a6, a5, -OP0_S32I_N [all …]
|
| H A D | entry.S | 174 s32i a5, a1, PT_AREG5 222 s32i a0, a5, PT_AREG_END - 16 223 s32i a1, a5, PT_AREG_END - 12 224 s32i a2, a5, PT_AREG_END - 8 225 s32i a3, a5, PT_AREG_END - 4 227 addi a1, a5, -16 314 s32i a5, a1, PT_AREG5 449 save_xtregs_opt a1 a3 a4 a5 a6 a7 PT_XTREGS_OPT 611 mov a3, a5 617 l32i a5, a3, PT_AREG_END + 4 [all …]
|
| /linux/arch/loongarch/lib/ |
| H A D | memmove.S | 82 sub.d a5, a2, t1 98 st.d t0, a5, -8 99 st.d t1, a5, -16 100 st.d t2, a5, -24 101 st.d t3, a5, -32 102 st.d t4, a5, -40 103 st.d t5, a5, -48 104 st.d t6, a5, -56 105 st.d t7, a5, -64 106 addi.d a5, a5, -64 [all …]
|
| H A D | memcpy.S | 135 add.d a5, a0, t0 151 st.d t0, a5, 0 152 st.d t1, a5, 8 153 st.d t2, a5, 16 154 st.d t3, a5, 24 155 st.d t4, a5, 32 156 st.d t5, a5, 40 157 st.d t6, a5, 48 158 st.d t7, a5, 56 159 addi.d a5, a5, 64 [all …]
|
| /linux/arch/riscv/lib/ |
| H A D | tishift.S | 11 li a5,64 12 sub a5,a5,a2 13 sext.w a4,a5 14 blez a5, .L2 34 li a5,64 35 sub a5,a5,a2 36 sext.w a4,a5 37 blez a5, .L4 57 li a5,64 58 sub a5,a5,a2 [all …]
|
| H A D | memcpy.S | 31 lb a5, 0(a1) 33 sb a5, 0(t6) 44 REG_L a5, SZREG(a1) 54 REG_S a5, SZREG(t6) 64 REG_L a5, 11*SZREG(a1) 71 REG_S a5, 11*SZREG(t6) 86 or a5, a1, t6 87 or a5, a5, a3 88 andi a5, a5, 3 89 bnez a5, 5f
|
| H A D | uaccess.S | 89 /* a5 - one byte for copying data */ 90 fixup lb a5, 0(a1), 10f 92 fixup sb a5, 0(a0), 10f 118 fixup REG_L a5, SZREG(a1), 10f 126 fixup REG_S a5, SZREG(a0), 10f 166 li a5, SZREG*8 167 sub t4, a5, t3 170 fixup REG_L a5, 0(a1), 10f 181 srl a4, a5, t3 182 fixup REG_L a5, SZREG(a1), 10f [all …]
|
| H A D | memmove.S | 42 * Both Copy Modes: a5 - dest to src alignment offset 98 andi a5, a1, (SZREG - 1) /* Find the alignment offset of src (a1) */ 99 slli a6, a5, 3 /* Multiply by 8 to convert that to bits to shift */ 100 sub a5, a1, t3 /* Find the difference between src and dest */ 154 add a1, t3, a5 /* Restore the src pointer */ 160 andi a5, a4, (SZREG - 1) /* Find the alignment offset of src (a4) */ 161 slli a6, a5, 3 /* Multiply by 8 to convert that to bits to shift */ 162 sub a5, a4, t4 /* Find the difference between src and dest */ 216 add a4, t4, a5 /* Restore the src pointer */
|
| /linux/arch/xtensa/boot/boot-redboot/ |
| H A D | bootstrap.S | 60 rsr a5, windowbase 61 ssl a5 87 movi a5, __start_a0 89 sub a0, a4, a5 92 movi a5, __reloc_end 96 # a5: compiled end address 112 blt a8, a5, 1b 119 ___flush_dcache_all a5 a6 123 ___invalidate_icache_all a5 a6 156 movi.n a5, 0 [all …]
|
| /linux/arch/powerpc/platforms/powernv/ |
| H A D | opal-call.c | 17 s64 a4, s64 a5, s64 a6, s64 a7, in __trace_opal_entry() argument 33 args[5] = a5; in __trace_opal_entry() 70 s64 a4, s64 a5, s64 a6, s64 a7, in __opal_call_trace() argument 75 __trace_opal_entry(a0, a1, a2, a3, a4, a5, a6, a7, opcode); in __opal_call_trace() 76 ret = __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); in __opal_call_trace() 87 s64 a4, s64 a5, s64 a6, s64 a7, in __opal_call_trace() argument 97 int64_t a4, int64_t a5, int64_t a6, int64_t a7, int64_t opcode) in opal_call() argument 110 return __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); in opal_call() 116 ret = __opal_call_trace(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); in opal_call() 118 ret = __opal_call(a0, a1, a2, a3, a4, a5, a6, a7, opcode, msr); in opal_call() [all …]
|
| /linux/arch/arm/boot/dts/arm/ |
| H A D | vexpress-v2p-ca5s.dts | 6 * Cortex-A5 MPCore (V2P-CA5s) 40 compatible = "arm,cortex-a5"; 47 compatible = "arm,cortex-a5"; 97 compatible = "arm,cortex-a5-scu"; 102 compatible = "arm,cortex-a5-twd-timer"; 108 compatible = "arm,cortex-a5-global-timer", 116 compatible = "arm,cortex-a5-twd-wdt"; 122 compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; 139 compatible = "arm,cortex-a5-pmu";
|
| /linux/lib/crypto/s390/ |
| H A D | chacha-s390.S | 465 #define A5 %v20 macro 504 VLR A5,K0 531 VAF A5,A5,B5 537 VX D5,D5,A5 569 VAF A5,A5,B5 575 VX D5,D5,A5 626 VAF A5,A5,B5 632 VX D5,D5,A5 664 VAF A5,A5,B5 670 VX D5,D5,A5 [all …]
|
| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,scu.yaml | 13 As part of the MPCore complex, Cortex-A5 and Cortex-A9 are provided 20 - Cortex-A5: see DDI0434B Cortex-A5 MPCore Technical Reference Manual 29 - arm,cortex-a5-scu
|
| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | amlogic-a5.dtsi | 7 #include "amlogic-a5-reset.h" 9 #include <dt-bindings/power/amlogic,a5-pwrc.h> 48 compatible = "amlogic,a5-pwrc"; 56 compatible = "amlogic,a5-reset", 63 compatible = "amlogic,pinctrl-a5", 152 compatible = "amlogic,a5-gpio-intc",
|
| /linux/arch/riscv/kernel/ |
| H A D | copy-unaligned.S | 18 REG_L a5, SZREG(a1) 26 REG_S a5, SZREG(a0) 50 lb a5, 1(a1) 58 sb a5, 1(a0)
|
| /linux/arch/mips/kernel/ |
| H A D | scall64-o32.S | 70 load_a5: lw a5, 20(t0) # argument #6 from usp 127 sd a5, PT_R9(sp) 143 ld a5, PT_R9(sp) 172 li a5, 0 207 move a4, a5 208 move a5, a6
|
| /linux/arch/x86/platform/uv/ |
| H A D | bios_uv.c | 24 u64 a4, u64 a5) in __uv_bios_call() argument 35 ret = efi_call_virt_pointer(tab, function, (u64)which, a1, a2, a3, a4, a5); in __uv_bios_call() 41 u64 a5) in uv_bios_call() argument 48 ret = __uv_bios_call(which, a1, a2, a3, a4, a5); in uv_bios_call() 55 u64 a4, u64 a5) in uv_bios_call_irqsave() argument 64 ret = __uv_bios_call(which, a1, a2, a3, a4, a5); in uv_bios_call_irqsave()
|
| /linux/arch/riscv/include/asm/ |
| H A D | compat.h | 54 compat_ulong_t a5; member 91 cregs->a5 = (compat_ulong_t) regs->a5; in regs_to_cregs() 128 regs->a5 = (unsigned long) cregs->a5; in cregs_to_regs()
|