Home
last modified time | relevance | path

Searched +full:8 +full:b00000 (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/hwmon/pmbus/
H A Dmp2993.c14 #define MP2993_VIN_LIMIT_DIV 8
115 /* The MP2993 vin limit scale is (1/8V)/Lsb */ in mp2993_read_word_data()
167 /* The MP2993 vin limit scale is (1/8V)/Lsb */ in mp2993_write_word_data()
175 * and the exponent is a constant value(5'b00000)， so the in mp2993_write_word_data()
176 * exponent of word parameter should be converted to 5'b00000. in mp2993_write_word_data()
187 * exponent is a 5'b00001 or 5'b00000. To ensure a larger in mp2993_write_word_data()
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-dnskw.dtsi179 gpio = <&gpio1 8 0>;
204 partition@b00000 {
214 partition@7b00000 {
223 ethphy0: ethernet-phy@8 {
224 reg = <8>;
/linux/arch/loongarch/include/asm/
H A Dbarrier.h22 #define crwrw 0b00000
81 #elif (__SIZEOF_LONG__ == 8) in array_index_mask_nospec()
127 case 8: \
/linux/arch/arm/boot/dts/realtek/
H A Drtd1195.dtsi47 audio@1b00000 {
176 reset3: reset-controller@8 {
/linux/Documentation/admin-guide/perf/
H A Dhisi-pmu.rst70 This option is provided for backward compatiblility and only support 8bit
106 - 5'b00000: I/O_MGMT_ICL;
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa3xx.dtsi92 * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15)
176 interrupts = <8>, <9>, <10>;
224 pwm0: pwm@40b00000 {
/linux/arch/arm64/boot/dts/qcom/
H A Dsm7125-xiaomi-common.dtsi59 venus_mem: memory@8ee00000 {
64 cdsp_mem: memory@8f300000 {
79 ipa_fw_mem: memory@93b00000 {
H A Dsc7180-idp.dts49 /* Increase the size from 2MB to 8MB */
56 atf_mem: memory@80b00000 {
66 camera_mem: memory@8ec00000 {
71 venus_mem: memory@8f600000 {
454 qcom,imp-res-offset-value = <8>;
H A Dsc7180-acer-aspire1.dts39 venus_mem: venus@85b00000 {
49 adsp_mem: adsp@8e400000 {
623 qcom,imp-res-offset-value = <8>;
H A Dsc7180-trogdor.dtsi52 /* Increase the size from 2MB to 8MB */
59 atf_mem: memory@80b00000 {
69 venus_mem: memory@8f600000 {
986 qcom,imp-res-offset-value = <8>;
1040 drive-strength = <8>;
1414 * at the default drive strength. When we bump it up to 8mA it
1419 drive-strength = <8>;
H A Dhamoa.dtsi598 adsp_rpc_remote_heap_mem: adsp-rpc-remote-heap@84b00000 {
618 adsp_boot_mem: adsp-boot@86b00000 {
633 q6_adsp_dtb_mem: q6-adsp-dtb@8b800000 {
638 cdsp_mem: cdsp@8b900000 {
643 q6_cdsp_dtb_mem: q6-cdsp-dtb@8d900000 {
648 gpu_microcode_mem: gpu-microcode@8d9fe000 {
653 cvp_mem: cvp@8da00000 {
658 camera_mem: camera@8e100000 {
663 av1_encoder_mem: av1-encoder@8e900000 {
668 reserved-region@8f000000 {
[all …]
H A Dmonaco.dtsi775 lpass_machine_learning_mem: lpass-machine-learning-region@93b00000 {
805 gpdsp_mem: gpdsp-region@97b00000 {
949 bits = <0 8>;
2117 gpi_dma3: dma-controller@b00000 {
2362 eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
2363 eq-presets-16gts = /bits/ 8 <0x55 0x55>;
2539 eq-presets-8gts = /bits/ 16 <0x5555 0x5555 0x5555 0x5555>;
2540 eq-presets-16gts = /bits/ 8 <0x55 0x55 0x55 0x55>;
2898 drive-strength = <8>;
2907 drive-strength = <8>;
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3798cv200.dtsi127 crg: clock-reset-controller@8a22000 {
150 perictrl: peripheral-controller@8a20000 {
169 resets = <&crg 0xbc 8>;
217 pmx0: pinconf@8a21000 {
223 &range 0 8 2 /* GPIO 0 */
224 &range 8 1 0 /* GPIO 1 */
240 &range 46 8 1 /* GPIO 7 */
241 &range 54 8 1 /* GPIO 8 */
249 &range 88 8 0 /* GPIO 12 */
257 uart0: serial@8b00000 {
[all …]
/linux/arch/arm/boot/dts/socionext/
H A Duniphier-pro4.dtsi325 bus-width = <8>;
354 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
356 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
370 clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
372 resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
633 usb-controller@65b00000 {
H A Duniphier-pxs2.dtsi381 clocks = <&peri_clk 8>;
382 resets = <&peri_rst 8>;
467 bus-width = <8>;
661 usb-controller@65b00000 {
H A Duniphier-pro5.dtsi490 usb-controller@65b00000 {
680 bus-width = <8>;
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-mcu.dtsi62 mcu_i2c0: i2c@40b00000 {
397 <&k3_clks 118 8>, <&k3_clks 118 14>,
H A Dk3-am62a-main.dtsi68 assigned-clock-parents = <&k3_clks 157 8>;
196 ti,interrupt-ranges = <0 237 8>;
598 bus-width = <8>;
724 assigned-clock-parents = <&k3_clks 75 8>;
997 mcasp0: audio-controller@2b00000 {
H A Dk3-am62-main.dtsi67 assigned-clock-parents = <&k3_clks 157 8>;
570 bus-width = <8>;
696 assigned-clock-parents = <&k3_clks 75 8>;
1025 mcasp0: audio-controller@2b00000 {
/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi175 uart0: serial@b00000 {
255 gpio-ranges = < &pmx0 0 7 1 &pmx0 1 8 1 &pmx0 2 9 1
H A Dhi3620-hi4511.dts30 uart0: serial@b00000 { /* console */
279 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */
/linux/arch/m68k/ifpsp060/
H A Dfplsp.sa30 dc.l $60ff0000,$06b00000,$60ff0000,$07460000
41 dc.l $60ff0000,$72b00000,$60ff0000,$72fe0000
798 dc.l $8da1be5a,$e6452a11,$8ae43ec7,$1de3a534
799 dc.l $1531bf2a,$01a01a01,$8b590000,$00000000
924 dc.l $20b00000,$c0040000,$8a3ae64f,$76f80584
935 dc.l $21600000,$c0030000,$8a3ae64f,$76f80584
956 dc.l $20b00000,$40020000,$fb53d14a,$a9c2f2c2
957 dc.l $9f800000,$40030000,$8a3ae64f,$76f80584
968 dc.l $a1c40000,$40040000,$8a3ae64f,$76f80584
1029 dc.l $8fa9bfd5,$55555555,$5555bfb7,$0bf39853
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194-p2972-0000.dts787 port@8 {
916 admaif8_port: port@8 {
1085 asrc_out2_port: port@8 {
1195 port@8 {
2005 address-width = <8>;
2006 pagesize = <8>;
2131 typec@8 {
2210 sor@15b00000 {
H A Dtegra194-p3509-0000.dtsi832 port@8 {
961 admaif8_port: port@8 {
1130 asrc_out2_port: port@8 {
1240 port@8 {
2066 address-width = <8>;
2067 pagesize = <8>;
2197 sor@15b00000 {