Home
last modified time | relevance | path

Searched +full:8 +full:- +full:9 +full:a +full:- +full:f (Results 1 – 25 of 1024) sorted by relevance

12345678910>>...41

/linux/arch/powerpc/crypto/
H A Daes-tab-4k.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 * crypto/aes_generic.c and are designed to be simply accessed by a combination
11 * of rlwimi/lwz instructions with a minimum of table registers (usually only
16 * For the safety-conscious it has to be noted that they might be vulnerable
18 * the generic tables they have been reduced from 16KB to 8KB + 256 bytes.
19 * This is a quite good tradeoff for low power devices (e.g. routers) without
25 #define R(a, b, c, d) \ argument
26 0x##a##b##c##d, 0x##d##a##b##c, 0x##c##d##a##b, 0x##b##c##d##a
32 /* encryption table, same as crypto_ft_tab in crypto/aes-generic.c */
34 .long R(ee, 77, 77, 99), R(f6, 7b, 7b, 8d)
[all …]
/linux/arch/csky/lib/
H A Dusercopy.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
14 " bf 7f \n" in raw_copy_from_user()
19 " bf 1f \n" in raw_copy_from_user()
20 " br 5f \n" in raw_copy_from_user()
22 " bt 3f \n" in raw_copy_from_user()
27 "11: ldw %3, (%2, 8) \n" in raw_copy_from_user()
29 " stw %3, (%1, 8) \n" in raw_copy_from_user()
36 " bt 5f \n" in raw_copy_from_user()
44 " bf 7f \n" in raw_copy_from_user()
[all …]
/linux/arch/mips/kernel/
H A Dmips-r2-to-r6-emul.c28 #include <asm/mips-r2-to-r6-emul.h>
55 extern const unsigned int fpucondbit[8];
65 pr_info("MIPS R2-to-R6 Emulator Enabled!"); in mipsr2emu_enable()
72 * mipsr6_emul - Emulate some frequent R2/R5/R6 instructions in delay slot
73 * for performance instead of the traditional way of using a stack trampoline
83 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
84 (s32)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
92 regs->regs[MIPSInst_RT(ir)] = in mipsr6_emul()
93 (s64)regs->regs[MIPSInst_RS(ir)] + in mipsr6_emul()
101 return -SIGFPE; in mipsr6_emul()
[all …]
/linux/arch/m68k/math-emu/
H A Dfp_util.S22 * necessary due to a potential bad interaction between the GPL and
23 * the restrictions contained in a BSD-style copyright.)
27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
63 tst.l (TASK_MM-8,%a2)
64 jmi 1f
65 tst.l (TASK_MM-4,%a2)
66 jmi 1f
68 jpl 2f
69 1: printf ,"oops:%p,%p,%p\n",3,%a2@(TASK_MM-8),%a2@(TASK_MM-4),%a2@(TASK_MM)
85 * First several conversion functions from a source operand
[all …]
/linux/arch/powerpc/kernel/vdso/
H A Dsigtramp32.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Signal trampolines for 32 bits processes in a ppc64 kernel for
16 /* The nop here is a hack. The dwarf2 unwind routines subtract 1 from
18 call instruction. Since we don't have a call here, we artificially
19 extend the range covered by the unwind info by adding a nop before
23 .Lsig_start = . - 4
37 .section .eh_frame,"a",@progbits
39 /* Register r1 can be found at offset 4 of a pt_regs structure.
40 A pointer to the pt_regs is stored in memory at the old sp plus PTREGS. */
43 .uleb128 9f - 1f; /* length */ \
[all …]
H A Dsigtramp64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Signal trampoline for 64 bits processes in a ppc64 kernel for
25 .balign 8
37 /* The .balign 8 above and the following zeros mimic the old stack
39 chosen in such a way that older libgcc unwind code returns a zero
40 for a sigcontext pointer. */
42 .quad 0,-21*8
44 /* Register r1 can be found at offset 8 of a pt_regs structure.
45 A pointer to the pt_regs is stored in memory at the old sp plus PTREGS. */
48 .uleb128 9f - 1f; /* length */ \
[all …]
/linux/arch/powerpc/lib/
H A Dcopy_32.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Memory copy functions for 32-bit PowerPC.
5 * Copyright (C) 1996-2005 Paul Mackerras.
12 #include <asm/code-patching-asm.h>
17 lwz r8,8(r4); \
21 stw r8,8(r6); \
26 8 ## n ## 0: \
28 8 ## n ## 1: \
29 lwz r8,8(r4); \
30 8 ## n ## 2: \
[all …]
/linux/arch/powerpc/boot/
H A Dcrt0.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 RELASZ = 8
12 RELAENT = 9
15 /* A procedure descriptor used when booting this as a COFF file.
26 .balign 8
27 p_start: .8byte _start
28 p_etext: .8byte _etext
29 p_bss_start: .8byte __bss_start
30 p_end: .8byte _end
32 p_toc: .8byte .TOC. - p_base
[all …]
H A Dgamecube-head.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * arch/powerpc/boot/gamecube-head.S
6 * Copyright (C) 2004-2009 The GameCube Linux Team
14 * - if the data and instruction caches are enabled or not
15 * - if the MMU is enabled or not
27 mfmsr 9
28 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
29 bcl 20, 31, 1f
31 mflr 8
32 clrlwi 8, 8, 3 /* convert to a real address */
[all …]
H A Dwii-head.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * arch/powerpc/boot/wii-head.S
6 * Copyright (C) 2008-2009 The GameCube Linux Team
14 * - if the data and instruction caches are enabled or not
15 * - if the MMU is enabled or not
16 * - if the high BATs are enabled or not
28 mfmsr 9
29 rlwinm 9, 9, 0, ~((1<<4)|(1<<5)) /* MSR_DR|MSR_IR */
30 bcl 20, 31, 1f
32 mflr 8
[all …]
/linux/arch/sh/lib/
H A Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0 */
19 bf 1f
20 mov.l 2f,r0
28 bt/s 9f ! if n=0, do nothing
33 bt/s 8f ! if it's too small, copy a byte at once
34 add #-1,r4
40 ! r0+r4--> [ ... ] r0 --> [ ... ]
43 ! r5 -->
62 ! copy a byte at once
63 8: mov.b @r0+,r1
[all …]
H A Dmemcpy.S1 /* SPDX-License-Identifier: GPL-2.0 */
18 bt/s 9f ! if n=0, do nothing
24 bt/s 7f ! if it's too small, copy a byte at once
25 add #-1,r5
29 ! r4 --> [ ... ] DST [ ... ] SRC
32 ! r0 --> [ ... ] r0+r5 --> [ ... ]
52 ! copy a byte at once
55 8:
58 bt/s 8b ! while (r0>r2)
59 mov.b r1,@-r0
[all …]
/linux/tools/perf/arch/x86/tests/
H A Dinsn-x86-dat-32.c1 // SPDX-License-Identifier: GPL-2.0
3 * Generated by gen-insn-x86-dat.sh and gen-insn-x86-dat.awk
4 * from insn-x86-dat-src.c for inclusion by insn-x86.c
9 "0f 31 \trdtsc ",},
39 "62 14 c8 \tbound %edx,(%eax,%ecx,8)",},
51 "62 54 c8 12 \tbound %edx,0x12(%eax,%ecx,8)",},
63 "62 94 c8 78 56 34 12 \tbound %edx,0x12345678(%eax,%ecx,8)",},
86 {{0x66, 0x62, 0x14, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
91 "66 62 14 c8 \tbound %dx,(%eax,%ecx,8)",},
103 "66 62 54 c8 12 \tbound %dx,0x12(%eax,%ecx,8)",},
[all …]
H A Dinsn-x86-dat-64.c1 // SPDX-License-Identifier: GPL-2.0
3 * Generated by gen-insn-x86-dat.sh and gen-insn-x86-dat.awk
4 * from insn-x86-dat-src.c for inclusion by insn-x86.c
9 "0f 31 \trdtsc ",},
13 "48 0f 41 d8 \tcmovno %rax,%rbx",},
14 {{0x48, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
15 "48 0f 41 88 78 56 34 12 \tcmovno 0x12345678(%rax),%rcx",},
16 {{0x66, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
17 "66 0f 41 88 78 56 34 12 \tcmovno 0x12345678(%rax),%cx",},
19 "48 0f 44 d8 \tcmove %rax,%rbx",},
[all …]
/linux/arch/sparc/kernel/
H A Duna_asm_64.S1 /* SPDX-License-Identifier: GPL-2.0 */
16 be,pn %icc, 2f
18 be,pt %icc, 1f
29 8: stba %g2, [%o0 + 4] %asi
30 srlx %g3, 8, %g7
31 9: stba %g1, [%o0 + 5] %asi
33 ba,pt %xcc, 0f
37 srl %g3, 8, %g2
40 ba,pt %xcc, 0f
42 2: srl %g3, 8, %g2
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp13-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 /omit-if-no-ref/
10 adc1_pins_a: adc1-pins-0 {
12 pinmux = <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
16 /omit-if-no-ref/
17 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
19 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
20 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra210-ahub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Audio Hub (AHUB) comprises a collection of hardware accelerators
11 for audio pre-processing, post-processing and a programmable full
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^ahub@[0-9a-f]*$"
26 - enum:
[all …]
/linux/net/netfilter/
H A Dnft_set_pipapo_avx2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2019-2020 Red Hat GmbH
29 /* Load from memory into YMM register with non-temporal hint ("stream load"),
33 * - loading buckets from lookup tables, as they are not going to be used
36 * - loading the result bitmap from the previous field, as it's never used
42 /* Stream a single lookup table bucket into YMM register given lookup table,
51 lt[((group) * NFT_PIPAPO_BUCKETS(8) + \
55 #define NFT_PIPAPO_AVX2_AND(dst, a, b) \ argument
56 asm volatile("vpand %ymm" #a ", %ymm" #b ", %ymm" #dst)
70 /* Zero out a complete YMM register, @reg */
[all …]
/linux/scripts/
H A Drecordmcount.pl2 # SPDX-License-Identifier: GPL-2.0-only
5 # recordmcount.pl - makes a section called __mcount_loc that holds
9 # What we want to end up with this is that each object file will have a
22 # functions in a section that has a call site to mcount, will have the
30 # The trick is to change the call offset referring the start of a section to
31 # referring a function symbol in this section. During the link step, 'ld' will
54 # offset from .sched.text. If we choose global symbol func2 as a reference and
58 # .quad func2 - 0x10
66 # in this section. In such a case we have to select a local one. E.g. func1:
83 # an undefined reference to func1 or a wrong reference to another global
[all …]
/linux/tools/perf/pmu-events/arch/x86/
H A Dmapfile.csv1 Family-model,Version,Filename,EventType
2 GenuineIntel-6-(97|9A|B7|BA|BF),v1.34,alderlake,core
3 GenuineIntel-6-BE,v1.34,alderlaken,core
4 GenuineIntel-6-C[56],v1.13,arrowlake,core
5 GenuineIntel-6-(1C|26|27|35|36),v5,bonnell,core
6 GenuineIntel-6-(3D|47),v30,broadwell,core
7 GenuineIntel-6-56,v12,broadwellde,core
8 GenuineIntel-6-4F,v23,broadwellx,core
9 GenuineIntel-6-55-[56789ABCDEF],v1.25,cascadelakex,core
10 GenuineIntel-6-DD,v1.00,clearwaterforest,core
[all …]
/linux/arch/sparc/lib/
H A Dstrncmp_32.S1 /* SPDX-License-Identifier: GPL-2.0 */
16 ble 7f
28 be 8f
32 be,a 1f
44 be 8f
48 be,a 1f
60 be 8f
64 be,a 1f
76 be 8f
80 be 1f
[all …]
/linux/lib/crypto/arm/
H A Dblake2s-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 // load the words on-demand.
27 .macro __ldrd a, b, src, offset
29 ldrd \a, \b, [\src, #\offset]
31 ldr \a, [\src, #\offset]
36 .macro __strd a, b, dst, offset
38 strd \a, \b, [\dst, #\offset]
40 str \a, [\dst, #\offset]
45 .macro _le32_bswap a, tmp
47 rev_l \a, \tmp
[all …]
/linux/Documentation/ABI/stable/
H A Dsysfs-class-tpm4 Contact: linux-integrity@vger.kernel.org
5 Description: The device/ directory under a specific TPM instance exposes
12 Contact: linux-integrity@vger.kernel.org
13 Description: The "active" property prints a '1' if the TPM chip is accepting
16 visible to the OS, but will only accept a restricted set of
24 Contact: linux-integrity@vger.kernel.org
32 Contact: linux-integrity@vger.kernel.org
41 Manufacturer is a hex dump of the 4 byte manufacturer info
42 space in a TPM. TCG version shows the TCG TPM spec level that
49 Contact: linux-integrity@vger.kernel.org
[all …]
/linux/drivers/net/wireless/zydas/zd1211rw/
H A Dzd_rf_uw2453.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* ZD1211 USB-WLAN driver for Linux
4 * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
5 * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
20 /* The 3-wire serial interface provides access to 8 write-only registers.
21 * The data format is a 4 bit register address followed by a 20 bit value. */
28 * the configured frequency. During initialization, we run through a variety
29 * of different VCO configurations on channel 1 until we detect a PLL lock.
34 * If we do not see a PLL lock on any standard VCO config, we fall back on an
35 * autocal configuration, which has a fixed (as opposed to per-channel) VCO
[all …]
/linux/arch/alpha/kernel/
H A Dentry.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Kernel entry-points.
8 #include <asm/asm-offsets.h>
26 .cfi_rel_offset 64, 8
35 .size \func, . - \func
39 * This defines the normal kernel pt-regs layout.
41 * regs 9-15 preserved by C code
42 * regs 16-18 saved by PAL-code
43 * regs 29-30 saved and set up by PAL-code
44 * JRP - Save regs 16-18 in a special area of the stack, so that
[all …]

12345678910>>...41