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22 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
79 #define PCLK_ACODEC 369
118 #define PCLK_SIM_CARD 369
433 #define CLK_TIMER4 369823 #define SRST_PWM1 369
161 #define PCLK_EFUSE256 369
152 #define PCLK_EFUSE256 369
384 #define TCLK_WDT_S 369
378 #define IMX7D_USDHC1_ROOT_PRE_DIV 369
381 #define PCLK_PMU 369
375 #define TEGRA264_CLK_MGBE2_UPHY1_PLL_TXREF 369
380 #define GCC_USB4_SB_IF_CLK_SRC 369
387 #define PCLK_CSI_HOST_0 369
384 #define CLK_PIPEPHY2_PIPE_ASIC_G 369
264 #define PCLK_MIPI_DSI1 369
323 369 common sendto sys_sendto
29 … 369v-185h-1217v185l-402-369z" fill="#729fcf" style=""/><path id="path353" d="m7889.5 1986 402-368…32 … 369v-185h-1217v185l-402-369z" fill="#729fcf" style=""/><path id="path387" d="m7889.5 3287 402-368…
430 #define SRST_H_SAI8_8CH 369
379 369 common sched_getattr sys_sched_getattr
387 369 common prlimit64 sys_prlimit64
384 369 i386 sendto sys_sendto
331 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>;
386 #define IMX_SC_R_ENET_1_A2 369
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385 /* CMDQ_EVENT_IMG_WPE_LITE_CQ_THR_DONE_P20 ~ 5: 364 ~ 369 */
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