1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * VEML6046X00 High Accuracy RGBIR Color Sensor
4 *
5 * Copyright (c) 2025 Andreas Klinger <ak@it-klinger.de>
6 */
7
8 #include <linux/array_size.h>
9 #include <linux/bitfield.h>
10 #include <linux/bits.h>
11 #include <linux/dev_printk.h>
12 #include <linux/err.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regmap.h>
18 #include <linux/time.h>
19 #include <linux/types.h>
20 #include <linux/units.h>
21
22 #include <asm/byteorder.h>
23
24 #include <linux/iio/iio.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
27
28 /*
29 * Device registers
30 * Those which are accessed as bulk io are omitted
31 */
32 #define VEML6046X00_REG_CONF0 0x00
33 #define VEML6046X00_REG_CONF1 0x01
34 #define VEML6046X00_REG_THDH 0x04
35 #define VEML6046X00_REG_THDL 0x06
36 #define VEML6046X00_REG_R 0x10
37 #define VEML6046X00_REG_G 0x12
38 #define VEML6046X00_REG_B 0x14
39 #define VEML6046X00_REG_IR 0x16
40 #define VEML6046X00_REG_ID 0x18
41 #define VEML6046X00_REG_INT 0x1A
42 #define VEML6046X00_REG_INT_H 0x1B
43
44 /* Bit masks for specific functionality */
45 #define VEML6046X00_CONF0_ON_0 BIT(0)
46 #define VEML6046X00_CONF0_INT BIT(1)
47 #define VEML6046X00_CONF0_AF_TRIG BIT(2)
48 #define VEML6046X00_CONF0_AF BIT(3)
49 #define VEML6046X00_CONF0_IT GENMASK(6, 4)
50 #define VEML6046X00_CONF1_CAL BIT(0)
51 #define VEML6046X00_CONF1_PERS GENMASK(2, 1)
52 #define VEML6046X00_CONF1_GAIN GENMASK(4, 3)
53 #define VEML6046X00_CONF1_PD_D2 BIT(6)
54 #define VEML6046X00_CONF1_ON_1 BIT(7)
55 #define VEML6046X00_INT_TH_H BIT(1)
56 #define VEML6046X00_INT_TH_L BIT(2)
57 #define VEML6046X00_INT_DRDY BIT(3)
58 #define VEML6046X00_INT_MASK \
59 (VEML6046X00_INT_TH_H | VEML6046X00_INT_TH_L | VEML6046X00_INT_DRDY)
60
61 #define VEML6046X00_GAIN_1 0x0
62 #define VEML6046X00_GAIN_2 0x1
63 #define VEML6046X00_GAIN_0_66 0x2
64 #define VEML6046X00_GAIN_0_5 0x3
65
66 #define VEML6046X00_PD_2_2 0x0
67 #define VEML6046X00_PD_1_2 BIT(6)
68
69 /* Autosuspend delay */
70 #define VEML6046X00_AUTOSUSPEND_MS (3 * MSEC_PER_SEC)
71
72 enum veml6046x00_scan {
73 VEML6046X00_SCAN_R,
74 VEML6046X00_SCAN_G,
75 VEML6046X00_SCAN_B,
76 VEML6046X00_SCAN_IR,
77 VEML6046X00_SCAN_TIMESTAMP,
78 };
79
80 /**
81 * struct veml6046x00_rf - Regmap field of configuration registers.
82 * @int_en: Interrupt enable of green channel.
83 * @mode: Mode of operation.
84 * Driver uses always Active force mode.
85 * @trig: Trigger to be set in active force mode for starting
86 * measurement.
87 * @it: Integration time.
88 * @pers: Persistense - Number of threshold crossing for triggering
89 * interrupt.
90 */
91 struct veml6046x00_rf {
92 struct regmap_field *int_en;
93 struct regmap_field *mode;
94 struct regmap_field *trig;
95 struct regmap_field *it;
96 struct regmap_field *pers;
97 };
98
99 /**
100 * struct veml6046x00_data - Private data of driver.
101 * @regmap: Regmap definition of sensor.
102 * @trig: Industrial-IO trigger.
103 * @rf: Regmap field of configuration.
104 */
105 struct veml6046x00_data {
106 struct regmap *regmap;
107 struct iio_trigger *trig;
108 struct veml6046x00_rf rf;
109 };
110
111 /**
112 * DOC: Valid integration times (IT)
113 *
114 * static const int veml6046x00_it contains the array with valid IT.
115 *
116 * Register value to be read or written in regmap_field it on veml6046x00 is
117 * identical with array index.
118 * This means there is no separate translation table between valid integration
119 * times and register values needed. The index of the array is identical with
120 * the register value.
121 *
122 * The array is in the form as expected by the callback of the sysfs attribute
123 * integration_time_available (IIO_CHAN_INFO_INT_TIME). So there is no
124 * additional conversion needed.
125 */
126 static const int veml6046x00_it[][2] = {
127 { 0, 3125 },
128 { 0, 6250 },
129 { 0, 12500 },
130 { 0, 25000 },
131 { 0, 50000 },
132 { 0, 100000 },
133 { 0, 200000 },
134 { 0, 400000 },
135 };
136
137 /**
138 * DOC: Handling of gain and photodiode size (PD)
139 *
140 * Gains here in the driver are not exactly the same as in the datasheet of the
141 * sensor. The gain in the driver is a combination of the gain of the sensor
142 * with the photodiode size (PD).
143 * The following combinations are possible:
144 * gain(driver) = gain(sensor) * PD
145 * 0.25 = x0.5 * 1/2
146 * 0.33 = x0.66 * 1/2
147 * 0.5 = x0.5 * 2/2
148 * 0.66 = x0.66 * 2/2
149 * 1 = x1 * 2/2
150 * 2 = x2 * 2/2
151 */
152
153 /**
154 * struct veml6046x00_gain_pd - Translation of gain and photodiode size (PD).
155 * @gain_sen: Gain used in the sensor as described in the datasheet of the
156 * sensor
157 * @pd: Photodiode size in the sensor
158 *
159 * This is the translation table from the gain used in the driver (and also used
160 * by the userspace interface in sysfs) to the gain and PD used in the sensor
161 * hardware.
162 *
163 * There are six gain values visible to the user (0.25 .. 2) which translate to
164 * two different gains in the sensor hardware (x0.5 .. x2) and two PD (1/2 and
165 * 2/2). Theoretical are there eight combinations, but gain values 0.5 and 1 are
166 * doubled and therefore the combination with the larger PD (2/2) is taken as
167 * more photodiode cells are supposed to deliver a more precise result.
168 */
169 struct veml6046x00_gain_pd {
170 unsigned int gain_sen;
171 unsigned int pd;
172 };
173
174 static const struct veml6046x00_gain_pd veml6046x00_gain_pd[] = {
175 { .gain_sen = VEML6046X00_GAIN_0_5, .pd = VEML6046X00_PD_1_2 },
176 { .gain_sen = VEML6046X00_GAIN_0_66, .pd = VEML6046X00_PD_1_2 },
177 { .gain_sen = VEML6046X00_GAIN_0_5, .pd = VEML6046X00_PD_2_2 },
178 { .gain_sen = VEML6046X00_GAIN_0_66, .pd = VEML6046X00_PD_2_2 },
179 { .gain_sen = VEML6046X00_GAIN_1, .pd = VEML6046X00_PD_2_2 },
180 { .gain_sen = VEML6046X00_GAIN_2, .pd = VEML6046X00_PD_2_2 },
181 };
182
183 /**
184 * DOC: Factors for calculation of lux
185 *
186 * static const int veml6046x00_it_gains contains the factors for calculation of
187 * lux.
188 *
189 * Depending on the set up integration time (IT), gain and photodiode size (PD)
190 * the measured raw values are different if the light is constant. As the gain
191 * and PD are already coupled in the driver (see &struct veml6046x00_gain_pd)
192 * there are two dimensions remaining: IT and gain(driver).
193 *
194 * The array of available factors for a certain IT are grouped together in the
195 * same form as expected by the callback of scale_available
196 * (IIO_CHAN_INFO_SCALE).
197 *
198 * Factors for lux / raw count are taken directly from the datasheet.
199 */
200 static const int veml6046x00_it_gains[][6][2] = {
201 /* integration time: 3.125 ms */
202 {
203 { 5, 376000 }, /* gain: x0.25 */
204 { 4, 72700 }, /* gain: x0.33 */
205 { 2, 688000 }, /* gain: x0.5 */
206 { 2, 36400 }, /* gain: x0.66 */
207 { 1, 344000 }, /* gain: x1 */
208 { 0, 672000 }, /* gain: x2 */
209 },
210 /* integration time: 6.25 ms */
211 {
212 { 2, 688000 }, /* gain: x0.25 */
213 { 2, 36350 }, /* gain: x0.33 */
214 { 1, 344000 }, /* gain: x0.5 */
215 { 1, 18200 }, /* gain: x0.66 */
216 { 0, 672000 }, /* gain: x1 */
217 { 0, 336000 }, /* gain: x2 */
218 },
219 /* integration time: 12.5 ms */
220 {
221 { 1, 344000 }, /* gain: x0.25 */
222 { 1, 18175 }, /* gain: x0.33 */
223 { 0, 672000 }, /* gain: x0.5 */
224 { 0, 509100 }, /* gain: x0.66 */
225 { 0, 336000 }, /* gain: x1 */
226 { 0, 168000 }, /* gain: x2 */
227 },
228 /* integration time: 25 ms */
229 {
230 { 0, 672000 }, /* gain: x0.25 */
231 { 0, 509087 }, /* gain: x0.33 */
232 { 0, 336000 }, /* gain: x0.5 */
233 { 0, 254550 }, /* gain: x0.66 */
234 { 0, 168000 }, /* gain: x1 */
235 { 0, 84000 }, /* gain: x2 */
236 },
237 /* integration time: 50 ms */
238 {
239 { 0, 336000 }, /* gain: x0.25 */
240 { 0, 254543 }, /* gain: x0.33 */
241 { 0, 168000 }, /* gain: x0.5 */
242 { 0, 127275 }, /* gain: x0.66 */
243 { 0, 84000 }, /* gain: x1 */
244 { 0, 42000 }, /* gain: x2 */
245 },
246 /* integration time: 100 ms */
247 {
248 { 0, 168000 }, /* gain: x0.25 */
249 { 0, 127271 }, /* gain: x0.33 */
250 { 0, 84000 }, /* gain: x0.5 */
251 { 0, 63637 }, /* gain: x0.66 */
252 { 0, 42000 }, /* gain: x1 */
253 { 0, 21000 }, /* gain: x2 */
254 },
255 /* integration time: 200 ms */
256 {
257 { 0, 84000 }, /* gain: x0.25 */
258 { 0, 63635 }, /* gain: x0.33 */
259 { 0, 42000 }, /* gain: x0.5 */
260 { 0, 31818 }, /* gain: x0.66 */
261 { 0, 21000 }, /* gain: x1 */
262 { 0, 10500 }, /* gain: x2 */
263 },
264 /* integration time: 400 ms */
265 {
266 { 0, 42000 }, /* gain: x0.25 */
267 { 0, 31817 }, /* gain: x0.33 */
268 { 0, 21000 }, /* gain: x0.5 */
269 { 0, 15909 }, /* gain: x0.66 */
270 { 0, 10500 }, /* gain: x1 */
271 { 0, 5250 }, /* gain: x2 */
272 },
273 };
274
275 /*
276 * Two bits (RGB_ON_0 and RGB_ON_1) must be cleared to power on the device.
277 */
veml6046x00_power_on(struct veml6046x00_data * data)278 static int veml6046x00_power_on(struct veml6046x00_data *data)
279 {
280 int ret;
281 struct device *dev = regmap_get_device(data->regmap);
282
283 ret = regmap_clear_bits(data->regmap, VEML6046X00_REG_CONF0,
284 VEML6046X00_CONF0_ON_0);
285 if (ret) {
286 dev_err(dev, "Failed to set bit for power on %d\n", ret);
287 return ret;
288 }
289
290 return regmap_clear_bits(data->regmap, VEML6046X00_REG_CONF1,
291 VEML6046X00_CONF1_ON_1);
292 }
293
294 /*
295 * Two bits (RGB_ON_0 and RGB_ON_1) must be set to power off the device.
296 */
veml6046x00_shutdown(struct veml6046x00_data * data)297 static int veml6046x00_shutdown(struct veml6046x00_data *data)
298 {
299 int ret;
300 struct device *dev = regmap_get_device(data->regmap);
301
302 ret = regmap_set_bits(data->regmap, VEML6046X00_REG_CONF0,
303 VEML6046X00_CONF0_ON_0);
304 if (ret) {
305 dev_err(dev, "Failed to set bit for shutdown %d\n", ret);
306 return ret;
307 }
308
309 return regmap_set_bits(data->regmap, VEML6046X00_REG_CONF1,
310 VEML6046X00_CONF1_ON_1);
311 }
312
veml6046x00_shutdown_action(void * data)313 static void veml6046x00_shutdown_action(void *data)
314 {
315 veml6046x00_shutdown(data);
316 }
317
318 static const struct iio_chan_spec veml6046x00_channels[] = {
319 {
320 .type = IIO_INTENSITY,
321 .address = VEML6046X00_REG_R,
322 .modified = 1,
323 .channel2 = IIO_MOD_LIGHT_RED,
324 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
325 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
326 BIT(IIO_CHAN_INFO_SCALE),
327 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
328 BIT(IIO_CHAN_INFO_SCALE),
329 .scan_index = VEML6046X00_SCAN_R,
330 .scan_type = {
331 .sign = 'u',
332 .realbits = 16,
333 .storagebits = 16,
334 .endianness = IIO_LE,
335 },
336 },
337 {
338 .type = IIO_INTENSITY,
339 .address = VEML6046X00_REG_G,
340 .modified = 1,
341 .channel2 = IIO_MOD_LIGHT_GREEN,
342 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
343 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
344 BIT(IIO_CHAN_INFO_SCALE),
345 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
346 BIT(IIO_CHAN_INFO_SCALE),
347 .scan_index = VEML6046X00_SCAN_G,
348 .scan_type = {
349 .sign = 'u',
350 .realbits = 16,
351 .storagebits = 16,
352 .endianness = IIO_LE,
353 },
354 },
355 {
356 .type = IIO_INTENSITY,
357 .address = VEML6046X00_REG_B,
358 .modified = 1,
359 .channel2 = IIO_MOD_LIGHT_BLUE,
360 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
361 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
362 BIT(IIO_CHAN_INFO_SCALE),
363 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
364 BIT(IIO_CHAN_INFO_SCALE),
365 .scan_index = VEML6046X00_SCAN_B,
366 .scan_type = {
367 .sign = 'u',
368 .realbits = 16,
369 .storagebits = 16,
370 .endianness = IIO_LE,
371 },
372 },
373 {
374 .type = IIO_INTENSITY,
375 .address = VEML6046X00_REG_IR,
376 .modified = 1,
377 .channel2 = IIO_MOD_LIGHT_IR,
378 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
379 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) |
380 BIT(IIO_CHAN_INFO_SCALE),
381 .info_mask_shared_by_all_available = BIT(IIO_CHAN_INFO_INT_TIME) |
382 BIT(IIO_CHAN_INFO_SCALE),
383 .scan_index = VEML6046X00_SCAN_IR,
384 .scan_type = {
385 .sign = 'u',
386 .realbits = 16,
387 .storagebits = 16,
388 .endianness = IIO_LE,
389 },
390 },
391 IIO_CHAN_SOFT_TIMESTAMP(VEML6046X00_SCAN_TIMESTAMP),
392 };
393
394 static const struct regmap_config veml6046x00_regmap_config = {
395 .name = "veml6046x00_regm",
396 .reg_bits = 8,
397 .val_bits = 8,
398 .max_register = VEML6046X00_REG_INT_H,
399 };
400
401 static const struct reg_field veml6046x00_rf_int_en =
402 REG_FIELD(VEML6046X00_REG_CONF0, 1, 1);
403
404 static const struct reg_field veml6046x00_rf_trig =
405 REG_FIELD(VEML6046X00_REG_CONF0, 2, 2);
406
407 static const struct reg_field veml6046x00_rf_mode =
408 REG_FIELD(VEML6046X00_REG_CONF0, 3, 3);
409
410 static const struct reg_field veml6046x00_rf_it =
411 REG_FIELD(VEML6046X00_REG_CONF0, 4, 6);
412
413 static const struct reg_field veml6046x00_rf_pers =
414 REG_FIELD(VEML6046X00_REG_CONF1, 1, 2);
415
veml6046x00_regfield_init(struct veml6046x00_data * data)416 static int veml6046x00_regfield_init(struct veml6046x00_data *data)
417 {
418 struct regmap *regmap = data->regmap;
419 struct device *dev = regmap_get_device(data->regmap);
420 struct regmap_field *rm_field;
421 struct veml6046x00_rf *rf = &data->rf;
422
423 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_int_en);
424 if (IS_ERR(rm_field))
425 return PTR_ERR(rm_field);
426 rf->int_en = rm_field;
427
428 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_mode);
429 if (IS_ERR(rm_field))
430 return PTR_ERR(rm_field);
431 rf->mode = rm_field;
432
433 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_trig);
434 if (IS_ERR(rm_field))
435 return PTR_ERR(rm_field);
436 rf->trig = rm_field;
437
438 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_it);
439 if (IS_ERR(rm_field))
440 return PTR_ERR(rm_field);
441 rf->it = rm_field;
442
443 rm_field = devm_regmap_field_alloc(dev, regmap, veml6046x00_rf_pers);
444 if (IS_ERR(rm_field))
445 return PTR_ERR(rm_field);
446 rf->pers = rm_field;
447
448 return 0;
449 }
450
veml6046x00_get_it_index(struct veml6046x00_data * data)451 static int veml6046x00_get_it_index(struct veml6046x00_data *data)
452 {
453 int ret;
454 unsigned int reg;
455
456 ret = regmap_field_read(data->rf.it, ®);
457 if (ret)
458 return ret;
459
460 /* register value is identical with index of array */
461 if (reg >= ARRAY_SIZE(veml6046x00_it))
462 return -EINVAL;
463
464 return reg;
465 }
466
veml6046x00_get_it_usec(struct veml6046x00_data * data,unsigned int * it_usec)467 static int veml6046x00_get_it_usec(struct veml6046x00_data *data, unsigned int *it_usec)
468 {
469 int ret;
470 unsigned int reg;
471
472 ret = regmap_field_read(data->rf.it, ®);
473 if (ret)
474 return ret;
475
476 if (reg >= ARRAY_SIZE(veml6046x00_it))
477 return -EINVAL;
478
479 *it_usec = veml6046x00_it[reg][1];
480
481 return IIO_VAL_INT_PLUS_MICRO;
482 }
483
veml6046x00_set_it(struct iio_dev * iio,int val,int val2)484 static int veml6046x00_set_it(struct iio_dev *iio, int val, int val2)
485 {
486 struct veml6046x00_data *data = iio_priv(iio);
487 unsigned int i;
488
489 for (i = 0; i < ARRAY_SIZE(veml6046x00_it); i++) {
490 if ((veml6046x00_it[i][0] == val) &&
491 (veml6046x00_it[i][1] == val2))
492 return regmap_field_write(data->rf.it, i);
493 }
494
495 return -EINVAL;
496 }
497
veml6046x00_get_val_gain_idx(struct veml6046x00_data * data,int val,int val2)498 static int veml6046x00_get_val_gain_idx(struct veml6046x00_data *data, int val,
499 int val2)
500 {
501 unsigned int i;
502 int it_idx;
503
504 it_idx = veml6046x00_get_it_index(data);
505 if (it_idx < 0)
506 return it_idx;
507
508 for (i = 0; i < ARRAY_SIZE(veml6046x00_it_gains[it_idx]); i++) {
509 if ((veml6046x00_it_gains[it_idx][i][0] == val) &&
510 (veml6046x00_it_gains[it_idx][i][1] == val2))
511 return i;
512 }
513
514 return -EINVAL;
515 }
516
veml6046x00_get_gain_idx(struct veml6046x00_data * data)517 static int veml6046x00_get_gain_idx(struct veml6046x00_data *data)
518 {
519 int ret;
520 unsigned int i, reg, reg_gain, reg_pd;
521
522 ret = regmap_read(data->regmap, VEML6046X00_REG_CONF1, ®);
523 if (ret)
524 return ret;
525
526 reg_gain = FIELD_GET(VEML6046X00_CONF1_GAIN, reg);
527 reg_pd = reg & VEML6046X00_CONF1_PD_D2;
528
529 for (i = 0; i < ARRAY_SIZE(veml6046x00_gain_pd); i++) {
530 if ((veml6046x00_gain_pd[i].gain_sen == reg_gain) &&
531 (veml6046x00_gain_pd[i].pd == reg_pd))
532 return i;
533 }
534
535 return -EINVAL;
536 }
537
veml6046x00_set_scale(struct iio_dev * iio,int val,int val2)538 static int veml6046x00_set_scale(struct iio_dev *iio, int val, int val2)
539 {
540 struct veml6046x00_data *data = iio_priv(iio);
541 unsigned int new_scale;
542 int gain_idx;
543
544 gain_idx = veml6046x00_get_val_gain_idx(data, val, val2);
545 if (gain_idx < 0)
546 return gain_idx;
547
548 new_scale = FIELD_PREP(VEML6046X00_CONF1_GAIN,
549 veml6046x00_gain_pd[gain_idx].gain_sen) |
550 veml6046x00_gain_pd[gain_idx].pd;
551
552 return regmap_update_bits(data->regmap, VEML6046X00_REG_CONF1,
553 VEML6046X00_CONF1_GAIN |
554 VEML6046X00_CONF1_PD_D2,
555 new_scale);
556 }
557
veml6046x00_get_scale(struct veml6046x00_data * data,int * val,int * val2)558 static int veml6046x00_get_scale(struct veml6046x00_data *data,
559 int *val, int *val2)
560 {
561 int gain_idx, it_idx;
562
563 gain_idx = veml6046x00_get_gain_idx(data);
564 if (gain_idx < 0)
565 return gain_idx;
566
567 it_idx = veml6046x00_get_it_index(data);
568 if (it_idx < 0)
569 return it_idx;
570
571 *val = veml6046x00_it_gains[it_idx][gain_idx][0];
572 *val2 = veml6046x00_it_gains[it_idx][gain_idx][1];
573
574 return IIO_VAL_INT_PLUS_MICRO;
575 }
576
577 /**
578 * veml6046x00_read_data_ready() - Read data ready bit
579 * @data: Private data.
580 *
581 * Helper function for reading data ready bit from interrupt register.
582 *
583 * Return:
584 * * %1 - Data is available (AF_DATA_READY is set)
585 * * %0 - No data available
586 * * %-EIO - Error during bulk read
587 */
veml6046x00_read_data_ready(struct veml6046x00_data * data)588 static int veml6046x00_read_data_ready(struct veml6046x00_data *data)
589 {
590 struct device *dev = regmap_get_device(data->regmap);
591 int ret;
592 u8 reg[2];
593
594 /*
595 * Note from the vendor, but not explicitly in the datasheet: we
596 * should always read both registers together.
597 */
598 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_INT,
599 ®, sizeof(reg));
600 if (ret) {
601 dev_err(dev, "Failed to read interrupt register %d\n", ret);
602 return -EIO;
603 }
604
605 if (reg[1] & VEML6046X00_INT_DRDY)
606 return 1;
607
608 return 0;
609 }
610
611 /**
612 * veml6046x00_wait_data_available() - Wait until data is available
613 * @iio: Industrial IO.
614 * @usecs: Microseconds to wait for data.
615 *
616 * This function waits for a certain bit in the interrupt register which signals
617 * that there is data to be read available.
618 *
619 * It tries it two times with a waiting time of usecs in between.
620 *
621 * Return:
622 * * %1 - Data is available (AF_DATA_READY is set)
623 * * %0 - Timeout, no data available after usecs timeout
624 * * %-EIO - Error during bulk read
625 */
veml6046x00_wait_data_available(struct iio_dev * iio,unsigned int usecs)626 static int veml6046x00_wait_data_available(struct iio_dev *iio, unsigned int usecs)
627 {
628 struct veml6046x00_data *data = iio_priv(iio);
629 int ret;
630
631 ret = veml6046x00_read_data_ready(data);
632 if (ret)
633 return ret;
634
635 fsleep(usecs);
636 return veml6046x00_read_data_ready(data);
637 }
638
veml6046x00_single_read(struct iio_dev * iio,enum iio_modifier modifier,int * val)639 static int veml6046x00_single_read(struct iio_dev *iio,
640 enum iio_modifier modifier, int *val)
641 {
642 struct veml6046x00_data *data = iio_priv(iio);
643 struct device *dev = regmap_get_device(data->regmap);
644 unsigned int addr, it_usec;
645 int ret;
646 __le16 reg;
647
648 switch (modifier) {
649 case IIO_MOD_LIGHT_RED:
650 addr = VEML6046X00_REG_R;
651 break;
652 case IIO_MOD_LIGHT_GREEN:
653 addr = VEML6046X00_REG_G;
654 break;
655 case IIO_MOD_LIGHT_BLUE:
656 addr = VEML6046X00_REG_B;
657 break;
658 case IIO_MOD_LIGHT_IR:
659 addr = VEML6046X00_REG_IR;
660 break;
661 default:
662 return -EINVAL;
663 }
664 ret = pm_runtime_resume_and_get(dev);
665 if (ret)
666 return ret;
667
668 ret = veml6046x00_get_it_usec(data, &it_usec);
669 if (ret < 0) {
670 dev_err(dev, "Failed to get integration time ret: %d", ret);
671 goto out;
672 }
673
674 ret = regmap_field_write(data->rf.mode, 1);
675 if (ret) {
676 dev_err(dev, "Failed to write mode ret: %d", ret);
677 goto out;
678 }
679
680 ret = regmap_field_write(data->rf.trig, 1);
681 if (ret) {
682 dev_err(dev, "Failed to write trigger ret: %d", ret);
683 goto out;
684 }
685
686 /* integration time + 12.5 % to ensure completion */
687 fsleep(it_usec + it_usec / 8);
688
689 ret = veml6046x00_wait_data_available(iio, it_usec * 4);
690 if (ret < 0)
691 goto out;
692 if (ret == 0) {
693 ret = -EAGAIN;
694 goto out;
695 }
696
697 if (!iio_device_claim_direct(iio)) {
698 ret = -EBUSY;
699 goto out;
700 }
701
702 ret = regmap_bulk_read(data->regmap, addr, ®, sizeof(reg));
703 iio_device_release_direct(iio);
704 if (ret)
705 goto out;
706
707 *val = le16_to_cpu(reg);
708
709 ret = IIO_VAL_INT;
710
711 out:
712 pm_runtime_put_autosuspend(dev);
713
714 return ret;
715 }
716
veml6046x00_read_raw(struct iio_dev * iio,struct iio_chan_spec const * chan,int * val,int * val2,long mask)717 static int veml6046x00_read_raw(struct iio_dev *iio,
718 struct iio_chan_spec const *chan, int *val,
719 int *val2, long mask)
720 {
721 struct veml6046x00_data *data = iio_priv(iio);
722
723 switch (mask) {
724 case IIO_CHAN_INFO_RAW:
725 if (chan->type != IIO_INTENSITY)
726 return -EINVAL;
727 return veml6046x00_single_read(iio, chan->channel2, val);
728 case IIO_CHAN_INFO_INT_TIME:
729 *val = 0;
730 return veml6046x00_get_it_usec(data, val2);
731 case IIO_CHAN_INFO_SCALE:
732 return veml6046x00_get_scale(data, val, val2);
733 default:
734 return -EINVAL;
735 }
736 }
737
veml6046x00_read_avail(struct iio_dev * iio,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)738 static int veml6046x00_read_avail(struct iio_dev *iio,
739 struct iio_chan_spec const *chan,
740 const int **vals, int *type, int *length,
741 long mask)
742 {
743 struct veml6046x00_data *data = iio_priv(iio);
744 int it_idx;
745
746 switch (mask) {
747 case IIO_CHAN_INFO_INT_TIME:
748 *vals = (int *)&veml6046x00_it;
749 *length = 2 * ARRAY_SIZE(veml6046x00_it);
750 *type = IIO_VAL_INT_PLUS_MICRO;
751 return IIO_AVAIL_LIST;
752 case IIO_CHAN_INFO_SCALE:
753 it_idx = veml6046x00_get_it_index(data);
754 if (it_idx < 0)
755 return it_idx;
756 *vals = (int *)&veml6046x00_it_gains[it_idx];
757 *length = 2 * ARRAY_SIZE(veml6046x00_it_gains[it_idx]);
758 *type = IIO_VAL_INT_PLUS_MICRO;
759 return IIO_AVAIL_LIST;
760 default:
761 return -EINVAL;
762 }
763 }
764
veml6046x00_write_raw(struct iio_dev * iio,struct iio_chan_spec const * chan,int val,int val2,long mask)765 static int veml6046x00_write_raw(struct iio_dev *iio,
766 struct iio_chan_spec const *chan,
767 int val, int val2, long mask)
768 {
769 switch (mask) {
770 case IIO_CHAN_INFO_INT_TIME:
771 return veml6046x00_set_it(iio, val, val2);
772 case IIO_CHAN_INFO_SCALE:
773 return veml6046x00_set_scale(iio, val, val2);
774 default:
775 return -EINVAL;
776 }
777 }
778
779 static const struct iio_info veml6046x00_info_no_irq = {
780 .read_raw = veml6046x00_read_raw,
781 .read_avail = veml6046x00_read_avail,
782 .write_raw = veml6046x00_write_raw,
783 };
784
veml6046x00_buffer_preenable(struct iio_dev * iio)785 static int veml6046x00_buffer_preenable(struct iio_dev *iio)
786 {
787 struct veml6046x00_data *data = iio_priv(iio);
788 struct device *dev = regmap_get_device(data->regmap);
789 int ret;
790
791 ret = regmap_field_write(data->rf.mode, 0);
792 if (ret) {
793 dev_err(dev, "Failed to set mode %d\n", ret);
794 return ret;
795 }
796
797 ret = regmap_field_write(data->rf.trig, 0);
798 if (ret) {
799 /*
800 * no unrolling of mode as it is set appropriately with next
801 * single read.
802 */
803 dev_err(dev, "Failed to set trigger %d\n", ret);
804 return ret;
805 }
806
807 return pm_runtime_resume_and_get(dev);
808 }
809
veml6046x00_buffer_postdisable(struct iio_dev * iio)810 static int veml6046x00_buffer_postdisable(struct iio_dev *iio)
811 {
812 struct veml6046x00_data *data = iio_priv(iio);
813 struct device *dev = regmap_get_device(data->regmap);
814 int ret;
815
816 ret = regmap_field_write(data->rf.mode, 1);
817 if (ret) {
818 dev_err(dev, "Failed to set mode %d\n", ret);
819 return ret;
820 }
821
822 pm_runtime_put_autosuspend(dev);
823
824 return 0;
825 }
826
827 static const struct iio_buffer_setup_ops veml6046x00_buffer_setup_ops = {
828 .preenable = veml6046x00_buffer_preenable,
829 .postdisable = veml6046x00_buffer_postdisable,
830 };
831
veml6046x00_trig_handler(int irq,void * p)832 static irqreturn_t veml6046x00_trig_handler(int irq, void *p)
833 {
834 struct iio_poll_func *pf = p;
835 struct iio_dev *iio = pf->indio_dev;
836 struct veml6046x00_data *data = iio_priv(iio);
837 int ret;
838 struct {
839 __le16 chans[4];
840 aligned_s64 timestamp;
841 } scan;
842
843 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_R,
844 &scan.chans, sizeof(scan.chans));
845 if (ret)
846 goto done;
847
848 iio_push_to_buffers_with_ts(iio, &scan, sizeof(scan),
849 iio_get_time_ns(iio));
850
851 done:
852 iio_trigger_notify_done(iio->trig);
853
854 return IRQ_HANDLED;
855 }
856
veml6046x00_validate_part_id(struct veml6046x00_data * data)857 static int veml6046x00_validate_part_id(struct veml6046x00_data *data)
858 {
859 struct device *dev = regmap_get_device(data->regmap);
860 unsigned int part_id;
861 int ret;
862 __le16 reg;
863
864 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_ID,
865 ®, sizeof(reg));
866 if (ret)
867 return dev_err_probe(dev, ret, "Failed to read ID\n");
868
869 part_id = le16_to_cpu(reg);
870 if (part_id != 0x01)
871 dev_info(dev, "Unknown ID %#04x\n", part_id);
872
873 return 0;
874 }
875
veml6046x00_setup_device(struct iio_dev * iio)876 static int veml6046x00_setup_device(struct iio_dev *iio)
877 {
878 struct veml6046x00_data *data = iio_priv(iio);
879 struct device *dev = regmap_get_device(data->regmap);
880 int ret;
881 __le16 reg16;
882
883 reg16 = cpu_to_le16(VEML6046X00_CONF0_AF);
884 ret = regmap_bulk_write(data->regmap, VEML6046X00_REG_CONF0,
885 ®16, sizeof(reg16));
886 if (ret)
887 return dev_err_probe(dev, ret, "Failed to set configuration\n");
888
889 reg16 = cpu_to_le16(0);
890 ret = regmap_bulk_write(data->regmap, VEML6046X00_REG_THDL,
891 ®16, sizeof(reg16));
892 if (ret)
893 return dev_err_probe(dev, ret, "Failed to set low threshold\n");
894
895 reg16 = cpu_to_le16(U16_MAX);
896 ret = regmap_bulk_write(data->regmap, VEML6046X00_REG_THDH,
897 ®16, sizeof(reg16));
898 if (ret)
899 return dev_err_probe(dev, ret, "Failed to set high threshold\n");
900
901 ret = regmap_bulk_read(data->regmap, VEML6046X00_REG_INT,
902 ®16, sizeof(reg16));
903 if (ret)
904 return dev_err_probe(dev, ret, "Failed to clear interrupts\n");
905
906 return 0;
907 }
908
veml6046x00_probe(struct i2c_client * i2c)909 static int veml6046x00_probe(struct i2c_client *i2c)
910 {
911 struct device *dev = &i2c->dev;
912 struct veml6046x00_data *data;
913 struct iio_dev *iio;
914 struct regmap *regmap;
915 int ret;
916
917 regmap = devm_regmap_init_i2c(i2c, &veml6046x00_regmap_config);
918 if (IS_ERR(regmap))
919 return dev_err_probe(dev, PTR_ERR(regmap), "Failed to set regmap\n");
920
921 iio = devm_iio_device_alloc(dev, sizeof(*data));
922 if (!iio)
923 return -ENOMEM;
924
925 data = iio_priv(iio);
926 /* struct iio_dev is retrieved via dev_get_drvdata(). */
927 i2c_set_clientdata(i2c, iio);
928 data->regmap = regmap;
929
930 ret = veml6046x00_regfield_init(data);
931 if (ret)
932 return dev_err_probe(dev, ret, "Failed to init regfield\n");
933
934 ret = devm_regulator_get_enable(dev, "vdd");
935 if (ret)
936 return dev_err_probe(dev, ret, "Failed to enable regulator\n");
937
938 /* bring device in a known state and switch device on */
939 ret = veml6046x00_setup_device(iio);
940 if (ret < 0)
941 return ret;
942
943 ret = devm_add_action_or_reset(dev, veml6046x00_shutdown_action, data);
944 if (ret < 0)
945 return dev_err_probe(dev, ret, "Failed to add shut down action\n");
946
947 ret = pm_runtime_set_active(dev);
948 if (ret < 0)
949 return dev_err_probe(dev, ret, "Failed to activate PM runtime\n");
950
951 ret = devm_pm_runtime_enable(dev);
952 if (ret)
953 return dev_err_probe(dev, ret, "Failed to enable PM runtime\n");
954
955 pm_runtime_get_noresume(dev);
956 pm_runtime_set_autosuspend_delay(dev, VEML6046X00_AUTOSUSPEND_MS);
957 pm_runtime_use_autosuspend(dev);
958
959 ret = veml6046x00_validate_part_id(data);
960 if (ret)
961 return dev_err_probe(dev, ret, "Failed to validate device ID\n");
962
963 iio->name = "veml6046x00";
964 iio->channels = veml6046x00_channels;
965 iio->num_channels = ARRAY_SIZE(veml6046x00_channels);
966 iio->modes = INDIO_DIRECT_MODE;
967
968 iio->info = &veml6046x00_info_no_irq;
969
970 ret = devm_iio_triggered_buffer_setup(dev, iio, NULL,
971 veml6046x00_trig_handler,
972 &veml6046x00_buffer_setup_ops);
973 if (ret)
974 return dev_err_probe(dev, ret,
975 "Failed to register triggered buffer");
976
977 pm_runtime_put_autosuspend(dev);
978
979 ret = devm_iio_device_register(dev, iio);
980 if (ret)
981 return dev_err_probe(dev, ret, "Failed to register iio device");
982
983 return 0;
984 }
985
veml6046x00_runtime_suspend(struct device * dev)986 static int veml6046x00_runtime_suspend(struct device *dev)
987 {
988 struct veml6046x00_data *data = iio_priv(dev_get_drvdata(dev));
989
990 return veml6046x00_shutdown(data);
991 }
992
veml6046x00_runtime_resume(struct device * dev)993 static int veml6046x00_runtime_resume(struct device *dev)
994 {
995 struct veml6046x00_data *data = iio_priv(dev_get_drvdata(dev));
996
997 return veml6046x00_power_on(data);
998 }
999
1000 static DEFINE_RUNTIME_DEV_PM_OPS(veml6046x00_pm_ops,
1001 veml6046x00_runtime_suspend,
1002 veml6046x00_runtime_resume, NULL);
1003
1004 static const struct of_device_id veml6046x00_of_match[] = {
1005 { .compatible = "vishay,veml6046x00" },
1006 { }
1007 };
1008 MODULE_DEVICE_TABLE(of, veml6046x00_of_match);
1009
1010 static const struct i2c_device_id veml6046x00_id[] = {
1011 { .name = "veml6046x00" },
1012 { }
1013 };
1014 MODULE_DEVICE_TABLE(i2c, veml6046x00_id);
1015
1016 static struct i2c_driver veml6046x00_driver = {
1017 .driver = {
1018 .name = "veml6046x00",
1019 .of_match_table = veml6046x00_of_match,
1020 .pm = pm_ptr(&veml6046x00_pm_ops),
1021 },
1022 .probe = veml6046x00_probe,
1023 .id_table = veml6046x00_id,
1024 };
1025 module_i2c_driver(veml6046x00_driver);
1026
1027 MODULE_AUTHOR("Andreas Klinger <ak@it-klinger.de>");
1028 MODULE_DESCRIPTION("VEML6046X00 RGBIR Color Sensor");
1029 MODULE_LICENSE("GPL");
1030