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/linux/arch/arm/mach-rpc/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0
37 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
38 20,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
39 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
40 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
41 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
42 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
43 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
44 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
45 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
[all …]
/linux/drivers/pinctrl/stm32/
H A Dpinctrl-stm32f746.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "pinctrl-stm32.h"
24 STM32_FUNCTION(16, "EVENTOUT"),
25 STM32_FUNCTION(17, "ANALOG")
38 STM32_FUNCTION(16, "EVENTOUT"),
39 STM32_FUNCTION(17, "ANALOG")
51 STM32_FUNCTION(16, "EVENTOUT"),
52 STM32_FUNCTION(17, "ANALOG")
64 STM32_FUNCTION(16, "EVENTOUT"),
65 STM32_FUNCTION(17, "ANALOG")
[all …]
H A Dpinctrl-stm32f429.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "pinctrl-stm32.h"
23 STM32_FUNCTION(16, "EVENTOUT"),
24 STM32_FUNCTION(17, "ANALOG")
34 STM32_FUNCTION(16, "EVENTOUT"),
35 STM32_FUNCTION(17, "ANALOG")
45 STM32_FUNCTION(16, "EVENTOUT"),
46 STM32_FUNCTION(17, "ANALOG")
58 STM32_FUNCTION(16, "EVENTOUT"),
59 STM32_FUNCTION(17, "ANALOG")
[all …]
H A Dpinctrl-stm32f469.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "pinctrl-stm32.h"
22 STM32_FUNCTION(16, "EVENTOUT"),
23 STM32_FUNCTION(17, "ANALOG")
35 STM32_FUNCTION(16, "EVENTOUT"),
36 STM32_FUNCTION(17, "ANALOG")
47 STM32_FUNCTION(16, "EVENTOUT"),
48 STM32_FUNCTION(17, "ANALOG")
61 STM32_FUNCTION(16, "EVENTOUT"),
62 STM32_FUNCTION(17, "ANALOG")
[all …]
H A Dpinctrl-stm32f769.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "pinctrl-stm32.h"
23 STM32_FUNCTION(16, "EVENTOUT"),
24 STM32_FUNCTION(17, "ANALOG")
37 STM32_FUNCTION(16, "EVENTOUT"),
38 STM32_FUNCTION(17, "ANALOG")
51 STM32_FUNCTION(16, "EVENTOUT"),
52 STM32_FUNCTION(17, "ANALOG")
65 STM32_FUNCTION(16, "EVENTOUT"),
66 STM32_FUNCTION(17, "ANALOG")
[all …]
H A Dpinctrl-stm32h743.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "pinctrl-stm32.h"
25 STM32_FUNCTION(16, "EVENTOUT"),
26 STM32_FUNCTION(17, "ANALOG")
41 STM32_FUNCTION(16, "EVENTOUT"),
42 STM32_FUNCTION(17, "ANALOG")
56 STM32_FUNCTION(16, "EVENTOUT"),
57 STM32_FUNCTION(17, "ANALOG")
71 STM32_FUNCTION(16, "EVENTOUT"),
72 STM32_FUNCTION(17, "ANALOG")
[all …]
H A Dpinctrl-stm32mp157.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
10 #include "pinctrl-stm32.h"
26 STM32_FUNCTION(16, "EVENTOUT"),
27 STM32_FUNCTION(17, "ANALOG")
44 STM32_FUNCTION(16, "EVENTOUT"),
45 STM32_FUNCTION(17, "ANALOG")
61 STM32_FUNCTION(16, "EVENTOUT"),
62 STM32_FUNCTION(17, "ANALOG")
76 STM32_FUNCTION(16, "EVENTOUT"),
[all …]
H A Dpinctrl-stm32mp257.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 #include "pinctrl-stm32.h"
28 STM32_FUNCTION(16, "EVENTOUT"),
29 STM32_FUNCTION(17, "ANALOG")
45 STM32_FUNCTION(16, "EVENTOUT"),
46 STM32_FUNCTION(17, "ANALOG")
61 STM32_FUNCTION(16, "EVENTOUT"),
62 STM32_FUNCTION(17, "ANALOG")
78 STM32_FUNCTION(16, "EVENTOUT"),
[all …]
/linux/arch/powerpc/crypto/
H A Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2022- IBM Inc. All rights reserved
22 # Hash keys = v3 - v14
29 # v31 - counter 1
32 # vs0 - vs14 for round keys
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
48 # v15 - v18 - input states
49 # vs1 - vs9 - round keys
58 vcipher 16, 16, 19
[all …]
H A Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
14 # Block size 16 bytes
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
56 #include <asm/asm-offsets.h>
57 #include <asm/asm-compat.h>
[all …]
H A Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
14 # 1. a += b; d ^= a; d <<<= 16;
19 # row1 = (row1 + row2), row4 = row1 xor row4, row4 rotate each word by 16
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
55 li 16, \OFFSET
56 stvx \VRS, 16, \FRAME
60 li 16, \OFFSET
61 stxvx \VSX, 16, \FRAME
[all …]
/linux/arch/alpha/lib/
H A Dev6-copy_page.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-copy_page.S
13 -----------------------------
28 9 cycles but I was not able to get it to run that fast -- the initial
34 -------------------------------------
45 --------------------------------------
51 forced me to add another cycle to the inner-most kernel - up to 11
68 /* Prefetch 5 read cachelines; write-hint 10 cache lines. */
69 wh64 ($16)
70 ldl $31,0($17)
[all …]
H A Dev6-memcpy.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memcpy.S
4 * 21264 version by Rick Gorton <rick.gorton@alpha-processor.com>
8 * - memory accessed as aligned quadwords only
9 * - uses bcmpge to compare 8 bytes in parallel
14 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
16 * E - either cluster
17 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
18 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
21 * $1,$2, - scratch
[all …]
H A Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
53 and $17,255,$1 # E : 00000000000000ch
[all …]
H A Dcopy_user.S1 /* SPDX-License-Identifier: GPL-2.0 */
9 * Notably, we have to make sure that $0 is always up-to-date and
21 .long 99b - .; \
22 lda $31, $exitin-99b($31); \
28 .long 99b - .; \
29 lda $31, $exitout-99b($31); \
39 and $16,7,$3
45 EXI( ldq_u $1,0($17) )
46 EXO( ldq_u $2,0($16) )
47 extbl $1,$17,$1
[all …]
H A Dmemset.S1 /* SPDX-License-Identifier: GPL-2.0 */
10 * This routine is "moral-ware": you are free to use it any way you wish, and
33 and $17,255,$1 /* E1 */
34 insbl $17,1,$17 /* .. E0 */
35 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
36 sll $17,16,$1 /* E1 (p-c latency, next cycle) */
38 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
39 sll $17,32,$1 /* E1 (p-c latency, next cycle) */
40 bis $17,$1,$17 /* E0 (p-c latency, next cycle) */
45 addq $18,$16,$6 /* E0 */
[all …]
H A Dev6-copy_user.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-copy_user.S
5 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
11 * Notably, we have to make sure that $0 is always up-to-date and
19 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
21 * E - either cluster
22 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
23 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
31 .long 99b - .; \
32 lda $31, $exitin-99b($31); \
[all …]
H A Dcopy_page.S1 /* SPDX-License-Identifier: GPL-2.0 */
20 1: ldq $0,0($17)
21 ldq $1,8($17)
22 ldq $2,16($17)
23 ldq $3,24($17)
25 ldq $4,32($17)
26 ldq $5,40($17)
27 ldq $6,48($17)
28 ldq $7,56($17)
30 stq $0,0($16)
[all …]
/linux/arch/alpha/include/asm/
H A Dxor.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-alpha/xor.h
5 * Optimized RAID-5 checksumming functions for alpha EV5 and EV6
52 srl $16, 6, $16 \n\
55 ldq $0,0($17) \n\
57 ldq $2,8($17) \n\
60 ldq $4,16($17) \n\
61 ldq $5,16($18) \n\
62 ldq $6,24($17) \n\
65 ldq $19,32($17) \n\
[all …]
/linux/lib/zstd/compress/
H A Dclevels.h5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
17 /*-===== Pre-defined compression levels =====-*/
24 { /* "default" - for any srcSize > 256 KB */
28 { 20, 15, 16, 1, 6, 0, ZSTD_fast }, /* level 2 */
29 { 21, 16, 17, 1, 5, 0, ZSTD_dfast }, /* level 3 */
34 { 21, 19, 20, 4, 5, 16, ZSTD_lazy2 }, /* level 8 */
35 { 22, 20, 21, 4, 5, 16, ZSTD_lazy2 }, /* level 9 */
36 { 22, 21, 22, 5, 5, 16, ZSTD_lazy2 }, /* level 10 */
37 { 22, 21, 22, 6, 5, 16, ZSTD_lazy2 }, /* level 11 */
[all …]
/linux/arch/arm64/crypto/
H A Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
21 .inst 0xce608000 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
25 .inst 0xce608400 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
33 .inst 0xce608800 | .L\rd | (.L\rn << 5) | (.L\rm << 16)
37 * The SHA-512 round constants
85 ld1 {v\rc1\().2d}, [x4], #16
88 ext v6.16b, v\i2\().16b, v\i3\().16b, #8
89 ext v5.16b, v5.16b, v5.16b, #8
[all …]
H A Dsha2-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sha2-ce-core.S - core SHA-224/SHA-256 transform using v8 Crypto Extensions
12 .arch armv8-a+crypto
30 mov dg2v.16b, dg0v.16b
51 * The SHA-256 round constants
81 ld1 { v0.4s- v3.4s}, [x8], #64
82 ld1 { v4.4s- v7.4s}, [x8], #64
83 ld1 { v8.4s-v11.4s}, [x8], #64
84 ld1 {v12.4s-v15.4s}, [x8]
94 0: ld1 {v16.4s-v19.4s}, [x1], #64
[all …]
/linux/include/dt-bindings/memory/
H A Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
14 * MM IOMMU supports 16GB dma address. We separate it to four ranges:
15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
22 * modules dma-address-region larbs-ports
26 * N/A 12G ~ 16G
32 /* LARB 0 -- MMSYS */
38 /* LARB 1 -- MMSYS */
45 /* LARB 2 -- MMSYS */
52 /* LARB 4 -- VDEC */
[all …]
H A Dmt8192-larb-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
14 * MM IOMMU supports 16GB dma address.
18 * modules dma-address-region larbs-ports
21 * cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
135 #define M4U_PORT_L11_IMG_WPE_RDMA0 MTK_M4U_ID(11, 16)
136 #define M4U_PORT_L11_IMG_WPE_WDMA MTK_M4U_ID(11, 17)
173 #define M4U_PORT_L16_CAM_IMGO_R1_A MTK_M4U_ID(16, 0)
174 #define M4U_PORT_L16_CAM_RRZO_R1_A MTK_M4U_ID(16, 1)
175 #define M4U_PORT_L16_CAM_CQI_R1_A MTK_M4U_ID(16, 2)
[all …]
/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c1 // SPDX-License-Identifier: MIT
35 * drm_dsc_dp_pps_header_init() - Initializes the PPS Header
49 pps_header->HB1 = DP_SDP_PPS; in drm_dsc_dp_pps_header_init()
50 pps_header->HB2 = DP_SDP_PPS_HEADER_PAYLOAD_BYTES_MINUS_1; in drm_dsc_dp_pps_header_init()
55 * drm_dsc_dp_rc_buffer_size - get rc buffer size in bytes
57 * @rc_buffer_size: number of blocks - 1, according to DPCD offset 63h
72 return 16 * size; in drm_dsc_dp_rc_buffer_size()
82 * drm_dsc_pps_payload_pack() - Populates the DSC PPS
110 pps_payload->dsc_version = in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
[all …]

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