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/linux/include/uapi/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
46 #define MDIO_AN_ADVERTISE 16 /* AN advertising (base page) */
47 #define MDIO_AN_LPA 19 /* AN LP abilities (base page) */
59 /* Media-dependent registers. */
60 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
61 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
62 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
63 * Lanes B-D are numbered 134-136. */
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/linux/net/ethtool/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0-only
13 [NETIF_F_SG_BIT] = "tx-scatter-gather",
14 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4",
15 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic",
16 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6",
18 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist",
19 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert",
21 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse",
22 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter",
23 [NETIF_F_HW_VLAN_STAG_TX_BIT] = "tx-vlan-stag-hw-insert",
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/linux/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-phy-v2.c125 #include "xgbe-common.h"
149 /* Rate-change complete wait/retry count */
216 /* SFP Serial ID Base ID values relative to an offset of 0 */
270 u8 base[64]; member
276 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
277 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
284 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
285 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
306 /* Re-driver related definitions */
375 /* Re-driver support */
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_82599.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
65 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_mac_link_ops_82599()
70 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && in ixgbe_init_mac_link_ops_82599()
72 mac->ops.disable_tx_laser = in ixgbe_init_mac_link_ops_82599()
74 mac->ops.enable_tx_laser = in ixgbe_init_mac_link_ops_82599()
76 mac->ops.flap_tx_laser = &ixgbe_flap_tx_laser_multispeed_fiber; in ixgbe_init_mac_link_ops_82599()
78 mac->ops.disable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
79 mac->ops.enable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
80 mac->ops.flap_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
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/linux/include/linux/
H A Dphy.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Based on code in sungem_phy.c and (long-removed) gianfar_phy.c
82 * Set phydev->irq to PHY_POLL if interrupts are not supported,
86 #define PHY_POLL -1
87 #define PHY_MAC_INTERRUPT -2
96 * enum phy_interface_t - Interface Mode definitions
98 * @PHY_INTERFACE_MODE_NA: Not Applicable - don't touch
100 * @PHY_INTERFACE_MODE_MII: Media-independent interface
101 * @PHY_INTERFACE_MODE_GMII: Gigabit media-independent interface
102 * @PHY_INTERFACE_MODE_SGMII: Serial gigabit media-independent interface
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/linux/include/sound/
H A Demu10k1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/pcm-indirect.h>
25 /* ------------------- DEFINES -------------------- */
33 /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */
41 // This is used to define hardware bit-fields (sub-registers) by combining
44 // The non-concatenating (_NC) variant should be used directly only for
45 // sub-registers that do not follow the <register>_<field> naming pattern.
55 // Macros for manipulating values of bit-fields declared using the above macros.
59 // single sub-register at a time.
62 #define REG_MASK0(r) ((1U << REG_SIZE(r)) - 1U)
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/linux/sound/pci/ctxfi/
H A Dcthw20k2.c1 // SPDX-License-Identifier: GPL-2.0-only
76 * Fixed-point value in 8.24 format for parameter channel */
88 u16 czbfs:1; /* Clear Z-Buffers */
162 return -ENOMEM; in src_get_rsc_ctrl_blk()
180 set_field(&ctl->ctl, SRCCTL_STATE, state); in src_set_state()
181 ctl->dirty.bf.ctl = 1; in src_set_state()
189 set_field(&ctl->ctl, SRCCTL_BM, bm); in src_set_bm()
190 ctl->dirty.bf.ctl = 1; in src_set_bm()
198 set_field(&ctl->ctl, SRCCTL_RSR, rsr); in src_set_rsr()
199 ctl->dirty.bf.ctl = 1; in src_set_rsr()
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_link.c1 /* Copyright 2008-2013 Broadcom Corporation
8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
37 #define MDIO_ACCESS_TIMEOUT 1000
43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
205 (_phy)->def_md_devad, \
211 (_phy)->def_md_devad, \
239 * bnx2x_check_lfa - This function checks if link reinitialization is required,
251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
257 /* NOTE: must be first condition checked - in bnx2x_check_lfa()
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dt4_hw.c4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * t4_wait_op_done_val - wait until an operation is completed
46 * @mask: a single-bit field within @reg that indicates completion
55 * operation completes and -EAGAIN otherwise.
68 if (--attempts == 0) in t4_wait_op_done_val()
69 return -EAGAIN; in t4_wait_op_done_val()
83 * t4_set_reg_field - set a register field to a value
102 * t4_read_indirect - read indirectly addressed registers
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