Searched +full:0 +full:xd4019100 (Results 1 – 5 of 5) sorted by relevance
/linux/Documentation/devicetree/bindings/gpio/ |
H A D | mrvl-gpio.yaml | 51 pattern: '^gpio@[0-9a-f]+$' 97 '^gpio@[0-9a-f]*$': 129 reg = <0x40e00000 0x10000>; 144 reg = <0xd4019000 0x1000>; 156 reg = <0xd4019000 0x4>; 160 reg = <0xd4019004 0x4>; 164 reg = <0xd4019008 0x4>; 168 reg = <0xd4019100 0x4>;
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/linux/arch/arm/boot/dts/marvell/ |
H A D | pxa910.dtsi | 30 marvell,tauros2-cache-features = <0x3>; 37 reg = <0xd4200000 0x00200000>; 44 reg = <0xd4282000 0x1000>; 54 reg = <0xd4000000 0x00200000>; 59 reg = <0xd4014000 0x100>; 65 reg = <0xd4016000 0x100>; 72 reg = <0xd4017000 0x1000>; 82 reg = <0xd4018000 0x1000>; 92 reg = <0xd4036000 0x1000>; 104 reg = <0xd4019000 0x1000>; [all …]
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H A D | pxa168.dtsi | 32 reg = <0xd4200000 0x00200000>; 39 reg = <0xd4282000 0x1000>; 49 reg = <0xd4000000 0x00200000>; 54 reg = <0xd4014000 0x100>; 62 reg = <0xd4017000 0x1000>; 72 reg = <0xd4018000 0x1000>; 82 reg = <0xd4026000 0x1000>; 94 reg = <0xd4019000 0x1000>; 106 reg = <0xd4019000 0x4>; 110 reg = <0xd4019004 0x4>; [all …]
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H A D | mmp2.dtsi | 33 marvell,tauros2-cache-features = <0x3>; 40 reg = <0xd4200000 0x00200000>; 45 reg = <0xd420d000 0x4000>; 58 reg = <0xd4282000 0x1000>; 67 reg = <0x150 0x4>, <0x168 0x4>; 77 reg = <0x154 0x4>, <0x16c 0x4>; 88 reg = <0x180 0x4>, <0x17c 0x4>; 98 reg = <0x158 0x4>, <0x170 0x4>; 108 reg = <0x15c 0x4>, <0x174 0x4>; 118 reg = <0x160 0x4>, <0x178 0x4>; [all …]
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H A D | mmp3.dtsi | 16 #size-cells = <0>; 19 cpu@0 { 23 reg = <0>; 45 reg = <0xd4200000 0x00200000>; 52 reg = <0xd4282000 0x1000>, 53 <0xd4284000 0x100>; 62 reg = <0x150 0x4>, <0x168 0x4>; 72 reg = <0x154 0x4>, <0x16c 0x4>; 82 reg = <0x1bc 0x4>, <0x1a4 0x4>; 92 reg = <0x1c0 0x4>, <0x1a8 0x4>; [all …]
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