| /linux/arch/arm64/boot/dts/broadcom/stingray/ |
| H A D | stingray-pcie.dtsi | 8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | rockchip-dw-pcie.yaml | 50 const: 0
89 reg = <0x3 0xc0800000 0x0 0x390000>,
90 <0x0 0xfe280000 0x0 0x10000>,
91 <0x3 0x80000000 0x0 0x100000>;
93 bus-range = <0x20 0x2f>;
109 msi-map = <0x2000 &its 0x2000 0x1000>;
114 ranges = <0x81000000 0x0 0x80800000 0x3 0x80800000 0x0 0x100000>,
115 <0x83000000 0x0 0x80900000 0x3 0x80900000 0x0 0x3f700000>;
123 #address-cells = <0>;
|
| H A D | mediatek-pcie.txt | 32 where N starting from 0 to one less than the number of root ports.
80 reg = <0 0x1a000000 0 0x1000>;
88 reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
89 <0 0x1a142000 0 0x1000>, /* Port0 registers */
90 <0 0x1a143000 0 0x1000>, /* Port1 registers */
91 <0 0x1a144000 0 0x1000>; /* Port2 registers */
96 interrupt-map-mask = <0xf800 0 0 0>;
97 interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
98 <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
99 <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
[all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | msm8956-sony-xperia-loire.dtsi | 16 qcom,msm-id = <266 0x10001>; /* MSM8956 v1.1 */
17 qcom,board-id = <8 0>;
32 reg = <0x0 0x83000000 0x0 0x2800000>;
37 reg = <0 0x57f00000 0 0x100000>;
38 record-size = <0x20000>;
39 console-size = <0x40000>;
40 ftrace-size = <0x20000>;
41 pmsg-size = <0x20000>;
111 /* Cluster 0 supply */
274 gpio-reserved-ranges = <0 4>;
|
| /linux/arch/arm64/boot/dts/apple/ |
| H A D | t600x-die0.dtsi | 3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
12 reg = <0x2 0x8e03c000 0x0 0x14000>;
21 reg = <0x2 0x8e100000 0x0 0xc000>,
22 <0x2 0x8e10c000 0x0 0x4>;
29 reg = <0x2 0x90820000 0x0 0x4000>;
33 gpio-ranges = <&pinctrl_smc 0 0 30>;
39 interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>,
40 <AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>,
41 <AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>,
42 <AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>,
[all …]
|
| H A D | t8103.dtsi | 23 #size-cells = <0>;
57 cpu_e0: cpu@0 {
60 reg = <0x0 0x0>;
62 cpu-release-addr = <0 0>; /* To be filled by loader */
67 i-cache-size = <0x20000>;
68 d-cache-size = <0x10000>;
74 reg = <0x0 0x1>;
76 cpu-release-addr = <0 0>; /* To be filled by loader */
81 i-cache-size = <0x20000>;
82 d-cache-size = <0x10000>;
[all …]
|
| H A D | t8112.dtsi | 24 #size-cells = <0>;
58 cpu_e0: cpu@0 {
61 reg = <0x0 0x0>;
63 cpu-release-addr = <0 0>; /* To be filled by loader */
68 i-cache-size = <0x20000>;
69 d-cache-size = <0x10000>;
75 reg = <0x0 0x1>;
77 cpu-release-addr = <0 0>; /* To be filled by loader */
82 i-cache-size = <0x20000>;
83 d-cache-size = <0x10000>;
[all …]
|
| /linux/drivers/net/ethernet/amd/ |
| H A D | lance.c | 67 static unsigned int lance_portlist[] __initdata = { 0x300, 0x320, 0x340, 0x360, 0};
77 .id_offset14 = 0x57,
78 .id_offset15 = 0x57,
81 .id_offset14 = 0x52,
82 .id_offset15 = 0x44,
85 .id_offset14 = 0x52,
86 .id_offset15 = 0x49,
118 {0x300, 0x320, 0x340, 0x360}.
205 #define LANCE_DATA 0x10
206 #define LANCE_ADDR 0x12
[all …]
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| /linux/drivers/net/wireless/realtek/rtw88/ |
| H A D | rtw8822b_table.c | 10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]
|
| H A D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
|
| /linux/crypto/ |
| H A D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
|
| /linux/drivers/video/fbdev/ |
| H A D | acornfb.c | 64 .hfmin = 0,
66 .vfmin = 0,
120 memset(&vidc, 0, sizeof(vidc)); in acornfb_set_timing()
162 vidc_writel(0xd0000000 | vidc.pll_ctl); in acornfb_set_timing()
163 vidc_writel(0x80000000 | vidc.h_cycle); in acornfb_set_timing()
164 vidc_writel(0x81000000 | vidc.h_sync_width); in acornfb_set_timing()
165 vidc_writel(0x82000000 | vidc.h_border_start); in acornfb_set_timing()
166 vidc_writel(0x83000000 | vidc.h_display_start); in acornfb_set_timing()
167 vidc_writel(0x84000000 | vidc.h_display_end); in acornfb_set_timing()
168 vidc_writel(0x85000000 | vidc.h_border_end); in acornfb_set_timing()
[all …]
|
| /linux/drivers/net/wireless/realtek/rtl8xxxu/ |
| H A D | regs.h | 8 /* 0x0000 ~ 0x00FF System Configuration */
9 #define REG_SYS_ISO_CTRL 0x0000
10 #define SYS_ISO_MD2PP BIT(0)
16 #define REG_SYS_FUNC 0x0002
17 #define SYS_FUNC_BBRSTB BIT(0)
34 #define REG_APS_FSMCO 0x0004
46 #define REG_SYS_CLKR 0x0008
47 #define SYS_CLK_ANAD16V_ENABLE BIT(0)
59 #define REG_9346CR 0x000a
63 #define REG_EE_VPD 0x000c
[all …]
|
| /linux/include/uapi/sound/ |
| H A D | asound.h | 29 #define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
30 #define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
31 #define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
72 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
75 SNDRV_HWDEP_IFACE_OPL2 = 0,
134 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
135 #define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
136 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
137 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
145 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 1
[all...] |
| /linux/tools/perf/trace/beauty/include/uapi/sound/ |
| H A D | asound.h | 29 #define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
30 #define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
31 #define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
72 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
75 SNDRV_HWDEP_IFACE_OPL2 = 0,
134 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
135 #define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
136 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
137 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
145 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 18)
[all …]
|
| /linux/tools/include/uapi/sound/ |
| H A D | asound.h | |