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Searched +full:0 +full:x6001c200 (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dnvidia,tegra-vde.txt44 reg = <0x6001a000 0x1000 /* Syntax Engine */
45 0x6001b000 0x1000 /* Video Bitstream Engine */
46 0x6001c000 0x100 /* Macroblock Engine */
47 0x6001c200 0x100 /* Post-processing Engine */
48 0x6001c400 0x100 /* Motion Compensation Engine */
49 0x6001c600 0x100 /* Transform Engine */
50 0x6001c800 0x100 /* Pixel prediction block */
51 0x6001ca00 0x100 /* Video DMA */
52 0x6001d800 0x300 /* Video frame controls */>;
H A Dnvidia,tegra-vde.yaml97 reg = <0x6001a000 0x1000>, /* Syntax Engine */
98 <0x6001b000 0x1000>, /* Video Bitstream Engine */
99 <0x6001c000 0x100>, /* Macroblock Engine */
100 <0x6001c200 0x100>, /* Post-processing Engine */
101 <0x6001c400 0x100>, /* Motion Compensation Engine */
102 <0x6001c600 0x100>, /* Transform Engine */
103 <0x6001c800 0x100>, /* Pixel prediction block */
104 <0x6001ca00 0x100>, /* Video DMA */
105 <0x6001d800 0x300>; /* Video frame controls */
109 interrupts = <0 9 4>, /* Sync token */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra114.dtsi17 reg = <0x80000000 0x0>;
22 reg = <0x40000000 0x40000>;
25 ranges = <0 0x40000000 0x40000>;
28 reg = <0x400 0x3fc00>;
35 reg = <0x5000000
[all...]
H A Dtegra20.dtsi17 memory@0 {
19 reg = <0 0>;
24 reg = <0x40000000 0x40000>;
27 ranges = <0 0x40000000 0x40000>;
30 reg = <0x400 0x3fc0
[all...]
H A Dtegra30.dtsi20 reg = <0x80000000 0x0>;
26 reg = <0x00003000 0x00000800>, /* PADS registers */
27 <0x00003800 0x00000200>, /* AFI registers */
28 <0x10000000 0x10000000>; /* configuration space */
35 interrupt-map-mask = <0 0
[all...]