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/freebsd/sys/dev/drm2/
H A Ddrm_pciids.h14 {0, 0, 0, NULL}
17 {0x3D3D, 0x0008, 0, "3DLabs GLINT Gamma G1"}, \
18 {0, 0, 0, NULL}
21 {0x8086, 0x1132, 0, "Intel i815 GMCH"}, \
22 {0x8086, 0x7121, 0, "Intel i810 GMCH"}, \
23 {0x8086, 0x7123, 0, "Intel i810-DC100 GMCH"}, \
24 {0x8086, 0x7125, 0, "Intel i810E GMCH"}, \
25 {0, 0, 0, NULL}
28 {0x8086, 0x2562, 0, "Intel i845G GMCH"}, \
29 {0x8086, 0x2572, 0, "Intel i865G GMCH"}, \
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dmodem9 >29 byte 0 \b, normal resolution
17 0 short 0x0100
18 # 16 0-bits near beginning like True Type fonts *.ttf, Postscript PrinterFontMetric *.pfm, FTYPE.HY…
19 >2 search/9 \0\0
20 # maximal 7 0-bits for pixel sequences or 11 0-bits for EOL in G3
23 >>0 belong !0x0001a364
25 >>>2 beshort !0x0008
34 >>>>>>8 ubequad !0x2e01010454010203
36 >>>>>>>8 ubequad !0x5dee74ad1aa56394
39 >>>>>>>>-0 offset !32034 raw G3 (Group 3) FAX, byte-padded
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-mtk-tphy.txt5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
23 the child's base address to 0, the physical address
72 reg = <0 0x11290000 0 0x800>;
78 reg = <0 0x11290800 0 0x100>;
85 reg = <0 0x11290800 0 0x700>;
92 reg = <0 0x11291000 0 0x100>;
113 phy-names = "usb2-0", "usb3-0";
122 shared 0x0000 SPLLC
123 0x0100 FMREG
124 u2 port0 0x0800 U2PHY_COM
[all …]
H A Dmediatek,tphy.yaml15 controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
22 shared 0x0000 SPLLC
23 0x0100 FMREG
24 u2 port0 0x0800 U2PHY_COM
25 u3 port0 0x0900 U3PHYD
26 0x0a00 U3PHYD_BANK2
27 0x0b00 U3PHYA
28 0x0c00 U3PHYA_DA
29 u2 port1 0x1000 U2PHY_COM
30 u3 port1 0x1100 U3PHYD
[all …]
/freebsd/sys/dev/etherswitch/e6000sw/
H A De6000swreg.h44 #define MV88E6141 0x3400
45 #define MV88E6341 0x3410
46 #define MV88E6352 0x3520
47 #define MV88E6172 0x1720
48 #define MV88E6176 0x1760
49 #define MV88E6190 0x1900
52 #define MVSWITCH_MULTICHIP(_sc) ((_sc)->sw_addr != 0)
57 #define REG_GLOBAL 0x1b
58 #define REG_GLOBAL2 0x1c
59 #define REG_PORT(_sc, p) ((MVSWITCH((_sc), MV88E6190) ? 0 : 0x10) + (p))
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dqcom,ath10k.yaml116 enum: [0, 1]
283 reg = <0x18800000 0x800000>;
300 iommus = <&anoc2_smmu 0x1900>,
301 <&anoc2_smmu 0x1901>;
310 iommus = <&apps_smmu 0x1c02 0x1>;
320 reg = <0xa000000 0x200000>;
/freebsd/sys/contrib/device-tree/src/mips/loongson/
H A Dloongson64-2k1000.dtsi15 #size-cells = <0>;
17 cpu0: cpu@0 {
20 reg = <0x0>;
27 #clock-cells = <0>;
33 #address-cells = <0>;
43 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* ioports */
44 0 0x40000000 0 0x40000000 0 0x40000000
45 0xfe 0x00000000 0xfe 0x00000000 0 0x40000000>;
51 ranges = <1 0x0 0x0 0x18000000 0x4000>;
56 reg = <0 0x1fe07000 0 0x422>;
[all …]
H A Dls7a-pch.dtsi8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x2000000
[all...]
/freebsd/crypto/heimdal/lib/wind/
H A Derrorlist_table.c9 {0x0, 0x20, WIND_PROFILE_SASL}, /* C.2.1: [CONTROL CHARACTERS] */
10 {0x7f, 0x1, WIND_PROFILE_SASL}, /* C.2.1: DELETE */
11 {0x80, 0x20, WIND_PROFILE_NAME|WIND_PROFILE_SASL}, /* C.2.2: [CONTROL CHARACTERS] */
12 {0xa0, 0x1, WIND_PROFILE_NAME|WIND_PROFILE_SASL}, /* C.1.2: NO-BREAK SPACE */
13 …{0x340, 0x1, WIND_PROFILE_NAME|WIND_PROFILE_LDAP|WIND_PROFILE_SASL}, /* C.8: COMBINING GRAVE TONE …
14 …{0x341, 0x1, WIND_PROFILE_NAME|WIND_PROFILE_LDAP|WIND_PROFILE_SASL}, /* C.8: COMBINING ACUTE TONE …
15 {0x6dd, 0x1, WIND_PROFILE_NAME|WIND_PROFILE_SASL}, /* C.2.2: ARABIC END OF AYAH */
16 {0x70f, 0x1, WIND_PROFILE_NAME|WIND_PROFILE_SASL}, /* C.2.2: SYRIAC ABBREVIATION MARK */
17 {0x1680, 0x1, WIND_PROFILE_NAME|WIND_PROFILE_SASL}, /* C.1.2: OGHAM SPACE MARK */
18 {0x180e, 0x1, WIND_PROFILE_NAME|WIND_PROFILE_SASL}, /* C.2.2: MONGOLIAN VOWEL SEPARATOR */
[all …]
/freebsd/sys/i386/i386/
H A Dinitcpu.c73 &hw_instruction_sse, 0, "SIMD/MMX2 instructions available in CPU");
76 * 0: keep enable CLFLUSH
98 wrmsr(0x1000, 0x9c92LL); /* FP operand can be cacheable on Cyrix FPU */ in init_bluelightning()
100 wrmsr(0x1000, 0x1c92LL); /* Intel FPU */ in init_bluelightning()
102 /* Enables 13MB and 0-640KB cache. */ in init_bluelightning()
103 wrmsr(0x1001, (0xd0LL << 32) | 0x3ff); in init_bluelightning()
105 wrmsr(0x1002, 0x04000000LL); /* Enables triple-clock mode. */ in init_bluelightning()
107 wrmsr(0x1002, 0x03000000LL); /* Enables double-clock mode. */ in init_bluelightning()
111 load_cr0(rcr0() & ~(CR0_CD | CR0_NW)); /* CD = 0 and NW = 0 */ in init_bluelightning()
151 write_cyrix_reg(0, 0); /* dummy write */ in init_486dlc()
[all …]
/freebsd/sys/contrib/device-tree/src/loongarch/
H A Dloongson-2k2000.dtsi17 #size-cells = <0>;
22 reg = <0x0>;
29 reg = <0x1>;
36 #clock-cells = <0>;
51 thermal-sensors = <&tsensor 0>;
71 ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>,
72 <0x0 0x02000000 0x0 0x02000000 0x0 0x02000000>,
73 <0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>,
74 <0xfe 0x0 0xfe 0x0 0x0 0x40000000>;
82 ranges = <1 0x0 0x0 0x18400000 0x4000>;
[all …]
H A Dloongson-2k1000.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg= <0x0>;
30 reg = <0x1>;
37 #clock-cells = <0>;
49 i2c-gpio-0 {
51 scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
55 #size-cells = <0>;
66 #size-cells = <0>;
74 thermal-sensors = <&tsensor 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap54xx-clocks.dtsi9 #clock-cells = <0>;
16 #clock-cells = <0>;
21 reg = <0x0108>;
25 #clock-cells = <0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
44 reg = <0x0108>;
48 #clock-cells = <0>;
55 #clock-cells = <0>;
62 #clock-cells = <0>;
[all …]
H A Domap4.dtsi40 #size-cells = <0>;
42 cpu@0 {
46 reg = <0x0>;
57 reg = <0x1>;
67 reg = <0x40304000 0xa000>; /* 40k */
74 reg = <0x48241000 0x1000>,
75 <0x48240100 0x0100>;
81 reg = <0x48242000 0x1000>;
89 reg = <0x48240600 0x20>;
98 reg = <0x48281000 0x1000>;
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt7615/
H A Dregs.h37 #define MT_HW_REV MT_HW_INFO(0x000)
38 #define MT_HW_CHIPID MT_HW_INFO(0x008)
39 #define MT_TOP_STRAP_STA MT_HW_INFO(0x010)
42 #define MT_TOP_OFF_RSV 0x1128
45 #define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134)
46 #define MT_TOP_MISC2_FW_STATE GENMASK(2, 0)
51 #define MT_MCU_BASE 0x2000
54 #define MT_MCU_PCIE_REMAP_1 MT_MCU(0x500)
55 #define MT_MCU_PCIE_REMAP_1_OFFSET GENMASK(17, 0)
57 #define MT_PCIE_REMAP_BASE_1 0x40000
[all …]
/freebsd/sys/dev/alc/
H A Dif_alcreg.h36 #define VENDORID_ATHEROS 0x1969
41 #define DEVICEID_ATHEROS_AR8131 0x1063 /* L1C */
42 #define DEVICEID_ATHEROS_AR8132 0x1062 /* L2C */
43 #define DEVICEID_ATHEROS_AR8151 0x1073 /* L1D V1.0 */
44 #define DEVICEID_ATHEROS_AR8151_V2 0x1083 /* L1D V2.0 */
45 #define DEVICEID_ATHEROS_AR8152_B 0x2060 /* L2C V1.1 */
46 #define DEVICEID_ATHEROS_AR8152_B2 0x2062 /* L2C V2.0 */
47 #define DEVICEID_ATHEROS_AR8161 0x1091
48 #define DEVICEID_ATHEROS_AR8162 0x1090
49 #define DEVICEID_ATHEROS_AR8171 0x10A1
[all …]
/freebsd/sys/dev/mvs/
H A Dmvs.h32 #define CHIP_PCIEIC 0x1900 /* PCIe Interrupt Cause */
33 #define CHIP_PCIEIM 0x1910 /* PCIe Interrupt Mask */
34 #define CHIP_PCIIC 0x1d58 /* PCI Interrupt Cause */
35 #define CHIP_PCIIM 0x1d5c /* PCI Interrupt Mask */
36 #define CHIP_MIC 0x1d60 /* Main Interrupt Cause */
37 #define CHIP_MIM 0x1d64 /* Main Interrupt Mask */
38 #define CHIP_SOC_MIC 0x20 /* SoC Main Interrupt Cause */
39 #define CHIP_SOC_MIM 0x24 /* SoC Main Interrupt Mask */
40 #define IC_ERR_IRQ (1 << 0) /* shift by (2 * port #) */
42 #define IC_HC0 0x000001ff /* bits 0-8 = HC0 */
[all …]
/freebsd/sys/dev/bwi/
H A Dbwiphy.c103 #define BWI_PHYTBL_WRSSI 0x1000
104 #define BWI_PHYTBL_NOISE_SCALE 0x1400
105 #define BWI_PHYTBL_NOISE 0x1800
106 #define BWI_PHYTBL_ROTOR 0x2000
107 #define BWI_PHYTBL_DELAY 0x2400
108 #define BWI_PHYTBL_RSSI 0x4000
109 #define BWI_PHYTBL_SIGMA_SQ 0x5000
110 #define BWI_PHYTBL_WRSSI_REV1 0x5400
111 #define BWI_PHYTBL_FREQ 0x5800
187 for (i = 0; i < nitems(bwi_sup_bphy); ++i) { in bwi_phy_attach()
[all …]
/freebsd/sys/contrib/dev/rtw88/
H A Ddebug.c84 return 0; in rtw_debugfs_close()
122 seq_printf(m, "reg 0x%03x: 0x%02x\n", addr, val); in rtw_debugfs_get_read_reg()
126 seq_printf(m, "reg 0x%03x: 0x%04x\n", addr, val); in rtw_debugfs_get_read_reg()
130 seq_printf(m, "reg 0x%03x: 0x%08x\n", addr, val); in rtw_debugfs_get_read_reg()
133 return 0; in rtw_debugfs_get_read_reg()
151 seq_printf(m, "rf_read path:%d addr:0x%08x mask:0x%08x val=0x%08x\n", in rtw_debugfs_get_rf_read()
154 return 0; in rtw_debugfs_get_rf_read()
166 return 0; in rtw_debugfs_get_fix_rate()
170 return 0; in rtw_debugfs_get_fix_rate()
179 memset(tmp, 0, size); in rtw_debugfs_copy_from_user()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DUnicode.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
28 // https://unicode.org/Public/15.1.0/ucdxml/ in isPrintable()
30 {0x0020, 0x007E}, {0x00A0, 0x00AC}, {0x00AE, 0x0377}, in isPrintable()
31 {0x037A, 0x037 in isPrintable()
[all...]
/freebsd/contrib/libpcap/msdos/
H A Dpktdrvr.c34 #define DIM(x) (sizeof((x)) / sizeof(x[0]))
40 } while (0)
105 #define FIRST_RX_BUF offsetof (PktRealStub,_pktRxBuf [0])
118 #define FIRST_RX_BUF (WORD) &pktRxBuf [0]
158 static int para_skip = 0;
174 LOCAL int para_skip = 0;
204 PUBLIC ETHER myAddress = { 0, 0, 0, 0, 0, 0 };
241 if (errNum < 0 || errNum >= DIM(errStr)) in PktGetErrorStr()
313 okay = ((reg.flags & 1) == 0); /* OK if carry clear */ in PktInterrupt()
317 okay = ((reg.x.flags & 1) == 0); in PktInterrupt()
[all …]
/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_phy_n_tables.c84 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
87 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
88 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
91 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
92 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
93 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
/freebsd/sys/dev/iwn/
H A Dif_iwnreg.h58 #define IWN_HIADDR(paddr) (((paddr) >> 32) & 0xf)
61 #define IWN_HIADDR(paddr) (0)
67 #define IWN_HW_IF_CONFIG 0x000
68 #define IWN_INT_COALESCING 0x004
69 #define IWN_INT_PERIODIC 0x005 /* use IWN_WRITE_1 */
70 #define IWN_INT 0x008
71 #define IWN_INT_MASK 0x00c
72 #define IWN_FH_INT 0x010
73 #define IWN_GPIO_IN 0x018 /* read external chip pins */
74 #define IWN_RESET 0x020
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8998.dtsi16 qcom,msm-id = <292 0x0>;
26 reg = <0x0 0x80000000 0x0 0x0>;
35 reg = <0x0 0x85800000 0x0 0x600000>;
40 reg = <0x0 0x85e00000 0x0 0x100000>;
45 reg = <0x0 0x86000000 0x0 0x200000>;
50 reg = <0x0 0x86200000 0x0 0x2d00000>;
56 reg = <0x0 0x88f00000 0x0 0x200000>;
64 reg = <0x0 0x8ab00000 0x0 0x700000>;
69 reg = <0x0 0x8b200000 0x0 0x1a00000>;
74 reg = <0x0 0x8cc00000 0x0 0x7000000>;
[all …]
/freebsd/share/misc/
H A Dpci_vendors89 # probably misprogrammed Intel Atom C2338 on Dell 0K8Y0N board
95 0b60 NVMe DC SSD [Sentinel Rock Plus controller]
112 0b70 NVMe DC SSD [Yorktown controller]
137 000a TTP-Monitoring Card V2.0
199 0a89 BREA Technologies Inc
200 0b0b Rhino Equipment Corp.
214 0a06 RCB672FXX 672-channel modular analog telephony card
215 0bae Bachmann electronic GmbH
216 0ccd Preferred Networks, Inc.
219 0ccd 0000 MN-Core 2 16GB
[all …]

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