/linux/Documentation/devicetree/bindings/thermal/ |
H A D | qoriq-thermal.yaml | 20 Register (IPBRR0) at offset 0x0BF8. 24 0x01900102 T1040 82 reg = <0xf0000 0x1000>; 83 interrupts = <18 2 0 0>; 84 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>; 85 fsl,tmu-calibration = <0x00000000 0x00000025>, 86 <0x00000001 0x00000028>, 87 <0x00000002 0x0000002d>, 88 <0x00000003 0x00000031>, 89 <0x00000004 0x00000036>, [all …]
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/linux/arch/s390/include/asm/ |
H A D | diag.h | 52 * Diagnose 0c: Pseudo Timer 68 "0: diag %0,%1,0x10\n" in diag10_range() 70 EX_TABLE(0b, 1b) in diag10_range() 109 #define DIAG204_LPAR_PHYS_FLG 0x80 121 #define DIAG204_SUBCODE_MASK 0xffff 122 #define DIAG204_BIF_BIT 0x80000000 127 DIAG204_INFO_SIMPLE = 0, 128 DIAG204_INFO_EXT = 0x00010000 132 DIAG204_CPU_ONLINE = 0x20, 133 DIAG204_CPU_CAPPED = 0x40, [all …]
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/linux/drivers/gpu/drm/amd/amdkfd/ |
H A D | cwsr_trap_handler.h | 24 0xbf820001, 0xbf820121, 25 0xb8f4f802, 0x89748674, 26 0xb8f5f803, 0x8675ff75, 27 0x00000400, 0xbf850017, 28 0xc00a1e37, 0x00000000, 29 0xbf8c007f, 0x87777978, 30 0xbf840005, 0x8f728374, 31 0xb972e0c2, 0xbf800002, 32 0xb9740002, 0xbe801d78, 33 0xb8f5f803, 0x8675ff75, [all …]
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/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30-lg-p880.dts | 17 pinctrl-0 = <&state_default>; 120 emc-timings-0 { 122 nvidia,ram-code = <0>; 127 nvidia,emem-configuration = < 0x00050001 0xc0000010 128 0x00000001 0x00000001 0x00000002 0x00000000 129 0x00000003 0x00000001 0x00000002 0x00000004 130 0x00000001 0x00000000 0x00000002 0x00000002 131 0x02020001 0x00060402 0x77230303 0x001f0000 >; 137 nvidia,emem-configuration = < 0x00020001 0xc0000010 138 0x00000001 0x00000001 0x00000002 0x00000000 [all …]
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H A D | tegra30-lg-p895.dts | 12 pinctrl-0 = <&state_default>; 123 nvidia,emem-configuration = < 0x00020001 0xc0000010 124 0x00000001 0x00000001 0x00000002 0x00000000 125 0x00000003 0x00000001 0x00000002 0x00000004 126 0x00000001 0x00000000 0x00000002 0x00000002 127 0x02020001 0x00060402 0x77230303 0x001f0000 >; 133 nvidia,emem-configuration = < 0x00030003 0xc0000010 134 0x00000001 0x00000001 0x00000002 0x00000000 135 0x00000003 0x00000001 0x00000002 0x00000004 136 0x00000001 0x00000000 0x00000002 0x00000002 [all …]
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H A D | tegra30-pegatron-chagall.dts | 49 reg = <0x80000000 0x40000000>; 59 alloc-ranges = <0x80000000 0x30000000>; 60 size = <0x10000000>; /* 256MiB */ 67 reg = <0xbeb00000 0x10000>; /* 64kB */ 68 console-size = <0x8000>; /* 32kB */ 69 record-size = <0x400>; /* 1kB */ 74 reg = <0xbfe00000 0x200000>; /* 2MB */ 100 pinctrl-0 = <&state_default>; 144 nvidia,lock = <0>; 145 nvidia,io-reset = <0>; [all …]
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/linux/arch/powerpc/boot/dts/fsl/ |
H A D | t1023si-post.dtsi | 39 alloc-ranges = <0 0 0x10000 0>; 44 alloc-ranges = <0 0 0x10000 0>; 49 alloc-ranges = <0 0 0x10000 0>; 56 interrupts = <25 2 0 0>; 64 bus-range = <0x0 0xff>; 65 interrupts = <20 2 0 0>; 67 pcie@0 { 68 reg = <0 0 0 0 0>; 73 interrupts = <20 2 0 0>; 74 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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H A D | t1040si-post.dtsi | 39 alloc-ranges = <0 0 0x10000 0>; 44 alloc-ranges = <0 0 0x10000 0>; 49 alloc-ranges = <0 0 0x10000 0>; 56 interrupts = <25 2 0 0>; 64 bus-range = <0x0 0xff>; 65 interrupts = <20 2 0 0>; 67 pcie@0 { 68 reg = <0 0 0 0 0>; 73 interrupts = <20 2 0 0>; 74 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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/linux/drivers/gpu/drm/sti/ |
H A D | sti_hqvdp_lut.h | 24 0x0000ffff, 0x00010000, 0x000100ff, 0x00000000, 25 0x00000000, 0x00050000, 0xfffc00ff, 0x00000000, 26 0x00000000, 0x00090000, 0xfff900fe, 0x00000000, 27 0x00000000, 0x0010ffff, 0xfff600fb, 0x00000000, 28 0x00000000, 0x0017fffe, 0xfff400f7, 0x00000000, 29 0x00000000, 0x001ffffd, 0xfff200f2, 0x00000000, 30 0x00000000, 0x0027fffc, 0xfff100ec, 0x00000000, 31 0x00000000, 0x0030fffb, 0xfff000e5, 0x00000000, 32 0x00000000, 0x003afffa, 0xffee00de, 0x00000000, 33 0x00000000, 0x0044fff9, 0xffed00d6, 0x00000000, [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-ls1012a.dtsi | 32 #size-cells = <0>; 34 cpu0: cpu@0 { 37 reg = <0x0>; 38 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 54 arm,psci-suspend-param = <0x0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */ 93 <0x0 0x1402000 0 0x2000>, /* GICC */ 94 <0x0 0x1404000 0 0x2000>, /* GICH */ [all …]
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H A D | fsl-ls1088a.dtsi | 27 #size-cells = <0>; 30 cpu0: cpu@0 { 33 reg = <0x0>; 34 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 42 reg = <0x1>; 43 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 51 reg = <0x2>; 52 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 60 reg = <0x3>; 61 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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H A D | fsl-ls1043a.dtsi | 37 #size-cells = <0>; 45 cpu0: cpu@0 { 48 reg = <0x0>; 49 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 58 reg = <0x1>; 59 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 68 reg = <0x2>; 69 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 78 reg = <0x3>; 79 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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H A D | fsl-ls1046a.dtsi | 38 #size-cells = <0>; 40 cpu0: cpu@0 { 43 reg = <0x0>; 44 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 53 reg = <0x1>; 54 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 63 reg = <0x2>; 64 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 73 reg = <0x3>; 74 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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H A D | fsl-ls208xa.dtsi | 33 #size-cells = <0>; 38 reg = <0x00000000 0x80000000 0 0x80000000>; 44 #clock-cells = <0>; 51 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */ 52 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */ 53 <0x0 0x0c0c0000 0 0x2000>, /* GICC */ 54 <0x0 0x0c0d0000 0 0x1000>, /* GICH */ 55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */ 67 reg = <0x0 0x6020000 0 0x20000>; 73 reg = <0x0 0x1e60000 0x0 0x4>; [all …]
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H A D | fsl-ls1028a.dtsi | 23 #size-cells = <0>; 25 cpu0: cpu@0 { 28 reg = <0x0>; 30 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 31 i-cache-size = <0xc000>; 34 d-cache-size = <0x8000>; 45 reg = <0x1>; 47 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 48 i-cache-size = <0xc000>; 51 d-cache-size = <0x8000>; [all …]
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/linux/drivers/net/wireless/ath/ath5k/ |
H A D | rfbuffer.h | 108 AR5K_RF_TURBO = 0, 165 #define AR5K_RF5111_RF_TURBO { 1, 3, 0 } 168 #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 } 169 #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 } 171 #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 } 172 #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 } 174 #define AR5K_RF5111_PWD_XPD { 1, 95, 0 } 175 #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 } 181 #define AR5K_RF5111_GAIN_I { 6, 29, 0 } 182 #define AR5K_RF5111_PLO_SEL { 1, 4, 0 } [all …]
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/linux/arch/arm/boot/dts/nxp/ls/ |
H A D | ls1021a.dtsi | 31 #size-cells = <0>; 36 reg = <0xf00>; 37 clocks = <&clockgen 1 0>; 44 reg = <0xf01>; 45 clocks = <&clockgen 1 0>; 50 memory@0 { 52 reg = <0x0 0x0 0x0 0x0>; 57 #clock-cells = <0>; 80 offset = <0xb0>; 81 mask = <0x02>; [all …]
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