1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Fuel gauge driver for Maxim 17042 / 8966 / 8997
4 // Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
5 //
6 // Copyright (C) 2011 Samsung Electronics
7 // MyungJoo Ham <myungjoo.ham@samsung.com>
8 //
9 // This driver is based on max17040_battery.c
10
11 #include <linux/acpi.h>
12 #include <linux/devm-helpers.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/i2c.h>
17 #include <linux/delay.h>
18 #include <linux/interrupt.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm.h>
21 #include <linux/power_supply.h>
22 #include <linux/power/max17042_battery.h>
23 #include <linux/of.h>
24 #include <linux/regmap.h>
25
26 /* Status register bits */
27 #define STATUS_POR_BIT (1 << 1)
28 #define STATUS_BST_BIT (1 << 3)
29 #define STATUS_DSOCI_BIT (1 << 7)
30 #define STATUS_VMN_BIT (1 << 8)
31 #define STATUS_TMN_BIT (1 << 9)
32 #define STATUS_SMN_BIT (1 << 10)
33 #define STATUS_BI_BIT (1 << 11)
34 #define STATUS_VMX_BIT (1 << 12)
35 #define STATUS_TMX_BIT (1 << 13)
36 #define STATUS_SMX_BIT (1 << 14)
37 #define STATUS_BR_BIT (1 << 15)
38
39 /* Interrupt mask bits */
40 #define CFG_ALRT_BIT_ENBL (1 << 2)
41 #define CFG2_DSOCI_BIT_ENBL (1 << 7)
42
43 #define VFSOC0_LOCK 0x0000
44 #define VFSOC0_UNLOCK 0x0080
45 #define MODEL_UNLOCK1 0X0059
46 #define MODEL_UNLOCK2 0X00C4
47 #define MODEL_LOCK1 0X0000
48 #define MODEL_LOCK2 0X0000
49
50 #define dQ_ACC_DIV 0x4
51 #define dP_ACC_100 0x1900
52 #define dP_ACC_200 0x3200
53
54 #define MAX17042_VMAX_TOLERANCE 50 /* 50 mV */
55
56 #define MAX17042_CRITICAL_SOC 0x03
57
58 #define MAX17042_CURRENT_LSB 1562500ll /* 1.5625µV/Rsense */
59 #define MAX17042_CAPACITY_LSB 5000000ll /* 5.0µVH/Rsense */
60 #define MAX17042_TIME_LSB 5625 / 1000 /* s */
61 #define MAX17042_VOLTAGE_LSB 625 / 8 /* µV */
62 #define MAX17042_RESISTANCE_LSB 1 / 4096 /* Ω */
63 #define MAX17042_TEMPERATURE_LSB 1 / 256 /* °C */
64
65 #define MAX17055_DQACC_DIV 32
66 #define MAX17055_DPACC_FACTOR 44138
67 #define MAX17055_DPACC_VCHG_FACTOR 51200
68 #define MAX17055_FSTAT_DNR_BIT BIT(0)
69 #define MAX17055_VCHG_THRESHOLD_UV 4275000
70 #define MAX17055_DNR_POLL_US 10000
71 #define MAX17055_DNR_TIMEOUT_US 2000000
72 #define MAX17055_INIT_RETRY_DELAY_MS 10000
73 #define MAX17055_REFRESH_POLL_US 10000
74 #define MAX17055_REFRESH_TIMEOUT_US 1000000
75
76 struct max17042_chip {
77 struct device *dev;
78 struct regmap *regmap;
79 struct power_supply *battery;
80 enum max170xx_chip_type chip_type;
81 struct max17042_config_data *config_data;
82 struct delayed_work work;
83 int irq;
84 int task_period;
85 bool enable_current_sense;
86 bool enable_por_init;
87 bool enable_vchg_override;
88 bool init_complete;
89 bool hib_restore_pending;
90 u16 hib_cfg;
91 unsigned int r_sns;
92 int vmin; /* in millivolts */
93 int vmax; /* in millivolts */
94 int temp_min; /* in tenths of degree Celsius */
95 int temp_max; /* in tenths of degree Celsius */
96 };
97
98 static enum power_supply_property max17042_battery_props[] = {
99 POWER_SUPPLY_PROP_STATUS,
100 POWER_SUPPLY_PROP_PRESENT,
101 POWER_SUPPLY_PROP_TECHNOLOGY,
102 POWER_SUPPLY_PROP_CYCLE_COUNT,
103 POWER_SUPPLY_PROP_VOLTAGE_MAX,
104 POWER_SUPPLY_PROP_VOLTAGE_MIN,
105 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
106 POWER_SUPPLY_PROP_VOLTAGE_NOW,
107 POWER_SUPPLY_PROP_VOLTAGE_AVG,
108 POWER_SUPPLY_PROP_VOLTAGE_OCV,
109 POWER_SUPPLY_PROP_CAPACITY,
110 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
111 POWER_SUPPLY_PROP_CHARGE_FULL,
112 POWER_SUPPLY_PROP_CHARGE_NOW,
113 POWER_SUPPLY_PROP_CHARGE_COUNTER,
114 POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT,
115 POWER_SUPPLY_PROP_TEMP,
116 POWER_SUPPLY_PROP_TEMP_ALERT_MIN,
117 POWER_SUPPLY_PROP_TEMP_ALERT_MAX,
118 POWER_SUPPLY_PROP_TEMP_MIN,
119 POWER_SUPPLY_PROP_TEMP_MAX,
120 POWER_SUPPLY_PROP_HEALTH,
121 POWER_SUPPLY_PROP_SCOPE,
122 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
123 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
124 // these two have to be at the end on the list
125 POWER_SUPPLY_PROP_CURRENT_NOW,
126 POWER_SUPPLY_PROP_CURRENT_AVG,
127 };
128
max17042_get_temperature(struct max17042_chip * chip,int * temp)129 static int max17042_get_temperature(struct max17042_chip *chip, int *temp)
130 {
131 int ret;
132 u32 data;
133 struct regmap *map = chip->regmap;
134
135 ret = regmap_read(map, MAX17042_TEMP, &data);
136 if (ret < 0)
137 return ret;
138
139 *temp = sign_extend32(data, 15);
140 /* The value is converted into deci-centigrade scale */
141 *temp = *temp * 10 * MAX17042_TEMPERATURE_LSB;
142 return 0;
143 }
144
max17042_get_status(struct max17042_chip * chip,int * status)145 static int max17042_get_status(struct max17042_chip *chip, int *status)
146 {
147 int ret, charge_full, charge_now;
148 int current_now;
149 u32 data;
150
151 ret = power_supply_am_i_supplied(chip->battery);
152 if (ret < 0) {
153 *status = POWER_SUPPLY_STATUS_UNKNOWN;
154 return 0;
155 }
156 if (ret == 0) {
157 *status = POWER_SUPPLY_STATUS_DISCHARGING;
158 return 0;
159 }
160
161 /*
162 * The MAX170xx has builtin end-of-charge detection and will update
163 * FullCAP to match RepCap when it detects end of charging.
164 *
165 * When this cycle the battery gets charged to a higher (calculated)
166 * capacity than the previous cycle then FullCAP will get updated
167 * continuously once end-of-charge detection kicks in, so allow the
168 * 2 to differ a bit.
169 */
170
171 ret = regmap_read(chip->regmap, MAX17042_FullCAP, &charge_full);
172 if (ret < 0)
173 return ret;
174
175 ret = regmap_read(chip->regmap, MAX17042_RepCap, &charge_now);
176 if (ret < 0)
177 return ret;
178
179 if ((charge_full - charge_now) <= MAX17042_FULL_THRESHOLD) {
180 *status = POWER_SUPPLY_STATUS_FULL;
181 return 0;
182 }
183
184 /*
185 * Even though we are supplied, we may still be discharging if the
186 * supply is e.g. only delivering 5V 0.5A. Check current if available.
187 */
188 if (!chip->enable_current_sense) {
189 *status = POWER_SUPPLY_STATUS_CHARGING;
190 return 0;
191 }
192
193 ret = regmap_read(chip->regmap, MAX17042_Current, &data);
194 if (ret < 0)
195 return ret;
196
197 current_now = sign_extend32(data, 15);
198
199 if (current_now > 0)
200 *status = POWER_SUPPLY_STATUS_CHARGING;
201 else
202 *status = POWER_SUPPLY_STATUS_DISCHARGING;
203
204 return 0;
205 }
206
max17042_get_battery_health(struct max17042_chip * chip,int * health)207 static int max17042_get_battery_health(struct max17042_chip *chip, int *health)
208 {
209 int temp, vavg, vbatt, ret;
210 u32 val;
211
212 ret = regmap_read(chip->regmap, MAX17042_AvgVCELL, &val);
213 if (ret < 0)
214 goto health_error;
215
216 /* bits [0-3] unused */
217 vavg = val * MAX17042_VOLTAGE_LSB;
218 /* Convert to millivolts */
219 vavg /= 1000;
220
221 ret = regmap_read(chip->regmap, MAX17042_VCELL, &val);
222 if (ret < 0)
223 goto health_error;
224
225 /* bits [0-3] unused */
226 vbatt = val * MAX17042_VOLTAGE_LSB;
227 /* Convert to millivolts */
228 vbatt /= 1000;
229
230 if (vavg < chip->vmin) {
231 *health = POWER_SUPPLY_HEALTH_DEAD;
232 goto out;
233 }
234
235 if (vbatt > size_add(chip->vmax, MAX17042_VMAX_TOLERANCE)) {
236 *health = POWER_SUPPLY_HEALTH_OVERVOLTAGE;
237 goto out;
238 }
239
240 ret = max17042_get_temperature(chip, &temp);
241 if (ret < 0)
242 goto health_error;
243
244 if (temp < chip->temp_min) {
245 *health = POWER_SUPPLY_HEALTH_COLD;
246 goto out;
247 }
248
249 if (temp > chip->temp_max) {
250 *health = POWER_SUPPLY_HEALTH_OVERHEAT;
251 goto out;
252 }
253
254 *health = POWER_SUPPLY_HEALTH_GOOD;
255
256 out:
257 return 0;
258
259 health_error:
260 return ret;
261 }
262
max17042_get_property(struct power_supply * psy,enum power_supply_property psp,union power_supply_propval * val)263 static int max17042_get_property(struct power_supply *psy,
264 enum power_supply_property psp,
265 union power_supply_propval *val)
266 {
267 struct max17042_chip *chip = power_supply_get_drvdata(psy);
268 struct regmap *map = chip->regmap;
269 int ret;
270 u32 data;
271 u64 data64;
272
273 if (!READ_ONCE(chip->init_complete))
274 return -EAGAIN;
275
276 switch (psp) {
277 case POWER_SUPPLY_PROP_STATUS:
278 ret = max17042_get_status(chip, &val->intval);
279 if (ret < 0)
280 return ret;
281 break;
282 case POWER_SUPPLY_PROP_PRESENT:
283 ret = regmap_read(map, MAX17042_STATUS, &data);
284 if (ret < 0)
285 return ret;
286
287 if (data & MAX17042_STATUS_BattAbsent)
288 val->intval = 0;
289 else
290 val->intval = 1;
291 break;
292 case POWER_SUPPLY_PROP_TECHNOLOGY:
293 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
294 break;
295 case POWER_SUPPLY_PROP_CYCLE_COUNT:
296 ret = regmap_read(map, MAX17042_Cycles, &data);
297 if (ret < 0)
298 return ret;
299
300 val->intval = data;
301 break;
302 case POWER_SUPPLY_PROP_VOLTAGE_MAX:
303 ret = regmap_read(map, MAX17042_MinMaxVolt, &data);
304 if (ret < 0)
305 return ret;
306
307 val->intval = data >> 8;
308 val->intval *= 20000; /* Units of LSB = 20mV */
309 break;
310 case POWER_SUPPLY_PROP_VOLTAGE_MIN:
311 ret = regmap_read(map, MAX17042_MinMaxVolt, &data);
312 if (ret < 0)
313 return ret;
314
315 val->intval = (data & 0xff) * 20000; /* Units of 20mV */
316 break;
317 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
318 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042)
319 ret = regmap_read(map, MAX17042_V_empty, &data);
320 else
321 ret = regmap_read(map, MAX17047_V_empty, &data);
322 if (ret < 0)
323 return ret;
324
325 val->intval = data >> 7;
326 val->intval *= 10000; /* Units of LSB = 10mV */
327 break;
328 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
329 ret = regmap_read(map, MAX17042_VCELL, &data);
330 if (ret < 0)
331 return ret;
332
333 val->intval = data * MAX17042_VOLTAGE_LSB;
334 break;
335 case POWER_SUPPLY_PROP_VOLTAGE_AVG:
336 ret = regmap_read(map, MAX17042_AvgVCELL, &data);
337 if (ret < 0)
338 return ret;
339
340 val->intval = data * MAX17042_VOLTAGE_LSB;
341 break;
342 case POWER_SUPPLY_PROP_VOLTAGE_OCV:
343 ret = regmap_read(map, MAX17042_OCVInternal, &data);
344 if (ret < 0)
345 return ret;
346
347 val->intval = data * MAX17042_VOLTAGE_LSB;
348 break;
349 case POWER_SUPPLY_PROP_CAPACITY:
350 if (chip->enable_current_sense)
351 ret = regmap_read(map, MAX17042_RepSOC, &data);
352 else
353 ret = regmap_read(map, MAX17042_VFSOC, &data);
354 if (ret < 0)
355 return ret;
356
357 val->intval = data >> 8;
358 break;
359 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
360 ret = regmap_read(map, MAX17042_DesignCap, &data);
361 if (ret < 0)
362 return ret;
363
364 data64 = data * MAX17042_CAPACITY_LSB;
365 data64 *= chip->task_period;
366 do_div(data64, MAX17042_DEFAULT_TASK_PERIOD);
367 do_div(data64, chip->r_sns);
368 val->intval = data64;
369 break;
370 case POWER_SUPPLY_PROP_CHARGE_FULL:
371 ret = regmap_read(map, MAX17042_FullCAP, &data);
372 if (ret < 0)
373 return ret;
374
375 data64 = data * MAX17042_CAPACITY_LSB;
376 data64 *= chip->task_period;
377 do_div(data64, MAX17042_DEFAULT_TASK_PERIOD);
378 do_div(data64, chip->r_sns);
379 val->intval = data64;
380 break;
381 case POWER_SUPPLY_PROP_CHARGE_NOW:
382 ret = regmap_read(map, MAX17042_RepCap, &data);
383 if (ret < 0)
384 return ret;
385
386 data64 = data * MAX17042_CAPACITY_LSB;
387 data64 *= chip->task_period;
388 do_div(data64, MAX17042_DEFAULT_TASK_PERIOD);
389 do_div(data64, chip->r_sns);
390 val->intval = data64;
391 break;
392 case POWER_SUPPLY_PROP_CHARGE_COUNTER:
393 ret = regmap_read(map, MAX17042_QH, &data);
394 if (ret < 0)
395 return ret;
396
397 data64 = sign_extend64(data, 15) * MAX17042_CAPACITY_LSB;
398 data64 *= chip->task_period;
399 data64 = div_s64(data64, MAX17042_DEFAULT_TASK_PERIOD);
400 val->intval = div_s64(data64, chip->r_sns);
401 break;
402 case POWER_SUPPLY_PROP_TEMP:
403 ret = max17042_get_temperature(chip, &val->intval);
404 if (ret < 0)
405 return ret;
406 break;
407 case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
408 ret = regmap_read(map, MAX17042_TALRT_Th, &data);
409 if (ret < 0)
410 return ret;
411 /* LSB is Alert Minimum. In deci-centigrade */
412 val->intval = sign_extend32(data & 0xff, 7) * 10;
413 break;
414 case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
415 ret = regmap_read(map, MAX17042_TALRT_Th, &data);
416 if (ret < 0)
417 return ret;
418 /* MSB is Alert Maximum. In deci-centigrade */
419 val->intval = sign_extend32(data >> 8, 7) * 10;
420 break;
421 case POWER_SUPPLY_PROP_TEMP_MIN:
422 val->intval = chip->temp_min;
423 break;
424 case POWER_SUPPLY_PROP_TEMP_MAX:
425 val->intval = chip->temp_max;
426 break;
427 case POWER_SUPPLY_PROP_HEALTH:
428 ret = max17042_get_battery_health(chip, &val->intval);
429 if (ret < 0)
430 return ret;
431 break;
432 case POWER_SUPPLY_PROP_SCOPE:
433 val->intval = POWER_SUPPLY_SCOPE_SYSTEM;
434 break;
435 case POWER_SUPPLY_PROP_CURRENT_NOW:
436 if (chip->enable_current_sense) {
437 ret = regmap_read(map, MAX17042_Current, &data);
438 if (ret < 0)
439 return ret;
440
441 data64 = sign_extend64(data, 15) * MAX17042_CURRENT_LSB;
442 val->intval = div_s64(data64, chip->r_sns);
443 } else {
444 return -EINVAL;
445 }
446 break;
447 case POWER_SUPPLY_PROP_CURRENT_AVG:
448 if (chip->enable_current_sense) {
449 ret = regmap_read(map, MAX17042_AvgCurrent, &data);
450 if (ret < 0)
451 return ret;
452
453 data64 = sign_extend64(data, 15) * MAX17042_CURRENT_LSB;
454 val->intval = div_s64(data64, chip->r_sns);
455 } else {
456 return -EINVAL;
457 }
458 break;
459 case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
460 ret = regmap_read(map, MAX17042_ICHGTerm, &data);
461 if (ret < 0)
462 return ret;
463
464 data64 = data * MAX17042_CURRENT_LSB;
465 val->intval = div_s64(data64, chip->r_sns);
466 break;
467 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
468 ret = regmap_read(map, MAX17042_TTE, &data);
469 if (ret < 0)
470 return ret;
471
472 /* when charging, the value is not meaningful */
473 if (data == U16_MAX)
474 return -ENODATA;
475
476 val->intval = data * MAX17042_TIME_LSB;
477 break;
478 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
479 if (chip->chip_type != MAXIM_DEVICE_TYPE_MAX17055 &&
480 chip->chip_type != MAXIM_DEVICE_TYPE_MAX77759)
481 return -EINVAL;
482
483 ret = regmap_read(map, MAX17055_TTF, &data);
484 if (ret < 0)
485 return ret;
486
487 /* when discharging, the value is not meaningful */
488 if (data == U16_MAX)
489 return -ENODATA;
490
491 val->intval = data * MAX17042_TIME_LSB;
492 break;
493 default:
494 return -EINVAL;
495 }
496 return 0;
497 }
498
max17042_set_property(struct power_supply * psy,enum power_supply_property psp,const union power_supply_propval * val)499 static int max17042_set_property(struct power_supply *psy,
500 enum power_supply_property psp,
501 const union power_supply_propval *val)
502 {
503 struct max17042_chip *chip = power_supply_get_drvdata(psy);
504 struct regmap *map = chip->regmap;
505 int ret = 0;
506 u32 data;
507 int8_t temp;
508
509 switch (psp) {
510 case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
511 ret = regmap_read(map, MAX17042_TALRT_Th, &data);
512 if (ret < 0)
513 return ret;
514
515 /* Input in deci-centigrade, convert to centigrade */
516 temp = val->intval / 10;
517 /* force min < max */
518 if (temp >= (int8_t)(data >> 8))
519 temp = (int8_t)(data >> 8) - 1;
520 /* Write both MAX and MIN ALERT */
521 data = (data & 0xff00) + temp;
522 ret = regmap_write(map, MAX17042_TALRT_Th, data);
523 break;
524 case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
525 ret = regmap_read(map, MAX17042_TALRT_Th, &data);
526 if (ret < 0)
527 return ret;
528
529 /* Input in Deci-Centigrade, convert to centigrade */
530 temp = val->intval / 10;
531 /* force max > min */
532 if (temp <= (int8_t)(data & 0xff))
533 temp = (int8_t)(data & 0xff) + 1;
534 /* Write both MAX and MIN ALERT */
535 data = (data & 0xff) + (temp << 8);
536 ret = regmap_write(map, MAX17042_TALRT_Th, data);
537 break;
538 default:
539 ret = -EINVAL;
540 }
541
542 return ret;
543 }
544
max17042_property_is_writeable(struct power_supply * psy,enum power_supply_property psp)545 static int max17042_property_is_writeable(struct power_supply *psy,
546 enum power_supply_property psp)
547 {
548 int ret;
549
550 switch (psp) {
551 case POWER_SUPPLY_PROP_TEMP_ALERT_MIN:
552 case POWER_SUPPLY_PROP_TEMP_ALERT_MAX:
553 ret = 1;
554 break;
555 default:
556 ret = 0;
557 }
558
559 return ret;
560 }
561
max17042_write_verify_reg(struct regmap * map,u8 reg,u32 value)562 static int max17042_write_verify_reg(struct regmap *map, u8 reg, u32 value)
563 {
564 int retries = 8;
565 int ret;
566 u32 read_value;
567
568 do {
569 ret = regmap_write(map, reg, value);
570 regmap_read(map, reg, &read_value);
571 if (read_value != value) {
572 ret = -EIO;
573 retries--;
574 }
575 } while (retries && read_value != value);
576
577 if (ret < 0)
578 pr_err("%s: err %d\n", __func__, ret);
579
580 return ret;
581 }
582
max17055_write_verify_reg(struct regmap * map,u8 reg,u32 value)583 static int max17055_write_verify_reg(struct regmap *map, u8 reg, u32 value)
584 {
585 u32 read_value;
586 int ret;
587
588 ret = regmap_write(map, reg, value);
589 if (ret)
590 return ret;
591
592 usleep_range(1000, 2000);
593
594 ret = regmap_read(map, reg, &read_value);
595 if (ret)
596 return ret;
597
598 return read_value == value ? 0 : -EIO;
599 }
600
max17042_override_por(struct regmap * map,u8 reg,u16 value)601 static inline void max17042_override_por(struct regmap *map,
602 u8 reg, u16 value)
603 {
604 if (value)
605 regmap_write(map, reg, value);
606 }
607
max17042_unlock_model(struct max17042_chip * chip)608 static inline void max17042_unlock_model(struct max17042_chip *chip)
609 {
610 struct regmap *map = chip->regmap;
611
612 regmap_write(map, MAX17042_MLOCKReg1, MODEL_UNLOCK1);
613 regmap_write(map, MAX17042_MLOCKReg2, MODEL_UNLOCK2);
614 }
615
max17042_lock_model(struct max17042_chip * chip)616 static inline void max17042_lock_model(struct max17042_chip *chip)
617 {
618 struct regmap *map = chip->regmap;
619
620 regmap_write(map, MAX17042_MLOCKReg1, MODEL_LOCK1);
621 regmap_write(map, MAX17042_MLOCKReg2, MODEL_LOCK2);
622 }
623
max17042_write_model_data(struct max17042_chip * chip,u8 addr,int size)624 static inline void max17042_write_model_data(struct max17042_chip *chip,
625 u8 addr, int size)
626 {
627 struct regmap *map = chip->regmap;
628 int i;
629
630 for (i = 0; i < size; i++)
631 regmap_write(map, addr + i,
632 chip->config_data->cell_char_tbl[i]);
633 }
634
max17042_read_model_data(struct max17042_chip * chip,u8 addr,u16 * data,int size)635 static inline void max17042_read_model_data(struct max17042_chip *chip,
636 u8 addr, u16 *data, int size)
637 {
638 struct regmap *map = chip->regmap;
639 int i;
640 u32 tmp;
641
642 for (i = 0; i < size; i++) {
643 regmap_read(map, addr + i, &tmp);
644 data[i] = (u16)tmp;
645 }
646 }
647
max17042_model_data_compare(struct max17042_chip * chip,u16 * data1,u16 * data2,int size)648 static inline int max17042_model_data_compare(struct max17042_chip *chip,
649 u16 *data1, u16 *data2, int size)
650 {
651 int i;
652
653 if (memcmp(data1, data2, size)) {
654 dev_err(chip->dev, "%s compare failed\n", __func__);
655 for (i = 0; i < size; i++)
656 dev_info(chip->dev, "0x%x, 0x%x",
657 data1[i], data2[i]);
658 dev_info(chip->dev, "\n");
659 return -EINVAL;
660 }
661 return 0;
662 }
663
max17042_init_model(struct max17042_chip * chip)664 static int max17042_init_model(struct max17042_chip *chip)
665 {
666 int ret;
667 int table_size = ARRAY_SIZE(chip->config_data->cell_char_tbl);
668 u16 *temp_data;
669
670 temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
671 if (!temp_data)
672 return -ENOMEM;
673
674 max17042_unlock_model(chip);
675 max17042_write_model_data(chip, MAX17042_MODELChrTbl,
676 table_size);
677 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
678 table_size);
679
680 ret = max17042_model_data_compare(
681 chip,
682 chip->config_data->cell_char_tbl,
683 temp_data,
684 table_size);
685
686 max17042_lock_model(chip);
687 kfree(temp_data);
688
689 return ret;
690 }
691
max17042_verify_model_lock(struct max17042_chip * chip)692 static int max17042_verify_model_lock(struct max17042_chip *chip)
693 {
694 int i;
695 int table_size = ARRAY_SIZE(chip->config_data->cell_char_tbl);
696 u16 *temp_data;
697 int ret = 0;
698
699 temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
700 if (!temp_data)
701 return -ENOMEM;
702
703 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
704 table_size);
705 for (i = 0; i < table_size; i++)
706 if (temp_data[i])
707 ret = -EINVAL;
708
709 kfree(temp_data);
710 return ret;
711 }
712
max17042_write_config_regs(struct max17042_chip * chip)713 static void max17042_write_config_regs(struct max17042_chip *chip)
714 {
715 struct max17042_config_data *config = chip->config_data;
716 struct regmap *map = chip->regmap;
717
718 regmap_write(map, MAX17042_CONFIG, config->config);
719 regmap_write(map, MAX17042_LearnCFG, config->learn_cfg);
720 regmap_write(map, MAX17042_FilterCFG,
721 config->filter_cfg);
722 regmap_write(map, MAX17042_RelaxCFG, config->relax_cfg);
723 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047 ||
724 chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050 ||
725 chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055 ||
726 chip->chip_type == MAXIM_DEVICE_TYPE_MAX77759)
727 regmap_write(map, MAX17047_FullSOCThr,
728 config->full_soc_thresh);
729 }
730
max17042_write_custom_regs(struct max17042_chip * chip)731 static void max17042_write_custom_regs(struct max17042_chip *chip)
732 {
733 struct max17042_config_data *config = chip->config_data;
734 struct regmap *map = chip->regmap;
735
736 max17042_write_verify_reg(map, MAX17042_RCOMP0, config->rcomp0);
737 max17042_write_verify_reg(map, MAX17042_TempCo, config->tcompc0);
738 max17042_write_verify_reg(map, MAX17042_ICHGTerm, config->ichgt_term);
739 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) {
740 regmap_write(map, MAX17042_EmptyTempCo, config->empty_tempco);
741 max17042_write_verify_reg(map, MAX17042_K_empty0,
742 config->kempty0);
743 } else {
744 max17042_write_verify_reg(map, MAX17047_QRTbl00,
745 config->qrtbl00);
746 max17042_write_verify_reg(map, MAX17047_QRTbl10,
747 config->qrtbl10);
748 max17042_write_verify_reg(map, MAX17047_QRTbl20,
749 config->qrtbl20);
750 max17042_write_verify_reg(map, MAX17047_QRTbl30,
751 config->qrtbl30);
752 }
753 }
754
max17042_update_capacity_regs(struct max17042_chip * chip)755 static void max17042_update_capacity_regs(struct max17042_chip *chip)
756 {
757 struct max17042_config_data *config = chip->config_data;
758 struct regmap *map = chip->regmap;
759
760 max17042_write_verify_reg(map, MAX17042_FullCAP,
761 config->fullcap);
762 regmap_write(map, MAX17042_DesignCap, config->design_cap);
763 max17042_write_verify_reg(map, MAX17042_FullCAPNom,
764 config->fullcapnom);
765 }
766
max17042_reset_vfsoc0_reg(struct max17042_chip * chip)767 static void max17042_reset_vfsoc0_reg(struct max17042_chip *chip)
768 {
769 unsigned int vfSoc;
770 struct regmap *map = chip->regmap;
771
772 regmap_read(map, MAX17042_VFSOC, &vfSoc);
773 regmap_write(map, MAX17042_VFSOC0Enable, VFSOC0_UNLOCK);
774 max17042_write_verify_reg(map, MAX17042_VFSOC0, vfSoc);
775 regmap_write(map, MAX17042_VFSOC0Enable, VFSOC0_LOCK);
776 }
777
max17042_load_new_capacity_params(struct max17042_chip * chip)778 static void max17042_load_new_capacity_params(struct max17042_chip *chip)
779 {
780 u32 full_cap0, rep_cap, dq_acc, vfSoc;
781 u32 rem_cap;
782
783 struct max17042_config_data *config = chip->config_data;
784 struct regmap *map = chip->regmap;
785
786 regmap_read(map, MAX17042_FullCAP0, &full_cap0);
787 regmap_read(map, MAX17042_VFSOC, &vfSoc);
788
789 /* fg_vfSoc needs to shifted by 8 bits to get the
790 * perc in 1% accuracy, to get the right rem_cap multiply
791 * full_cap0, fg_vfSoc and devide by 100
792 */
793 rem_cap = ((vfSoc >> 8) * full_cap0) / 100;
794 max17042_write_verify_reg(map, MAX17042_RemCap, rem_cap);
795
796 rep_cap = rem_cap;
797 max17042_write_verify_reg(map, MAX17042_RepCap, rep_cap);
798
799 /* Write dQ_acc to 200% of Capacity and dP_acc to 200% */
800 dq_acc = config->fullcap / dQ_ACC_DIV;
801 max17042_write_verify_reg(map, MAX17042_dQacc, dq_acc);
802 max17042_write_verify_reg(map, MAX17042_dPacc, dP_ACC_200);
803
804 max17042_write_verify_reg(map, MAX17042_FullCAP,
805 config->fullcap);
806 regmap_write(map, MAX17042_DesignCap,
807 config->design_cap);
808 max17042_write_verify_reg(map, MAX17042_FullCAPNom,
809 config->fullcapnom);
810 /* Update SOC register with new SOC */
811 regmap_write(map, MAX17042_RepSOC, vfSoc);
812 }
813
814 /*
815 * Block write all the override values coming from config_data.
816 * This function MUST be called before the POR initialization procedure
817 * specified by maxim.
818 */
max17042_override_por_values(struct max17042_chip * chip)819 static inline void max17042_override_por_values(struct max17042_chip *chip)
820 {
821 struct regmap *map = chip->regmap;
822 struct max17042_config_data *config = chip->config_data;
823
824 max17042_override_por(map, MAX17042_TGAIN, config->tgain);
825 max17042_override_por(map, MAX17042_TOFF, config->toff);
826 max17042_override_por(map, MAX17042_CGAIN, config->cgain);
827 max17042_override_por(map, MAX17042_COFF, config->coff);
828
829 max17042_override_por(map, MAX17042_VALRT_Th, config->valrt_thresh);
830 max17042_override_por(map, MAX17042_TALRT_Th, config->talrt_thresh);
831 max17042_override_por(map, MAX17042_SALRT_Th,
832 config->soc_alrt_thresh);
833 max17042_override_por(map, MAX17042_CONFIG, config->config);
834 max17042_override_por(map, MAX17042_SHDNTIMER, config->shdntimer);
835
836 if (chip->chip_type != MAXIM_DEVICE_TYPE_MAX17055) {
837 max17042_override_por(map, MAX17042_DesignCap,
838 config->design_cap);
839 max17042_override_por(map, MAX17042_ICHGTerm,
840 config->ichgt_term);
841 }
842
843 max17042_override_por(map, MAX17042_AtRate, config->at_rate);
844 max17042_override_por(map, MAX17042_LearnCFG, config->learn_cfg);
845 max17042_override_por(map, MAX17042_FilterCFG, config->filter_cfg);
846 max17042_override_por(map, MAX17042_RelaxCFG, config->relax_cfg);
847 max17042_override_por(map, MAX17042_MiscCFG, config->misc_cfg);
848
849 max17042_override_por(map, MAX17042_FullCAP, config->fullcap);
850 max17042_override_por(map, MAX17042_FullCAPNom, config->fullcapnom);
851 if (chip->chip_type != MAXIM_DEVICE_TYPE_MAX17055) {
852 max17042_override_por(map, MAX17042_dQacc, config->dqacc);
853 max17042_override_por(map, MAX17042_dPacc, config->dpacc);
854 }
855
856 max17042_override_por(map, MAX17042_RCOMP0, config->rcomp0);
857 max17042_override_por(map, MAX17042_TempCo, config->tcompc0);
858
859 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) {
860 max17042_override_por(map, MAX17042_MaskSOC, config->masksoc);
861 max17042_override_por(map, MAX17042_SOC_empty, config->socempty);
862 max17042_override_por(map, MAX17042_V_empty, config->vempty);
863 max17042_override_por(map, MAX17042_EmptyTempCo, config->empty_tempco);
864 max17042_override_por(map, MAX17042_K_empty0, config->kempty0);
865 }
866
867 if ((chip->chip_type == MAXIM_DEVICE_TYPE_MAX17042) ||
868 (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047) ||
869 (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050) ||
870 (chip->chip_type == MAXIM_DEVICE_TYPE_MAX77759)) {
871 max17042_override_por(map, MAX17042_IAvg_empty, config->iavg_empty);
872 max17042_override_por(map, MAX17042_TempNom, config->temp_nom);
873 max17042_override_por(map, MAX17042_TempLim, config->temp_lim);
874 max17042_override_por(map, MAX17042_FCTC, config->fctc);
875 }
876
877 if ((chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047) ||
878 (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050) ||
879 (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055) ||
880 (chip->chip_type == MAXIM_DEVICE_TYPE_MAX77759)) {
881 max17042_override_por(map, MAX17047_V_empty, config->vempty);
882 }
883
884 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055 &&
885 !chip->enable_vchg_override)
886 max17042_override_por(map, MAX17055_ModelCfg, config->model_cfg);
887 }
888
max17055_override_battery_values(struct max17042_chip * chip)889 static int max17055_override_battery_values(struct max17042_chip *chip)
890 {
891 struct max17042_config_data *config = chip->config_data;
892 struct regmap *map = chip->regmap;
893 unsigned int design_cap;
894 unsigned int model_cfg;
895 unsigned int dqacc;
896 u64 dpacc;
897 int ret;
898
899 if (config->design_cap) {
900 ret = max17055_write_verify_reg(map, MAX17042_DesignCap,
901 config->design_cap);
902 if (ret)
903 return ret;
904 }
905
906 if (config->dqacc) {
907 ret = max17055_write_verify_reg(map, MAX17042_dQacc,
908 config->dqacc);
909 if (ret)
910 return ret;
911 }
912
913 if (config->ichgt_term) {
914 ret = max17055_write_verify_reg(map, MAX17042_ICHGTerm,
915 config->ichgt_term);
916 if (ret)
917 return ret;
918 }
919
920 if (chip->enable_vchg_override) {
921 ret = regmap_update_bits(map, MAX17055_ModelCfg,
922 MAX17055_MODELCFG_VCHG_BIT,
923 config->model_cfg &
924 MAX17055_MODELCFG_VCHG_BIT);
925 if (ret)
926 return ret;
927
928 usleep_range(1000, 2000);
929 }
930
931 if (!config->design_cap && !config->dqacc &&
932 !chip->enable_vchg_override)
933 return 0;
934
935 ret = regmap_read(map, MAX17042_DesignCap, &design_cap);
936 if (ret)
937 return ret;
938
939 ret = regmap_read(map, MAX17042_dQacc, &dqacc);
940 if (ret)
941 return ret;
942
943 ret = regmap_read(map, MAX17055_ModelCfg, &model_cfg);
944 if (ret)
945 return ret;
946 if (chip->enable_vchg_override &&
947 (model_cfg & MAX17055_MODELCFG_VCHG_BIT) !=
948 (config->model_cfg & MAX17055_MODELCFG_VCHG_BIT))
949 return -EIO;
950
951 if (!design_cap || !dqacc)
952 return -ERANGE;
953
954 dpacc = (u64)dqacc *
955 (model_cfg & MAX17055_MODELCFG_VCHG_BIT ?
956 MAX17055_DPACC_VCHG_FACTOR : MAX17055_DPACC_FACTOR);
957 do_div(dpacc, design_cap);
958 if (dpacc > U16_MAX)
959 return -ERANGE;
960
961 return max17055_write_verify_reg(map, MAX17042_dPacc, (u16)dpacc);
962 }
963
max17055_restore_hibernate(struct max17042_chip * chip)964 static int max17055_restore_hibernate(struct max17042_chip *chip)
965 {
966 int restore_hib_ret;
967 int soft_wakeup_ret;
968
969 soft_wakeup_ret = regmap_write(chip->regmap, MAX17055_SoftWakeup, 0);
970 restore_hib_ret = max17055_write_verify_reg(chip->regmap,
971 MAX17055_HibCfg,
972 chip->hib_cfg);
973 if (!soft_wakeup_ret && !restore_hib_ret)
974 chip->hib_restore_pending = false;
975
976 return soft_wakeup_ret ?: restore_hib_ret;
977 }
978
max17055_init_chip(struct max17042_chip * chip)979 static int max17055_init_chip(struct max17042_chip *chip)
980 {
981 struct regmap *map = chip->regmap;
982 unsigned int hib_cfg;
983 unsigned int model_cfg;
984 unsigned int fstat;
985 int restore_ret;
986 int ret;
987
988 if (chip->hib_restore_pending) {
989 ret = max17055_restore_hibernate(chip);
990 if (ret)
991 return ret;
992 }
993
994 ret = regmap_read_poll_timeout(map, MAX17042_FSTAT, fstat,
995 !(fstat & MAX17055_FSTAT_DNR_BIT),
996 MAX17055_DNR_POLL_US,
997 MAX17055_DNR_TIMEOUT_US);
998 if (ret)
999 return ret;
1000
1001 ret = regmap_read(map, MAX17055_HibCfg, &hib_cfg);
1002 if (ret)
1003 return ret;
1004
1005 chip->hib_cfg = hib_cfg;
1006 chip->hib_restore_pending = true;
1007
1008 ret = regmap_write(map, MAX17055_SoftWakeup, 0x0090);
1009 if (ret)
1010 goto restore_hibernate;
1011
1012 ret = max17055_write_verify_reg(map, MAX17055_HibCfg, 0);
1013 if (ret)
1014 goto restore_hibernate;
1015
1016 ret = regmap_write(map, MAX17055_SoftWakeup, 0);
1017 if (ret)
1018 goto restore_hibernate;
1019
1020 max17042_override_por_values(chip);
1021
1022 ret = max17055_override_battery_values(chip);
1023 if (ret)
1024 goto restore_hibernate;
1025
1026 ret = regmap_write_bits(map, MAX17055_ModelCfg,
1027 MAX17055_MODELCFG_REFRESH_BIT,
1028 MAX17055_MODELCFG_REFRESH_BIT);
1029 if (ret)
1030 goto restore_hibernate;
1031
1032 ret = regmap_read_poll_timeout(map, MAX17055_ModelCfg, model_cfg,
1033 !(model_cfg &
1034 MAX17055_MODELCFG_REFRESH_BIT),
1035 MAX17055_REFRESH_POLL_US,
1036 MAX17055_REFRESH_TIMEOUT_US);
1037
1038 restore_hibernate:
1039 restore_ret = max17055_restore_hibernate(chip);
1040 if (restore_ret)
1041 return restore_ret;
1042
1043 return ret;
1044 }
1045
max17042_init_chip(struct max17042_chip * chip)1046 static int max17042_init_chip(struct max17042_chip *chip)
1047 {
1048 struct regmap *map = chip->regmap;
1049 int ret;
1050
1051 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055) {
1052 ret = max17055_init_chip(chip);
1053 if (ret)
1054 return ret;
1055 } else {
1056 max17042_override_por_values(chip);
1057
1058 /* Allow signal debouncing and initial SOC reporting. */
1059 msleep(500);
1060
1061 max17042_write_config_regs(chip);
1062
1063 /* write cell characterization data */
1064 ret = max17042_init_model(chip);
1065 if (ret) {
1066 dev_err(chip->dev, "%s init failed\n",
1067 __func__);
1068 return -EIO;
1069 }
1070
1071 ret = max17042_verify_model_lock(chip);
1072 if (ret) {
1073 dev_err(chip->dev, "%s lock verify failed\n",
1074 __func__);
1075 return -EIO;
1076 }
1077 /* write custom parameters */
1078 max17042_write_custom_regs(chip);
1079
1080 /* update capacity params */
1081 max17042_update_capacity_regs(chip);
1082
1083 /* delay must be atleast 350mS to allow VFSOC
1084 * to be calculated from the new configuration
1085 */
1086 msleep(350);
1087
1088 /* reset vfsoc0 reg */
1089 max17042_reset_vfsoc0_reg(chip);
1090
1091 /* load new capacity params */
1092 max17042_load_new_capacity_params(chip);
1093 }
1094
1095 /* Init complete, Clear the POR bit */
1096 return regmap_clear_bits(map, MAX17042_STATUS, STATUS_POR_BIT);
1097 }
1098
max17042_set_soc_threshold(struct max17042_chip * chip,u16 off)1099 static void max17042_set_soc_threshold(struct max17042_chip *chip, u16 off)
1100 {
1101 struct regmap *map = chip->regmap;
1102 u32 soc, soc_tr;
1103
1104 /* program interrupt thresholds such that we should
1105 * get interrupt for every 'off' perc change in the soc
1106 */
1107 if (chip->enable_current_sense)
1108 regmap_read(map, MAX17042_RepSOC, &soc);
1109 else
1110 regmap_read(map, MAX17042_VFSOC, &soc);
1111 soc >>= 8;
1112 soc_tr = (soc + off) << 8;
1113 if (off < soc)
1114 soc_tr |= soc - off;
1115 regmap_write(map, MAX17042_SALRT_Th, soc_tr);
1116 }
1117
max17042_set_critical_soc_threshold(struct max17042_chip * chip)1118 static void max17042_set_critical_soc_threshold(struct max17042_chip *chip)
1119 {
1120 struct regmap *map = chip->regmap;
1121 u32 soc;
1122
1123 if (chip->enable_current_sense)
1124 regmap_read(map, MAX17042_RepSOC, &soc);
1125 else
1126 regmap_read(map, MAX17042_VFSOC, &soc);
1127
1128 regmap_write(map, MAX17042_SALRT_Th,
1129 ((soc >> 8) >= MAX17042_CRITICAL_SOC) ?
1130 0xff00 + MAX17042_CRITICAL_SOC : 0xff00);
1131 }
1132
max17042_enable_soc_alerts(struct max17042_chip * chip)1133 static void max17042_enable_soc_alerts(struct max17042_chip *chip)
1134 {
1135 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055) {
1136 regmap_update_bits(chip->regmap, MAX17055_Config2,
1137 CFG2_DSOCI_BIT_ENBL,
1138 CFG2_DSOCI_BIT_ENBL);
1139 max17042_set_critical_soc_threshold(chip);
1140 return;
1141 }
1142
1143 max17042_set_soc_threshold(chip, 1);
1144 }
1145
max17042_suspend_soc_alerts(struct max17042_chip * chip)1146 static void max17042_suspend_soc_alerts(struct max17042_chip *chip)
1147 {
1148 if (chip->chip_type != MAXIM_DEVICE_TYPE_MAX17055)
1149 return;
1150
1151 regmap_update_bits(chip->regmap, MAX17055_Config2,
1152 CFG2_DSOCI_BIT_ENBL, 0);
1153 max17042_set_critical_soc_threshold(chip);
1154 }
1155
max17042_thread_handler(int id,void * dev)1156 static irqreturn_t max17042_thread_handler(int id, void *dev)
1157 {
1158 struct max17042_chip *chip = dev;
1159 u32 val;
1160 int ret;
1161
1162 ret = regmap_read(chip->regmap, MAX17042_STATUS, &val);
1163 if (ret)
1164 return IRQ_HANDLED;
1165
1166 if ((val & STATUS_SMN_BIT) || (val & STATUS_SMX_BIT) ||
1167 (val & STATUS_DSOCI_BIT)) {
1168 dev_dbg(chip->dev, "SOC threshold INTR\n");
1169 max17042_enable_soc_alerts(chip);
1170 }
1171
1172 /* we implicitly handle all alerts via power_supply_changed */
1173 regmap_clear_bits(chip->regmap, MAX17042_STATUS,
1174 0xFFFF & ~(STATUS_POR_BIT | STATUS_BST_BIT));
1175
1176 power_supply_changed(chip->battery);
1177 return IRQ_HANDLED;
1178 }
1179
max17042_init_worker(struct work_struct * work)1180 static void max17042_init_worker(struct work_struct *work)
1181 {
1182 struct max17042_chip *chip = container_of(to_delayed_work(work),
1183 struct max17042_chip, work);
1184 int ret = 0;
1185
1186 /* Initialize registers according to values from config_data */
1187 if (chip->enable_por_init && chip->config_data)
1188 ret = max17042_init_chip(chip);
1189
1190 if (ret) {
1191 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17055) {
1192 dev_warn_ratelimited(chip->dev,
1193 "initialization failed: %d, retrying\n", ret);
1194 schedule_delayed_work(&chip->work,
1195 msecs_to_jiffies(MAX17055_INIT_RETRY_DELAY_MS));
1196 } else {
1197 dev_err(chip->dev, "initialization failed: %d\n", ret);
1198 }
1199 return;
1200 }
1201
1202 WRITE_ONCE(chip->init_complete, true);
1203 power_supply_changed(chip->battery);
1204 }
1205
1206 #ifdef CONFIG_OF
max17042_parse_dt(struct max17042_chip * chip)1207 static int max17042_parse_dt(struct max17042_chip *chip)
1208 {
1209 struct device_node *np = chip->dev->of_node;
1210 u32 prop;
1211
1212 /*
1213 * Require current sense resistor value to be specified for
1214 * current-sense functionality to be enabled at all.
1215 * maxim,rsns-microohm is the property name used by older DTs and kept
1216 * for compatibility.
1217 */
1218 if ((of_property_read_u32(np, "shunt-resistor-micro-ohms",
1219 &prop) == 0) ||
1220 (of_property_read_u32(np, "maxim,rsns-microohm", &prop) == 0)) {
1221 chip->r_sns = prop;
1222 chip->enable_current_sense = true;
1223 }
1224
1225 if (of_property_read_s32(np, "maxim,cold-temp", &chip->temp_min))
1226 chip->temp_min = INT_MIN;
1227 if (of_property_read_s32(np, "maxim,over-heat-temp", &chip->temp_max))
1228 chip->temp_max = INT_MAX;
1229 if (of_property_read_u32(np, "maxim,dead-volt", &prop))
1230 chip->vmin = INT_MIN;
1231 else
1232 chip->vmin = prop;
1233 if (of_property_read_u32(np, "maxim,over-volt", &prop))
1234 chip->vmax = INT_MAX;
1235 else
1236 chip->vmin = prop;
1237
1238 return 0;
1239 }
1240 #endif
1241
max17042_init_defaults(struct max17042_chip * chip)1242 static int max17042_init_defaults(struct max17042_chip *chip)
1243 {
1244 int ret, misc_cfg;
1245
1246 /*
1247 * The MAX17047 gets used on x86 where we might not have DT, assume
1248 * the firmware will already have initialized the fuel-gauge and provide
1249 * default values for the non init bits to make things work.
1250 */
1251
1252 ret = regmap_read(chip->regmap, MAX17042_MiscCFG, &misc_cfg);
1253 if (ret < 0)
1254 return ret;
1255
1256 /* If bits 0-1 are set to 3 then only Voltage readings are used */
1257 chip->enable_current_sense = (misc_cfg & 0x3) != 0x3;
1258
1259 chip->vmin = MAX17042_DEFAULT_VMIN;
1260 chip->vmax = MAX17042_DEFAULT_VMAX;
1261 chip->temp_min = MAX17042_DEFAULT_TEMP_MIN;
1262 chip->temp_max = MAX17042_DEFAULT_TEMP_MAX;
1263
1264 return 0;
1265 }
1266
max17042_apply_battery_properties(struct max17042_chip * chip,struct power_supply_battery_info * info)1267 static int max17042_apply_battery_properties(struct max17042_chip *chip,
1268 struct power_supply_battery_info *info)
1269 {
1270 struct max17042_config_data *config;
1271 struct device *dev = chip->dev;
1272 bool have_design_cap;
1273 bool have_ichgt_term;
1274 bool have_vchg;
1275 u16 design_cap = 0;
1276 u16 ichgt_term = 0;
1277 u16 dqacc = 0;
1278 u16 model_cfg = 0;
1279 u64 data64;
1280
1281 if (!info || chip->chip_type != MAXIM_DEVICE_TYPE_MAX17055)
1282 return 0;
1283
1284 have_design_cap = chip->enable_current_sense &&
1285 info->charge_full_design_uah > 0;
1286 have_ichgt_term = chip->enable_current_sense &&
1287 info->charge_term_current_ua > 0;
1288 have_vchg = info->voltage_max_design_uv >= 0;
1289 if (!have_design_cap && !have_ichgt_term && !have_vchg)
1290 return 0;
1291
1292 if (have_design_cap) {
1293 data64 = (u64)info->charge_full_design_uah * chip->r_sns;
1294 do_div(data64, MAX17042_CAPACITY_LSB);
1295 if (!data64)
1296 return dev_err_probe(dev, -ERANGE,
1297 "battery design capacity is too small for sense resistor\n");
1298 if (data64 > U16_MAX)
1299 return dev_err_probe(dev, -ERANGE,
1300 "battery design capacity exceeds register range\n");
1301
1302 design_cap = (u16)data64;
1303 dqacc = design_cap / MAX17055_DQACC_DIV;
1304 if (!dqacc)
1305 return dev_err_probe(dev, -ERANGE,
1306 "battery design capacity is too small for EZ config\n");
1307 }
1308
1309 if (have_ichgt_term) {
1310 data64 = (u64)info->charge_term_current_ua * chip->r_sns;
1311 do_div(data64, MAX17042_CURRENT_LSB);
1312 if (!data64)
1313 return dev_err_probe(dev, -ERANGE,
1314 "charge termination current is too small for sense resistor\n");
1315 if (data64 > S16_MAX)
1316 return dev_err_probe(dev, -ERANGE,
1317 "charge termination current exceeds positive register range\n");
1318
1319 ichgt_term = (u16)data64;
1320 }
1321
1322 if (have_vchg) {
1323 if (!info->voltage_max_design_uv)
1324 return dev_err_probe(dev, -EINVAL,
1325 "battery design voltage must be positive\n");
1326
1327 if (info->voltage_max_design_uv > MAX17055_VCHG_THRESHOLD_UV)
1328 model_cfg = MAX17055_MODELCFG_VCHG_BIT;
1329 }
1330
1331 config = chip->config_data;
1332 if (!config) {
1333 config = devm_kzalloc(dev, sizeof(*config), GFP_KERNEL);
1334 if (!config)
1335 return -ENOMEM;
1336 }
1337
1338 if (have_design_cap) {
1339 config->design_cap = design_cap;
1340 config->dqacc = dqacc;
1341 }
1342 if (have_ichgt_term)
1343 config->ichgt_term = ichgt_term;
1344 if (have_vchg) {
1345 config->model_cfg &= ~MAX17055_MODELCFG_VCHG_BIT;
1346 config->model_cfg |= model_cfg;
1347 chip->enable_vchg_override = true;
1348 }
1349
1350 chip->config_data = config;
1351 chip->enable_por_init = true;
1352
1353 return 0;
1354 }
1355
max17042_init_battery(struct power_supply * psy)1356 static int max17042_init_battery(struct power_supply *psy)
1357 {
1358 struct max17042_chip *chip = power_supply_get_drvdata(psy);
1359
1360 return max17042_apply_battery_properties(chip, psy->battery_info);
1361 }
1362
1363 static const struct regmap_config max17042_regmap_config = {
1364 .name = "max17042",
1365 .reg_bits = 8,
1366 .val_bits = 16,
1367 .val_format_endian = REGMAP_ENDIAN_NATIVE,
1368 };
1369
1370 static const struct regmap_range max77759_fg_registers[] = {
1371 regmap_reg_range(MAX17042_STATUS, MAX77759_MixAtFull),
1372 regmap_reg_range(MAX17042_VFSOC0Enable, MAX17042_VFSOC0Enable),
1373 regmap_reg_range(MAX17042_MLOCKReg1, MAX17042_MLOCKReg2),
1374 regmap_reg_range(MAX17042_MODELChrTbl, MAX17055_TimerH),
1375 regmap_reg_range(MAX77759_IIn, MAX77759_IIn),
1376 regmap_reg_range(MAX17055_AtQResidual, MAX17055_AtAvCap),
1377 regmap_reg_range(MAX17042_OCVInternal, MAX17042_OCVInternal),
1378 regmap_reg_range(MAX17042_VFSOC, MAX17042_VFSOC),
1379 };
1380
1381 static const struct regmap_range max77759_fg_ro_registers[] = {
1382 regmap_reg_range(MAX17042_FSTAT, MAX17042_FSTAT),
1383 regmap_reg_range(MAX17042_OCVInternal, MAX17042_OCVInternal),
1384 regmap_reg_range(MAX17042_VFSOC, MAX17042_VFSOC),
1385 };
1386
1387 static const struct regmap_access_table max77759_fg_write_table = {
1388 .yes_ranges = max77759_fg_registers,
1389 .n_yes_ranges = ARRAY_SIZE(max77759_fg_registers),
1390 .no_ranges = max77759_fg_ro_registers,
1391 .n_no_ranges = ARRAY_SIZE(max77759_fg_ro_registers),
1392 };
1393
1394 static const struct regmap_access_table max77759_fg_rd_table = {
1395 .yes_ranges = max77759_fg_registers,
1396 .n_yes_ranges = ARRAY_SIZE(max77759_fg_registers),
1397 };
1398
1399 static const struct regmap_config max77759_fg_regmap_cfg = {
1400 .reg_bits = 8,
1401 .val_bits = 16,
1402 .max_register = 0xff,
1403 .wr_table = &max77759_fg_write_table,
1404 .rd_table = &max77759_fg_rd_table,
1405 .val_format_endian = REGMAP_ENDIAN_NATIVE,
1406 .cache_type = REGCACHE_NONE,
1407 };
1408
1409 static const struct power_supply_desc max17042_psy_desc = {
1410 .name = "max170xx_battery",
1411 .type = POWER_SUPPLY_TYPE_BATTERY,
1412 .get_property = max17042_get_property,
1413 .set_property = max17042_set_property,
1414 .property_is_writeable = max17042_property_is_writeable,
1415 .external_power_changed = power_supply_changed,
1416 .init = max17042_init_battery,
1417 .properties = max17042_battery_props,
1418 .num_properties = ARRAY_SIZE(max17042_battery_props),
1419 };
1420
1421 static const struct power_supply_desc max17042_no_current_sense_psy_desc = {
1422 .name = "max170xx_battery",
1423 .type = POWER_SUPPLY_TYPE_BATTERY,
1424 .get_property = max17042_get_property,
1425 .set_property = max17042_set_property,
1426 .property_is_writeable = max17042_property_is_writeable,
1427 .init = max17042_init_battery,
1428 .properties = max17042_battery_props,
1429 .num_properties = ARRAY_SIZE(max17042_battery_props) - 2,
1430 };
1431
max17042_probe(struct i2c_client * client,struct device * dev,int irq,enum max170xx_chip_type chip_type)1432 static int max17042_probe(struct i2c_client *client, struct device *dev, int irq,
1433 enum max170xx_chip_type chip_type)
1434 {
1435 struct i2c_adapter *adapter = client->adapter;
1436 const struct power_supply_desc *max17042_desc = &max17042_psy_desc;
1437 const struct regmap_config *regmap_config;
1438 struct power_supply_config psy_cfg = {};
1439 struct max17042_chip *chip;
1440 int ret;
1441 u32 val;
1442 bool use_default_config = false;
1443
1444 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
1445 return -EIO;
1446
1447 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
1448 if (!chip)
1449 return -ENOMEM;
1450
1451 chip->dev = dev;
1452 chip->chip_type = chip_type;
1453
1454 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX77759)
1455 regmap_config = &max77759_fg_regmap_cfg;
1456 else
1457 regmap_config = &max17042_regmap_config;
1458 chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1459 if (IS_ERR(chip->regmap))
1460 return dev_err_probe(dev, PTR_ERR(chip->regmap),
1461 "Failed to initialize regmap\n");
1462
1463 #ifdef CONFIG_OF
1464 if (dev->of_node) {
1465 ret = max17042_parse_dt(chip);
1466 if (ret)
1467 return ret;
1468 } else
1469 #endif
1470 {
1471 ret = max17042_init_defaults(chip);
1472 if (ret)
1473 return ret;
1474 use_default_config = true;
1475 }
1476
1477 dev_set_drvdata(dev, chip);
1478 psy_cfg.drv_data = chip;
1479 psy_cfg.fwnode = dev_fwnode(dev);
1480
1481 /* When current is not measured,
1482 * CURRENT_NOW and CURRENT_AVG properties should be invisible. */
1483 if (!chip->enable_current_sense)
1484 max17042_desc = &max17042_no_current_sense_psy_desc;
1485
1486 if (chip->r_sns == 0)
1487 chip->r_sns = MAX17042_DEFAULT_SNS_RESISTOR;
1488
1489 if (!chip->enable_current_sense) {
1490 regmap_write(chip->regmap, MAX17042_CGAIN, 0x0000);
1491 regmap_write(chip->regmap, MAX17042_MiscCFG, 0x0003);
1492 regmap_write(chip->regmap, MAX17042_LearnCFG, 0x0007);
1493 }
1494
1495 chip->task_period = MAX17042_DEFAULT_TASK_PERIOD;
1496 if (chip->chip_type == MAXIM_DEVICE_TYPE_MAX77759) {
1497 ret = regmap_read(chip->regmap, MAX17042_TaskPeriod, &val);
1498 if (ret)
1499 return dev_err_probe(dev, ret,
1500 "failed to read task period\n");
1501 chip->task_period = val;
1502 }
1503 dev_dbg(dev, "task period: %#.4x (%d)\n", chip->task_period,
1504 chip->task_period);
1505
1506 chip->battery = devm_power_supply_register(dev, max17042_desc,
1507 &psy_cfg);
1508 if (IS_ERR(chip->battery))
1509 return dev_err_probe(dev, PTR_ERR(chip->battery),
1510 "failed: power supply register\n");
1511
1512 /*
1513 * Some firmwares do not set FullSOCThr, Enable End-of-Charge Detection
1514 * when the voltage FG reports 95%, as recommended in the datasheet.
1515 */
1516 if (use_default_config &&
1517 (chip->chip_type == MAXIM_DEVICE_TYPE_MAX17047 ||
1518 chip->chip_type == MAXIM_DEVICE_TYPE_MAX17050))
1519 regmap_write(chip->regmap, MAX17047_FullSOCThr,
1520 MAX17042_BATTERY_FULL << 8);
1521
1522 if (irq) {
1523 unsigned int flags = IRQF_ONESHOT | IRQF_SHARED | IRQF_PROBE_SHARED;
1524
1525 ret = devm_request_threaded_irq(dev, irq,
1526 NULL,
1527 max17042_thread_handler, flags,
1528 chip->battery->desc->name,
1529 chip);
1530 if (!ret) {
1531 regmap_update_bits(chip->regmap, MAX17042_CONFIG,
1532 CFG_ALRT_BIT_ENBL,
1533 CFG_ALRT_BIT_ENBL);
1534 max17042_enable_soc_alerts(chip);
1535 } else {
1536 irq = 0;
1537 if (ret != -EBUSY)
1538 dev_err(dev, "Failed to get IRQ\n");
1539 }
1540 }
1541 /* Not able to update the charge threshold when exceeded? -> disable */
1542 if (!irq)
1543 regmap_write(chip->regmap, MAX17042_SALRT_Th, 0xff00);
1544
1545 chip->irq = irq;
1546
1547 ret = regmap_read(chip->regmap, MAX17042_STATUS, &val);
1548 if (ret)
1549 return dev_err_probe(dev, ret, "failed to read status\n");
1550
1551 if (val & STATUS_POR_BIT) {
1552 ret = devm_delayed_work_autocancel(dev, &chip->work,
1553 max17042_init_worker);
1554 if (ret)
1555 return ret;
1556 schedule_delayed_work(&chip->work, 0);
1557 } else {
1558 WRITE_ONCE(chip->init_complete, true);
1559 }
1560
1561 return 0;
1562 }
1563
max17042_i2c_probe(struct i2c_client * client)1564 static int max17042_i2c_probe(struct i2c_client *client)
1565 {
1566 const struct i2c_device_id *id = i2c_client_get_device_id(client);
1567 const struct acpi_device_id *acpi_id = NULL;
1568 struct device *dev = &client->dev;
1569 enum max170xx_chip_type chip_type;
1570
1571 if (id) {
1572 chip_type = id->driver_data;
1573 } else {
1574 acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
1575 if (!acpi_id)
1576 return -ENODEV;
1577
1578 chip_type = acpi_id->driver_data;
1579 }
1580
1581 return max17042_probe(client, dev, client->irq, chip_type);
1582 }
1583
max17042_platform_probe(struct platform_device * pdev)1584 static int max17042_platform_probe(struct platform_device *pdev)
1585 {
1586 struct device *dev = &pdev->dev;
1587 struct i2c_client *i2c;
1588 const struct platform_device_id *id;
1589 int irq;
1590
1591 i2c = to_i2c_client(pdev->dev.parent);
1592 if (!i2c)
1593 return -EINVAL;
1594
1595 device_set_of_node_from_dev(dev, dev->parent);
1596
1597 id = platform_get_device_id(pdev);
1598 irq = platform_get_irq(pdev, 0);
1599
1600 return max17042_probe(i2c, dev, irq, id->driver_data);
1601 }
1602
max17042_suspend(struct device * dev)1603 static int max17042_suspend(struct device *dev)
1604 {
1605 struct max17042_chip *chip = dev_get_drvdata(dev);
1606
1607 /*
1608 * disable the irq and enable irq_wake
1609 * capability to the interrupt line.
1610 */
1611 if (chip->irq) {
1612 disable_irq(chip->irq);
1613 max17042_suspend_soc_alerts(chip);
1614 enable_irq_wake(chip->irq);
1615 }
1616
1617 return 0;
1618 }
1619
max17042_resume(struct device * dev)1620 static int max17042_resume(struct device *dev)
1621 {
1622 struct max17042_chip *chip = dev_get_drvdata(dev);
1623
1624 if (chip->irq) {
1625 disable_irq_wake(chip->irq);
1626 enable_irq(chip->irq);
1627 /* re-arm runtime SOC alerts */
1628 max17042_enable_soc_alerts(chip);
1629 }
1630
1631 return 0;
1632 }
1633
1634 static DEFINE_SIMPLE_DEV_PM_OPS(max17042_pm_ops, max17042_suspend,
1635 max17042_resume);
1636
1637 #ifdef CONFIG_ACPI
1638 static const struct acpi_device_id max17042_acpi_match[] = {
1639 { "MAX17047", MAXIM_DEVICE_TYPE_MAX17047 },
1640 { }
1641 };
1642 MODULE_DEVICE_TABLE(acpi, max17042_acpi_match);
1643 #endif
1644
1645 #ifdef CONFIG_OF
1646 /*
1647 * Device may be instantiated through parent MFD device and device matching is done
1648 * through platform_device_id.
1649 *
1650 * However if device's DT node contains proper clock compatible and driver is
1651 * built as a module, then the *module* matching will be done trough DT aliases.
1652 * This requires of_device_id table. In the same time this will not change the
1653 * actual *device* matching so do not add .of_match_table.
1654 */
1655 static const struct of_device_id max17042_dt_match[] __used = {
1656 { .compatible = "maxim,max17042",
1657 .data = (void *) MAXIM_DEVICE_TYPE_MAX17042 },
1658 { .compatible = "maxim,max17047",
1659 .data = (void *) MAXIM_DEVICE_TYPE_MAX17047 },
1660 { .compatible = "maxim,max17050",
1661 .data = (void *) MAXIM_DEVICE_TYPE_MAX17050 },
1662 { .compatible = "maxim,max17055",
1663 .data = (void *) MAXIM_DEVICE_TYPE_MAX17055 },
1664 { .compatible = "maxim,max77705-battery",
1665 .data = (void *) MAXIM_DEVICE_TYPE_MAX17047 },
1666 { .compatible = "maxim,max77759-fg",
1667 .data = (void *) MAXIM_DEVICE_TYPE_MAX77759 },
1668 { .compatible = "maxim,max77849-battery",
1669 .data = (void *) MAXIM_DEVICE_TYPE_MAX17047 },
1670 { },
1671 };
1672 MODULE_DEVICE_TABLE(of, max17042_dt_match);
1673 #endif
1674
1675 static const struct i2c_device_id max17042_id[] = {
1676 { .name = "max17042", .driver_data = MAXIM_DEVICE_TYPE_MAX17042 },
1677 { .name = "max17047", .driver_data = MAXIM_DEVICE_TYPE_MAX17047 },
1678 { .name = "max17050", .driver_data = MAXIM_DEVICE_TYPE_MAX17050 },
1679 { .name = "max17055", .driver_data = MAXIM_DEVICE_TYPE_MAX17055 },
1680 { .name = "max77759-fg", .driver_data = MAXIM_DEVICE_TYPE_MAX77759 },
1681 { .name = "max77849-battery", .driver_data = MAXIM_DEVICE_TYPE_MAX17047 },
1682 { }
1683 };
1684 MODULE_DEVICE_TABLE(i2c, max17042_id);
1685
1686 static const struct platform_device_id max17042_platform_id[] = {
1687 { "max17042", MAXIM_DEVICE_TYPE_MAX17042 },
1688 { "max17047", MAXIM_DEVICE_TYPE_MAX17047 },
1689 { "max17050", MAXIM_DEVICE_TYPE_MAX17050 },
1690 { "max17055", MAXIM_DEVICE_TYPE_MAX17055 },
1691 { "max77705-battery", MAXIM_DEVICE_TYPE_MAX17047 },
1692 { "max77849-battery", MAXIM_DEVICE_TYPE_MAX17047 },
1693 { }
1694 };
1695 MODULE_DEVICE_TABLE(platform, max17042_platform_id);
1696
1697 static struct i2c_driver max17042_i2c_driver = {
1698 .driver = {
1699 .name = "max17042",
1700 .acpi_match_table = ACPI_PTR(max17042_acpi_match),
1701 .of_match_table = of_match_ptr(max17042_dt_match),
1702 .pm = pm_ptr(&max17042_pm_ops),
1703 },
1704 .probe = max17042_i2c_probe,
1705 .id_table = max17042_id,
1706 };
1707
1708 static struct platform_driver max17042_platform_driver = {
1709 .driver = {
1710 .name = "max17042",
1711 .acpi_match_table = ACPI_PTR(max17042_acpi_match),
1712 .pm = pm_ptr(&max17042_pm_ops),
1713 },
1714 .probe = max17042_platform_probe,
1715 .id_table = max17042_platform_id,
1716 };
1717
max17042_init(void)1718 static int __init max17042_init(void)
1719 {
1720 int ret;
1721
1722 ret = platform_driver_register(&max17042_platform_driver);
1723 if (ret)
1724 return ret;
1725
1726 ret = i2c_add_driver(&max17042_i2c_driver);
1727 if (ret) {
1728 platform_driver_unregister(&max17042_platform_driver);
1729 return ret;
1730 }
1731
1732 return 0;
1733 }
1734 module_init(max17042_init);
1735
max17042_exit(void)1736 static void __exit max17042_exit(void)
1737 {
1738 i2c_del_driver(&max17042_i2c_driver);
1739 platform_driver_unregister(&max17042_platform_driver);
1740 }
1741 module_exit(max17042_exit);
1742
1743 MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
1744 MODULE_DESCRIPTION("MAX17042 Fuel Gauge");
1745 MODULE_LICENSE("GPL");
1746