1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Theobroma Systems Design und Consulting GmbH 4 */ 5 6/dts-v1/; 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/input.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/soc/rockchip,vop2.h> 12#include <dt-bindings/usb/pd.h> 13#include "rk8xx.h" 14#include "rk3588.dtsi" 15 16/ { 17 model = "Theobroma Systems RK3588-SBC Jaguar"; 18 compatible = "tsd,rk3588-jaguar", "rockchip,rk3588"; 19 20 adc-keys { 21 compatible = "adc-keys"; 22 io-channels = <&saradc 0>; 23 io-channel-names = "buttons"; 24 keyup-threshold-microvolt = <1800000>; 25 poll-interval = <100>; 26 27 /* Can be controlled through SW2 but also GPIO1 on CP2102 on P20 */ 28 button-bios-disable { 29 label = "BIOS_DISABLE"; 30 linux,code = <KEY_VENDOR>; 31 press-threshold-microvolt = <0>; 32 }; 33 }; 34 35 aliases { 36 ethernet0 = &gmac0; 37 i2c10 = &i2c10; 38 mmc0 = &sdhci; 39 mmc1 = &sdmmc; 40 rtc0 = &rtc_twi; 41 }; 42 43 chosen { 44 stdout-path = "serial2:115200n8"; 45 }; 46 47 /* DCIN is 12-24V but standard is 12V */ 48 dc_12v: regulator-dc-12v { 49 compatible = "regulator-fixed"; 50 regulator-name = "dc_12v"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-min-microvolt = <12000000>; 54 regulator-max-microvolt = <12000000>; 55 }; 56 57 emmc_pwrseq: emmc-pwrseq { 58 compatible = "mmc-pwrseq-emmc"; 59 pinctrl-0 = <&emmc_reset>; 60 pinctrl-names = "default"; 61 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>; 62 }; 63 64 hdmi-con { 65 compatible = "hdmi-connector"; 66 type = "a"; 67 68 port { 69 hdmi_con_in: endpoint { 70 remote-endpoint = <&hdmi0_out_con>; 71 }; 72 }; 73 }; 74 75 leds { 76 compatible = "gpio-leds"; 77 pinctrl-names = "default"; 78 pinctrl-0 = <&led1_pin>; 79 80 /* LED1 on PCB */ 81 led-1 { 82 gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; 83 function = LED_FUNCTION_HEARTBEAT; 84 linux,default-trigger = "heartbeat"; 85 color = <LED_COLOR_ID_AMBER>; 86 }; 87 }; 88 89 /* 90 * 100MHz reference clock for PCIe peripherals from PI6C557-05BLE 91 * clock generator. 92 * The clock output is gated via the OE pin on the clock generator. 93 * This is modeled as a fixed-clock plus a gpio-gate-clock. 94 */ 95 pcie_refclk_gen: pcie-refclk-gen-clock { 96 compatible = "fixed-clock"; 97 #clock-cells = <0>; 98 clock-frequency = <100000000>; 99 }; 100 101 pcie_refclk: pcie-refclk-clock { 102 compatible = "gpio-gate-clock"; 103 clocks = <&pcie_refclk_gen>; 104 #clock-cells = <0>; 105 enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; /* PCIE30X4_CLKREQN_M0 */ 106 pinctrl-names = "default"; 107 pinctrl-0 = <&pcie30x4_clkreqn_m0>; 108 }; 109 110 pps { 111 compatible = "pps-gpio"; 112 gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; 113 }; 114 115 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 116 compatible = "regulator-fixed"; 117 regulator-name = "vcc_1v1_nldo_s3"; 118 regulator-always-on; 119 regulator-boot-on; 120 regulator-min-microvolt = <1100000>; 121 regulator-max-microvolt = <1100000>; 122 vin-supply = <&vcc5v0_sys>; 123 }; 124 125 vcc_1v2_s3: regulator-vcc-1v2-s3 { 126 compatible = "regulator-fixed"; 127 regulator-name = "vcc_1v2_s3"; 128 regulator-always-on; 129 regulator-boot-on; 130 regulator-min-microvolt = <1200000>; 131 regulator-max-microvolt = <1200000>; 132 vin-supply = <&vcc5v0_sys>; 133 }; 134 135 /* Exposed on P14 and P15 */ 136 vcc_2v8_s3: regulator-vcc-2v8-s3 { 137 compatible = "regulator-fixed"; 138 regulator-name = "vcc_2v8_s3"; 139 regulator-always-on; 140 regulator-boot-on; 141 regulator-min-microvolt = <2800000>; 142 regulator-max-microvolt = <2800000>; 143 vin-supply = <&vcc_3v3_s3>; 144 }; 145 146 vcc_5v0_usb_a: regulator-vcc-5v0-usb-a { 147 compatible = "regulator-fixed"; 148 regulator-name = "usb_a_vcc"; 149 regulator-min-microvolt = <5000000>; 150 regulator-max-microvolt = <5000000>; 151 vin-supply = <&vcc5v0_sys>; 152 gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 153 enable-active-high; 154 }; 155 156 vcc_5v0_usb_c1: regulator-vcc-5v0-usb-c1 { 157 compatible = "regulator-fixed"; 158 regulator-name = "5v_usbc1"; 159 regulator-min-microvolt = <5000000>; 160 regulator-max-microvolt = <5000000>; 161 vin-supply = <&vcc5v0_usb>; 162 gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; 163 enable-active-high; 164 }; 165 166 vcc_5v0_usb_c2: regulator-vcc-5v0-usb-c2 { 167 compatible = "regulator-fixed"; 168 regulator-name = "5v_usbc2"; 169 regulator-min-microvolt = <5000000>; 170 regulator-max-microvolt = <5000000>; 171 vin-supply = <&vcc5v0_usb>; 172 gpio = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 173 enable-active-high; 174 }; 175 176 vcc3v3_mdot2: regulator-vcc3v3-mdot2 { 177 compatible = "regulator-fixed"; 178 regulator-name = "vcc3v3_mdot2"; 179 regulator-always-on; 180 regulator-boot-on; 181 regulator-min-microvolt = <3300000>; 182 regulator-max-microvolt = <3300000>; 183 vin-supply = <&dc_12v>; 184 }; 185 186 vcc5v0_sys: regulator-vcc5v0-sys { 187 compatible = "regulator-fixed"; 188 regulator-name = "vcc5v0_sys"; 189 regulator-always-on; 190 regulator-boot-on; 191 regulator-min-microvolt = <5000000>; 192 regulator-max-microvolt = <5000000>; 193 vin-supply = <&dc_12v>; 194 }; 195 196 vcc5v0_usb: regulator-vcc5v0-usb { 197 compatible = "regulator-fixed"; 198 regulator-name = "vcc5v0_usb"; 199 regulator-always-on; 200 regulator-boot-on; 201 regulator-min-microvolt = <5000000>; 202 regulator-max-microvolt = <5000000>; 203 vin-supply = <&vcc5v0_sys>; 204 }; 205}; 206 207&combphy1_ps { 208 status = "okay"; 209}; 210 211&cpu_b0 { 212 cpu-supply = <&vdd_cpu_big0_s0>; 213}; 214 215&cpu_b1 { 216 cpu-supply = <&vdd_cpu_big0_s0>; 217}; 218 219&cpu_b2 { 220 cpu-supply = <&vdd_cpu_big1_s0>; 221}; 222 223&cpu_b3 { 224 cpu-supply = <&vdd_cpu_big1_s0>; 225}; 226 227&cpu_l0 { 228 cpu-supply = <&vdd_cpu_lit_s0>; 229}; 230 231&cpu_l1 { 232 cpu-supply = <&vdd_cpu_lit_s0>; 233}; 234 235&cpu_l2 { 236 cpu-supply = <&vdd_cpu_lit_s0>; 237}; 238 239&cpu_l3 { 240 cpu-supply = <&vdd_cpu_lit_s0>; 241}; 242 243&gmac0 { 244 clock_in_out = "output"; 245 phy-handle = <&rgmii_phy>; 246 phy-mode = "rgmii"; 247 phy-supply = <&vcc_1v2_s3>; 248 pinctrl-names = "default"; 249 pinctrl-0 = <&gmac0_miim 250 &gmac0_rx_bus2 251 &gmac0_tx_bus2 252 &gmac0_rgmii_clk 253 &gmac0_rgmii_bus 254 ð0_pins 255 ð_reset>; 256 tx_delay = <0x10>; 257 rx_delay = <0x10>; 258 snps,reset-gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; 259 snps,reset-active-low; 260 snps,reset-delays-us = <0 10000 100000>; 261 262 status = "okay"; 263}; 264 265&gpio1 { 266 mdot2e-w-disable1-n-hog { 267 gpios = <RK_PB1 GPIO_ACTIVE_LOW>; 268 output-low; 269 line-name = "m.2 E-key W_DISABLE1#"; 270 gpio-hog; 271 }; 272}; 273 274&gpio4 { 275 mdot2e-w-disable2-n-hog { 276 gpios = <RK_PC1 GPIO_ACTIVE_LOW>; 277 output-low; 278 line-name = "m.2 E-key W_DISABLE2#"; 279 gpio-hog; 280 }; 281}; 282 283&gpu { 284 mali-supply = <&vdd_gpu_s0>; 285 status = "okay"; 286}; 287 288&hdmi0 { 289 /* No CEC on Jaguar */ 290 pinctrl-names = "default"; 291 pinctrl-0 = <&hdmim0_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>; 292 status = "okay"; 293}; 294 295&hdmi0_in { 296 hdmi0_in_vp0: endpoint { 297 remote-endpoint = <&vp0_out_hdmi0>; 298 }; 299}; 300 301&hdmi0_out { 302 hdmi0_out_con: endpoint { 303 remote-endpoint = <&hdmi_con_in>; 304 }; 305}; 306 307&hdmi0_sound { 308 status = "okay"; 309}; 310 311&hdptxphy0 { 312 status = "okay"; 313}; 314 315&i2c0 { 316 pinctrl-0 = <&i2c0m2_xfer>; 317 status = "okay"; 318 319 fan@18 { 320 compatible = "tsd,mule", "ti,amc6821"; 321 reg = <0x18>; 322 323 i2c-mux { 324 compatible = "tsd,mule-i2c-mux"; 325 #address-cells = <1>; 326 #size-cells = <0>; 327 328 i2c10: i2c@0 { 329 reg = <0x0>; 330 #address-cells = <1>; 331 #size-cells = <0>; 332 333 rtc_twi: rtc@6f { 334 compatible = "isil,isl1208"; 335 reg = <0x6f>; 336 }; 337 }; 338 }; 339 }; 340 341 typec-portc@22 { 342 compatible = "fcs,fusb302"; 343 reg = <0x22>; 344 interrupt-parent = <&gpio4>; 345 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 346 pinctrl-names = "default"; 347 pinctrl-0 = <&cc_int1>; 348 vbus-supply = <&vcc_5v0_usb_c1>; 349 350 connector { 351 compatible = "usb-c-connector"; 352 data-role = "dual"; 353 label = "USBC-1 P11"; 354 power-role = "source"; 355 self-powered; 356 source-pdos = 357 <PDO_FIXED(5000, 1500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)>; 358 vbus-supply = <&vcc_5v0_usb_c1>; 359 360 ports { 361 #address-cells = <1>; 362 #size-cells = <0>; 363 364 port@0 { 365 reg = <0>; 366 367 usbc0_hs: endpoint { 368 remote-endpoint = <&usb_host0_xhci_drd_sw>; 369 }; 370 }; 371 372 port@1 { 373 reg = <1>; 374 375 usbc0_ss: endpoint { 376 remote-endpoint = <&usbdp_phy0_typec_ss>; 377 }; 378 }; 379 380 port@2 { 381 reg = <2>; 382 383 usbc0_sbu: endpoint { 384 remote-endpoint = <&usbdp_phy0_typec_sbu>; 385 }; 386 }; 387 }; 388 }; 389 }; 390 391 vdd_npu_s0: regulator@42 { 392 compatible = "rockchip,rk8602"; 393 reg = <0x42>; 394 fcs,suspend-voltage-selector = <1>; 395 regulator-name = "vdd_npu_s0"; 396 regulator-always-on; 397 regulator-boot-on; 398 regulator-min-microvolt = <550000>; 399 regulator-max-microvolt = <950000>; 400 regulator-ramp-delay = <2300>; 401 vin-supply = <&vcc5v0_sys>; 402 403 regulator-state-mem { 404 regulator-off-in-suspend; 405 }; 406 }; 407 408 vdd_cpu_big1_s0: regulator@43 { 409 compatible = "rockchip,rk8603", "rockchip,rk8602"; 410 reg = <0x43>; 411 fcs,suspend-voltage-selector = <1>; 412 regulator-name = "vdd_cpu_big1_s0"; 413 regulator-always-on; 414 regulator-boot-on; 415 regulator-min-microvolt = <550000>; 416 regulator-max-microvolt = <1050000>; 417 regulator-ramp-delay = <2300>; 418 vin-supply = <&vcc5v0_sys>; 419 420 regulator-state-mem { 421 regulator-off-in-suspend; 422 }; 423 }; 424}; 425 426&i2c1 { 427 pinctrl-0 = <&i2c1m4_xfer>; 428}; 429 430&i2c6 { 431 pinctrl-0 = <&i2c6m4_xfer>; 432}; 433 434&i2c7 { 435 status = "okay"; 436 437 /* SE050 Secure Element at 0x48; GPIO1_A4 for enable pin */ 438 439 /* Also on 0x55 */ 440 eeprom@54 { 441 compatible = "st,24c04", "atmel,24c04"; 442 reg = <0x54>; 443 pagesize = <16>; 444 vcc-supply = <&vcc_3v3_s3>; 445 }; 446}; 447 448&i2c8 { 449 pinctrl-0 = <&i2c8m2_xfer>; 450 status = "okay"; 451 452 typec-portc@22 { 453 compatible = "fcs,fusb302"; 454 reg = <0x22>; 455 interrupt-parent = <&gpio4>; 456 interrupts = <RK_PA4 IRQ_TYPE_LEVEL_LOW>; 457 pinctrl-names = "default"; 458 pinctrl-0 = <&cc_int2>; 459 vbus-supply = <&vcc_5v0_usb_c2>; 460 461 connector { 462 compatible = "usb-c-connector"; 463 data-role = "dual"; 464 label = "USBC-2 P12"; 465 power-role = "source"; 466 self-powered; 467 source-pdos = 468 <PDO_FIXED(5000, 1500, PDO_FIXED_DATA_SWAP | PDO_FIXED_USB_COMM)>; 469 vbus-supply = <&vcc_5v0_usb_c2>; 470 471 ports { 472 #address-cells = <1>; 473 #size-cells = <0>; 474 475 port@0 { 476 reg = <0>; 477 478 usbc1_hs: endpoint { 479 remote-endpoint = <&usb_host1_xhci_drd_sw>; 480 }; 481 }; 482 483 port@1 { 484 reg = <1>; 485 486 usbc1_ss: endpoint { 487 remote-endpoint = <&usbdp_phy1_typec_ss>; 488 }; 489 }; 490 491 port@2 { 492 reg = <2>; 493 494 usbc1_sbu: endpoint { 495 remote-endpoint = <&usbdp_phy1_typec_sbu>; 496 }; 497 }; 498 }; 499 }; 500 }; 501 502 vdd_cpu_big0_s0: regulator@42 { 503 compatible = "rockchip,rk8602"; 504 reg = <0x42>; 505 fcs,suspend-voltage-selector = <1>; 506 regulator-name = "vdd_cpu_big0_s0"; 507 regulator-always-on; 508 regulator-boot-on; 509 regulator-min-microvolt = <550000>; 510 regulator-max-microvolt = <1050000>; 511 regulator-ramp-delay = <2300>; 512 vin-supply = <&vcc5v0_sys>; 513 514 regulator-state-mem { 515 regulator-off-in-suspend; 516 }; 517 }; 518}; 519 520&i2s5_8ch { 521 status = "okay"; 522}; 523 524&mdio0 { 525 rgmii_phy: ethernet-phy@6 { 526 /* KSZ9031 or KSZ9131 */ 527 compatible = "ethernet-phy-ieee802.3-c22"; 528 reg = <0x6>; 529 clocks = <&cru REFCLKO25M_ETH0_OUT>; 530 }; 531}; 532 533&pcie2x1l0 { 534 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; /* WIFI_PERST0# */ 535 vpcie3v3-supply = <&vcc3v3_mdot2>; 536 status = "okay"; 537}; 538 539&pcie30phy { 540 status = "okay"; 541}; 542 543&pcie3x4 { 544 /* 545 * The board has a gpio-controlled "pcie_refclk" generator, 546 * so add it to the list of clocks. 547 */ 548 clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, 549 <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, 550 <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, 551 <&pcie_refclk>; 552 clock-names = "aclk_mst", "aclk_slv", 553 "aclk_dbi", "pclk", 554 "aux", "pipe", 555 "ref"; 556 pinctrl-names = "default"; 557 pinctrl-0 = <&pcie30x4_waken_m0 &pcie30x4_perstn_m0>; 558 reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; /* PCIE30X4_PERSTN_M0 */ 559 vpcie3v3-supply = <&vcc3v3_mdot2>; 560 status = "okay"; 561}; 562 563&pd_gpu { 564 domain-supply = <&vdd_gpu_s0>; 565}; 566 567&pinctrl { 568 emmc { 569 emmc_reset: emmc-reset { 570 rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 571 }; 572 }; 573 574 ethernet { 575 eth_reset: eth-reset { 576 rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 577 }; 578 }; 579 580 leds { 581 led1_pin: led1-pin { 582 rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 583 }; 584 }; 585 586 pcie30x4 { 587 pcie30x4_clkreqn_m0: pcie30x4-clkreqn-m0 { 588 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 589 }; 590 591 pcie30x4_perstn_m0: pcie30x4-perstn-m0 { 592 rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 593 }; 594 595 pcie30x4_waken_m0: pcie30x4-waken-m0 { 596 rockchip,pins = <0 RK_PC7 12 &pcfg_pull_none>; 597 }; 598 }; 599 600 usb3 { 601 cc_int1: cc-int1 { 602 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 603 }; 604 605 cc_int2: cc-int2 { 606 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 607 }; 608 609 typec0_sbu_dc_pins: typec0-sbu-dc-pins { 610 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>, 611 <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_down>; 612 }; 613 614 typec1_sbu_dc_pins: typec1-sbu-dc-pins { 615 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>, 616 <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; 617 }; 618 }; 619}; 620 621&saradc { 622 vref-supply = <&vcc_1v8_s0>; 623 status = "okay"; 624}; 625 626&sdhci { 627 bus-width = <8>; 628 cap-mmc-highspeed; 629 mmc-ddr-1_8v; 630 mmc-hs200-1_8v; 631 mmc-hs400-1_8v; 632 mmc-hs400-enhanced-strobe; 633 mmc-pwrseq = <&emmc_pwrseq>; 634 no-sdio; 635 no-sd; 636 non-removable; 637 pinctrl-names = "default"; 638 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; 639 vmmc-supply = <&vcc_3v3_s3>; 640 vqmmc-supply = <&vcc_1v8_s3>; 641 status = "okay"; 642}; 643 644&sdmmc { 645 broken-cd; 646 bus-width = <4>; 647 cap-sd-highspeed; 648 disable-wp; 649 max-frequency = <150000000>; 650 pinctrl-names = "default"; 651 pinctrl-0 = <&sdmmc_bus4 &sdmmc_cmd &sdmmc_clk>; 652 sd-uhs-sdr12; 653 sd-uhs-sdr25; 654 sd-uhs-sdr50; 655 sd-uhs-ddr50; 656 sd-uhs-sdr104; 657 vmmc-supply = <&vcc_3v3_s3>; 658 vqmmc-supply = <&vccio_sd_s0>; 659 status = "okay"; 660}; 661 662&spi2 { 663 assigned-clocks = <&cru CLK_SPI2>; 664 assigned-clock-rates = <200000000>; 665 num-cs = <1>; 666 pinctrl-names = "default"; 667 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 668 status = "okay"; 669 670 pmic@0 { 671 compatible = "rockchip,rk806"; 672 reg = <0x0>; 673 interrupt-parent = <&gpio0>; 674 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 675 gpio-controller; 676 #gpio-cells = <2>; 677 pinctrl-names = "default"; 678 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 679 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 680 spi-max-frequency = <1000000>; 681 system-power-controller; 682 vcc1-supply = <&vcc5v0_sys>; 683 vcc2-supply = <&vcc5v0_sys>; 684 vcc3-supply = <&vcc5v0_sys>; 685 vcc4-supply = <&vcc5v0_sys>; 686 vcc5-supply = <&vcc5v0_sys>; 687 vcc6-supply = <&vcc5v0_sys>; 688 vcc7-supply = <&vcc5v0_sys>; 689 vcc8-supply = <&vcc5v0_sys>; 690 vcc9-supply = <&vcc5v0_sys>; 691 vcc10-supply = <&vcc5v0_sys>; 692 vcc11-supply = <&vcc_2v0_pldo_s3>; 693 vcc12-supply = <&vcc5v0_sys>; 694 vcc13-supply = <&vcc_1v1_nldo_s3>; 695 vcc14-supply = <&vcc_1v1_nldo_s3>; 696 vcca-supply = <&vcc5v0_sys>; 697 rockchip,reset-mode = <RK806_RESTART>; 698 699 rk806_dvs1_null: dvs1-null-pins { 700 pins = "gpio_pwrctrl1"; 701 function = "pin_fun0"; 702 }; 703 704 rk806_dvs2_null: dvs2-null-pins { 705 pins = "gpio_pwrctrl2"; 706 function = "pin_fun0"; 707 }; 708 709 rk806_dvs3_null: dvs3-null-pins { 710 pins = "gpio_pwrctrl3"; 711 function = "pin_fun0"; 712 }; 713 714 regulators { 715 vdd_gpu_s0: dcdc-reg1 { 716 regulator-boot-on; 717 regulator-min-microvolt = <550000>; 718 regulator-max-microvolt = <950000>; 719 regulator-ramp-delay = <12500>; 720 regulator-name = "vdd_gpu_s0"; 721 regulator-enable-ramp-delay = <400>; 722 723 regulator-state-mem { 724 regulator-off-in-suspend; 725 }; 726 }; 727 728 vdd_cpu_lit_s0: dcdc-reg2 { 729 regulator-name = "vdd_cpu_lit_s0"; 730 regulator-always-on; 731 regulator-boot-on; 732 regulator-min-microvolt = <550000>; 733 regulator-max-microvolt = <950000>; 734 regulator-ramp-delay = <12500>; 735 736 regulator-state-mem { 737 regulator-off-in-suspend; 738 }; 739 }; 740 741 vdd_log_s0: dcdc-reg3 { 742 regulator-name = "vdd_log_s0"; 743 regulator-always-on; 744 regulator-boot-on; 745 regulator-min-microvolt = <675000>; 746 regulator-max-microvolt = <750000>; 747 regulator-ramp-delay = <12500>; 748 749 regulator-state-mem { 750 regulator-off-in-suspend; 751 regulator-suspend-microvolt = <750000>; 752 }; 753 }; 754 755 vdd_vdenc_s0: dcdc-reg4 { 756 regulator-name = "vdd_vdenc_s0"; 757 regulator-always-on; 758 regulator-boot-on; 759 regulator-min-microvolt = <550000>; 760 regulator-max-microvolt = <950000>; 761 regulator-ramp-delay = <12500>; 762 763 regulator-state-mem { 764 regulator-off-in-suspend; 765 }; 766 }; 767 768 vdd_ddr_s0: dcdc-reg5 { 769 regulator-name = "vdd_ddr_s0"; 770 regulator-always-on; 771 regulator-boot-on; 772 regulator-min-microvolt = <675000>; 773 regulator-max-microvolt = <900000>; 774 regulator-ramp-delay = <12500>; 775 776 regulator-state-mem { 777 regulator-off-in-suspend; 778 regulator-suspend-microvolt = <850000>; 779 }; 780 }; 781 782 vdd2_ddr_s3: dcdc-reg6 { 783 regulator-name = "vdd2_ddr_s3"; 784 regulator-always-on; 785 regulator-boot-on; 786 787 regulator-state-mem { 788 regulator-on-in-suspend; 789 }; 790 }; 791 792 vcc_2v0_pldo_s3: dcdc-reg7 { 793 regulator-name = "vdd_2v0_pldo_s3"; 794 regulator-always-on; 795 regulator-boot-on; 796 regulator-min-microvolt = <2000000>; 797 regulator-max-microvolt = <2000000>; 798 regulator-ramp-delay = <12500>; 799 800 regulator-state-mem { 801 regulator-on-in-suspend; 802 regulator-suspend-microvolt = <2000000>; 803 }; 804 }; 805 806 vcc_3v3_s3: dcdc-reg8 { 807 regulator-name = "vcc_3v3_s3"; 808 regulator-always-on; 809 regulator-boot-on; 810 regulator-min-microvolt = <3300000>; 811 regulator-max-microvolt = <3300000>; 812 813 regulator-state-mem { 814 regulator-on-in-suspend; 815 regulator-suspend-microvolt = <3300000>; 816 }; 817 }; 818 819 vddq_ddr_s0: dcdc-reg9 { 820 regulator-name = "vddq_ddr_s0"; 821 regulator-always-on; 822 regulator-boot-on; 823 824 regulator-state-mem { 825 regulator-off-in-suspend; 826 }; 827 }; 828 829 vcc_1v8_s3: dcdc-reg10 { 830 regulator-name = "vcc_1v8_s3"; 831 regulator-always-on; 832 regulator-boot-on; 833 regulator-min-microvolt = <1800000>; 834 regulator-max-microvolt = <1800000>; 835 836 regulator-state-mem { 837 regulator-on-in-suspend; 838 regulator-suspend-microvolt = <1800000>; 839 }; 840 }; 841 842 vcca_1v8_s0: pldo-reg1 { 843 regulator-name = "vcca_1v8_s0"; 844 regulator-always-on; 845 regulator-boot-on; 846 regulator-min-microvolt = <1800000>; 847 regulator-max-microvolt = <1800000>; 848 849 regulator-state-mem { 850 regulator-off-in-suspend; 851 }; 852 }; 853 854 vcc_1v8_s0: pldo-reg2 { 855 regulator-name = "vcc_1v8_s0"; 856 regulator-always-on; 857 regulator-boot-on; 858 regulator-min-microvolt = <1800000>; 859 regulator-max-microvolt = <1800000>; 860 861 regulator-state-mem { 862 regulator-off-in-suspend; 863 regulator-suspend-microvolt = <1800000>; 864 }; 865 }; 866 867 vdda_1v2_s0: pldo-reg3 { 868 regulator-name = "vdda_1v2_s0"; 869 regulator-always-on; 870 regulator-boot-on; 871 regulator-min-microvolt = <1200000>; 872 regulator-max-microvolt = <1200000>; 873 874 regulator-state-mem { 875 regulator-off-in-suspend; 876 }; 877 }; 878 879 vcca_3v3_s0: pldo-reg4 { 880 regulator-name = "vcca_3v3_s0"; 881 regulator-always-on; 882 regulator-boot-on; 883 regulator-min-microvolt = <3300000>; 884 regulator-max-microvolt = <3300000>; 885 regulator-ramp-delay = <12500>; 886 887 regulator-state-mem { 888 regulator-off-in-suspend; 889 }; 890 }; 891 892 vccio_sd_s0: pldo-reg5 { 893 regulator-name = "vccio_sd_s0"; 894 regulator-always-on; 895 regulator-boot-on; 896 regulator-min-microvolt = <1800000>; 897 regulator-max-microvolt = <3300000>; 898 regulator-ramp-delay = <12500>; 899 900 regulator-state-mem { 901 regulator-off-in-suspend; 902 }; 903 }; 904 905 pldo6_s3: pldo-reg6 { 906 regulator-name = "pldo6_s3"; 907 regulator-always-on; 908 regulator-boot-on; 909 regulator-min-microvolt = <1800000>; 910 regulator-max-microvolt = <1800000>; 911 912 regulator-state-mem { 913 regulator-on-in-suspend; 914 regulator-suspend-microvolt = <1800000>; 915 }; 916 }; 917 918 vdd_0v75_s3: nldo-reg1 { 919 regulator-name = "vdd_0v75_s3"; 920 regulator-always-on; 921 regulator-boot-on; 922 regulator-min-microvolt = <750000>; 923 regulator-max-microvolt = <750000>; 924 925 regulator-state-mem { 926 regulator-on-in-suspend; 927 regulator-suspend-microvolt = <750000>; 928 }; 929 }; 930 931 vdda_ddr_pll_s0: nldo-reg2 { 932 regulator-name = "vdda_ddr_pll_s0"; 933 regulator-always-on; 934 regulator-boot-on; 935 regulator-min-microvolt = <850000>; 936 regulator-max-microvolt = <850000>; 937 938 regulator-state-mem { 939 regulator-off-in-suspend; 940 regulator-suspend-microvolt = <850000>; 941 }; 942 }; 943 944 vdda_0v75_s0: nldo-reg3 { 945 regulator-name = "vdda_0v75_s0"; 946 regulator-always-on; 947 regulator-boot-on; 948 regulator-min-microvolt = <750000>; 949 regulator-max-microvolt = <750000>; 950 951 regulator-state-mem { 952 regulator-off-in-suspend; 953 }; 954 }; 955 956 vdda_0v85_s0: nldo-reg4 { 957 regulator-name = "vdda_0v85_s0"; 958 regulator-always-on; 959 regulator-boot-on; 960 regulator-min-microvolt = <850000>; 961 regulator-max-microvolt = <850000>; 962 963 regulator-state-mem { 964 regulator-off-in-suspend; 965 }; 966 }; 967 968 vdd_0v75_s0: nldo-reg5 { 969 regulator-name = "vdd_0v75_s0"; 970 regulator-always-on; 971 regulator-boot-on; 972 regulator-min-microvolt = <750000>; 973 regulator-max-microvolt = <750000>; 974 975 regulator-state-mem { 976 regulator-off-in-suspend; 977 }; 978 }; 979 }; 980 }; 981}; 982 983&tsadc { 984 status = "okay"; 985}; 986 987/* USB-C P11 connector */ 988&u2phy0 { 989 status = "okay"; 990}; 991 992&u2phy0_otg { 993 status = "okay"; 994}; 995 996/* USB-C P12 connector */ 997&u2phy1 { 998 status = "okay"; 999}; 1000 1001&u2phy1_otg { 1002 status = "okay"; 1003}; 1004 1005&u2phy2 { 1006 status = "okay"; 1007}; 1008 1009&u2phy2_host { 1010 phy-supply = <&vcc_5v0_usb_a>; 1011 status = "okay"; 1012}; 1013 1014&u2phy3 { 1015 status = "okay"; 1016}; 1017 1018&u2phy3_host { 1019 status = "okay"; 1020}; 1021 1022/* Mule-ATtiny debug UART; typically baudrate 9600 */ 1023&uart0 { 1024 pinctrl-0 = <&uart0m0_xfer>; 1025 status = "okay"; 1026}; 1027 1028/* Main debug interface on P20 micro-USB B port and P21 header */ 1029&uart2 { 1030 pinctrl-0 = <&uart2m0_xfer>; 1031 status = "okay"; 1032}; 1033 1034/* RS485 on P19 */ 1035&uart3 { 1036 pinctrl-0 = <&uart3m2_xfer &uart3_rtsn>; 1037 linux,rs485-enabled-at-boot-time; 1038 status = "okay"; 1039}; 1040 1041/* Mule-ATtiny UPDI flashing UART */ 1042&uart7 { 1043 pinctrl-0 = <&uart7m0_xfer>; 1044 status = "okay"; 1045}; 1046 1047/* Type-C on P11 */ 1048&usbdp_phy0 { 1049 orientation-switch; 1050 pinctrl-names = "default"; 1051 pinctrl-0 = <&typec0_sbu_dc_pins>; 1052 sbu1-dc-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* Q7_USB_C0_SBU1_DC */ 1053 sbu2-dc-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; /* Q7_USB_C0_SBU2_DC */ 1054 status = "okay"; 1055 1056 port { 1057 #address-cells = <1>; 1058 #size-cells = <0>; 1059 1060 usbdp_phy0_typec_ss: endpoint@0 { 1061 reg = <0>; 1062 remote-endpoint = <&usbc0_ss>; 1063 }; 1064 1065 usbdp_phy0_typec_sbu: endpoint@1 { 1066 reg = <1>; 1067 remote-endpoint = <&usbc0_sbu>; 1068 }; 1069 }; 1070}; 1071 1072/* Type-C on P12 */ 1073&usbdp_phy1 { 1074 orientation-switch; 1075 pinctrl-names = "default"; 1076 pinctrl-0 = <&typec1_sbu_dc_pins>; 1077 sbu1-dc-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; /* Q7_USB_C1_SBU1_DC */ 1078 sbu2-dc-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; /* Q7_USB_C1_SBU2_DC */ 1079 status = "okay"; 1080 1081 port { 1082 #address-cells = <1>; 1083 #size-cells = <0>; 1084 1085 usbdp_phy1_typec_ss: endpoint@0 { 1086 reg = <0>; 1087 remote-endpoint = <&usbc1_ss>; 1088 }; 1089 1090 usbdp_phy1_typec_sbu: endpoint@1 { 1091 reg = <1>; 1092 remote-endpoint = <&usbc1_sbu>; 1093 }; 1094 }; 1095}; 1096 1097/* host0 on P10 USB-A */ 1098&usb_host0_ehci { 1099 status = "okay"; 1100}; 1101 1102/* host0 on P10 USB-A */ 1103&usb_host0_ohci { 1104 status = "okay"; 1105}; 1106 1107/* host0 on P11 USB-C */ 1108&usb_host0_xhci { 1109 usb-role-switch; 1110 status = "okay"; 1111 1112 port { 1113 #address-cells = <1>; 1114 #size-cells = <0>; 1115 1116 usb_host0_xhci_drd_sw: endpoint { 1117 remote-endpoint = <&usbc0_hs>; 1118 }; 1119 }; 1120}; 1121 1122/* host1 on P12 USB-C */ 1123&usb_host1_xhci { 1124 usb-role-switch; 1125 status = "okay"; 1126 1127 port { 1128 #address-cells = <1>; 1129 #size-cells = <0>; 1130 1131 usb_host1_xhci_drd_sw: endpoint { 1132 remote-endpoint = <&usbc1_hs>; 1133 }; 1134 }; 1135}; 1136 1137/* host1 on M.2 E-key */ 1138&usb_host1_ehci { 1139 status = "okay"; 1140}; 1141 1142/* host1 on M.2 E-key */ 1143&usb_host1_ohci { 1144 status = "okay"; 1145}; 1146 1147&vop { 1148 status = "okay"; 1149}; 1150 1151&vop_mmu { 1152 status = "okay"; 1153}; 1154 1155&vp0 { 1156 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 1157 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 1158 remote-endpoint = <&hdmi0_in_vp0>; 1159 }; 1160}; 1161