1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car H3 (R8A77951) SoC 4 * 5 * Copyright (C) 2015 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7795-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7795-sysc.h> 11 12#define SOC_HAS_HDMI1 13#define SOC_HAS_SATA 14#define SOC_HAS_USB2_CH2 15#define SOC_HAS_USB2_CH3 16 17/ { 18 compatible = "renesas,r8a7795"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 interrupt-parent = <&gic>; 22 23 /* 24 * The external audio clocks are configured as 0 Hz fixed frequency 25 * clocks by default. 26 * Boards that provide audio clocks should override them. 27 */ 28 audio_clk_a: audio_clk_a { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_b: audio_clk_b { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 audio_clk_c: audio_clk_c { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 46 /* External CAN clock - to be overridden by boards that provide it */ 47 can_clk: can { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 cluster0_opp: opp-table-0 { 54 compatible = "operating-points-v2"; 55 opp-shared; 56 57 opp-500000000 { 58 opp-hz = /bits/ 64 <500000000>; 59 opp-microvolt = <830000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1000000000 { 63 opp-hz = /bits/ 64 <1000000000>; 64 opp-microvolt = <830000>; 65 clock-latency-ns = <300000>; 66 }; 67 opp-1500000000 { 68 opp-hz = /bits/ 64 <1500000000>; 69 opp-microvolt = <830000>; 70 clock-latency-ns = <300000>; 71 opp-suspend; 72 }; 73 opp-1600000000 { 74 opp-hz = /bits/ 64 <1600000000>; 75 opp-microvolt = <900000>; 76 clock-latency-ns = <300000>; 77 }; 78 opp-1700000000 { 79 opp-hz = /bits/ 64 <1700000000>; 80 opp-microvolt = <960000>; 81 clock-latency-ns = <300000>; 82 turbo-mode; 83 }; 84 }; 85 86 cluster1_opp: opp-table-1 { 87 compatible = "operating-points-v2"; 88 opp-shared; 89 90 opp-800000000 { 91 opp-hz = /bits/ 64 <800000000>; 92 opp-microvolt = <820000>; 93 clock-latency-ns = <300000>; 94 }; 95 opp-1000000000 { 96 opp-hz = /bits/ 64 <1000000000>; 97 opp-microvolt = <820000>; 98 clock-latency-ns = <300000>; 99 }; 100 opp-1200000000 { 101 opp-hz = /bits/ 64 <1200000000>; 102 opp-microvolt = <820000>; 103 clock-latency-ns = <300000>; 104 }; 105 }; 106 107 cpus { 108 #address-cells = <1>; 109 #size-cells = <0>; 110 111 cpu-map { 112 cluster0 { 113 core0 { 114 cpu = <&a57_0>; 115 }; 116 core1 { 117 cpu = <&a57_1>; 118 }; 119 core2 { 120 cpu = <&a57_2>; 121 }; 122 core3 { 123 cpu = <&a57_3>; 124 }; 125 }; 126 127 cluster1 { 128 core0 { 129 cpu = <&a53_0>; 130 }; 131 core1 { 132 cpu = <&a53_1>; 133 }; 134 core2 { 135 cpu = <&a53_2>; 136 }; 137 core3 { 138 cpu = <&a53_3>; 139 }; 140 }; 141 }; 142 143 a57_0: cpu@0 { 144 compatible = "arm,cortex-a57"; 145 reg = <0x0>; 146 device_type = "cpu"; 147 power-domains = <&sysc R8A7795_PD_CA57_CPU0>; 148 next-level-cache = <&L2_CA57>; 149 enable-method = "psci"; 150 cpu-idle-states = <&CPU_SLEEP_0>; 151 dynamic-power-coefficient = <854>; 152 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 153 operating-points-v2 = <&cluster0_opp>; 154 capacity-dmips-mhz = <1024>; 155 #cooling-cells = <2>; 156 }; 157 158 a57_1: cpu@1 { 159 compatible = "arm,cortex-a57"; 160 reg = <0x1>; 161 device_type = "cpu"; 162 power-domains = <&sysc R8A7795_PD_CA57_CPU1>; 163 next-level-cache = <&L2_CA57>; 164 enable-method = "psci"; 165 cpu-idle-states = <&CPU_SLEEP_0>; 166 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 167 operating-points-v2 = <&cluster0_opp>; 168 capacity-dmips-mhz = <1024>; 169 #cooling-cells = <2>; 170 }; 171 172 a57_2: cpu@2 { 173 compatible = "arm,cortex-a57"; 174 reg = <0x2>; 175 device_type = "cpu"; 176 power-domains = <&sysc R8A7795_PD_CA57_CPU2>; 177 next-level-cache = <&L2_CA57>; 178 enable-method = "psci"; 179 cpu-idle-states = <&CPU_SLEEP_0>; 180 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 181 operating-points-v2 = <&cluster0_opp>; 182 capacity-dmips-mhz = <1024>; 183 #cooling-cells = <2>; 184 }; 185 186 a57_3: cpu@3 { 187 compatible = "arm,cortex-a57"; 188 reg = <0x3>; 189 device_type = "cpu"; 190 power-domains = <&sysc R8A7795_PD_CA57_CPU3>; 191 next-level-cache = <&L2_CA57>; 192 enable-method = "psci"; 193 cpu-idle-states = <&CPU_SLEEP_0>; 194 clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; 195 operating-points-v2 = <&cluster0_opp>; 196 capacity-dmips-mhz = <1024>; 197 #cooling-cells = <2>; 198 }; 199 200 a53_0: cpu@100 { 201 compatible = "arm,cortex-a53"; 202 reg = <0x100>; 203 device_type = "cpu"; 204 power-domains = <&sysc R8A7795_PD_CA53_CPU0>; 205 next-level-cache = <&L2_CA53>; 206 enable-method = "psci"; 207 cpu-idle-states = <&CPU_SLEEP_1>; 208 #cooling-cells = <2>; 209 dynamic-power-coefficient = <277>; 210 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 211 operating-points-v2 = <&cluster1_opp>; 212 capacity-dmips-mhz = <535>; 213 }; 214 215 a53_1: cpu@101 { 216 compatible = "arm,cortex-a53"; 217 reg = <0x101>; 218 device_type = "cpu"; 219 power-domains = <&sysc R8A7795_PD_CA53_CPU1>; 220 next-level-cache = <&L2_CA53>; 221 enable-method = "psci"; 222 cpu-idle-states = <&CPU_SLEEP_1>; 223 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 224 operating-points-v2 = <&cluster1_opp>; 225 capacity-dmips-mhz = <535>; 226 }; 227 228 a53_2: cpu@102 { 229 compatible = "arm,cortex-a53"; 230 reg = <0x102>; 231 device_type = "cpu"; 232 power-domains = <&sysc R8A7795_PD_CA53_CPU2>; 233 next-level-cache = <&L2_CA53>; 234 enable-method = "psci"; 235 cpu-idle-states = <&CPU_SLEEP_1>; 236 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 237 operating-points-v2 = <&cluster1_opp>; 238 capacity-dmips-mhz = <535>; 239 }; 240 241 a53_3: cpu@103 { 242 compatible = "arm,cortex-a53"; 243 reg = <0x103>; 244 device_type = "cpu"; 245 power-domains = <&sysc R8A7795_PD_CA53_CPU3>; 246 next-level-cache = <&L2_CA53>; 247 enable-method = "psci"; 248 cpu-idle-states = <&CPU_SLEEP_1>; 249 clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; 250 operating-points-v2 = <&cluster1_opp>; 251 capacity-dmips-mhz = <535>; 252 }; 253 254 L2_CA57: cache-controller-0 { 255 compatible = "cache"; 256 power-domains = <&sysc R8A7795_PD_CA57_SCU>; 257 cache-unified; 258 cache-level = <2>; 259 }; 260 261 L2_CA53: cache-controller-1 { 262 compatible = "cache"; 263 power-domains = <&sysc R8A7795_PD_CA53_SCU>; 264 cache-unified; 265 cache-level = <2>; 266 }; 267 268 idle-states { 269 entry-method = "psci"; 270 271 CPU_SLEEP_0: cpu-sleep-0 { 272 compatible = "arm,idle-state"; 273 arm,psci-suspend-param = <0x0010000>; 274 local-timer-stop; 275 entry-latency-us = <400>; 276 exit-latency-us = <500>; 277 min-residency-us = <4000>; 278 }; 279 280 CPU_SLEEP_1: cpu-sleep-1 { 281 compatible = "arm,idle-state"; 282 arm,psci-suspend-param = <0x0010000>; 283 local-timer-stop; 284 entry-latency-us = <700>; 285 exit-latency-us = <700>; 286 min-residency-us = <5000>; 287 }; 288 }; 289 }; 290 291 extal_clk: extal { 292 compatible = "fixed-clock"; 293 #clock-cells = <0>; 294 /* This value must be overridden by the board */ 295 clock-frequency = <0>; 296 bootph-all; 297 }; 298 299 extalr_clk: extalr { 300 compatible = "fixed-clock"; 301 #clock-cells = <0>; 302 /* This value must be overridden by the board */ 303 clock-frequency = <0>; 304 bootph-all; 305 }; 306 307 /* External PCIe clock - can be overridden by the board */ 308 pcie_bus_clk: pcie_bus { 309 compatible = "fixed-clock"; 310 #clock-cells = <0>; 311 clock-frequency = <0>; 312 }; 313 314 pmu_a53 { 315 compatible = "arm,cortex-a53-pmu"; 316 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 320 interrupt-affinity = <&a53_0>, 321 <&a53_1>, 322 <&a53_2>, 323 <&a53_3>; 324 }; 325 326 pmu_a57 { 327 compatible = "arm,cortex-a57-pmu"; 328 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 329 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 332 interrupt-affinity = <&a57_0>, 333 <&a57_1>, 334 <&a57_2>, 335 <&a57_3>; 336 }; 337 338 psci { 339 compatible = "arm,psci-1.0", "arm,psci-0.2"; 340 method = "smc"; 341 }; 342 343 /* External SCIF clock - to be overridden by boards that provide it */ 344 scif_clk: scif { 345 compatible = "fixed-clock"; 346 #clock-cells = <0>; 347 clock-frequency = <0>; 348 }; 349 350 soc: soc { 351 compatible = "simple-bus"; 352 bootph-all; 353 354 #address-cells = <2>; 355 #size-cells = <2>; 356 ranges; 357 358 rwdt: watchdog@e6020000 { 359 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; 360 reg = <0 0xe6020000 0 0x0c>; 361 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 362 clocks = <&cpg CPG_MOD 402>; 363 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 364 resets = <&cpg 402>; 365 status = "disabled"; 366 }; 367 368 swdt: watchdog@e6030000 { 369 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; 370 reg = <0 0xe6030000 0 0x0c>; 371 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 372 clocks = <&cpg CPG_CORE R8A7795_CLK_OSC>; 373 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 374 resets = <&cpg 401>; 375 status = "disabled"; 376 }; 377 378 gpio0: gpio@e6050000 { 379 compatible = "renesas,gpio-r8a7795", 380 "renesas,rcar-gen3-gpio"; 381 reg = <0 0xe6050000 0 0x50>; 382 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 383 #gpio-cells = <2>; 384 gpio-controller; 385 gpio-ranges = <&pfc 0 0 16>; 386 #interrupt-cells = <2>; 387 interrupt-controller; 388 clocks = <&cpg CPG_MOD 912>; 389 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 390 resets = <&cpg 912>; 391 }; 392 393 gpio1: gpio@e6051000 { 394 compatible = "renesas,gpio-r8a7795", 395 "renesas,rcar-gen3-gpio"; 396 reg = <0 0xe6051000 0 0x50>; 397 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 398 #gpio-cells = <2>; 399 gpio-controller; 400 gpio-ranges = <&pfc 0 32 29>; 401 #interrupt-cells = <2>; 402 interrupt-controller; 403 clocks = <&cpg CPG_MOD 911>; 404 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 405 resets = <&cpg 911>; 406 }; 407 408 gpio2: gpio@e6052000 { 409 compatible = "renesas,gpio-r8a7795", 410 "renesas,rcar-gen3-gpio"; 411 reg = <0 0xe6052000 0 0x50>; 412 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 413 #gpio-cells = <2>; 414 gpio-controller; 415 gpio-ranges = <&pfc 0 64 15>; 416 #interrupt-cells = <2>; 417 interrupt-controller; 418 clocks = <&cpg CPG_MOD 910>; 419 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 420 resets = <&cpg 910>; 421 }; 422 423 gpio3: gpio@e6053000 { 424 compatible = "renesas,gpio-r8a7795", 425 "renesas,rcar-gen3-gpio"; 426 reg = <0 0xe6053000 0 0x50>; 427 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 428 #gpio-cells = <2>; 429 gpio-controller; 430 gpio-ranges = <&pfc 0 96 16>; 431 #interrupt-cells = <2>; 432 interrupt-controller; 433 clocks = <&cpg CPG_MOD 909>; 434 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 435 resets = <&cpg 909>; 436 }; 437 438 gpio4: gpio@e6054000 { 439 compatible = "renesas,gpio-r8a7795", 440 "renesas,rcar-gen3-gpio"; 441 reg = <0 0xe6054000 0 0x50>; 442 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 443 #gpio-cells = <2>; 444 gpio-controller; 445 gpio-ranges = <&pfc 0 128 18>; 446 #interrupt-cells = <2>; 447 interrupt-controller; 448 clocks = <&cpg CPG_MOD 908>; 449 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 450 resets = <&cpg 908>; 451 }; 452 453 gpio5: gpio@e6055000 { 454 compatible = "renesas,gpio-r8a7795", 455 "renesas,rcar-gen3-gpio"; 456 reg = <0 0xe6055000 0 0x50>; 457 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 458 #gpio-cells = <2>; 459 gpio-controller; 460 gpio-ranges = <&pfc 0 160 26>; 461 #interrupt-cells = <2>; 462 interrupt-controller; 463 clocks = <&cpg CPG_MOD 907>; 464 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 465 resets = <&cpg 907>; 466 }; 467 468 gpio6: gpio@e6055400 { 469 compatible = "renesas,gpio-r8a7795", 470 "renesas,rcar-gen3-gpio"; 471 reg = <0 0xe6055400 0 0x50>; 472 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 473 #gpio-cells = <2>; 474 gpio-controller; 475 gpio-ranges = <&pfc 0 192 32>; 476 #interrupt-cells = <2>; 477 interrupt-controller; 478 clocks = <&cpg CPG_MOD 906>; 479 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 480 resets = <&cpg 906>; 481 }; 482 483 gpio7: gpio@e6055800 { 484 compatible = "renesas,gpio-r8a7795", 485 "renesas,rcar-gen3-gpio"; 486 reg = <0 0xe6055800 0 0x50>; 487 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 488 #gpio-cells = <2>; 489 gpio-controller; 490 gpio-ranges = <&pfc 0 224 4>; 491 #interrupt-cells = <2>; 492 interrupt-controller; 493 clocks = <&cpg CPG_MOD 905>; 494 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 495 resets = <&cpg 905>; 496 }; 497 498 pfc: pinctrl@e6060000 { 499 compatible = "renesas,pfc-r8a7795"; 500 reg = <0 0xe6060000 0 0x50c>; 501 bootph-all; 502 }; 503 504 cmt0: timer@e60f0000 { 505 compatible = "renesas,r8a7795-cmt0", 506 "renesas,rcar-gen3-cmt0"; 507 reg = <0 0xe60f0000 0 0x1004>; 508 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 509 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 510 clocks = <&cpg CPG_MOD 303>; 511 clock-names = "fck"; 512 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 513 resets = <&cpg 303>; 514 status = "disabled"; 515 }; 516 517 cmt1: timer@e6130000 { 518 compatible = "renesas,r8a7795-cmt1", 519 "renesas,rcar-gen3-cmt1"; 520 reg = <0 0xe6130000 0 0x1004>; 521 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 522 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 523 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 524 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 525 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 526 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 527 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 528 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 529 clocks = <&cpg CPG_MOD 302>; 530 clock-names = "fck"; 531 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 532 resets = <&cpg 302>; 533 status = "disabled"; 534 }; 535 536 cmt2: timer@e6140000 { 537 compatible = "renesas,r8a7795-cmt1", 538 "renesas,rcar-gen3-cmt1"; 539 reg = <0 0xe6140000 0 0x1004>; 540 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 541 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 542 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 543 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 544 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 545 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 546 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 547 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 548 clocks = <&cpg CPG_MOD 301>; 549 clock-names = "fck"; 550 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 551 resets = <&cpg 301>; 552 status = "disabled"; 553 }; 554 555 cmt3: timer@e6148000 { 556 compatible = "renesas,r8a7795-cmt1", 557 "renesas,rcar-gen3-cmt1"; 558 reg = <0 0xe6148000 0 0x1004>; 559 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 560 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 561 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 562 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 563 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 564 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 565 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 566 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 300>; 568 clock-names = "fck"; 569 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 570 resets = <&cpg 300>; 571 status = "disabled"; 572 }; 573 574 cpg: clock-controller@e6150000 { 575 compatible = "renesas,r8a7795-cpg-mssr"; 576 reg = <0 0xe6150000 0 0x1000>; 577 clocks = <&extal_clk>, <&extalr_clk>; 578 clock-names = "extal", "extalr"; 579 #clock-cells = <2>; 580 #power-domain-cells = <0>; 581 #reset-cells = <1>; 582 bootph-all; 583 }; 584 585 rst: reset-controller@e6160000 { 586 compatible = "renesas,r8a7795-rst"; 587 reg = <0 0xe6160000 0 0x0200>; 588 bootph-all; 589 }; 590 591 sysc: system-controller@e6180000 { 592 compatible = "renesas,r8a7795-sysc"; 593 reg = <0 0xe6180000 0 0x0400>; 594 #power-domain-cells = <1>; 595 }; 596 597 tsc: thermal@e6198000 { 598 compatible = "renesas,r8a7795-thermal"; 599 reg = <0 0xe6198000 0 0x100>, 600 <0 0xe61a0000 0 0x100>, 601 <0 0xe61a8000 0 0x100>; 602 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 603 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 604 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 605 clocks = <&cpg CPG_MOD 522>; 606 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 607 resets = <&cpg 522>; 608 #thermal-sensor-cells = <1>; 609 }; 610 611 intc_ex: interrupt-controller@e61c0000 { 612 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc"; 613 #interrupt-cells = <2>; 614 interrupt-controller; 615 reg = <0 0xe61c0000 0 0x200>; 616 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 618 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 620 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 622 clocks = <&cpg CPG_MOD 407>; 623 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 624 resets = <&cpg 407>; 625 }; 626 627 tmu0: timer@e61e0000 { 628 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 629 reg = <0 0xe61e0000 0 0x30>; 630 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 632 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 633 interrupt-names = "tuni0", "tuni1", "tuni2"; 634 clocks = <&cpg CPG_MOD 125>; 635 clock-names = "fck"; 636 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 637 resets = <&cpg 125>; 638 status = "disabled"; 639 }; 640 641 tmu1: timer@e6fc0000 { 642 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 643 reg = <0 0xe6fc0000 0 0x30>; 644 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 646 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 647 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 648 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 649 clocks = <&cpg CPG_MOD 124>; 650 clock-names = "fck"; 651 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 652 resets = <&cpg 124>; 653 status = "disabled"; 654 }; 655 656 tmu2: timer@e6fd0000 { 657 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 658 reg = <0 0xe6fd0000 0 0x30>; 659 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 660 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 661 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 662 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 663 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 664 clocks = <&cpg CPG_MOD 123>; 665 clock-names = "fck"; 666 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 667 resets = <&cpg 123>; 668 status = "disabled"; 669 }; 670 671 tmu3: timer@e6fe0000 { 672 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 673 reg = <0 0xe6fe0000 0 0x30>; 674 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 677 interrupt-names = "tuni0", "tuni1", "tuni2"; 678 clocks = <&cpg CPG_MOD 122>; 679 clock-names = "fck"; 680 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 681 resets = <&cpg 122>; 682 status = "disabled"; 683 }; 684 685 tmu4: timer@ffc00000 { 686 compatible = "renesas,tmu-r8a7795", "renesas,tmu"; 687 reg = <0 0xffc00000 0 0x30>; 688 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 689 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 690 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 691 interrupt-names = "tuni0", "tuni1", "tuni2"; 692 clocks = <&cpg CPG_MOD 121>; 693 clock-names = "fck"; 694 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 695 resets = <&cpg 121>; 696 status = "disabled"; 697 }; 698 699 i2c0: i2c@e6500000 { 700 #address-cells = <1>; 701 #size-cells = <0>; 702 compatible = "renesas,i2c-r8a7795", 703 "renesas,rcar-gen3-i2c"; 704 reg = <0 0xe6500000 0 0x40>; 705 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 706 clocks = <&cpg CPG_MOD 931>; 707 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 708 resets = <&cpg 931>; 709 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 710 <&dmac2 0x91>, <&dmac2 0x90>; 711 dma-names = "tx", "rx", "tx", "rx"; 712 i2c-scl-internal-delay-ns = <110>; 713 status = "disabled"; 714 }; 715 716 i2c1: i2c@e6508000 { 717 #address-cells = <1>; 718 #size-cells = <0>; 719 compatible = "renesas,i2c-r8a7795", 720 "renesas,rcar-gen3-i2c"; 721 reg = <0 0xe6508000 0 0x40>; 722 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 723 clocks = <&cpg CPG_MOD 930>; 724 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 725 resets = <&cpg 930>; 726 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 727 <&dmac2 0x93>, <&dmac2 0x92>; 728 dma-names = "tx", "rx", "tx", "rx"; 729 i2c-scl-internal-delay-ns = <6>; 730 status = "disabled"; 731 }; 732 733 i2c2: i2c@e6510000 { 734 #address-cells = <1>; 735 #size-cells = <0>; 736 compatible = "renesas,i2c-r8a7795", 737 "renesas,rcar-gen3-i2c"; 738 reg = <0 0xe6510000 0 0x40>; 739 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 740 clocks = <&cpg CPG_MOD 929>; 741 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 742 resets = <&cpg 929>; 743 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 744 <&dmac2 0x95>, <&dmac2 0x94>; 745 dma-names = "tx", "rx", "tx", "rx"; 746 i2c-scl-internal-delay-ns = <6>; 747 status = "disabled"; 748 }; 749 750 i2c3: i2c@e66d0000 { 751 #address-cells = <1>; 752 #size-cells = <0>; 753 compatible = "renesas,i2c-r8a7795", 754 "renesas,rcar-gen3-i2c"; 755 reg = <0 0xe66d0000 0 0x40>; 756 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 757 clocks = <&cpg CPG_MOD 928>; 758 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 759 resets = <&cpg 928>; 760 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 761 dma-names = "tx", "rx"; 762 i2c-scl-internal-delay-ns = <110>; 763 status = "disabled"; 764 }; 765 766 i2c4: i2c@e66d8000 { 767 #address-cells = <1>; 768 #size-cells = <0>; 769 compatible = "renesas,i2c-r8a7795", 770 "renesas,rcar-gen3-i2c"; 771 reg = <0 0xe66d8000 0 0x40>; 772 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 773 clocks = <&cpg CPG_MOD 927>; 774 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 775 resets = <&cpg 927>; 776 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 777 dma-names = "tx", "rx"; 778 i2c-scl-internal-delay-ns = <110>; 779 status = "disabled"; 780 }; 781 782 i2c5: i2c@e66e0000 { 783 #address-cells = <1>; 784 #size-cells = <0>; 785 compatible = "renesas,i2c-r8a7795", 786 "renesas,rcar-gen3-i2c"; 787 reg = <0 0xe66e0000 0 0x40>; 788 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 789 clocks = <&cpg CPG_MOD 919>; 790 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 791 resets = <&cpg 919>; 792 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 793 dma-names = "tx", "rx"; 794 i2c-scl-internal-delay-ns = <110>; 795 status = "disabled"; 796 }; 797 798 i2c6: i2c@e66e8000 { 799 #address-cells = <1>; 800 #size-cells = <0>; 801 compatible = "renesas,i2c-r8a7795", 802 "renesas,rcar-gen3-i2c"; 803 reg = <0 0xe66e8000 0 0x40>; 804 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 805 clocks = <&cpg CPG_MOD 918>; 806 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 807 resets = <&cpg 918>; 808 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 809 dma-names = "tx", "rx"; 810 i2c-scl-internal-delay-ns = <6>; 811 status = "disabled"; 812 }; 813 814 i2c_dvfs: i2c@e60b0000 { 815 #address-cells = <1>; 816 #size-cells = <0>; 817 compatible = "renesas,iic-r8a7795", 818 "renesas,rcar-gen3-iic", 819 "renesas,rmobile-iic"; 820 reg = <0 0xe60b0000 0 0x425>; 821 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 822 clocks = <&cpg CPG_MOD 926>; 823 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 824 resets = <&cpg 926>; 825 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 826 dma-names = "tx", "rx"; 827 status = "disabled"; 828 }; 829 830 hscif0: serial@e6540000 { 831 compatible = "renesas,hscif-r8a7795", 832 "renesas,rcar-gen3-hscif", 833 "renesas,hscif"; 834 reg = <0 0xe6540000 0 96>; 835 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 836 clocks = <&cpg CPG_MOD 520>, 837 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 838 <&scif_clk>; 839 clock-names = "fck", "brg_int", "scif_clk"; 840 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 841 <&dmac2 0x31>, <&dmac2 0x30>; 842 dma-names = "tx", "rx", "tx", "rx"; 843 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 844 resets = <&cpg 520>; 845 status = "disabled"; 846 }; 847 848 hscif1: serial@e6550000 { 849 compatible = "renesas,hscif-r8a7795", 850 "renesas,rcar-gen3-hscif", 851 "renesas,hscif"; 852 reg = <0 0xe6550000 0 96>; 853 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 854 clocks = <&cpg CPG_MOD 519>, 855 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 856 <&scif_clk>; 857 clock-names = "fck", "brg_int", "scif_clk"; 858 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 859 <&dmac2 0x33>, <&dmac2 0x32>; 860 dma-names = "tx", "rx", "tx", "rx"; 861 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 862 resets = <&cpg 519>; 863 status = "disabled"; 864 }; 865 866 hscif2: serial@e6560000 { 867 compatible = "renesas,hscif-r8a7795", 868 "renesas,rcar-gen3-hscif", 869 "renesas,hscif"; 870 reg = <0 0xe6560000 0 96>; 871 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 872 clocks = <&cpg CPG_MOD 518>, 873 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 874 <&scif_clk>; 875 clock-names = "fck", "brg_int", "scif_clk"; 876 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 877 <&dmac2 0x35>, <&dmac2 0x34>; 878 dma-names = "tx", "rx", "tx", "rx"; 879 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 880 resets = <&cpg 518>; 881 status = "disabled"; 882 }; 883 884 hscif3: serial@e66a0000 { 885 compatible = "renesas,hscif-r8a7795", 886 "renesas,rcar-gen3-hscif", 887 "renesas,hscif"; 888 reg = <0 0xe66a0000 0 96>; 889 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 890 clocks = <&cpg CPG_MOD 517>, 891 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 892 <&scif_clk>; 893 clock-names = "fck", "brg_int", "scif_clk"; 894 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 895 dma-names = "tx", "rx"; 896 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 897 resets = <&cpg 517>; 898 status = "disabled"; 899 }; 900 901 hscif4: serial@e66b0000 { 902 compatible = "renesas,hscif-r8a7795", 903 "renesas,rcar-gen3-hscif", 904 "renesas,hscif"; 905 reg = <0 0xe66b0000 0 96>; 906 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 907 clocks = <&cpg CPG_MOD 516>, 908 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 909 <&scif_clk>; 910 clock-names = "fck", "brg_int", "scif_clk"; 911 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 912 dma-names = "tx", "rx"; 913 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 914 resets = <&cpg 516>; 915 status = "disabled"; 916 }; 917 918 hsusb: usb@e6590000 { 919 compatible = "renesas,usbhs-r8a7795", 920 "renesas,rcar-gen3-usbhs"; 921 reg = <0 0xe6590000 0 0x200>; 922 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 923 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 924 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 925 <&usb_dmac1 0>, <&usb_dmac1 1>; 926 dma-names = "ch0", "ch1", "ch2", "ch3"; 927 renesas,buswait = <11>; 928 phys = <&usb2_phy0 3>; 929 phy-names = "usb"; 930 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 931 resets = <&cpg 704>, <&cpg 703>; 932 status = "disabled"; 933 }; 934 935 hsusb3: usb@e659c000 { 936 compatible = "renesas,usbhs-r8a7795", 937 "renesas,rcar-gen3-usbhs"; 938 reg = <0 0xe659c000 0 0x200>; 939 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 940 clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>; 941 dmas = <&usb_dmac2 0>, <&usb_dmac2 1>, 942 <&usb_dmac3 0>, <&usb_dmac3 1>; 943 dma-names = "ch0", "ch1", "ch2", "ch3"; 944 renesas,buswait = <11>; 945 phys = <&usb2_phy3 3>; 946 phy-names = "usb"; 947 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 948 resets = <&cpg 705>, <&cpg 700>; 949 status = "disabled"; 950 }; 951 952 usb_dmac0: dma-controller@e65a0000 { 953 compatible = "renesas,r8a7795-usb-dmac", 954 "renesas,usb-dmac"; 955 reg = <0 0xe65a0000 0 0x100>; 956 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 958 interrupt-names = "ch0", "ch1"; 959 clocks = <&cpg CPG_MOD 330>; 960 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 961 resets = <&cpg 330>; 962 #dma-cells = <1>; 963 dma-channels = <2>; 964 }; 965 966 usb_dmac1: dma-controller@e65b0000 { 967 compatible = "renesas,r8a7795-usb-dmac", 968 "renesas,usb-dmac"; 969 reg = <0 0xe65b0000 0 0x100>; 970 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 972 interrupt-names = "ch0", "ch1"; 973 clocks = <&cpg CPG_MOD 331>; 974 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 975 resets = <&cpg 331>; 976 #dma-cells = <1>; 977 dma-channels = <2>; 978 }; 979 980 usb_dmac2: dma-controller@e6460000 { 981 compatible = "renesas,r8a7795-usb-dmac", 982 "renesas,usb-dmac"; 983 reg = <0 0xe6460000 0 0x100>; 984 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 986 interrupt-names = "ch0", "ch1"; 987 clocks = <&cpg CPG_MOD 326>; 988 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 989 resets = <&cpg 326>; 990 #dma-cells = <1>; 991 dma-channels = <2>; 992 }; 993 994 usb_dmac3: dma-controller@e6470000 { 995 compatible = "renesas,r8a7795-usb-dmac", 996 "renesas,usb-dmac"; 997 reg = <0 0xe6470000 0 0x100>; 998 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 1000 interrupt-names = "ch0", "ch1"; 1001 clocks = <&cpg CPG_MOD 329>; 1002 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1003 resets = <&cpg 329>; 1004 #dma-cells = <1>; 1005 dma-channels = <2>; 1006 }; 1007 1008 usb3_phy0: usb-phy@e65ee000 { 1009 compatible = "renesas,r8a7795-usb3-phy", 1010 "renesas,rcar-gen3-usb3-phy"; 1011 reg = <0 0xe65ee000 0 0x90>; 1012 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 1013 <&usb_extal_clk>; 1014 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 1015 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1016 resets = <&cpg 328>; 1017 #phy-cells = <0>; 1018 status = "disabled"; 1019 }; 1020 1021 arm_cc630p: crypto@e6601000 { 1022 compatible = "arm,cryptocell-630p-ree"; 1023 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 1024 reg = <0x0 0xe6601000 0 0x1000>; 1025 clocks = <&cpg CPG_MOD 229>; 1026 resets = <&cpg 229>; 1027 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1028 }; 1029 1030 dmac0: dma-controller@e6700000 { 1031 compatible = "renesas,dmac-r8a7795", 1032 "renesas,rcar-dmac"; 1033 reg = <0 0xe6700000 0 0x10000>; 1034 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 1045 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 1046 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 1047 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 1048 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 1049 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 1050 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 1051 interrupt-names = "error", 1052 "ch0", "ch1", "ch2", "ch3", 1053 "ch4", "ch5", "ch6", "ch7", 1054 "ch8", "ch9", "ch10", "ch11", 1055 "ch12", "ch13", "ch14", "ch15"; 1056 clocks = <&cpg CPG_MOD 219>; 1057 clock-names = "fck"; 1058 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1059 resets = <&cpg 219>; 1060 #dma-cells = <1>; 1061 dma-channels = <16>; 1062 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 1063 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 1064 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 1065 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 1066 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 1067 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 1068 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 1069 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 1070 }; 1071 1072 dmac1: dma-controller@e7300000 { 1073 compatible = "renesas,dmac-r8a7795", 1074 "renesas,rcar-dmac"; 1075 reg = <0 0xe7300000 0 0x10000>; 1076 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 1077 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 1078 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 1079 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 1080 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 1081 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 1082 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 1083 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 1084 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 1085 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 1086 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 1087 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 1088 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1089 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1090 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1091 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1092 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1093 interrupt-names = "error", 1094 "ch0", "ch1", "ch2", "ch3", 1095 "ch4", "ch5", "ch6", "ch7", 1096 "ch8", "ch9", "ch10", "ch11", 1097 "ch12", "ch13", "ch14", "ch15"; 1098 clocks = <&cpg CPG_MOD 218>; 1099 clock-names = "fck"; 1100 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1101 resets = <&cpg 218>; 1102 #dma-cells = <1>; 1103 dma-channels = <16>; 1104 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1105 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1106 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1107 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1108 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1109 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1110 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1111 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1112 }; 1113 1114 dmac2: dma-controller@e7310000 { 1115 compatible = "renesas,dmac-r8a7795", 1116 "renesas,rcar-dmac"; 1117 reg = <0 0xe7310000 0 0x10000>; 1118 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1119 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1120 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1121 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1122 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1123 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1124 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1125 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1126 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1127 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1128 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1129 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1130 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1131 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1132 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1133 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1134 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1135 interrupt-names = "error", 1136 "ch0", "ch1", "ch2", "ch3", 1137 "ch4", "ch5", "ch6", "ch7", 1138 "ch8", "ch9", "ch10", "ch11", 1139 "ch12", "ch13", "ch14", "ch15"; 1140 clocks = <&cpg CPG_MOD 217>; 1141 clock-names = "fck"; 1142 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1143 resets = <&cpg 217>; 1144 #dma-cells = <1>; 1145 dma-channels = <16>; 1146 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1147 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1148 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1149 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1150 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1151 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1152 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1153 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1154 }; 1155 1156 ipmmu_ds0: iommu@e6740000 { 1157 compatible = "renesas,ipmmu-r8a7795"; 1158 reg = <0 0xe6740000 0 0x1000>; 1159 renesas,ipmmu-main = <&ipmmu_mm 0>; 1160 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1161 #iommu-cells = <1>; 1162 }; 1163 1164 ipmmu_ds1: iommu@e7740000 { 1165 compatible = "renesas,ipmmu-r8a7795"; 1166 reg = <0 0xe7740000 0 0x1000>; 1167 renesas,ipmmu-main = <&ipmmu_mm 1>; 1168 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1169 #iommu-cells = <1>; 1170 }; 1171 1172 ipmmu_hc: iommu@e6570000 { 1173 compatible = "renesas,ipmmu-r8a7795"; 1174 reg = <0 0xe6570000 0 0x1000>; 1175 renesas,ipmmu-main = <&ipmmu_mm 2>; 1176 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1177 #iommu-cells = <1>; 1178 }; 1179 1180 ipmmu_ir: iommu@ff8b0000 { 1181 compatible = "renesas,ipmmu-r8a7795"; 1182 reg = <0 0xff8b0000 0 0x1000>; 1183 renesas,ipmmu-main = <&ipmmu_mm 3>; 1184 power-domains = <&sysc R8A7795_PD_A3IR>; 1185 #iommu-cells = <1>; 1186 }; 1187 1188 ipmmu_mm: iommu@e67b0000 { 1189 compatible = "renesas,ipmmu-r8a7795"; 1190 reg = <0 0xe67b0000 0 0x1000>; 1191 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1192 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1193 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1194 #iommu-cells = <1>; 1195 }; 1196 1197 ipmmu_mp0: iommu@ec670000 { 1198 compatible = "renesas,ipmmu-r8a7795"; 1199 reg = <0 0xec670000 0 0x1000>; 1200 renesas,ipmmu-main = <&ipmmu_mm 4>; 1201 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1202 #iommu-cells = <1>; 1203 }; 1204 1205 ipmmu_pv0: iommu@fd800000 { 1206 compatible = "renesas,ipmmu-r8a7795"; 1207 reg = <0 0xfd800000 0 0x1000>; 1208 renesas,ipmmu-main = <&ipmmu_mm 6>; 1209 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1210 #iommu-cells = <1>; 1211 }; 1212 1213 ipmmu_pv1: iommu@fd950000 { 1214 compatible = "renesas,ipmmu-r8a7795"; 1215 reg = <0 0xfd950000 0 0x1000>; 1216 renesas,ipmmu-main = <&ipmmu_mm 7>; 1217 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1218 #iommu-cells = <1>; 1219 }; 1220 1221 ipmmu_pv2: iommu@fd960000 { 1222 compatible = "renesas,ipmmu-r8a7795"; 1223 reg = <0 0xfd960000 0 0x1000>; 1224 renesas,ipmmu-main = <&ipmmu_mm 8>; 1225 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1226 #iommu-cells = <1>; 1227 }; 1228 1229 ipmmu_pv3: iommu@fd970000 { 1230 compatible = "renesas,ipmmu-r8a7795"; 1231 reg = <0 0xfd970000 0 0x1000>; 1232 renesas,ipmmu-main = <&ipmmu_mm 9>; 1233 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1234 #iommu-cells = <1>; 1235 }; 1236 1237 ipmmu_rt: iommu@ffc80000 { 1238 compatible = "renesas,ipmmu-r8a7795"; 1239 reg = <0 0xffc80000 0 0x1000>; 1240 renesas,ipmmu-main = <&ipmmu_mm 10>; 1241 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1242 #iommu-cells = <1>; 1243 }; 1244 1245 ipmmu_vc0: iommu@fe6b0000 { 1246 compatible = "renesas,ipmmu-r8a7795"; 1247 reg = <0 0xfe6b0000 0 0x1000>; 1248 renesas,ipmmu-main = <&ipmmu_mm 12>; 1249 power-domains = <&sysc R8A7795_PD_A3VC>; 1250 #iommu-cells = <1>; 1251 }; 1252 1253 ipmmu_vc1: iommu@fe6f0000 { 1254 compatible = "renesas,ipmmu-r8a7795"; 1255 reg = <0 0xfe6f0000 0 0x1000>; 1256 renesas,ipmmu-main = <&ipmmu_mm 13>; 1257 power-domains = <&sysc R8A7795_PD_A3VC>; 1258 #iommu-cells = <1>; 1259 }; 1260 1261 ipmmu_vi0: iommu@febd0000 { 1262 compatible = "renesas,ipmmu-r8a7795"; 1263 reg = <0 0xfebd0000 0 0x1000>; 1264 renesas,ipmmu-main = <&ipmmu_mm 14>; 1265 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1266 #iommu-cells = <1>; 1267 }; 1268 1269 ipmmu_vi1: iommu@febe0000 { 1270 compatible = "renesas,ipmmu-r8a7795"; 1271 reg = <0 0xfebe0000 0 0x1000>; 1272 renesas,ipmmu-main = <&ipmmu_mm 15>; 1273 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1274 #iommu-cells = <1>; 1275 }; 1276 1277 ipmmu_vp0: iommu@fe990000 { 1278 compatible = "renesas,ipmmu-r8a7795"; 1279 reg = <0 0xfe990000 0 0x1000>; 1280 renesas,ipmmu-main = <&ipmmu_mm 16>; 1281 power-domains = <&sysc R8A7795_PD_A3VP>; 1282 #iommu-cells = <1>; 1283 }; 1284 1285 ipmmu_vp1: iommu@fe980000 { 1286 compatible = "renesas,ipmmu-r8a7795"; 1287 reg = <0 0xfe980000 0 0x1000>; 1288 renesas,ipmmu-main = <&ipmmu_mm 17>; 1289 power-domains = <&sysc R8A7795_PD_A3VP>; 1290 #iommu-cells = <1>; 1291 }; 1292 1293 avb: ethernet@e6800000 { 1294 compatible = "renesas,etheravb-r8a7795", 1295 "renesas,etheravb-rcar-gen3"; 1296 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1297 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1298 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1299 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1300 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1301 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1302 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1303 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1304 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1305 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1306 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1307 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1308 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1309 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1310 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1311 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1312 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1313 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1314 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1315 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1316 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1317 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1318 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1319 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1320 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1321 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1322 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1323 "ch4", "ch5", "ch6", "ch7", 1324 "ch8", "ch9", "ch10", "ch11", 1325 "ch12", "ch13", "ch14", "ch15", 1326 "ch16", "ch17", "ch18", "ch19", 1327 "ch20", "ch21", "ch22", "ch23", 1328 "ch24"; 1329 clocks = <&cpg CPG_MOD 812>; 1330 clock-names = "fck"; 1331 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1332 resets = <&cpg 812>; 1333 phy-mode = "rgmii"; 1334 rx-internal-delay-ps = <0>; 1335 tx-internal-delay-ps = <0>; 1336 iommus = <&ipmmu_ds0 16>; 1337 #address-cells = <1>; 1338 #size-cells = <0>; 1339 status = "disabled"; 1340 }; 1341 1342 can0: can@e6c30000 { 1343 compatible = "renesas,can-r8a7795", 1344 "renesas,rcar-gen3-can"; 1345 reg = <0 0xe6c30000 0 0x1000>; 1346 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1347 clocks = <&cpg CPG_MOD 916>, 1348 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1349 <&can_clk>; 1350 clock-names = "clkp1", "clkp2", "can_clk"; 1351 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1352 assigned-clock-rates = <40000000>; 1353 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1354 resets = <&cpg 916>; 1355 status = "disabled"; 1356 }; 1357 1358 can1: can@e6c38000 { 1359 compatible = "renesas,can-r8a7795", 1360 "renesas,rcar-gen3-can"; 1361 reg = <0 0xe6c38000 0 0x1000>; 1362 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1363 clocks = <&cpg CPG_MOD 915>, 1364 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1365 <&can_clk>; 1366 clock-names = "clkp1", "clkp2", "can_clk"; 1367 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1368 assigned-clock-rates = <40000000>; 1369 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1370 resets = <&cpg 915>; 1371 status = "disabled"; 1372 }; 1373 1374 canfd: can@e66c0000 { 1375 compatible = "renesas,r8a7795-canfd", 1376 "renesas,rcar-gen3-canfd"; 1377 reg = <0 0xe66c0000 0 0x8000>; 1378 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1379 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1380 interrupt-names = "ch_int", "g_int"; 1381 clocks = <&cpg CPG_MOD 914>, 1382 <&cpg CPG_CORE R8A7795_CLK_CANFD>, 1383 <&can_clk>; 1384 clock-names = "fck", "canfd", "can_clk"; 1385 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 1386 assigned-clock-rates = <80000000>; 1387 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1388 resets = <&cpg 914>; 1389 status = "disabled"; 1390 1391 channel0 { 1392 status = "disabled"; 1393 }; 1394 1395 channel1 { 1396 status = "disabled"; 1397 }; 1398 }; 1399 1400 pwm0: pwm@e6e30000 { 1401 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1402 reg = <0 0xe6e30000 0 0x8>; 1403 clocks = <&cpg CPG_MOD 523>; 1404 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1405 resets = <&cpg 523>; 1406 #pwm-cells = <2>; 1407 status = "disabled"; 1408 }; 1409 1410 pwm1: pwm@e6e31000 { 1411 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1412 reg = <0 0xe6e31000 0 0x8>; 1413 clocks = <&cpg CPG_MOD 523>; 1414 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1415 resets = <&cpg 523>; 1416 #pwm-cells = <2>; 1417 status = "disabled"; 1418 }; 1419 1420 pwm2: pwm@e6e32000 { 1421 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1422 reg = <0 0xe6e32000 0 0x8>; 1423 clocks = <&cpg CPG_MOD 523>; 1424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1425 resets = <&cpg 523>; 1426 #pwm-cells = <2>; 1427 status = "disabled"; 1428 }; 1429 1430 pwm3: pwm@e6e33000 { 1431 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1432 reg = <0 0xe6e33000 0 0x8>; 1433 clocks = <&cpg CPG_MOD 523>; 1434 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1435 resets = <&cpg 523>; 1436 #pwm-cells = <2>; 1437 status = "disabled"; 1438 }; 1439 1440 pwm4: pwm@e6e34000 { 1441 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1442 reg = <0 0xe6e34000 0 0x8>; 1443 clocks = <&cpg CPG_MOD 523>; 1444 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1445 resets = <&cpg 523>; 1446 #pwm-cells = <2>; 1447 status = "disabled"; 1448 }; 1449 1450 pwm5: pwm@e6e35000 { 1451 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1452 reg = <0 0xe6e35000 0 0x8>; 1453 clocks = <&cpg CPG_MOD 523>; 1454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1455 resets = <&cpg 523>; 1456 #pwm-cells = <2>; 1457 status = "disabled"; 1458 }; 1459 1460 pwm6: pwm@e6e36000 { 1461 compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar"; 1462 reg = <0 0xe6e36000 0 0x8>; 1463 clocks = <&cpg CPG_MOD 523>; 1464 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1465 resets = <&cpg 523>; 1466 #pwm-cells = <2>; 1467 status = "disabled"; 1468 }; 1469 1470 scif0: serial@e6e60000 { 1471 compatible = "renesas,scif-r8a7795", 1472 "renesas,rcar-gen3-scif", "renesas,scif"; 1473 reg = <0 0xe6e60000 0 64>; 1474 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1475 clocks = <&cpg CPG_MOD 207>, 1476 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1477 <&scif_clk>; 1478 clock-names = "fck", "brg_int", "scif_clk"; 1479 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1480 <&dmac2 0x51>, <&dmac2 0x50>; 1481 dma-names = "tx", "rx", "tx", "rx"; 1482 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1483 resets = <&cpg 207>; 1484 status = "disabled"; 1485 }; 1486 1487 scif1: serial@e6e68000 { 1488 compatible = "renesas,scif-r8a7795", 1489 "renesas,rcar-gen3-scif", "renesas,scif"; 1490 reg = <0 0xe6e68000 0 64>; 1491 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1492 clocks = <&cpg CPG_MOD 206>, 1493 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1494 <&scif_clk>; 1495 clock-names = "fck", "brg_int", "scif_clk"; 1496 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1497 <&dmac2 0x53>, <&dmac2 0x52>; 1498 dma-names = "tx", "rx", "tx", "rx"; 1499 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1500 resets = <&cpg 206>; 1501 status = "disabled"; 1502 }; 1503 1504 scif2: serial@e6e88000 { 1505 compatible = "renesas,scif-r8a7795", 1506 "renesas,rcar-gen3-scif", "renesas,scif"; 1507 reg = <0 0xe6e88000 0 64>; 1508 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1509 clocks = <&cpg CPG_MOD 310>, 1510 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1511 <&scif_clk>; 1512 clock-names = "fck", "brg_int", "scif_clk"; 1513 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1514 <&dmac2 0x13>, <&dmac2 0x12>; 1515 dma-names = "tx", "rx", "tx", "rx"; 1516 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1517 resets = <&cpg 310>; 1518 status = "disabled"; 1519 }; 1520 1521 scif3: serial@e6c50000 { 1522 compatible = "renesas,scif-r8a7795", 1523 "renesas,rcar-gen3-scif", "renesas,scif"; 1524 reg = <0 0xe6c50000 0 64>; 1525 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1526 clocks = <&cpg CPG_MOD 204>, 1527 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1528 <&scif_clk>; 1529 clock-names = "fck", "brg_int", "scif_clk"; 1530 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1531 dma-names = "tx", "rx"; 1532 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1533 resets = <&cpg 204>; 1534 status = "disabled"; 1535 }; 1536 1537 scif4: serial@e6c40000 { 1538 compatible = "renesas,scif-r8a7795", 1539 "renesas,rcar-gen3-scif", "renesas,scif"; 1540 reg = <0 0xe6c40000 0 64>; 1541 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1542 clocks = <&cpg CPG_MOD 203>, 1543 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1544 <&scif_clk>; 1545 clock-names = "fck", "brg_int", "scif_clk"; 1546 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1547 dma-names = "tx", "rx"; 1548 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1549 resets = <&cpg 203>; 1550 status = "disabled"; 1551 }; 1552 1553 scif5: serial@e6f30000 { 1554 compatible = "renesas,scif-r8a7795", 1555 "renesas,rcar-gen3-scif", "renesas,scif"; 1556 reg = <0 0xe6f30000 0 64>; 1557 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1558 clocks = <&cpg CPG_MOD 202>, 1559 <&cpg CPG_CORE R8A7795_CLK_S3D1>, 1560 <&scif_clk>; 1561 clock-names = "fck", "brg_int", "scif_clk"; 1562 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1563 <&dmac2 0x5b>, <&dmac2 0x5a>; 1564 dma-names = "tx", "rx", "tx", "rx"; 1565 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1566 resets = <&cpg 202>; 1567 status = "disabled"; 1568 }; 1569 1570 tpu: pwm@e6e80000 { 1571 compatible = "renesas,tpu-r8a7795", "renesas,tpu"; 1572 reg = <0 0xe6e80000 0 0x148>; 1573 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1574 clocks = <&cpg CPG_MOD 304>; 1575 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1576 resets = <&cpg 304>; 1577 #pwm-cells = <3>; 1578 status = "disabled"; 1579 }; 1580 1581 msiof0: spi@e6e90000 { 1582 compatible = "renesas,msiof-r8a7795", 1583 "renesas,rcar-gen3-msiof"; 1584 reg = <0 0xe6e90000 0 0x0064>; 1585 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1586 clocks = <&cpg CPG_MOD 211>; 1587 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1588 <&dmac2 0x41>, <&dmac2 0x40>; 1589 dma-names = "tx", "rx", "tx", "rx"; 1590 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1591 resets = <&cpg 211>; 1592 #address-cells = <1>; 1593 #size-cells = <0>; 1594 status = "disabled"; 1595 }; 1596 1597 msiof1: spi@e6ea0000 { 1598 compatible = "renesas,msiof-r8a7795", 1599 "renesas,rcar-gen3-msiof"; 1600 reg = <0 0xe6ea0000 0 0x0064>; 1601 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1602 clocks = <&cpg CPG_MOD 210>; 1603 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1604 <&dmac2 0x43>, <&dmac2 0x42>; 1605 dma-names = "tx", "rx", "tx", "rx"; 1606 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1607 resets = <&cpg 210>; 1608 #address-cells = <1>; 1609 #size-cells = <0>; 1610 status = "disabled"; 1611 }; 1612 1613 msiof2: spi@e6c00000 { 1614 compatible = "renesas,msiof-r8a7795", 1615 "renesas,rcar-gen3-msiof"; 1616 reg = <0 0xe6c00000 0 0x0064>; 1617 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1618 clocks = <&cpg CPG_MOD 209>; 1619 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1620 dma-names = "tx", "rx"; 1621 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1622 resets = <&cpg 209>; 1623 #address-cells = <1>; 1624 #size-cells = <0>; 1625 status = "disabled"; 1626 }; 1627 1628 msiof3: spi@e6c10000 { 1629 compatible = "renesas,msiof-r8a7795", 1630 "renesas,rcar-gen3-msiof"; 1631 reg = <0 0xe6c10000 0 0x0064>; 1632 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1633 clocks = <&cpg CPG_MOD 208>; 1634 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1635 dma-names = "tx", "rx"; 1636 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1637 resets = <&cpg 208>; 1638 #address-cells = <1>; 1639 #size-cells = <0>; 1640 status = "disabled"; 1641 }; 1642 1643 vin0: video@e6ef0000 { 1644 compatible = "renesas,vin-r8a7795"; 1645 reg = <0 0xe6ef0000 0 0x1000>; 1646 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1647 clocks = <&cpg CPG_MOD 811>; 1648 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1649 resets = <&cpg 811>; 1650 renesas,id = <0>; 1651 status = "disabled"; 1652 1653 ports { 1654 #address-cells = <1>; 1655 #size-cells = <0>; 1656 1657 port@1 { 1658 #address-cells = <1>; 1659 #size-cells = <0>; 1660 1661 reg = <1>; 1662 1663 vin0csi20: endpoint@0 { 1664 reg = <0>; 1665 remote-endpoint = <&csi20vin0>; 1666 }; 1667 vin0csi40: endpoint@2 { 1668 reg = <2>; 1669 remote-endpoint = <&csi40vin0>; 1670 }; 1671 }; 1672 }; 1673 }; 1674 1675 vin1: video@e6ef1000 { 1676 compatible = "renesas,vin-r8a7795"; 1677 reg = <0 0xe6ef1000 0 0x1000>; 1678 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1679 clocks = <&cpg CPG_MOD 810>; 1680 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1681 resets = <&cpg 810>; 1682 renesas,id = <1>; 1683 status = "disabled"; 1684 1685 ports { 1686 #address-cells = <1>; 1687 #size-cells = <0>; 1688 1689 port@1 { 1690 #address-cells = <1>; 1691 #size-cells = <0>; 1692 1693 reg = <1>; 1694 1695 vin1csi20: endpoint@0 { 1696 reg = <0>; 1697 remote-endpoint = <&csi20vin1>; 1698 }; 1699 vin1csi40: endpoint@2 { 1700 reg = <2>; 1701 remote-endpoint = <&csi40vin1>; 1702 }; 1703 }; 1704 }; 1705 }; 1706 1707 vin2: video@e6ef2000 { 1708 compatible = "renesas,vin-r8a7795"; 1709 reg = <0 0xe6ef2000 0 0x1000>; 1710 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1711 clocks = <&cpg CPG_MOD 809>; 1712 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1713 resets = <&cpg 809>; 1714 renesas,id = <2>; 1715 status = "disabled"; 1716 1717 ports { 1718 #address-cells = <1>; 1719 #size-cells = <0>; 1720 1721 port@1 { 1722 #address-cells = <1>; 1723 #size-cells = <0>; 1724 1725 reg = <1>; 1726 1727 vin2csi20: endpoint@0 { 1728 reg = <0>; 1729 remote-endpoint = <&csi20vin2>; 1730 }; 1731 vin2csi40: endpoint@2 { 1732 reg = <2>; 1733 remote-endpoint = <&csi40vin2>; 1734 }; 1735 }; 1736 }; 1737 }; 1738 1739 vin3: video@e6ef3000 { 1740 compatible = "renesas,vin-r8a7795"; 1741 reg = <0 0xe6ef3000 0 0x1000>; 1742 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1743 clocks = <&cpg CPG_MOD 808>; 1744 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1745 resets = <&cpg 808>; 1746 renesas,id = <3>; 1747 status = "disabled"; 1748 1749 ports { 1750 #address-cells = <1>; 1751 #size-cells = <0>; 1752 1753 port@1 { 1754 #address-cells = <1>; 1755 #size-cells = <0>; 1756 1757 reg = <1>; 1758 1759 vin3csi20: endpoint@0 { 1760 reg = <0>; 1761 remote-endpoint = <&csi20vin3>; 1762 }; 1763 vin3csi40: endpoint@2 { 1764 reg = <2>; 1765 remote-endpoint = <&csi40vin3>; 1766 }; 1767 }; 1768 }; 1769 }; 1770 1771 vin4: video@e6ef4000 { 1772 compatible = "renesas,vin-r8a7795"; 1773 reg = <0 0xe6ef4000 0 0x1000>; 1774 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1775 clocks = <&cpg CPG_MOD 807>; 1776 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1777 resets = <&cpg 807>; 1778 renesas,id = <4>; 1779 status = "disabled"; 1780 1781 ports { 1782 #address-cells = <1>; 1783 #size-cells = <0>; 1784 1785 port@1 { 1786 #address-cells = <1>; 1787 #size-cells = <0>; 1788 1789 reg = <1>; 1790 1791 vin4csi20: endpoint@0 { 1792 reg = <0>; 1793 remote-endpoint = <&csi20vin4>; 1794 }; 1795 vin4csi41: endpoint@3 { 1796 reg = <3>; 1797 remote-endpoint = <&csi41vin4>; 1798 }; 1799 }; 1800 }; 1801 }; 1802 1803 vin5: video@e6ef5000 { 1804 compatible = "renesas,vin-r8a7795"; 1805 reg = <0 0xe6ef5000 0 0x1000>; 1806 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1807 clocks = <&cpg CPG_MOD 806>; 1808 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1809 resets = <&cpg 806>; 1810 renesas,id = <5>; 1811 status = "disabled"; 1812 1813 ports { 1814 #address-cells = <1>; 1815 #size-cells = <0>; 1816 1817 port@1 { 1818 #address-cells = <1>; 1819 #size-cells = <0>; 1820 1821 reg = <1>; 1822 1823 vin5csi20: endpoint@0 { 1824 reg = <0>; 1825 remote-endpoint = <&csi20vin5>; 1826 }; 1827 vin5csi41: endpoint@3 { 1828 reg = <3>; 1829 remote-endpoint = <&csi41vin5>; 1830 }; 1831 }; 1832 }; 1833 }; 1834 1835 vin6: video@e6ef6000 { 1836 compatible = "renesas,vin-r8a7795"; 1837 reg = <0 0xe6ef6000 0 0x1000>; 1838 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1839 clocks = <&cpg CPG_MOD 805>; 1840 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1841 resets = <&cpg 805>; 1842 renesas,id = <6>; 1843 status = "disabled"; 1844 1845 ports { 1846 #address-cells = <1>; 1847 #size-cells = <0>; 1848 1849 port@1 { 1850 #address-cells = <1>; 1851 #size-cells = <0>; 1852 1853 reg = <1>; 1854 1855 vin6csi20: endpoint@0 { 1856 reg = <0>; 1857 remote-endpoint = <&csi20vin6>; 1858 }; 1859 vin6csi41: endpoint@3 { 1860 reg = <3>; 1861 remote-endpoint = <&csi41vin6>; 1862 }; 1863 }; 1864 }; 1865 }; 1866 1867 vin7: video@e6ef7000 { 1868 compatible = "renesas,vin-r8a7795"; 1869 reg = <0 0xe6ef7000 0 0x1000>; 1870 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1871 clocks = <&cpg CPG_MOD 804>; 1872 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1873 resets = <&cpg 804>; 1874 renesas,id = <7>; 1875 status = "disabled"; 1876 1877 ports { 1878 #address-cells = <1>; 1879 #size-cells = <0>; 1880 1881 port@1 { 1882 #address-cells = <1>; 1883 #size-cells = <0>; 1884 1885 reg = <1>; 1886 1887 vin7csi20: endpoint@0 { 1888 reg = <0>; 1889 remote-endpoint = <&csi20vin7>; 1890 }; 1891 vin7csi41: endpoint@3 { 1892 reg = <3>; 1893 remote-endpoint = <&csi41vin7>; 1894 }; 1895 }; 1896 }; 1897 }; 1898 1899 drif00: rif@e6f40000 { 1900 compatible = "renesas,r8a7795-drif", 1901 "renesas,rcar-gen3-drif"; 1902 reg = <0 0xe6f40000 0 0x64>; 1903 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1904 clocks = <&cpg CPG_MOD 515>; 1905 clock-names = "fck"; 1906 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1907 dma-names = "rx", "rx"; 1908 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1909 resets = <&cpg 515>; 1910 renesas,bonding = <&drif01>; 1911 status = "disabled"; 1912 }; 1913 1914 drif01: rif@e6f50000 { 1915 compatible = "renesas,r8a7795-drif", 1916 "renesas,rcar-gen3-drif"; 1917 reg = <0 0xe6f50000 0 0x64>; 1918 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1919 clocks = <&cpg CPG_MOD 514>; 1920 clock-names = "fck"; 1921 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1922 dma-names = "rx", "rx"; 1923 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1924 resets = <&cpg 514>; 1925 renesas,bonding = <&drif00>; 1926 status = "disabled"; 1927 }; 1928 1929 drif10: rif@e6f60000 { 1930 compatible = "renesas,r8a7795-drif", 1931 "renesas,rcar-gen3-drif"; 1932 reg = <0 0xe6f60000 0 0x64>; 1933 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1934 clocks = <&cpg CPG_MOD 513>; 1935 clock-names = "fck"; 1936 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1937 dma-names = "rx", "rx"; 1938 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1939 resets = <&cpg 513>; 1940 renesas,bonding = <&drif11>; 1941 status = "disabled"; 1942 }; 1943 1944 drif11: rif@e6f70000 { 1945 compatible = "renesas,r8a7795-drif", 1946 "renesas,rcar-gen3-drif"; 1947 reg = <0 0xe6f70000 0 0x64>; 1948 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1949 clocks = <&cpg CPG_MOD 512>; 1950 clock-names = "fck"; 1951 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1952 dma-names = "rx", "rx"; 1953 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1954 resets = <&cpg 512>; 1955 renesas,bonding = <&drif10>; 1956 status = "disabled"; 1957 }; 1958 1959 drif20: rif@e6f80000 { 1960 compatible = "renesas,r8a7795-drif", 1961 "renesas,rcar-gen3-drif"; 1962 reg = <0 0xe6f80000 0 0x64>; 1963 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1964 clocks = <&cpg CPG_MOD 511>; 1965 clock-names = "fck"; 1966 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1967 dma-names = "rx", "rx"; 1968 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1969 resets = <&cpg 511>; 1970 renesas,bonding = <&drif21>; 1971 status = "disabled"; 1972 }; 1973 1974 drif21: rif@e6f90000 { 1975 compatible = "renesas,r8a7795-drif", 1976 "renesas,rcar-gen3-drif"; 1977 reg = <0 0xe6f90000 0 0x64>; 1978 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1979 clocks = <&cpg CPG_MOD 510>; 1980 clock-names = "fck"; 1981 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1982 dma-names = "rx", "rx"; 1983 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1984 resets = <&cpg 510>; 1985 renesas,bonding = <&drif20>; 1986 status = "disabled"; 1987 }; 1988 1989 drif30: rif@e6fa0000 { 1990 compatible = "renesas,r8a7795-drif", 1991 "renesas,rcar-gen3-drif"; 1992 reg = <0 0xe6fa0000 0 0x64>; 1993 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1994 clocks = <&cpg CPG_MOD 509>; 1995 clock-names = "fck"; 1996 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1997 dma-names = "rx", "rx"; 1998 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1999 resets = <&cpg 509>; 2000 renesas,bonding = <&drif31>; 2001 status = "disabled"; 2002 }; 2003 2004 drif31: rif@e6fb0000 { 2005 compatible = "renesas,r8a7795-drif", 2006 "renesas,rcar-gen3-drif"; 2007 reg = <0 0xe6fb0000 0 0x64>; 2008 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 2009 clocks = <&cpg CPG_MOD 508>; 2010 clock-names = "fck"; 2011 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 2012 dma-names = "rx", "rx"; 2013 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2014 resets = <&cpg 508>; 2015 renesas,bonding = <&drif30>; 2016 status = "disabled"; 2017 }; 2018 2019 rcar_sound: sound@ec500000 { 2020 /* 2021 * #sound-dai-cells is required if simple-card 2022 * 2023 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 2024 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 2025 */ 2026 /* 2027 * #clock-cells is required for audio_clkout0/1/2/3 2028 * 2029 * clkout : #clock-cells = <0>; <&rcar_sound>; 2030 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 2031 */ 2032 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3"; 2033 reg = <0 0xec500000 0 0x1000>, /* SCU */ 2034 <0 0xec5a0000 0 0x100>, /* ADG */ 2035 <0 0xec540000 0 0x1000>, /* SSIU */ 2036 <0 0xec541000 0 0x280>, /* SSI */ 2037 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 2038 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 2039 2040 clocks = <&cpg CPG_MOD 1005>, 2041 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 2042 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 2043 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 2044 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 2045 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 2046 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 2047 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 2048 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 2049 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 2050 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 2051 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2052 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 2053 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 2054 <&audio_clk_a>, <&audio_clk_b>, 2055 <&audio_clk_c>, 2056 <&cpg CPG_MOD 922>; 2057 clock-names = "ssi-all", 2058 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2059 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2060 "ssi.1", "ssi.0", 2061 "src.9", "src.8", "src.7", "src.6", 2062 "src.5", "src.4", "src.3", "src.2", 2063 "src.1", "src.0", 2064 "mix.1", "mix.0", 2065 "ctu.1", "ctu.0", 2066 "dvc.0", "dvc.1", 2067 "clk_a", "clk_b", "clk_c", "clk_i"; 2068 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2069 resets = <&cpg 1005>, 2070 <&cpg 1006>, <&cpg 1007>, 2071 <&cpg 1008>, <&cpg 1009>, 2072 <&cpg 1010>, <&cpg 1011>, 2073 <&cpg 1012>, <&cpg 1013>, 2074 <&cpg 1014>, <&cpg 1015>; 2075 reset-names = "ssi-all", 2076 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 2077 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 2078 "ssi.1", "ssi.0"; 2079 status = "disabled"; 2080 2081 rcar_sound,dvc { 2082 dvc0: dvc-0 { 2083 dmas = <&audma1 0xbc>; 2084 dma-names = "tx"; 2085 }; 2086 dvc1: dvc-1 { 2087 dmas = <&audma1 0xbe>; 2088 dma-names = "tx"; 2089 }; 2090 }; 2091 2092 rcar_sound,mix { 2093 mix0: mix-0 { }; 2094 mix1: mix-1 { }; 2095 }; 2096 2097 rcar_sound,ctu { 2098 ctu00: ctu-0 { }; 2099 ctu01: ctu-1 { }; 2100 ctu02: ctu-2 { }; 2101 ctu03: ctu-3 { }; 2102 ctu10: ctu-4 { }; 2103 ctu11: ctu-5 { }; 2104 ctu12: ctu-6 { }; 2105 ctu13: ctu-7 { }; 2106 }; 2107 2108 rcar_sound,src { 2109 src0: src-0 { 2110 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 2111 dmas = <&audma0 0x85>, <&audma1 0x9a>; 2112 dma-names = "rx", "tx"; 2113 }; 2114 src1: src-1 { 2115 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 2116 dmas = <&audma0 0x87>, <&audma1 0x9c>; 2117 dma-names = "rx", "tx"; 2118 }; 2119 src2: src-2 { 2120 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 2121 dmas = <&audma0 0x89>, <&audma1 0x9e>; 2122 dma-names = "rx", "tx"; 2123 }; 2124 src3: src-3 { 2125 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 2126 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 2127 dma-names = "rx", "tx"; 2128 }; 2129 src4: src-4 { 2130 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 2131 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 2132 dma-names = "rx", "tx"; 2133 }; 2134 src5: src-5 { 2135 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 2136 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 2137 dma-names = "rx", "tx"; 2138 }; 2139 src6: src-6 { 2140 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 2141 dmas = <&audma0 0x91>, <&audma1 0xb4>; 2142 dma-names = "rx", "tx"; 2143 }; 2144 src7: src-7 { 2145 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 2146 dmas = <&audma0 0x93>, <&audma1 0xb6>; 2147 dma-names = "rx", "tx"; 2148 }; 2149 src8: src-8 { 2150 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 2151 dmas = <&audma0 0x95>, <&audma1 0xb8>; 2152 dma-names = "rx", "tx"; 2153 }; 2154 src9: src-9 { 2155 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 2156 dmas = <&audma0 0x97>, <&audma1 0xba>; 2157 dma-names = "rx", "tx"; 2158 }; 2159 }; 2160 2161 rcar_sound,ssiu { 2162 ssiu00: ssiu-0 { 2163 dmas = <&audma0 0x15>, <&audma1 0x16>; 2164 dma-names = "rx", "tx"; 2165 }; 2166 ssiu01: ssiu-1 { 2167 dmas = <&audma0 0x35>, <&audma1 0x36>; 2168 dma-names = "rx", "tx"; 2169 }; 2170 ssiu02: ssiu-2 { 2171 dmas = <&audma0 0x37>, <&audma1 0x38>; 2172 dma-names = "rx", "tx"; 2173 }; 2174 ssiu03: ssiu-3 { 2175 dmas = <&audma0 0x47>, <&audma1 0x48>; 2176 dma-names = "rx", "tx"; 2177 }; 2178 ssiu04: ssiu-4 { 2179 dmas = <&audma0 0x3F>, <&audma1 0x40>; 2180 dma-names = "rx", "tx"; 2181 }; 2182 ssiu05: ssiu-5 { 2183 dmas = <&audma0 0x43>, <&audma1 0x44>; 2184 dma-names = "rx", "tx"; 2185 }; 2186 ssiu06: ssiu-6 { 2187 dmas = <&audma0 0x4F>, <&audma1 0x50>; 2188 dma-names = "rx", "tx"; 2189 }; 2190 ssiu07: ssiu-7 { 2191 dmas = <&audma0 0x53>, <&audma1 0x54>; 2192 dma-names = "rx", "tx"; 2193 }; 2194 ssiu10: ssiu-8 { 2195 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2196 dma-names = "rx", "tx"; 2197 }; 2198 ssiu11: ssiu-9 { 2199 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2200 dma-names = "rx", "tx"; 2201 }; 2202 ssiu12: ssiu-10 { 2203 dmas = <&audma0 0x57>, <&audma1 0x58>; 2204 dma-names = "rx", "tx"; 2205 }; 2206 ssiu13: ssiu-11 { 2207 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2208 dma-names = "rx", "tx"; 2209 }; 2210 ssiu14: ssiu-12 { 2211 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2212 dma-names = "rx", "tx"; 2213 }; 2214 ssiu15: ssiu-13 { 2215 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2216 dma-names = "rx", "tx"; 2217 }; 2218 ssiu16: ssiu-14 { 2219 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2220 dma-names = "rx", "tx"; 2221 }; 2222 ssiu17: ssiu-15 { 2223 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2224 dma-names = "rx", "tx"; 2225 }; 2226 ssiu20: ssiu-16 { 2227 dmas = <&audma0 0x63>, <&audma1 0x64>; 2228 dma-names = "rx", "tx"; 2229 }; 2230 ssiu21: ssiu-17 { 2231 dmas = <&audma0 0x67>, <&audma1 0x68>; 2232 dma-names = "rx", "tx"; 2233 }; 2234 ssiu22: ssiu-18 { 2235 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2236 dma-names = "rx", "tx"; 2237 }; 2238 ssiu23: ssiu-19 { 2239 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2240 dma-names = "rx", "tx"; 2241 }; 2242 ssiu24: ssiu-20 { 2243 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2244 dma-names = "rx", "tx"; 2245 }; 2246 ssiu25: ssiu-21 { 2247 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2248 dma-names = "rx", "tx"; 2249 }; 2250 ssiu26: ssiu-22 { 2251 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2252 dma-names = "rx", "tx"; 2253 }; 2254 ssiu27: ssiu-23 { 2255 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2256 dma-names = "rx", "tx"; 2257 }; 2258 ssiu30: ssiu-24 { 2259 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2260 dma-names = "rx", "tx"; 2261 }; 2262 ssiu31: ssiu-25 { 2263 dmas = <&audma0 0x21>, <&audma1 0x22>; 2264 dma-names = "rx", "tx"; 2265 }; 2266 ssiu32: ssiu-26 { 2267 dmas = <&audma0 0x23>, <&audma1 0x24>; 2268 dma-names = "rx", "tx"; 2269 }; 2270 ssiu33: ssiu-27 { 2271 dmas = <&audma0 0x25>, <&audma1 0x26>; 2272 dma-names = "rx", "tx"; 2273 }; 2274 ssiu34: ssiu-28 { 2275 dmas = <&audma0 0x27>, <&audma1 0x28>; 2276 dma-names = "rx", "tx"; 2277 }; 2278 ssiu35: ssiu-29 { 2279 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2280 dma-names = "rx", "tx"; 2281 }; 2282 ssiu36: ssiu-30 { 2283 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2284 dma-names = "rx", "tx"; 2285 }; 2286 ssiu37: ssiu-31 { 2287 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2288 dma-names = "rx", "tx"; 2289 }; 2290 ssiu40: ssiu-32 { 2291 dmas = <&audma0 0x71>, <&audma1 0x72>; 2292 dma-names = "rx", "tx"; 2293 }; 2294 ssiu41: ssiu-33 { 2295 dmas = <&audma0 0x17>, <&audma1 0x18>; 2296 dma-names = "rx", "tx"; 2297 }; 2298 ssiu42: ssiu-34 { 2299 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2300 dma-names = "rx", "tx"; 2301 }; 2302 ssiu43: ssiu-35 { 2303 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2304 dma-names = "rx", "tx"; 2305 }; 2306 ssiu44: ssiu-36 { 2307 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2308 dma-names = "rx", "tx"; 2309 }; 2310 ssiu45: ssiu-37 { 2311 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2312 dma-names = "rx", "tx"; 2313 }; 2314 ssiu46: ssiu-38 { 2315 dmas = <&audma0 0x31>, <&audma1 0x32>; 2316 dma-names = "rx", "tx"; 2317 }; 2318 ssiu47: ssiu-39 { 2319 dmas = <&audma0 0x33>, <&audma1 0x34>; 2320 dma-names = "rx", "tx"; 2321 }; 2322 ssiu50: ssiu-40 { 2323 dmas = <&audma0 0x73>, <&audma1 0x74>; 2324 dma-names = "rx", "tx"; 2325 }; 2326 ssiu60: ssiu-41 { 2327 dmas = <&audma0 0x75>, <&audma1 0x76>; 2328 dma-names = "rx", "tx"; 2329 }; 2330 ssiu70: ssiu-42 { 2331 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2332 dma-names = "rx", "tx"; 2333 }; 2334 ssiu80: ssiu-43 { 2335 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2336 dma-names = "rx", "tx"; 2337 }; 2338 ssiu90: ssiu-44 { 2339 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2340 dma-names = "rx", "tx"; 2341 }; 2342 ssiu91: ssiu-45 { 2343 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2344 dma-names = "rx", "tx"; 2345 }; 2346 ssiu92: ssiu-46 { 2347 dmas = <&audma0 0x81>, <&audma1 0x82>; 2348 dma-names = "rx", "tx"; 2349 }; 2350 ssiu93: ssiu-47 { 2351 dmas = <&audma0 0x83>, <&audma1 0x84>; 2352 dma-names = "rx", "tx"; 2353 }; 2354 ssiu94: ssiu-48 { 2355 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2356 dma-names = "rx", "tx"; 2357 }; 2358 ssiu95: ssiu-49 { 2359 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2360 dma-names = "rx", "tx"; 2361 }; 2362 ssiu96: ssiu-50 { 2363 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2364 dma-names = "rx", "tx"; 2365 }; 2366 ssiu97: ssiu-51 { 2367 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2368 dma-names = "rx", "tx"; 2369 }; 2370 }; 2371 2372 rcar_sound,ssi { 2373 ssi0: ssi-0 { 2374 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 2375 dmas = <&audma0 0x01>, <&audma1 0x02>; 2376 dma-names = "rx", "tx"; 2377 }; 2378 ssi1: ssi-1 { 2379 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 2380 dmas = <&audma0 0x03>, <&audma1 0x04>; 2381 dma-names = "rx", "tx"; 2382 }; 2383 ssi2: ssi-2 { 2384 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 2385 dmas = <&audma0 0x05>, <&audma1 0x06>; 2386 dma-names = "rx", "tx"; 2387 }; 2388 ssi3: ssi-3 { 2389 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 2390 dmas = <&audma0 0x07>, <&audma1 0x08>; 2391 dma-names = "rx", "tx"; 2392 }; 2393 ssi4: ssi-4 { 2394 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 2395 dmas = <&audma0 0x09>, <&audma1 0x0a>; 2396 dma-names = "rx", "tx"; 2397 }; 2398 ssi5: ssi-5 { 2399 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 2400 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 2401 dma-names = "rx", "tx"; 2402 }; 2403 ssi6: ssi-6 { 2404 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 2405 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 2406 dma-names = "rx", "tx"; 2407 }; 2408 ssi7: ssi-7 { 2409 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 2410 dmas = <&audma0 0x0f>, <&audma1 0x10>; 2411 dma-names = "rx", "tx"; 2412 }; 2413 ssi8: ssi-8 { 2414 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 2415 dmas = <&audma0 0x11>, <&audma1 0x12>; 2416 dma-names = "rx", "tx"; 2417 }; 2418 ssi9: ssi-9 { 2419 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 2420 dmas = <&audma0 0x13>, <&audma1 0x14>; 2421 dma-names = "rx", "tx"; 2422 }; 2423 }; 2424 }; 2425 2426 mlp: mlp@ec520000 { 2427 compatible = "renesas,r8a7795-mlp", 2428 "renesas,rcar-gen3-mlp"; 2429 reg = <0 0xec520000 0 0x800>; 2430 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2431 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2432 clocks = <&cpg CPG_MOD 802>; 2433 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2434 resets = <&cpg 802>; 2435 status = "disabled"; 2436 }; 2437 2438 audma0: dma-controller@ec700000 { 2439 compatible = "renesas,dmac-r8a7795", 2440 "renesas,rcar-dmac"; 2441 reg = <0 0xec700000 0 0x10000>; 2442 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2443 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2444 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2445 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2446 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2447 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2448 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2449 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2450 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2451 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2452 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2453 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2454 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2455 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2456 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2457 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2458 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2459 interrupt-names = "error", 2460 "ch0", "ch1", "ch2", "ch3", 2461 "ch4", "ch5", "ch6", "ch7", 2462 "ch8", "ch9", "ch10", "ch11", 2463 "ch12", "ch13", "ch14", "ch15"; 2464 clocks = <&cpg CPG_MOD 502>; 2465 clock-names = "fck"; 2466 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2467 resets = <&cpg 502>; 2468 #dma-cells = <1>; 2469 dma-channels = <16>; 2470 iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>, 2471 <&ipmmu_mp0 2>, <&ipmmu_mp0 3>, 2472 <&ipmmu_mp0 4>, <&ipmmu_mp0 5>, 2473 <&ipmmu_mp0 6>, <&ipmmu_mp0 7>, 2474 <&ipmmu_mp0 8>, <&ipmmu_mp0 9>, 2475 <&ipmmu_mp0 10>, <&ipmmu_mp0 11>, 2476 <&ipmmu_mp0 12>, <&ipmmu_mp0 13>, 2477 <&ipmmu_mp0 14>, <&ipmmu_mp0 15>; 2478 }; 2479 2480 audma1: dma-controller@ec720000 { 2481 compatible = "renesas,dmac-r8a7795", 2482 "renesas,rcar-dmac"; 2483 reg = <0 0xec720000 0 0x10000>; 2484 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2485 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2486 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2487 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2488 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2489 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2490 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2491 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2492 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2493 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2494 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2495 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2496 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2497 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2498 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2499 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2500 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2501 interrupt-names = "error", 2502 "ch0", "ch1", "ch2", "ch3", 2503 "ch4", "ch5", "ch6", "ch7", 2504 "ch8", "ch9", "ch10", "ch11", 2505 "ch12", "ch13", "ch14", "ch15"; 2506 clocks = <&cpg CPG_MOD 501>; 2507 clock-names = "fck"; 2508 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2509 resets = <&cpg 501>; 2510 #dma-cells = <1>; 2511 dma-channels = <16>; 2512 iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>, 2513 <&ipmmu_mp0 18>, <&ipmmu_mp0 19>, 2514 <&ipmmu_mp0 20>, <&ipmmu_mp0 21>, 2515 <&ipmmu_mp0 22>, <&ipmmu_mp0 23>, 2516 <&ipmmu_mp0 24>, <&ipmmu_mp0 25>, 2517 <&ipmmu_mp0 26>, <&ipmmu_mp0 27>, 2518 <&ipmmu_mp0 28>, <&ipmmu_mp0 29>, 2519 <&ipmmu_mp0 30>, <&ipmmu_mp0 31>; 2520 }; 2521 2522 xhci0: usb@ee000000 { 2523 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; 2524 reg = <0 0xee000000 0 0xc00>; 2525 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2526 clocks = <&cpg CPG_MOD 328>; 2527 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2528 resets = <&cpg 328>; 2529 status = "disabled"; 2530 }; 2531 2532 usb3_peri0: usb@ee020000 { 2533 compatible = "renesas,r8a7795-usb3-peri", 2534 "renesas,rcar-gen3-usb3-peri"; 2535 reg = <0 0xee020000 0 0x400>; 2536 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2537 clocks = <&cpg CPG_MOD 328>; 2538 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2539 resets = <&cpg 328>; 2540 status = "disabled"; 2541 }; 2542 2543 ohci0: usb@ee080000 { 2544 compatible = "generic-ohci"; 2545 reg = <0 0xee080000 0 0x100>; 2546 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2547 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2548 phys = <&usb2_phy0 1>; 2549 phy-names = "usb"; 2550 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2551 resets = <&cpg 703>, <&cpg 704>; 2552 status = "disabled"; 2553 }; 2554 2555 ohci1: usb@ee0a0000 { 2556 compatible = "generic-ohci"; 2557 reg = <0 0xee0a0000 0 0x100>; 2558 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2559 clocks = <&cpg CPG_MOD 702>; 2560 phys = <&usb2_phy1 1>; 2561 phy-names = "usb"; 2562 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2563 resets = <&cpg 702>; 2564 status = "disabled"; 2565 }; 2566 2567 ohci2: usb@ee0c0000 { 2568 compatible = "generic-ohci"; 2569 reg = <0 0xee0c0000 0 0x100>; 2570 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2571 clocks = <&cpg CPG_MOD 701>; 2572 phys = <&usb2_phy2 1>; 2573 phy-names = "usb"; 2574 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2575 resets = <&cpg 701>; 2576 status = "disabled"; 2577 }; 2578 2579 ohci3: usb@ee0e0000 { 2580 compatible = "generic-ohci"; 2581 reg = <0 0xee0e0000 0 0x100>; 2582 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2583 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2584 phys = <&usb2_phy3 1>; 2585 phy-names = "usb"; 2586 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2587 resets = <&cpg 700>, <&cpg 705>; 2588 status = "disabled"; 2589 }; 2590 2591 ehci0: usb@ee080100 { 2592 compatible = "generic-ehci"; 2593 reg = <0 0xee080100 0 0x100>; 2594 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2595 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2596 phys = <&usb2_phy0 2>; 2597 phy-names = "usb"; 2598 companion = <&ohci0>; 2599 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2600 resets = <&cpg 703>, <&cpg 704>; 2601 status = "disabled"; 2602 }; 2603 2604 ehci1: usb@ee0a0100 { 2605 compatible = "generic-ehci"; 2606 reg = <0 0xee0a0100 0 0x100>; 2607 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2608 clocks = <&cpg CPG_MOD 702>; 2609 phys = <&usb2_phy1 2>; 2610 phy-names = "usb"; 2611 companion = <&ohci1>; 2612 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2613 resets = <&cpg 702>; 2614 status = "disabled"; 2615 }; 2616 2617 ehci2: usb@ee0c0100 { 2618 compatible = "generic-ehci"; 2619 reg = <0 0xee0c0100 0 0x100>; 2620 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 2621 clocks = <&cpg CPG_MOD 701>; 2622 phys = <&usb2_phy2 2>; 2623 phy-names = "usb"; 2624 companion = <&ohci2>; 2625 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2626 resets = <&cpg 701>; 2627 status = "disabled"; 2628 }; 2629 2630 ehci3: usb@ee0e0100 { 2631 compatible = "generic-ehci"; 2632 reg = <0 0xee0e0100 0 0x100>; 2633 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2634 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2635 phys = <&usb2_phy3 2>; 2636 phy-names = "usb"; 2637 companion = <&ohci3>; 2638 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2639 resets = <&cpg 700>, <&cpg 705>; 2640 status = "disabled"; 2641 }; 2642 2643 usb2_phy0: usb-phy@ee080200 { 2644 compatible = "renesas,usb2-phy-r8a7795", 2645 "renesas,rcar-gen3-usb2-phy"; 2646 reg = <0 0xee080200 0 0x700>; 2647 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2648 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2649 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2650 resets = <&cpg 703>, <&cpg 704>; 2651 #phy-cells = <1>; 2652 status = "disabled"; 2653 }; 2654 2655 usb2_phy1: usb-phy@ee0a0200 { 2656 compatible = "renesas,usb2-phy-r8a7795", 2657 "renesas,rcar-gen3-usb2-phy"; 2658 reg = <0 0xee0a0200 0 0x700>; 2659 clocks = <&cpg CPG_MOD 702>; 2660 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2661 resets = <&cpg 702>; 2662 #phy-cells = <1>; 2663 status = "disabled"; 2664 }; 2665 2666 usb2_phy2: usb-phy@ee0c0200 { 2667 compatible = "renesas,usb2-phy-r8a7795", 2668 "renesas,rcar-gen3-usb2-phy"; 2669 reg = <0 0xee0c0200 0 0x700>; 2670 clocks = <&cpg CPG_MOD 701>; 2671 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2672 resets = <&cpg 701>; 2673 #phy-cells = <1>; 2674 status = "disabled"; 2675 }; 2676 2677 usb2_phy3: usb-phy@ee0e0200 { 2678 compatible = "renesas,usb2-phy-r8a7795", 2679 "renesas,rcar-gen3-usb2-phy"; 2680 reg = <0 0xee0e0200 0 0x700>; 2681 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 2682 clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>; 2683 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2684 resets = <&cpg 700>, <&cpg 705>; 2685 #phy-cells = <1>; 2686 status = "disabled"; 2687 }; 2688 2689 sdhi0: mmc@ee100000 { 2690 compatible = "renesas,sdhi-r8a7795", 2691 "renesas,rcar-gen3-sdhi"; 2692 reg = <0 0xee100000 0 0x2000>; 2693 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2694 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>; 2695 clock-names = "core", "clkh"; 2696 max-frequency = <200000000>; 2697 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2698 resets = <&cpg 314>; 2699 iommus = <&ipmmu_ds1 32>; 2700 status = "disabled"; 2701 }; 2702 2703 sdhi1: mmc@ee120000 { 2704 compatible = "renesas,sdhi-r8a7795", 2705 "renesas,rcar-gen3-sdhi"; 2706 reg = <0 0xee120000 0 0x2000>; 2707 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2708 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>; 2709 clock-names = "core", "clkh"; 2710 max-frequency = <200000000>; 2711 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2712 resets = <&cpg 313>; 2713 iommus = <&ipmmu_ds1 33>; 2714 status = "disabled"; 2715 }; 2716 2717 sdhi2: mmc@ee140000 { 2718 compatible = "renesas,sdhi-r8a7795", 2719 "renesas,rcar-gen3-sdhi"; 2720 reg = <0 0xee140000 0 0x2000>; 2721 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2722 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>; 2723 clock-names = "core", "clkh"; 2724 max-frequency = <200000000>; 2725 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2726 resets = <&cpg 312>; 2727 iommus = <&ipmmu_ds1 34>; 2728 status = "disabled"; 2729 }; 2730 2731 sdhi3: mmc@ee160000 { 2732 compatible = "renesas,sdhi-r8a7795", 2733 "renesas,rcar-gen3-sdhi"; 2734 reg = <0 0xee160000 0 0x2000>; 2735 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2736 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>; 2737 clock-names = "core", "clkh"; 2738 max-frequency = <200000000>; 2739 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2740 resets = <&cpg 311>; 2741 iommus = <&ipmmu_ds1 35>; 2742 status = "disabled"; 2743 }; 2744 2745 rpc: spi@ee200000 { 2746 compatible = "renesas,r8a7795-rpc-if", 2747 "renesas,rcar-gen3-rpc-if"; 2748 reg = <0 0xee200000 0 0x200>, 2749 <0 0x08000000 0 0x04000000>, 2750 <0 0xee208000 0 0x100>; 2751 reg-names = "regs", "dirmap", "wbuf"; 2752 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2753 clocks = <&cpg CPG_MOD 917>; 2754 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2755 resets = <&cpg 917>; 2756 #address-cells = <1>; 2757 #size-cells = <0>; 2758 status = "disabled"; 2759 }; 2760 2761 sata: sata@ee300000 { 2762 compatible = "renesas,sata-r8a7795", 2763 "renesas,rcar-gen3-sata"; 2764 reg = <0 0xee300000 0 0x200000>; 2765 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2766 clocks = <&cpg CPG_MOD 815>; 2767 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2768 resets = <&cpg 815>; 2769 status = "disabled"; 2770 iommus = <&ipmmu_hc 2>; 2771 }; 2772 2773 gic: interrupt-controller@f1010000 { 2774 compatible = "arm,gic-400"; 2775 #interrupt-cells = <3>; 2776 #address-cells = <0>; 2777 interrupt-controller; 2778 reg = <0x0 0xf1010000 0 0x1000>, 2779 <0x0 0xf1020000 0 0x20000>, 2780 <0x0 0xf1040000 0 0x20000>, 2781 <0x0 0xf1060000 0 0x20000>; 2782 interrupts = <GIC_PPI 9 2783 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>; 2784 clocks = <&cpg CPG_MOD 408>; 2785 clock-names = "clk"; 2786 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2787 resets = <&cpg 408>; 2788 }; 2789 2790 pciec0: pcie@fe000000 { 2791 compatible = "renesas,pcie-r8a7795", 2792 "renesas,pcie-rcar-gen3"; 2793 reg = <0 0xfe000000 0 0x80000>; 2794 #address-cells = <3>; 2795 #size-cells = <2>; 2796 bus-range = <0x00 0xff>; 2797 device_type = "pci"; 2798 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2799 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2800 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2801 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2802 /* Map all possible DDR/IOMMU as inbound ranges */ 2803 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2804 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2805 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2806 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2807 #interrupt-cells = <1>; 2808 interrupt-map-mask = <0 0 0 0>; 2809 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2810 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2811 clock-names = "pcie", "pcie_bus"; 2812 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2813 resets = <&cpg 319>; 2814 iommu-map = <0 &ipmmu_hc 0 1>; 2815 iommu-map-mask = <0>; 2816 status = "disabled"; 2817 }; 2818 2819 pciec1: pcie@ee800000 { 2820 compatible = "renesas,pcie-r8a7795", 2821 "renesas,pcie-rcar-gen3"; 2822 reg = <0 0xee800000 0 0x80000>; 2823 #address-cells = <3>; 2824 #size-cells = <2>; 2825 bus-range = <0x00 0xff>; 2826 device_type = "pci"; 2827 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2828 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2829 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2830 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2831 /* Map all possible DDR/IOMMU as inbound ranges */ 2832 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2833 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2834 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2835 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2836 #interrupt-cells = <1>; 2837 interrupt-map-mask = <0 0 0 0>; 2838 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2839 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2840 clock-names = "pcie", "pcie_bus"; 2841 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2842 resets = <&cpg 318>; 2843 iommu-map = <0 &ipmmu_hc 1 1>; 2844 iommu-map-mask = <0>; 2845 status = "disabled"; 2846 }; 2847 2848 pciec0_ep: pcie-ep@fe000000 { 2849 compatible = "renesas,r8a7795-pcie-ep", 2850 "renesas,rcar-gen3-pcie-ep"; 2851 reg = <0x0 0xfe000000 0 0x80000>, 2852 <0x0 0xfe100000 0 0x100000>, 2853 <0x0 0xfe200000 0 0x200000>, 2854 <0x0 0x30000000 0 0x8000000>, 2855 <0x0 0x38000000 0 0x8000000>; 2856 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2857 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2858 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2859 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2860 clocks = <&cpg CPG_MOD 319>; 2861 clock-names = "pcie"; 2862 resets = <&cpg 319>; 2863 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2864 status = "disabled"; 2865 }; 2866 2867 pciec1_ep: pcie-ep@ee800000 { 2868 compatible = "renesas,r8a7795-pcie-ep", 2869 "renesas,rcar-gen3-pcie-ep"; 2870 reg = <0x0 0xee800000 0 0x80000>, 2871 <0x0 0xee900000 0 0x100000>, 2872 <0x0 0xeea00000 0 0x200000>, 2873 <0x0 0xc0000000 0 0x8000000>, 2874 <0x0 0xc8000000 0 0x8000000>; 2875 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2876 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2877 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2878 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2879 clocks = <&cpg CPG_MOD 318>; 2880 clock-names = "pcie"; 2881 resets = <&cpg 318>; 2882 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2883 status = "disabled"; 2884 }; 2885 2886 imr-lx4@fe860000 { 2887 compatible = "renesas,r8a7795-imr-lx4", 2888 "renesas,imr-lx4"; 2889 reg = <0 0xfe860000 0 0x2000>; 2890 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2891 clocks = <&cpg CPG_MOD 823>; 2892 power-domains = <&sysc R8A7795_PD_A3VC>; 2893 resets = <&cpg 823>; 2894 }; 2895 2896 imr-lx4@fe870000 { 2897 compatible = "renesas,r8a7795-imr-lx4", 2898 "renesas,imr-lx4"; 2899 reg = <0 0xfe870000 0 0x2000>; 2900 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2901 clocks = <&cpg CPG_MOD 822>; 2902 power-domains = <&sysc R8A7795_PD_A3VC>; 2903 resets = <&cpg 822>; 2904 }; 2905 2906 imr-lx4@fe880000 { 2907 compatible = "renesas,r8a7795-imr-lx4", 2908 "renesas,imr-lx4"; 2909 reg = <0 0xfe880000 0 0x2000>; 2910 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; 2911 clocks = <&cpg CPG_MOD 821>; 2912 power-domains = <&sysc R8A7795_PD_A3VC>; 2913 resets = <&cpg 821>; 2914 }; 2915 2916 imr-lx4@fe890000 { 2917 compatible = "renesas,r8a7795-imr-lx4", 2918 "renesas,imr-lx4"; 2919 reg = <0 0xfe890000 0 0x2000>; 2920 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 2921 clocks = <&cpg CPG_MOD 820>; 2922 power-domains = <&sysc R8A7795_PD_A3VC>; 2923 resets = <&cpg 820>; 2924 }; 2925 2926 vspbc: vsp@fe920000 { 2927 compatible = "renesas,vsp2"; 2928 reg = <0 0xfe920000 0 0x8000>; 2929 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 2930 clocks = <&cpg CPG_MOD 624>; 2931 power-domains = <&sysc R8A7795_PD_A3VP>; 2932 resets = <&cpg 624>; 2933 2934 renesas,fcp = <&fcpvb1>; 2935 }; 2936 2937 vspbd: vsp@fe960000 { 2938 compatible = "renesas,vsp2"; 2939 reg = <0 0xfe960000 0 0x8000>; 2940 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2941 clocks = <&cpg CPG_MOD 626>; 2942 power-domains = <&sysc R8A7795_PD_A3VP>; 2943 resets = <&cpg 626>; 2944 2945 renesas,fcp = <&fcpvb0>; 2946 }; 2947 2948 vspd0: vsp@fea20000 { 2949 compatible = "renesas,vsp2"; 2950 reg = <0 0xfea20000 0 0x5000>; 2951 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2952 clocks = <&cpg CPG_MOD 623>; 2953 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2954 resets = <&cpg 623>; 2955 2956 renesas,fcp = <&fcpvd0>; 2957 }; 2958 2959 vspd1: vsp@fea28000 { 2960 compatible = "renesas,vsp2"; 2961 reg = <0 0xfea28000 0 0x5000>; 2962 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2963 clocks = <&cpg CPG_MOD 622>; 2964 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2965 resets = <&cpg 622>; 2966 2967 renesas,fcp = <&fcpvd1>; 2968 }; 2969 2970 vspd2: vsp@fea30000 { 2971 compatible = "renesas,vsp2"; 2972 reg = <0 0xfea30000 0 0x5000>; 2973 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2974 clocks = <&cpg CPG_MOD 621>; 2975 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 2976 resets = <&cpg 621>; 2977 2978 renesas,fcp = <&fcpvd2>; 2979 }; 2980 2981 vspi0: vsp@fe9a0000 { 2982 compatible = "renesas,vsp2"; 2983 reg = <0 0xfe9a0000 0 0x8000>; 2984 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2985 clocks = <&cpg CPG_MOD 631>; 2986 power-domains = <&sysc R8A7795_PD_A3VP>; 2987 resets = <&cpg 631>; 2988 2989 renesas,fcp = <&fcpvi0>; 2990 }; 2991 2992 vspi1: vsp@fe9b0000 { 2993 compatible = "renesas,vsp2"; 2994 reg = <0 0xfe9b0000 0 0x8000>; 2995 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; 2996 clocks = <&cpg CPG_MOD 630>; 2997 power-domains = <&sysc R8A7795_PD_A3VP>; 2998 resets = <&cpg 630>; 2999 3000 renesas,fcp = <&fcpvi1>; 3001 }; 3002 3003 fdp1@fe940000 { 3004 compatible = "renesas,fdp1"; 3005 reg = <0 0xfe940000 0 0x2400>; 3006 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 3007 clocks = <&cpg CPG_MOD 119>; 3008 power-domains = <&sysc R8A7795_PD_A3VP>; 3009 resets = <&cpg 119>; 3010 renesas,fcp = <&fcpf0>; 3011 }; 3012 3013 fdp1@fe944000 { 3014 compatible = "renesas,fdp1"; 3015 reg = <0 0xfe944000 0 0x2400>; 3016 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 3017 clocks = <&cpg CPG_MOD 118>; 3018 power-domains = <&sysc R8A7795_PD_A3VP>; 3019 resets = <&cpg 118>; 3020 renesas,fcp = <&fcpf1>; 3021 }; 3022 3023 fcpf0: fcp@fe950000 { 3024 compatible = "renesas,fcpf"; 3025 reg = <0 0xfe950000 0 0x200>; 3026 clocks = <&cpg CPG_MOD 615>; 3027 power-domains = <&sysc R8A7795_PD_A3VP>; 3028 resets = <&cpg 615>; 3029 iommus = <&ipmmu_vp0 0>; 3030 }; 3031 3032 fcpf1: fcp@fe951000 { 3033 compatible = "renesas,fcpf"; 3034 reg = <0 0xfe951000 0 0x200>; 3035 clocks = <&cpg CPG_MOD 614>; 3036 power-domains = <&sysc R8A7795_PD_A3VP>; 3037 resets = <&cpg 614>; 3038 iommus = <&ipmmu_vp1 1>; 3039 }; 3040 3041 fcpvb0: fcp@fe96f000 { 3042 compatible = "renesas,fcpv"; 3043 reg = <0 0xfe96f000 0 0x200>; 3044 clocks = <&cpg CPG_MOD 607>; 3045 power-domains = <&sysc R8A7795_PD_A3VP>; 3046 resets = <&cpg 607>; 3047 iommus = <&ipmmu_vp0 5>; 3048 }; 3049 3050 fcpvb1: fcp@fe92f000 { 3051 compatible = "renesas,fcpv"; 3052 reg = <0 0xfe92f000 0 0x200>; 3053 clocks = <&cpg CPG_MOD 606>; 3054 power-domains = <&sysc R8A7795_PD_A3VP>; 3055 resets = <&cpg 606>; 3056 iommus = <&ipmmu_vp1 7>; 3057 }; 3058 3059 fcpvi0: fcp@fe9af000 { 3060 compatible = "renesas,fcpv"; 3061 reg = <0 0xfe9af000 0 0x200>; 3062 clocks = <&cpg CPG_MOD 611>; 3063 power-domains = <&sysc R8A7795_PD_A3VP>; 3064 resets = <&cpg 611>; 3065 iommus = <&ipmmu_vp0 8>; 3066 }; 3067 3068 fcpvi1: fcp@fe9bf000 { 3069 compatible = "renesas,fcpv"; 3070 reg = <0 0xfe9bf000 0 0x200>; 3071 clocks = <&cpg CPG_MOD 610>; 3072 power-domains = <&sysc R8A7795_PD_A3VP>; 3073 resets = <&cpg 610>; 3074 iommus = <&ipmmu_vp1 9>; 3075 }; 3076 3077 fcpvd0: fcp@fea27000 { 3078 compatible = "renesas,fcpv"; 3079 reg = <0 0xfea27000 0 0x200>; 3080 clocks = <&cpg CPG_MOD 603>; 3081 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3082 resets = <&cpg 603>; 3083 iommus = <&ipmmu_vi0 8>; 3084 }; 3085 3086 fcpvd1: fcp@fea2f000 { 3087 compatible = "renesas,fcpv"; 3088 reg = <0 0xfea2f000 0 0x200>; 3089 clocks = <&cpg CPG_MOD 602>; 3090 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3091 resets = <&cpg 602>; 3092 iommus = <&ipmmu_vi0 9>; 3093 }; 3094 3095 fcpvd2: fcp@fea37000 { 3096 compatible = "renesas,fcpv"; 3097 reg = <0 0xfea37000 0 0x200>; 3098 clocks = <&cpg CPG_MOD 601>; 3099 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3100 resets = <&cpg 601>; 3101 iommus = <&ipmmu_vi1 10>; 3102 }; 3103 3104 cmm0: cmm@fea40000 { 3105 compatible = "renesas,r8a7795-cmm", 3106 "renesas,rcar-gen3-cmm"; 3107 reg = <0 0xfea40000 0 0x1000>; 3108 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3109 clocks = <&cpg CPG_MOD 711>; 3110 resets = <&cpg 711>; 3111 }; 3112 3113 cmm1: cmm@fea50000 { 3114 compatible = "renesas,r8a7795-cmm", 3115 "renesas,rcar-gen3-cmm"; 3116 reg = <0 0xfea50000 0 0x1000>; 3117 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3118 clocks = <&cpg CPG_MOD 710>; 3119 resets = <&cpg 710>; 3120 }; 3121 3122 cmm2: cmm@fea60000 { 3123 compatible = "renesas,r8a7795-cmm", 3124 "renesas,rcar-gen3-cmm"; 3125 reg = <0 0xfea60000 0 0x1000>; 3126 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3127 clocks = <&cpg CPG_MOD 709>; 3128 resets = <&cpg 709>; 3129 }; 3130 3131 cmm3: cmm@fea70000 { 3132 compatible = "renesas,r8a7795-cmm", 3133 "renesas,rcar-gen3-cmm"; 3134 reg = <0 0xfea70000 0 0x1000>; 3135 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3136 clocks = <&cpg CPG_MOD 708>; 3137 resets = <&cpg 708>; 3138 }; 3139 3140 csi20: csi2@fea80000 { 3141 compatible = "renesas,r8a7795-csi2"; 3142 reg = <0 0xfea80000 0 0x10000>; 3143 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 3144 clocks = <&cpg CPG_MOD 714>; 3145 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3146 resets = <&cpg 714>; 3147 status = "disabled"; 3148 3149 ports { 3150 #address-cells = <1>; 3151 #size-cells = <0>; 3152 3153 port@0 { 3154 reg = <0>; 3155 }; 3156 3157 port@1 { 3158 #address-cells = <1>; 3159 #size-cells = <0>; 3160 3161 reg = <1>; 3162 3163 csi20vin0: endpoint@0 { 3164 reg = <0>; 3165 remote-endpoint = <&vin0csi20>; 3166 }; 3167 csi20vin1: endpoint@1 { 3168 reg = <1>; 3169 remote-endpoint = <&vin1csi20>; 3170 }; 3171 csi20vin2: endpoint@2 { 3172 reg = <2>; 3173 remote-endpoint = <&vin2csi20>; 3174 }; 3175 csi20vin3: endpoint@3 { 3176 reg = <3>; 3177 remote-endpoint = <&vin3csi20>; 3178 }; 3179 csi20vin4: endpoint@4 { 3180 reg = <4>; 3181 remote-endpoint = <&vin4csi20>; 3182 }; 3183 csi20vin5: endpoint@5 { 3184 reg = <5>; 3185 remote-endpoint = <&vin5csi20>; 3186 }; 3187 csi20vin6: endpoint@6 { 3188 reg = <6>; 3189 remote-endpoint = <&vin6csi20>; 3190 }; 3191 csi20vin7: endpoint@7 { 3192 reg = <7>; 3193 remote-endpoint = <&vin7csi20>; 3194 }; 3195 }; 3196 }; 3197 }; 3198 3199 csi40: csi2@feaa0000 { 3200 compatible = "renesas,r8a7795-csi2"; 3201 reg = <0 0xfeaa0000 0 0x10000>; 3202 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 3203 clocks = <&cpg CPG_MOD 716>; 3204 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3205 resets = <&cpg 716>; 3206 status = "disabled"; 3207 3208 ports { 3209 #address-cells = <1>; 3210 #size-cells = <0>; 3211 3212 port@0 { 3213 reg = <0>; 3214 }; 3215 3216 port@1 { 3217 #address-cells = <1>; 3218 #size-cells = <0>; 3219 3220 reg = <1>; 3221 3222 csi40vin0: endpoint@0 { 3223 reg = <0>; 3224 remote-endpoint = <&vin0csi40>; 3225 }; 3226 csi40vin1: endpoint@1 { 3227 reg = <1>; 3228 remote-endpoint = <&vin1csi40>; 3229 }; 3230 csi40vin2: endpoint@2 { 3231 reg = <2>; 3232 remote-endpoint = <&vin2csi40>; 3233 }; 3234 csi40vin3: endpoint@3 { 3235 reg = <3>; 3236 remote-endpoint = <&vin3csi40>; 3237 }; 3238 }; 3239 }; 3240 }; 3241 3242 csi41: csi2@feab0000 { 3243 compatible = "renesas,r8a7795-csi2"; 3244 reg = <0 0xfeab0000 0 0x10000>; 3245 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; 3246 clocks = <&cpg CPG_MOD 715>; 3247 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3248 resets = <&cpg 715>; 3249 status = "disabled"; 3250 3251 ports { 3252 #address-cells = <1>; 3253 #size-cells = <0>; 3254 3255 port@0 { 3256 reg = <0>; 3257 }; 3258 3259 port@1 { 3260 #address-cells = <1>; 3261 #size-cells = <0>; 3262 3263 reg = <1>; 3264 3265 csi41vin4: endpoint@0 { 3266 reg = <0>; 3267 remote-endpoint = <&vin4csi41>; 3268 }; 3269 csi41vin5: endpoint@1 { 3270 reg = <1>; 3271 remote-endpoint = <&vin5csi41>; 3272 }; 3273 csi41vin6: endpoint@2 { 3274 reg = <2>; 3275 remote-endpoint = <&vin6csi41>; 3276 }; 3277 csi41vin7: endpoint@3 { 3278 reg = <3>; 3279 remote-endpoint = <&vin7csi41>; 3280 }; 3281 }; 3282 }; 3283 }; 3284 3285 hdmi0: hdmi@fead0000 { 3286 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3287 reg = <0 0xfead0000 0 0x10000>; 3288 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 3289 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3290 clock-names = "iahb", "isfr"; 3291 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3292 resets = <&cpg 729>; 3293 status = "disabled"; 3294 3295 ports { 3296 #address-cells = <1>; 3297 #size-cells = <0>; 3298 port@0 { 3299 reg = <0>; 3300 dw_hdmi0_in: endpoint { 3301 remote-endpoint = <&du_out_hdmi0>; 3302 }; 3303 }; 3304 port@1 { 3305 reg = <1>; 3306 }; 3307 port@2 { 3308 /* HDMI sound */ 3309 reg = <2>; 3310 }; 3311 }; 3312 }; 3313 3314 hdmi1: hdmi@feae0000 { 3315 compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; 3316 reg = <0 0xfeae0000 0 0x10000>; 3317 interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>; 3318 clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>; 3319 clock-names = "iahb", "isfr"; 3320 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3321 resets = <&cpg 728>; 3322 status = "disabled"; 3323 3324 ports { 3325 #address-cells = <1>; 3326 #size-cells = <0>; 3327 port@0 { 3328 reg = <0>; 3329 dw_hdmi1_in: endpoint { 3330 remote-endpoint = <&du_out_hdmi1>; 3331 }; 3332 }; 3333 port@1 { 3334 reg = <1>; 3335 }; 3336 port@2 { 3337 /* HDMI sound */ 3338 reg = <2>; 3339 }; 3340 }; 3341 }; 3342 3343 du: display@feb00000 { 3344 compatible = "renesas,du-r8a7795"; 3345 reg = <0 0xfeb00000 0 0x80000>; 3346 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 3347 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 3348 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>, 3349 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 3350 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 3351 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>; 3352 clock-names = "du.0", "du.1", "du.2", "du.3"; 3353 resets = <&cpg 724>, <&cpg 722>; 3354 reset-names = "du.0", "du.2"; 3355 3356 renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>; 3357 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, 3358 <&vspd0 1>; 3359 3360 status = "disabled"; 3361 3362 ports { 3363 #address-cells = <1>; 3364 #size-cells = <0>; 3365 3366 port@0 { 3367 reg = <0>; 3368 }; 3369 port@1 { 3370 reg = <1>; 3371 du_out_hdmi0: endpoint { 3372 remote-endpoint = <&dw_hdmi0_in>; 3373 }; 3374 }; 3375 port@2 { 3376 reg = <2>; 3377 du_out_hdmi1: endpoint { 3378 remote-endpoint = <&dw_hdmi1_in>; 3379 }; 3380 }; 3381 port@3 { 3382 reg = <3>; 3383 du_out_lvds0: endpoint { 3384 remote-endpoint = <&lvds0_in>; 3385 }; 3386 }; 3387 }; 3388 }; 3389 3390 lvds0: lvds@feb90000 { 3391 compatible = "renesas,r8a7795-lvds"; 3392 reg = <0 0xfeb90000 0 0x14>; 3393 clocks = <&cpg CPG_MOD 727>; 3394 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 3395 resets = <&cpg 727>; 3396 status = "disabled"; 3397 3398 ports { 3399 #address-cells = <1>; 3400 #size-cells = <0>; 3401 3402 port@0 { 3403 reg = <0>; 3404 lvds0_in: endpoint { 3405 remote-endpoint = <&du_out_lvds0>; 3406 }; 3407 }; 3408 port@1 { 3409 reg = <1>; 3410 }; 3411 }; 3412 }; 3413 3414 prr: chipid@fff00044 { 3415 compatible = "renesas,prr"; 3416 reg = <0 0xfff00044 0 4>; 3417 bootph-all; 3418 }; 3419 }; 3420 3421 thermal-zones { 3422 sensor1_thermal: sensor1-thermal { 3423 polling-delay-passive = <250>; 3424 polling-delay = <1000>; 3425 thermal-sensors = <&tsc 0>; 3426 sustainable-power = <6313>; 3427 3428 trips { 3429 sensor1_crit: sensor1-crit { 3430 temperature = <120000>; 3431 hysteresis = <1000>; 3432 type = "critical"; 3433 }; 3434 }; 3435 }; 3436 3437 sensor2_thermal: sensor2-thermal { 3438 polling-delay-passive = <250>; 3439 polling-delay = <1000>; 3440 thermal-sensors = <&tsc 1>; 3441 sustainable-power = <6313>; 3442 3443 trips { 3444 sensor2_crit: sensor2-crit { 3445 temperature = <120000>; 3446 hysteresis = <1000>; 3447 type = "critical"; 3448 }; 3449 }; 3450 }; 3451 3452 sensor3_thermal: sensor3-thermal { 3453 polling-delay-passive = <250>; 3454 polling-delay = <1000>; 3455 thermal-sensors = <&tsc 2>; 3456 3457 trips { 3458 target: trip-point1 { 3459 temperature = <100000>; 3460 hysteresis = <1000>; 3461 type = "passive"; 3462 }; 3463 3464 sensor3_crit: sensor3-crit { 3465 temperature = <120000>; 3466 hysteresis = <1000>; 3467 type = "critical"; 3468 }; 3469 }; 3470 3471 cooling-maps { 3472 map0 { 3473 trip = <&target>; 3474 cooling-device = <&a57_0 2 4>; 3475 contribution = <1024>; 3476 }; 3477 3478 map1 { 3479 trip = <&target>; 3480 cooling-device = <&a53_0 0 2>; 3481 contribution = <1024>; 3482 }; 3483 }; 3484 }; 3485 }; 3486 3487 timer { 3488 compatible = "arm,armv8-timer"; 3489 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3490 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3491 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, 3492 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; 3493 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 3494 }; 3495 3496 /* External USB clocks - can be overridden by the board */ 3497 usb3s0_clk: usb3s0 { 3498 compatible = "fixed-clock"; 3499 #clock-cells = <0>; 3500 clock-frequency = <0>; 3501 }; 3502 3503 usb_extal_clk: usb_extal { 3504 compatible = "fixed-clock"; 3505 #clock-cells = <0>; 3506 clock-frequency = <0>; 3507 }; 3508}; 3509