1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer 6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial 7 * interface standard output. 8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale 9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of 10 * +-125/+-245/+-500/+-1000/+-2000 dps 11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer 12 * allowing dynamic batching of sensor data. 13 * LSM9DSx series is similar but includes an additional magnetometer, handled 14 * by a different driver. 15 * 16 * Supported sensors: 17 * 18 * - LSM6DS3 19 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416 20 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 21 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 22 * - FIFO size: 8KB 23 * 24 * - ISM330DLC 25 * - LSM6DS3H 26 * - LSM6DS3TR-C 27 * - LSM6DSL 28 * - LSM6DSM 29 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416 30 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 31 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 32 * - FIFO size: 4KB 33 * 34 * - ASM330LHH 35 * - ASM330LHHX 36 * - ASM330LHHXG1 37 * - ISM330DHCX 38 * - ISM330IS 39 * - LSM6DSO 40 * - LSM6DSO16IS 41 * - LSM6DSOP 42 * - LSM6DSOX 43 * - LSM6DSR 44 * - LSM6DST 45 * - LSM6DSTX 46 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416, 47 * 833 48 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 49 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 50 * - FIFO size: 3KB 51 * 52 * - LSM6DSV 53 * - LSM6DSV16X 54 * - Accelerometer/Gyroscope supported ODR [Hz]: 7.5, 15, 30, 60, 120, 240, 55 * 480, 960 56 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 57 * - Gyroscope supported full-scale [dps]: +-125/+-250/+-500/+-1000/+-2000 58 * - FIFO size: 3KB 59 * 60 * - LSM6DS0 61 * - LSM9DS1 62 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 63 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 64 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 65 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000 66 * - FIFO size: 32 67 * 68 * Copyright 2016 STMicroelectronics Inc. 69 * 70 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 71 * Denis Ciocca <denis.ciocca@st.com> 72 */ 73 74 #include <linux/kernel.h> 75 #include <linux/module.h> 76 #include <linux/acpi.h> 77 #include <linux/delay.h> 78 #include <linux/iio/events.h> 79 #include <linux/iio/iio.h> 80 #include <linux/iio/sysfs.h> 81 #include <linux/iio/triggered_buffer.h> 82 #include <linux/iio/trigger_consumer.h> 83 #include <linux/interrupt.h> 84 #include <linux/irq.h> 85 #include <linux/minmax.h> 86 #include <linux/pm.h> 87 #include <linux/property.h> 88 #include <linux/regmap.h> 89 #include <linux/bitfield.h> 90 91 #include <linux/platform_data/st_sensors_pdata.h> 92 93 #include "st_lsm6dsx.h" 94 95 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f 96 97 /* Raw values from the IMU are 16-bit half-precision floating-point numbers. */ 98 #define ST_LSM6DSX_CHANNEL_ROT \ 99 { \ 100 .type = IIO_ROT, \ 101 .modified = 1, \ 102 .channel2 = IIO_MOD_QUATERNION_AXIS, \ 103 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 104 .info_mask_shared_by_all_available = \ 105 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 106 .scan_index = 0, \ 107 .scan_type = { \ 108 .format = IIO_SCAN_FORMAT_FLOAT, \ 109 .realbits = 16, \ 110 .storagebits = 16, \ 111 .endianness = IIO_LE, \ 112 .repeat = 3, \ 113 }, \ 114 .ext_info = st_lsm6dsx_ext_info, \ 115 } 116 117 static const struct iio_event_spec st_lsm6dsx_ev_motion[] = { 118 { 119 .type = IIO_EV_TYPE_THRESH, 120 .dir = IIO_EV_DIR_EITHER, 121 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 122 BIT(IIO_EV_INFO_ENABLE), 123 }, 124 }; 125 126 static const struct iio_event_spec st_lsm6dsx_ev_motion_tap[] = { 127 { 128 .type = IIO_EV_TYPE_THRESH, 129 .dir = IIO_EV_DIR_EITHER, 130 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 131 BIT(IIO_EV_INFO_ENABLE), 132 }, 133 { 134 .type = IIO_EV_TYPE_GESTURE, 135 .dir = IIO_EV_DIR_SINGLETAP, 136 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 137 BIT(IIO_EV_INFO_ENABLE), 138 }, 139 }; 140 141 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { 142 ST_LSM6DSX_CHANNEL_ACC(0x28, IIO_MOD_X, 0, st_lsm6dsx_ev_motion), 143 ST_LSM6DSX_CHANNEL_ACC(0x2a, IIO_MOD_Y, 1, st_lsm6dsx_ev_motion), 144 ST_LSM6DSX_CHANNEL_ACC(0x2c, IIO_MOD_Z, 2, st_lsm6dsx_ev_motion), 145 IIO_CHAN_SOFT_TIMESTAMP(3), 146 }; 147 148 static const struct iio_chan_spec st_lsm6dsx_acc_tap_channels[] = { 149 ST_LSM6DSX_CHANNEL_ACC(0x28, IIO_MOD_X, 0, st_lsm6dsx_ev_motion_tap), 150 ST_LSM6DSX_CHANNEL_ACC(0x2a, IIO_MOD_Y, 1, st_lsm6dsx_ev_motion_tap), 151 ST_LSM6DSX_CHANNEL_ACC(0x2c, IIO_MOD_Z, 2, st_lsm6dsx_ev_motion_tap), 152 IIO_CHAN_SOFT_TIMESTAMP(3), 153 }; 154 155 static const struct iio_chan_spec st_lsm6ds0_acc_channels[] = { 156 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x28, IIO_MOD_X, 0), 157 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), 158 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), 159 IIO_CHAN_SOFT_TIMESTAMP(3), 160 }; 161 162 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = { 163 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), 164 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), 165 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), 166 IIO_CHAN_SOFT_TIMESTAMP(3), 167 }; 168 169 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { 170 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), 171 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), 172 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), 173 IIO_CHAN_SOFT_TIMESTAMP(3), 174 }; 175 176 static const struct iio_chan_spec st_lsm6dsx_fusion_channels[] = { 177 ST_LSM6DSX_CHANNEL_ROT, 178 IIO_CHAN_SOFT_TIMESTAMP(1), 179 }; 180 181 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 182 { 183 .reset = { 184 .addr = 0x22, 185 .mask = BIT(0), 186 }, 187 .boot = { 188 .addr = 0x22, 189 .mask = BIT(7), 190 }, 191 .bdu = { 192 .addr = 0x22, 193 .mask = BIT(6), 194 }, 195 .id = { 196 { 197 .hw_id = ST_LSM9DS1_ID, 198 .name = ST_LSM9DS1_DEV_NAME, 199 .wai = 0x68, 200 }, { 201 .hw_id = ST_LSM6DS0_ID, 202 .name = ST_LSM6DS0_DEV_NAME, 203 .wai = 0x68, 204 }, 205 }, 206 .channels = { 207 [ST_LSM6DSX_ID_ACC] = { 208 .chan = st_lsm6ds0_acc_channels, 209 .len = ARRAY_SIZE(st_lsm6ds0_acc_channels), 210 }, 211 [ST_LSM6DSX_ID_GYRO] = { 212 .chan = st_lsm6ds0_gyro_channels, 213 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels), 214 }, 215 }, 216 .odr_table = { 217 [ST_LSM6DSX_ID_ACC] = { 218 .reg = { 219 .addr = 0x20, 220 .mask = GENMASK(7, 5), 221 }, 222 .odr_avl[0] = { 10000, 0x01 }, 223 .odr_avl[1] = { 50000, 0x02 }, 224 .odr_avl[2] = { 119000, 0x03 }, 225 .odr_avl[3] = { 238000, 0x04 }, 226 .odr_avl[4] = { 476000, 0x05 }, 227 .odr_avl[5] = { 952000, 0x06 }, 228 .odr_len = 6, 229 }, 230 [ST_LSM6DSX_ID_GYRO] = { 231 .reg = { 232 .addr = 0x10, 233 .mask = GENMASK(7, 5), 234 }, 235 .odr_avl[0] = { 14900, 0x01 }, 236 .odr_avl[1] = { 59500, 0x02 }, 237 .odr_avl[2] = { 119000, 0x03 }, 238 .odr_avl[3] = { 238000, 0x04 }, 239 .odr_avl[4] = { 476000, 0x05 }, 240 .odr_avl[5] = { 952000, 0x06 }, 241 .odr_len = 6, 242 }, 243 }, 244 .fs_table = { 245 [ST_LSM6DSX_ID_ACC] = { 246 .reg = { 247 .addr = 0x20, 248 .mask = GENMASK(4, 3), 249 }, 250 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 251 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 252 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 253 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 }, 254 .fs_len = 4, 255 }, 256 [ST_LSM6DSX_ID_GYRO] = { 257 .reg = { 258 .addr = 0x10, 259 .mask = GENMASK(4, 3), 260 }, 261 262 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 263 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 264 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 265 .fs_len = 3, 266 }, 267 }, 268 .irq_config = { 269 .irq1 = { 270 .addr = 0x0c, 271 .mask = BIT(3), 272 }, 273 .irq2 = { 274 .addr = 0x0d, 275 .mask = BIT(3), 276 }, 277 .hla = { 278 .addr = 0x22, 279 .mask = BIT(5), 280 }, 281 .od = { 282 .addr = 0x22, 283 .mask = BIT(4), 284 }, 285 }, 286 .fifo_ops = { 287 .max_size = 32, 288 }, 289 }, 290 { 291 .reset = { 292 .addr = 0x12, 293 .mask = BIT(0), 294 }, 295 .boot = { 296 .addr = 0x12, 297 .mask = BIT(7), 298 }, 299 .bdu = { 300 .addr = 0x12, 301 .mask = BIT(6), 302 }, 303 .id = { 304 { 305 .hw_id = ST_LSM6DS3_ID, 306 .name = ST_LSM6DS3_DEV_NAME, 307 .wai = 0x69, 308 }, 309 }, 310 .channels = { 311 [ST_LSM6DSX_ID_ACC] = { 312 .chan = st_lsm6dsx_acc_channels, 313 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 314 }, 315 [ST_LSM6DSX_ID_GYRO] = { 316 .chan = st_lsm6dsx_gyro_channels, 317 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 318 }, 319 }, 320 .odr_table = { 321 [ST_LSM6DSX_ID_ACC] = { 322 .reg = { 323 .addr = 0x10, 324 .mask = GENMASK(7, 4), 325 }, 326 .odr_avl[0] = { 12500, 0x01 }, 327 .odr_avl[1] = { 26000, 0x02 }, 328 .odr_avl[2] = { 52000, 0x03 }, 329 .odr_avl[3] = { 104000, 0x04 }, 330 .odr_avl[4] = { 208000, 0x05 }, 331 .odr_avl[5] = { 416000, 0x06 }, 332 .odr_len = 6, 333 }, 334 [ST_LSM6DSX_ID_GYRO] = { 335 .reg = { 336 .addr = 0x11, 337 .mask = GENMASK(7, 4), 338 }, 339 .odr_avl[0] = { 12500, 0x01 }, 340 .odr_avl[1] = { 26000, 0x02 }, 341 .odr_avl[2] = { 52000, 0x03 }, 342 .odr_avl[3] = { 104000, 0x04 }, 343 .odr_avl[4] = { 208000, 0x05 }, 344 .odr_avl[5] = { 416000, 0x06 }, 345 .odr_len = 6, 346 }, 347 }, 348 .fs_table = { 349 [ST_LSM6DSX_ID_ACC] = { 350 .reg = { 351 .addr = 0x10, 352 .mask = GENMASK(3, 2), 353 }, 354 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 355 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 356 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 357 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 358 .fs_len = 4, 359 }, 360 [ST_LSM6DSX_ID_GYRO] = { 361 .reg = { 362 .addr = 0x11, 363 .mask = GENMASK(3, 2), 364 }, 365 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 366 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 367 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 368 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 369 .fs_len = 4, 370 }, 371 }, 372 .irq_config = { 373 .irq1 = { 374 .addr = 0x0d, 375 .mask = BIT(3), 376 }, 377 .irq2 = { 378 .addr = 0x0e, 379 .mask = BIT(3), 380 }, 381 .lir = { 382 .addr = 0x58, 383 .mask = BIT(0), 384 }, 385 .irq1_func = 0x5e, 386 .irq2_func = 0x5f, 387 .hla = { 388 .addr = 0x12, 389 .mask = BIT(5), 390 }, 391 .od = { 392 .addr = 0x12, 393 .mask = BIT(4), 394 }, 395 }, 396 .decimator = { 397 [ST_LSM6DSX_ID_ACC] = { 398 .addr = 0x08, 399 .mask = GENMASK(2, 0), 400 }, 401 [ST_LSM6DSX_ID_GYRO] = { 402 .addr = 0x08, 403 .mask = GENMASK(5, 3), 404 }, 405 }, 406 .fifo_ops = { 407 .update_fifo = st_lsm6dsx_update_fifo, 408 .read_fifo = st_lsm6dsx_read_fifo, 409 .fifo_th = { 410 .addr = 0x06, 411 .mask = GENMASK(11, 0), 412 }, 413 .fifo_diff = { 414 .addr = 0x3a, 415 .mask = GENMASK(11, 0), 416 }, 417 .max_size = 1365, 418 .th_wl = 3, /* 1LSB = 2B */ 419 }, 420 .ts_settings = { 421 .timer_en = { 422 .addr = 0x58, 423 .mask = BIT(7), 424 }, 425 .hr_timer = { 426 .addr = 0x5c, 427 .mask = BIT(4), 428 }, 429 .fifo_en = { 430 .addr = 0x07, 431 .mask = BIT(7), 432 }, 433 .decimator = { 434 .addr = 0x09, 435 .mask = GENMASK(5, 3), 436 }, 437 }, 438 .event_settings = { 439 .sources = { 440 [ST_LSM6DSX_EVENT_WAKEUP] = { 441 .value = { 442 .addr = 0x5b, 443 .mask = GENMASK(5, 0), 444 }, 445 .enable_mask = BIT(5), 446 .status = { 447 .addr = 0x1b, 448 .mask = BIT(3), 449 }, 450 .status_z_mask = BIT(0), 451 .status_y_mask = BIT(1), 452 .status_x_mask = BIT(2), 453 }, 454 }, 455 }, 456 }, 457 { 458 .reset = { 459 .addr = 0x12, 460 .mask = BIT(0), 461 }, 462 .boot = { 463 .addr = 0x12, 464 .mask = BIT(7), 465 }, 466 .bdu = { 467 .addr = 0x12, 468 .mask = BIT(6), 469 }, 470 .id = { 471 { 472 .hw_id = ST_LSM6DS3H_ID, 473 .name = ST_LSM6DS3H_DEV_NAME, 474 .wai = 0x69, 475 }, 476 }, 477 .channels = { 478 [ST_LSM6DSX_ID_ACC] = { 479 .chan = st_lsm6dsx_acc_channels, 480 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 481 }, 482 [ST_LSM6DSX_ID_GYRO] = { 483 .chan = st_lsm6dsx_gyro_channels, 484 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 485 }, 486 }, 487 .odr_table = { 488 [ST_LSM6DSX_ID_ACC] = { 489 .reg = { 490 .addr = 0x10, 491 .mask = GENMASK(7, 4), 492 }, 493 .odr_avl[0] = { 12500, 0x01 }, 494 .odr_avl[1] = { 26000, 0x02 }, 495 .odr_avl[2] = { 52000, 0x03 }, 496 .odr_avl[3] = { 104000, 0x04 }, 497 .odr_avl[4] = { 208000, 0x05 }, 498 .odr_avl[5] = { 416000, 0x06 }, 499 .odr_len = 6, 500 }, 501 [ST_LSM6DSX_ID_GYRO] = { 502 .reg = { 503 .addr = 0x11, 504 .mask = GENMASK(7, 4), 505 }, 506 .odr_avl[0] = { 12500, 0x01 }, 507 .odr_avl[1] = { 26000, 0x02 }, 508 .odr_avl[2] = { 52000, 0x03 }, 509 .odr_avl[3] = { 104000, 0x04 }, 510 .odr_avl[4] = { 208000, 0x05 }, 511 .odr_avl[5] = { 416000, 0x06 }, 512 .odr_len = 6, 513 }, 514 }, 515 .fs_table = { 516 [ST_LSM6DSX_ID_ACC] = { 517 .reg = { 518 .addr = 0x10, 519 .mask = GENMASK(3, 2), 520 }, 521 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 522 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 523 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 524 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 525 .fs_len = 4, 526 }, 527 [ST_LSM6DSX_ID_GYRO] = { 528 .reg = { 529 .addr = 0x11, 530 .mask = GENMASK(3, 2), 531 }, 532 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 533 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 534 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 535 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 536 .fs_len = 4, 537 }, 538 }, 539 .irq_config = { 540 .irq1 = { 541 .addr = 0x0d, 542 .mask = BIT(3), 543 }, 544 .irq2 = { 545 .addr = 0x0e, 546 .mask = BIT(3), 547 }, 548 .lir = { 549 .addr = 0x58, 550 .mask = BIT(0), 551 }, 552 .irq1_func = 0x5e, 553 .irq2_func = 0x5f, 554 .hla = { 555 .addr = 0x12, 556 .mask = BIT(5), 557 }, 558 .od = { 559 .addr = 0x12, 560 .mask = BIT(4), 561 }, 562 }, 563 .decimator = { 564 [ST_LSM6DSX_ID_ACC] = { 565 .addr = 0x08, 566 .mask = GENMASK(2, 0), 567 }, 568 [ST_LSM6DSX_ID_GYRO] = { 569 .addr = 0x08, 570 .mask = GENMASK(5, 3), 571 }, 572 }, 573 .fifo_ops = { 574 .update_fifo = st_lsm6dsx_update_fifo, 575 .read_fifo = st_lsm6dsx_read_fifo, 576 .fifo_th = { 577 .addr = 0x06, 578 .mask = GENMASK(11, 0), 579 }, 580 .fifo_diff = { 581 .addr = 0x3a, 582 .mask = GENMASK(11, 0), 583 }, 584 .max_size = 682, 585 .th_wl = 3, /* 1LSB = 2B */ 586 }, 587 .ts_settings = { 588 .timer_en = { 589 .addr = 0x58, 590 .mask = BIT(7), 591 }, 592 .hr_timer = { 593 .addr = 0x5c, 594 .mask = BIT(4), 595 }, 596 .fifo_en = { 597 .addr = 0x07, 598 .mask = BIT(7), 599 }, 600 .decimator = { 601 .addr = 0x09, 602 .mask = GENMASK(5, 3), 603 }, 604 }, 605 .event_settings = { 606 .sources = { 607 [ST_LSM6DSX_EVENT_WAKEUP] = { 608 .value = { 609 .addr = 0x5b, 610 .mask = GENMASK(5, 0), 611 }, 612 .enable_mask = BIT(5), 613 .status = { 614 .addr = 0x1b, 615 .mask = BIT(3), 616 }, 617 .status_z_mask = BIT(0), 618 .status_y_mask = BIT(1), 619 .status_x_mask = BIT(2), 620 }, 621 }, 622 }, 623 }, 624 { 625 .reset = { 626 .addr = 0x12, 627 .mask = BIT(0), 628 }, 629 .boot = { 630 .addr = 0x12, 631 .mask = BIT(7), 632 }, 633 .bdu = { 634 .addr = 0x12, 635 .mask = BIT(6), 636 }, 637 .id = { 638 { 639 .hw_id = ST_LSM6DSL_ID, 640 .name = ST_LSM6DSL_DEV_NAME, 641 .wai = 0x6a, 642 }, { 643 .hw_id = ST_LSM6DSM_ID, 644 .name = ST_LSM6DSM_DEV_NAME, 645 .wai = 0x6a, 646 }, { 647 .hw_id = ST_ISM330DLC_ID, 648 .name = ST_ISM330DLC_DEV_NAME, 649 .wai = 0x6a, 650 }, { 651 .hw_id = ST_LSM6DS3TRC_ID, 652 .name = ST_LSM6DS3TRC_DEV_NAME, 653 .wai = 0x6a, 654 }, 655 }, 656 .channels = { 657 [ST_LSM6DSX_ID_ACC] = { 658 .chan = st_lsm6dsx_acc_channels, 659 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 660 }, 661 [ST_LSM6DSX_ID_GYRO] = { 662 .chan = st_lsm6dsx_gyro_channels, 663 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 664 }, 665 }, 666 .odr_table = { 667 [ST_LSM6DSX_ID_ACC] = { 668 .reg = { 669 .addr = 0x10, 670 .mask = GENMASK(7, 4), 671 }, 672 .odr_avl[0] = { 12500, 0x01 }, 673 .odr_avl[1] = { 26000, 0x02 }, 674 .odr_avl[2] = { 52000, 0x03 }, 675 .odr_avl[3] = { 104000, 0x04 }, 676 .odr_avl[4] = { 208000, 0x05 }, 677 .odr_avl[5] = { 416000, 0x06 }, 678 .odr_len = 6, 679 }, 680 [ST_LSM6DSX_ID_GYRO] = { 681 .reg = { 682 .addr = 0x11, 683 .mask = GENMASK(7, 4), 684 }, 685 .odr_avl[0] = { 12500, 0x01 }, 686 .odr_avl[1] = { 26000, 0x02 }, 687 .odr_avl[2] = { 52000, 0x03 }, 688 .odr_avl[3] = { 104000, 0x04 }, 689 .odr_avl[4] = { 208000, 0x05 }, 690 .odr_avl[5] = { 416000, 0x06 }, 691 .odr_len = 6, 692 }, 693 }, 694 .fs_table = { 695 [ST_LSM6DSX_ID_ACC] = { 696 .reg = { 697 .addr = 0x10, 698 .mask = GENMASK(3, 2), 699 }, 700 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 701 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 702 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 703 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 704 .fs_len = 4, 705 }, 706 [ST_LSM6DSX_ID_GYRO] = { 707 .reg = { 708 .addr = 0x11, 709 .mask = GENMASK(3, 2), 710 }, 711 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 712 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 713 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 714 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 715 .fs_len = 4, 716 }, 717 }, 718 .samples_to_discard = { 719 [ST_LSM6DSX_ID_ACC] = { 720 .val[0] = { 12500, 1 }, 721 .val[1] = { 26000, 1 }, 722 .val[2] = { 52000, 1 }, 723 .val[3] = { 104000, 2 }, 724 .val[4] = { 208000, 2 }, 725 .val[5] = { 416000, 2 }, 726 }, 727 [ST_LSM6DSX_ID_GYRO] = { 728 .val[0] = { 12500, 2 }, 729 .val[1] = { 26000, 5 }, 730 .val[2] = { 52000, 7 }, 731 .val[3] = { 104000, 12 }, 732 .val[4] = { 208000, 20 }, 733 .val[5] = { 416000, 36 }, 734 }, 735 }, 736 .irq_config = { 737 .irq1 = { 738 .addr = 0x0d, 739 .mask = BIT(3), 740 }, 741 .irq2 = { 742 .addr = 0x0e, 743 .mask = BIT(3), 744 }, 745 .lir = { 746 .addr = 0x58, 747 .mask = BIT(0), 748 }, 749 .irq1_func = 0x5e, 750 .irq2_func = 0x5f, 751 .hla = { 752 .addr = 0x12, 753 .mask = BIT(5), 754 }, 755 .od = { 756 .addr = 0x12, 757 .mask = BIT(4), 758 }, 759 }, 760 .decimator = { 761 [ST_LSM6DSX_ID_ACC] = { 762 .addr = 0x08, 763 .mask = GENMASK(2, 0), 764 }, 765 [ST_LSM6DSX_ID_GYRO] = { 766 .addr = 0x08, 767 .mask = GENMASK(5, 3), 768 }, 769 [ST_LSM6DSX_ID_EXT0] = { 770 .addr = 0x09, 771 .mask = GENMASK(2, 0), 772 }, 773 }, 774 .fifo_ops = { 775 .update_fifo = st_lsm6dsx_update_fifo, 776 .read_fifo = st_lsm6dsx_read_fifo, 777 .fifo_th = { 778 .addr = 0x06, 779 .mask = GENMASK(10, 0), 780 }, 781 .fifo_diff = { 782 .addr = 0x3a, 783 .mask = GENMASK(10, 0), 784 }, 785 .max_size = 682, 786 .th_wl = 3, /* 1LSB = 2B */ 787 }, 788 .ts_settings = { 789 .timer_en = { 790 .addr = 0x19, 791 .mask = BIT(5), 792 }, 793 .hr_timer = { 794 .addr = 0x5c, 795 .mask = BIT(4), 796 }, 797 .fifo_en = { 798 .addr = 0x07, 799 .mask = BIT(7), 800 }, 801 .decimator = { 802 .addr = 0x09, 803 .mask = GENMASK(5, 3), 804 }, 805 }, 806 .shub_settings = { 807 .page_mux = { 808 .addr = 0x01, 809 .mask = BIT(7), 810 }, 811 .master_en = { 812 .addr = 0x1a, 813 .mask = BIT(0), 814 }, 815 .pullup_en = { 816 .addr = 0x1a, 817 .mask = BIT(3), 818 }, 819 .aux_sens = { 820 .addr = 0x04, 821 .mask = GENMASK(5, 4), 822 }, 823 .wr_once = { 824 .addr = 0x07, 825 .mask = BIT(5), 826 }, 827 .emb_func = { 828 .addr = 0x19, 829 .mask = BIT(2), 830 }, 831 .num_ext_dev = 1, 832 .shub_out = { 833 .addr = 0x2e, 834 }, 835 .slv0_addr = 0x02, 836 .dw_slv0_addr = 0x0e, 837 .pause = 0x7, 838 }, 839 .event_settings = { 840 .enable_reg = { 841 .addr = 0x58, 842 .mask = BIT(7), 843 }, 844 .sources = { 845 [ST_LSM6DSX_EVENT_WAKEUP] = { 846 .value = { 847 .addr = 0x5b, 848 .mask = GENMASK(5, 0), 849 }, 850 .enable_mask = BIT(5), 851 .status = { 852 .addr = 0x1b, 853 .mask = BIT(3), 854 }, 855 .status_z_mask = BIT(0), 856 .status_y_mask = BIT(1), 857 .status_x_mask = BIT(2), 858 }, 859 }, 860 }, 861 }, 862 { 863 .reset = { 864 .addr = 0x12, 865 .mask = BIT(0), 866 }, 867 .boot = { 868 .addr = 0x12, 869 .mask = BIT(7), 870 }, 871 .bdu = { 872 .addr = 0x12, 873 .mask = BIT(6), 874 }, 875 .id = { 876 { 877 .hw_id = ST_LSM6DSR_ID, 878 .name = ST_LSM6DSR_DEV_NAME, 879 .wai = 0x6b, 880 }, { 881 .hw_id = ST_ISM330DHCX_ID, 882 .name = ST_ISM330DHCX_DEV_NAME, 883 .wai = 0x6b, 884 }, { 885 .hw_id = ST_LSM6DSRX_ID, 886 .name = ST_LSM6DSRX_DEV_NAME, 887 .wai = 0x6b, 888 }, { 889 .hw_id = ST_LSM6DSO_ID, 890 .name = ST_LSM6DSO_DEV_NAME, 891 .wai = 0x6c, 892 }, { 893 .hw_id = ST_LSM6DSOX_ID, 894 .name = ST_LSM6DSOX_DEV_NAME, 895 .wai = 0x6c, 896 }, { 897 .hw_id = ST_LSM6DST_ID, 898 .name = ST_LSM6DST_DEV_NAME, 899 .wai = 0x6d, 900 }, { 901 .hw_id = ST_ASM330LHHX_ID, 902 .name = ST_ASM330LHHX_DEV_NAME, 903 .wai = 0x6b, 904 }, { 905 .hw_id = ST_ASM330LHHXG1_ID, 906 .name = ST_ASM330LHHXG1_DEV_NAME, 907 .wai = 0x6b, 908 }, { 909 .hw_id = ST_LSM6DSTX_ID, 910 .name = ST_LSM6DSTX_DEV_NAME, 911 .wai = 0x6d, 912 }, 913 }, 914 .channels = { 915 [ST_LSM6DSX_ID_ACC] = { 916 .chan = st_lsm6dsx_acc_channels, 917 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 918 }, 919 [ST_LSM6DSX_ID_GYRO] = { 920 .chan = st_lsm6dsx_gyro_channels, 921 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 922 }, 923 }, 924 .drdy_mask = { 925 .addr = 0x13, 926 .mask = BIT(3), 927 }, 928 .odr_table = { 929 [ST_LSM6DSX_ID_ACC] = { 930 .reg = { 931 .addr = 0x10, 932 .mask = GENMASK(7, 4), 933 }, 934 .odr_avl[0] = { 12500, 0x01 }, 935 .odr_avl[1] = { 26000, 0x02 }, 936 .odr_avl[2] = { 52000, 0x03 }, 937 .odr_avl[3] = { 104000, 0x04 }, 938 .odr_avl[4] = { 208000, 0x05 }, 939 .odr_avl[5] = { 416000, 0x06 }, 940 .odr_avl[6] = { 833000, 0x07 }, 941 .odr_len = 7, 942 }, 943 [ST_LSM6DSX_ID_GYRO] = { 944 .reg = { 945 .addr = 0x11, 946 .mask = GENMASK(7, 4), 947 }, 948 .odr_avl[0] = { 12500, 0x01 }, 949 .odr_avl[1] = { 26000, 0x02 }, 950 .odr_avl[2] = { 52000, 0x03 }, 951 .odr_avl[3] = { 104000, 0x04 }, 952 .odr_avl[4] = { 208000, 0x05 }, 953 .odr_avl[5] = { 416000, 0x06 }, 954 .odr_avl[6] = { 833000, 0x07 }, 955 .odr_len = 7, 956 }, 957 }, 958 .fs_table = { 959 [ST_LSM6DSX_ID_ACC] = { 960 .reg = { 961 .addr = 0x10, 962 .mask = GENMASK(3, 2), 963 }, 964 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 965 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 966 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 967 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 968 .fs_len = 4, 969 }, 970 [ST_LSM6DSX_ID_GYRO] = { 971 .reg = { 972 .addr = 0x11, 973 .mask = GENMASK(3, 2), 974 }, 975 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 976 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 977 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 978 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 979 .fs_len = 4, 980 }, 981 }, 982 .irq_config = { 983 .irq1 = { 984 .addr = 0x0d, 985 .mask = BIT(3), 986 }, 987 .irq2 = { 988 .addr = 0x0e, 989 .mask = BIT(3), 990 }, 991 .lir = { 992 .addr = 0x56, 993 .mask = BIT(0), 994 }, 995 .clear_on_read = { 996 .addr = 0x56, 997 .mask = BIT(6), 998 }, 999 .irq1_func = 0x5e, 1000 .irq2_func = 0x5f, 1001 .hla = { 1002 .addr = 0x12, 1003 .mask = BIT(5), 1004 }, 1005 .od = { 1006 .addr = 0x12, 1007 .mask = BIT(4), 1008 }, 1009 }, 1010 .batch = { 1011 [ST_LSM6DSX_ID_ACC] = { 1012 .addr = 0x09, 1013 .mask = GENMASK(3, 0), 1014 }, 1015 [ST_LSM6DSX_ID_GYRO] = { 1016 .addr = 0x09, 1017 .mask = GENMASK(7, 4), 1018 }, 1019 }, 1020 .fifo_ops = { 1021 .update_fifo = st_lsm6dsx_update_fifo, 1022 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1023 .fifo_th = { 1024 .addr = 0x07, 1025 .mask = GENMASK(8, 0), 1026 }, 1027 .fifo_diff = { 1028 .addr = 0x3a, 1029 .mask = GENMASK(9, 0), 1030 }, 1031 .max_size = 512, 1032 .th_wl = 1, 1033 }, 1034 .ts_settings = { 1035 .timer_en = { 1036 .addr = 0x19, 1037 .mask = BIT(5), 1038 }, 1039 .decimator = { 1040 .addr = 0x0a, 1041 .mask = GENMASK(7, 6), 1042 }, 1043 .freq_fine = 0x63, 1044 .ts_sensitivity = 25000, 1045 .ts_trim_coeff = 37500, 1046 }, 1047 .shub_settings = { 1048 .page_mux = { 1049 .addr = 0x01, 1050 .mask = BIT(6), 1051 }, 1052 .master_en = { 1053 .sec_page = true, 1054 .addr = 0x14, 1055 .mask = BIT(2), 1056 }, 1057 .pullup_en = { 1058 .sec_page = true, 1059 .addr = 0x14, 1060 .mask = BIT(3), 1061 }, 1062 .aux_sens = { 1063 .addr = 0x14, 1064 .mask = GENMASK(1, 0), 1065 }, 1066 .wr_once = { 1067 .addr = 0x14, 1068 .mask = BIT(6), 1069 }, 1070 .num_ext_dev = 3, 1071 .shub_out = { 1072 .sec_page = true, 1073 .addr = 0x02, 1074 }, 1075 .slv0_addr = 0x15, 1076 .dw_slv0_addr = 0x21, 1077 .batch_en = BIT(3), 1078 }, 1079 .event_settings = { 1080 .enable_reg = { 1081 .addr = 0x58, 1082 .mask = BIT(7), 1083 }, 1084 .sources = { 1085 [ST_LSM6DSX_EVENT_WAKEUP] = { 1086 .value = { 1087 .addr = 0x5b, 1088 .mask = GENMASK(5, 0), 1089 }, 1090 .enable_mask = BIT(5), 1091 .status = { 1092 .addr = 0x1b, 1093 .mask = BIT(3), 1094 }, 1095 .status_z_mask = BIT(0), 1096 .status_y_mask = BIT(1), 1097 .status_x_mask = BIT(2), 1098 }, 1099 }, 1100 }, 1101 }, 1102 { 1103 .reset = { 1104 .addr = 0x12, 1105 .mask = BIT(0), 1106 }, 1107 .boot = { 1108 .addr = 0x12, 1109 .mask = BIT(7), 1110 }, 1111 .bdu = { 1112 .addr = 0x12, 1113 .mask = BIT(6), 1114 }, 1115 .id = { 1116 { 1117 .hw_id = ST_ASM330LHH_ID, 1118 .name = ST_ASM330LHH_DEV_NAME, 1119 .wai = 0x6b, 1120 }, { 1121 .hw_id = ST_LSM6DSOP_ID, 1122 .name = ST_LSM6DSOP_DEV_NAME, 1123 .wai = 0x6c, 1124 }, { 1125 .hw_id = ST_ASM330LHB_ID, 1126 .name = ST_ASM330LHB_DEV_NAME, 1127 .wai = 0x6b, 1128 }, 1129 }, 1130 .channels = { 1131 [ST_LSM6DSX_ID_ACC] = { 1132 .chan = st_lsm6dsx_acc_channels, 1133 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 1134 }, 1135 [ST_LSM6DSX_ID_GYRO] = { 1136 .chan = st_lsm6dsx_gyro_channels, 1137 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1138 }, 1139 }, 1140 .drdy_mask = { 1141 .addr = 0x13, 1142 .mask = BIT(3), 1143 }, 1144 .odr_table = { 1145 [ST_LSM6DSX_ID_ACC] = { 1146 .reg = { 1147 .addr = 0x10, 1148 .mask = GENMASK(7, 4), 1149 }, 1150 .odr_avl[0] = { 12500, 0x01 }, 1151 .odr_avl[1] = { 26000, 0x02 }, 1152 .odr_avl[2] = { 52000, 0x03 }, 1153 .odr_avl[3] = { 104000, 0x04 }, 1154 .odr_avl[4] = { 208000, 0x05 }, 1155 .odr_avl[5] = { 416000, 0x06 }, 1156 .odr_avl[6] = { 833000, 0x07 }, 1157 .odr_len = 7, 1158 }, 1159 [ST_LSM6DSX_ID_GYRO] = { 1160 .reg = { 1161 .addr = 0x11, 1162 .mask = GENMASK(7, 4), 1163 }, 1164 .odr_avl[0] = { 12500, 0x01 }, 1165 .odr_avl[1] = { 26000, 0x02 }, 1166 .odr_avl[2] = { 52000, 0x03 }, 1167 .odr_avl[3] = { 104000, 0x04 }, 1168 .odr_avl[4] = { 208000, 0x05 }, 1169 .odr_avl[5] = { 416000, 0x06 }, 1170 .odr_avl[6] = { 833000, 0x07 }, 1171 .odr_len = 7, 1172 }, 1173 }, 1174 .fs_table = { 1175 [ST_LSM6DSX_ID_ACC] = { 1176 .reg = { 1177 .addr = 0x10, 1178 .mask = GENMASK(3, 2), 1179 }, 1180 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 1181 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 1182 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 1183 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 1184 .fs_len = 4, 1185 }, 1186 [ST_LSM6DSX_ID_GYRO] = { 1187 .reg = { 1188 .addr = 0x11, 1189 .mask = GENMASK(3, 2), 1190 }, 1191 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 1192 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 1193 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 1194 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 1195 .fs_len = 4, 1196 }, 1197 }, 1198 .irq_config = { 1199 .irq1 = { 1200 .addr = 0x0d, 1201 .mask = BIT(3), 1202 }, 1203 .irq2 = { 1204 .addr = 0x0e, 1205 .mask = BIT(3), 1206 }, 1207 .lir = { 1208 .addr = 0x56, 1209 .mask = BIT(0), 1210 }, 1211 .clear_on_read = { 1212 .addr = 0x56, 1213 .mask = BIT(6), 1214 }, 1215 .irq1_func = 0x5e, 1216 .irq2_func = 0x5f, 1217 .hla = { 1218 .addr = 0x12, 1219 .mask = BIT(5), 1220 }, 1221 .od = { 1222 .addr = 0x12, 1223 .mask = BIT(4), 1224 }, 1225 }, 1226 .batch = { 1227 [ST_LSM6DSX_ID_ACC] = { 1228 .addr = 0x09, 1229 .mask = GENMASK(3, 0), 1230 }, 1231 [ST_LSM6DSX_ID_GYRO] = { 1232 .addr = 0x09, 1233 .mask = GENMASK(7, 4), 1234 }, 1235 }, 1236 .fifo_ops = { 1237 .update_fifo = st_lsm6dsx_update_fifo, 1238 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1239 .fifo_th = { 1240 .addr = 0x07, 1241 .mask = GENMASK(8, 0), 1242 }, 1243 .fifo_diff = { 1244 .addr = 0x3a, 1245 .mask = GENMASK(9, 0), 1246 }, 1247 .max_size = 512, 1248 .th_wl = 1, 1249 }, 1250 .ts_settings = { 1251 .timer_en = { 1252 .addr = 0x19, 1253 .mask = BIT(5), 1254 }, 1255 .decimator = { 1256 .addr = 0x0a, 1257 .mask = GENMASK(7, 6), 1258 }, 1259 .freq_fine = 0x63, 1260 .ts_sensitivity = 25000, 1261 .ts_trim_coeff = 37500, 1262 }, 1263 .event_settings = { 1264 .enable_reg = { 1265 .addr = 0x58, 1266 .mask = BIT(7), 1267 }, 1268 .sources = { 1269 [ST_LSM6DSX_EVENT_WAKEUP] = { 1270 .value = { 1271 .addr = 0x5b, 1272 .mask = GENMASK(5, 0), 1273 }, 1274 .enable_mask = BIT(5), 1275 .status = { 1276 .addr = 0x1b, 1277 .mask = BIT(3), 1278 }, 1279 .status_z_mask = BIT(0), 1280 .status_y_mask = BIT(1), 1281 .status_x_mask = BIT(2), 1282 }, 1283 }, 1284 }, 1285 }, 1286 { 1287 .reset = { 1288 .addr = 0x12, 1289 .mask = BIT(0), 1290 }, 1291 .boot = { 1292 .addr = 0x12, 1293 .mask = BIT(7), 1294 }, 1295 .bdu = { 1296 .addr = 0x12, 1297 .mask = BIT(6), 1298 }, 1299 .id = { 1300 { 1301 .hw_id = ST_LSM6DSV_ID, 1302 .name = ST_LSM6DSV_DEV_NAME, 1303 .wai = 0x70, 1304 }, { 1305 .hw_id = ST_LSM6DSV16X_ID, 1306 .name = ST_LSM6DSV16X_DEV_NAME, 1307 .wai = 0x70, 1308 }, 1309 }, 1310 .channels = { 1311 [ST_LSM6DSX_ID_ACC] = { 1312 .chan = st_lsm6dsx_acc_tap_channels, 1313 .len = ARRAY_SIZE(st_lsm6dsx_acc_tap_channels), 1314 }, 1315 [ST_LSM6DSX_ID_GYRO] = { 1316 .chan = st_lsm6dsx_gyro_channels, 1317 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1318 }, 1319 }, 1320 .drdy_mask = { 1321 .addr = 0x13, 1322 .mask = BIT(3), 1323 }, 1324 .odr_table = { 1325 [ST_LSM6DSX_ID_ACC] = { 1326 .reg = { 1327 .addr = 0x10, 1328 .mask = GENMASK(3, 0), 1329 }, 1330 .odr_avl[0] = { 7500, 0x02 }, 1331 .odr_avl[1] = { 15000, 0x03 }, 1332 .odr_avl[2] = { 30000, 0x04 }, 1333 .odr_avl[3] = { 60000, 0x05 }, 1334 .odr_avl[4] = { 120000, 0x06 }, 1335 .odr_avl[5] = { 240000, 0x07 }, 1336 .odr_avl[6] = { 480000, 0x08 }, 1337 .odr_avl[7] = { 960000, 0x09 }, 1338 .odr_len = 8, 1339 }, 1340 [ST_LSM6DSX_ID_GYRO] = { 1341 .reg = { 1342 .addr = 0x11, 1343 .mask = GENMASK(3, 0), 1344 }, 1345 .odr_avl[0] = { 7500, 0x02 }, 1346 .odr_avl[1] = { 15000, 0x03 }, 1347 .odr_avl[2] = { 30000, 0x04 }, 1348 .odr_avl[3] = { 60000, 0x05 }, 1349 .odr_avl[4] = { 120000, 0x06 }, 1350 .odr_avl[5] = { 240000, 0x07 }, 1351 .odr_avl[6] = { 480000, 0x08 }, 1352 .odr_avl[7] = { 960000, 0x09 }, 1353 .odr_len = 8, 1354 }, 1355 }, 1356 .fs_table = { 1357 [ST_LSM6DSX_ID_ACC] = { 1358 .reg = { 1359 .addr = 0x17, 1360 .mask = GENMASK(1, 0), 1361 }, 1362 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 1363 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x1 }, 1364 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x2 }, 1365 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x3 }, 1366 .fs_len = 4, 1367 }, 1368 [ST_LSM6DSX_ID_GYRO] = { 1369 .reg = { 1370 .addr = 0x15, 1371 .mask = GENMASK(3, 0), 1372 }, 1373 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x1 }, 1374 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x2 }, 1375 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x3 }, 1376 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x4 }, 1377 .fs_len = 4, 1378 }, 1379 }, 1380 .irq_config = { 1381 .irq1 = { 1382 .addr = 0x0d, 1383 .mask = BIT(3), 1384 }, 1385 .irq2 = { 1386 .addr = 0x0e, 1387 .mask = BIT(3), 1388 }, 1389 .lir = { 1390 .addr = 0x56, 1391 .mask = BIT(0), 1392 }, 1393 .irq1_func = 0x5e, 1394 .irq2_func = 0x5f, 1395 .hla = { 1396 .addr = 0x03, 1397 .mask = BIT(4), 1398 }, 1399 .od = { 1400 .addr = 0x03, 1401 .mask = BIT(3), 1402 }, 1403 }, 1404 .batch = { 1405 [ST_LSM6DSX_ID_ACC] = { 1406 .addr = 0x09, 1407 .mask = GENMASK(3, 0), 1408 }, 1409 [ST_LSM6DSX_ID_GYRO] = { 1410 .addr = 0x09, 1411 .mask = GENMASK(7, 4), 1412 }, 1413 }, 1414 .fifo_ops = { 1415 .update_fifo = st_lsm6dsx_update_fifo, 1416 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1417 .fifo_th = { 1418 .addr = 0x07, 1419 .mask = GENMASK(7, 0), 1420 }, 1421 .fifo_diff = { 1422 .addr = 0x1b, 1423 .mask = GENMASK(8, 0), 1424 }, 1425 .max_size = 512, 1426 .th_wl = 1, 1427 }, 1428 .ts_settings = { 1429 .timer_en = { 1430 .addr = 0x50, 1431 .mask = BIT(6), 1432 }, 1433 .decimator = { 1434 .addr = 0x0a, 1435 .mask = GENMASK(7, 6), 1436 }, 1437 .freq_fine = 0x4f, 1438 .ts_sensitivity = 21701, 1439 .ts_trim_coeff = 28212, 1440 }, 1441 .shub_settings = { 1442 .page_mux = { 1443 .addr = 0x01, 1444 .mask = BIT(6), 1445 }, 1446 .master_en = { 1447 .sec_page = true, 1448 .addr = 0x14, 1449 .mask = BIT(2), 1450 }, 1451 .pullup_en = { 1452 .addr = 0x03, 1453 .mask = BIT(6), 1454 }, 1455 .aux_sens = { 1456 .addr = 0x14, 1457 .mask = GENMASK(1, 0), 1458 }, 1459 .wr_once = { 1460 .addr = 0x14, 1461 .mask = BIT(6), 1462 }, 1463 .num_ext_dev = 3, 1464 .shub_out = { 1465 .sec_page = true, 1466 .addr = 0x02, 1467 }, 1468 .slv0_addr = 0x15, 1469 .dw_slv0_addr = 0x21, 1470 .batch_en = BIT(3), 1471 }, 1472 .event_settings = { 1473 .enable_reg = { 1474 .addr = 0x50, 1475 .mask = BIT(7), 1476 }, 1477 .sources = { 1478 [ST_LSM6DSX_EVENT_WAKEUP] = { 1479 .value = { 1480 .addr = 0x5b, 1481 .mask = GENMASK(5, 0), 1482 }, 1483 .enable_mask = BIT(5), 1484 .status = { 1485 .addr = 0x45, 1486 .mask = BIT(3), 1487 }, 1488 .status_z_mask = BIT(0), 1489 .status_y_mask = BIT(1), 1490 .status_x_mask = BIT(2), 1491 }, 1492 [ST_LSM6DSX_EVENT_TAP] = { 1493 .x_value = { 1494 .addr = 0x57, 1495 .mask = GENMASK(4, 0), 1496 }, 1497 .y_value = { 1498 .addr = 0x58, 1499 .mask = GENMASK(4, 0), 1500 }, 1501 .z_value = { 1502 .addr = 0x59, 1503 .mask = GENMASK(4, 0), 1504 }, 1505 .enable_mask = BIT(6), 1506 .enable_axis_reg = 0x56, 1507 .enable_x_mask = BIT(3), 1508 .enable_y_mask = BIT(2), 1509 .enable_z_mask = BIT(1), 1510 .status = { 1511 .addr = 0x46, 1512 .mask = BIT(5), 1513 }, 1514 .status_x_mask = BIT(2), 1515 .status_y_mask = BIT(1), 1516 .status_z_mask = BIT(0), 1517 }, 1518 }, 1519 }, 1520 .fusion_settings = { 1521 .chan = st_lsm6dsx_fusion_channels, 1522 .chan_len = ARRAY_SIZE(st_lsm6dsx_fusion_channels), 1523 .odr_reg = { 1524 .addr = 0x5e, 1525 .mask = GENMASK(5, 3), 1526 }, 1527 .odr_hz[0] = 15, 1528 .odr_hz[1] = 30, 1529 .odr_hz[2] = 60, 1530 .odr_hz[3] = 120, 1531 .odr_hz[4] = 240, 1532 .odr_hz[5] = 480, 1533 .odr_len = 6, 1534 .fifo_enable = { 1535 .addr = 0x44, 1536 .mask = BIT(1), 1537 }, 1538 .page_mux = { 1539 .addr = 0x01, 1540 .mask = BIT(7), 1541 }, 1542 .enable = { 1543 .addr = 0x04, 1544 .mask = BIT(1), 1545 }, 1546 }, 1547 }, 1548 { 1549 .reset = { 1550 .addr = 0x12, 1551 .mask = BIT(0), 1552 }, 1553 .boot = { 1554 .addr = 0x12, 1555 .mask = BIT(7), 1556 }, 1557 .bdu = { 1558 .addr = 0x12, 1559 .mask = BIT(6), 1560 }, 1561 .id = { 1562 { 1563 .hw_id = ST_LSM6DSO16IS_ID, 1564 .name = ST_LSM6DSO16IS_DEV_NAME, 1565 .wai = 0x22, 1566 }, { 1567 .hw_id = ST_ISM330IS_ID, 1568 .name = ST_ISM330IS_DEV_NAME, 1569 .wai = 0x22, 1570 } 1571 }, 1572 .channels = { 1573 [ST_LSM6DSX_ID_ACC] = { 1574 .chan = st_lsm6ds0_acc_channels, 1575 .len = ARRAY_SIZE(st_lsm6ds0_acc_channels), 1576 }, 1577 [ST_LSM6DSX_ID_GYRO] = { 1578 .chan = st_lsm6dsx_gyro_channels, 1579 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1580 }, 1581 }, 1582 .odr_table = { 1583 [ST_LSM6DSX_ID_ACC] = { 1584 .reg = { 1585 .addr = 0x10, 1586 .mask = GENMASK(7, 4), 1587 }, 1588 .odr_avl[0] = { 12500, 0x01 }, 1589 .odr_avl[1] = { 26000, 0x02 }, 1590 .odr_avl[2] = { 52000, 0x03 }, 1591 .odr_avl[3] = { 104000, 0x04 }, 1592 .odr_avl[4] = { 208000, 0x05 }, 1593 .odr_avl[5] = { 416000, 0x06 }, 1594 .odr_avl[6] = { 833000, 0x07 }, 1595 .odr_len = 7, 1596 }, 1597 [ST_LSM6DSX_ID_GYRO] = { 1598 .reg = { 1599 .addr = 0x11, 1600 .mask = GENMASK(7, 4), 1601 }, 1602 .odr_avl[0] = { 12500, 0x01 }, 1603 .odr_avl[1] = { 26000, 0x02 }, 1604 .odr_avl[2] = { 52000, 0x03 }, 1605 .odr_avl[3] = { 104000, 0x04 }, 1606 .odr_avl[4] = { 208000, 0x05 }, 1607 .odr_avl[5] = { 416000, 0x06 }, 1608 .odr_avl[6] = { 833000, 0x07 }, 1609 .odr_len = 7, 1610 }, 1611 }, 1612 .fs_table = { 1613 [ST_LSM6DSX_ID_ACC] = { 1614 .reg = { 1615 .addr = 0x10, 1616 .mask = GENMASK(3, 2), 1617 }, 1618 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 1619 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 1620 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 1621 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 1622 .fs_len = 4, 1623 }, 1624 [ST_LSM6DSX_ID_GYRO] = { 1625 .reg = { 1626 .addr = 0x11, 1627 .mask = GENMASK(3, 2), 1628 }, 1629 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 1630 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 1631 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 1632 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 1633 .fs_len = 4, 1634 }, 1635 }, 1636 .irq_config = { 1637 .hla = { 1638 .addr = 0x12, 1639 .mask = BIT(5), 1640 }, 1641 .od = { 1642 .addr = 0x12, 1643 .mask = BIT(4), 1644 }, 1645 }, 1646 .shub_settings = { 1647 .page_mux = { 1648 .addr = 0x01, 1649 .mask = BIT(6), 1650 }, 1651 .master_en = { 1652 .sec_page = true, 1653 .addr = 0x14, 1654 .mask = BIT(2), 1655 }, 1656 .pullup_en = { 1657 .sec_page = true, 1658 .addr = 0x14, 1659 .mask = BIT(3), 1660 }, 1661 .aux_sens = { 1662 .addr = 0x14, 1663 .mask = GENMASK(1, 0), 1664 }, 1665 .wr_once = { 1666 .addr = 0x14, 1667 .mask = BIT(6), 1668 }, 1669 .num_ext_dev = 3, 1670 .shub_out = { 1671 .sec_page = true, 1672 .addr = 0x02, 1673 }, 1674 .slv0_addr = 0x15, 1675 .dw_slv0_addr = 0x21, 1676 }, 1677 }, 1678 }; 1679 1680 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable) 1681 { 1682 const struct st_lsm6dsx_shub_settings *hub_settings; 1683 unsigned int data; 1684 int err; 1685 1686 hub_settings = &hw->settings->shub_settings; 1687 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask); 1688 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr, 1689 hub_settings->page_mux.mask, data); 1690 usleep_range(100, 150); 1691 1692 return err; 1693 } 1694 1695 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id, 1696 const char **name) 1697 { 1698 int err, i, j, data; 1699 1700 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) { 1701 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) { 1702 if (st_lsm6dsx_sensor_settings[i].id[j].name && 1703 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id) 1704 break; 1705 } 1706 if (j < ST_LSM6DSX_MAX_ID) 1707 break; 1708 } 1709 1710 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) { 1711 dev_err(hw->dev, "unsupported hw id [%02x]\n", id); 1712 return -ENODEV; 1713 } 1714 1715 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data); 1716 if (err < 0) { 1717 dev_err(hw->dev, "failed to read whoami register\n"); 1718 return err; 1719 } 1720 1721 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) { 1722 dev_err(hw->dev, "unsupported whoami [%02x]\n", data); 1723 return -ENODEV; 1724 } 1725 1726 *name = st_lsm6dsx_sensor_settings[i].id[j].name; 1727 hw->settings = &st_lsm6dsx_sensor_settings[i]; 1728 1729 return 0; 1730 } 1731 1732 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, 1733 u32 gain) 1734 { 1735 const struct st_lsm6dsx_fs_table_entry *fs_table; 1736 unsigned int data; 1737 int i, err; 1738 1739 fs_table = &sensor->hw->settings->fs_table[sensor->id]; 1740 for (i = 0; i < fs_table->fs_len; i++) { 1741 if (fs_table->fs_avl[i].gain == gain) 1742 break; 1743 } 1744 1745 if (i == fs_table->fs_len) 1746 return -EINVAL; 1747 1748 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, 1749 fs_table->reg.mask); 1750 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr, 1751 fs_table->reg.mask, data); 1752 if (err < 0) 1753 return err; 1754 1755 sensor->gain = gain; 1756 1757 return 0; 1758 } 1759 1760 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val) 1761 { 1762 const struct st_lsm6dsx_odr_table_entry *odr_table; 1763 int i; 1764 1765 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 1766 for (i = 0; i < odr_table->odr_len; i++) { 1767 /* 1768 * ext devices can run at different odr respect to 1769 * accel sensor 1770 */ 1771 if (odr_table->odr_avl[i].milli_hz >= odr) 1772 break; 1773 } 1774 1775 if (i == odr_table->odr_len) 1776 return -EINVAL; 1777 1778 *val = odr_table->odr_avl[i].val; 1779 return odr_table->odr_avl[i].milli_hz; 1780 } 1781 1782 static int 1783 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr, 1784 enum st_lsm6dsx_sensor_id id) 1785 { 1786 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); 1787 1788 if (odr > 0) { 1789 if (hw->enable_mask & BIT(id)) 1790 return max_t(u32, ref->odr, odr); 1791 else 1792 return odr; 1793 } else { 1794 return (hw->enable_mask & BIT(id)) ? ref->odr : 0; 1795 } 1796 } 1797 1798 static int 1799 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr) 1800 { 1801 struct st_lsm6dsx_sensor *ref_sensor = sensor; 1802 struct st_lsm6dsx_hw *hw = sensor->hw; 1803 const struct st_lsm6dsx_reg *reg; 1804 unsigned int data; 1805 u8 val = 0; 1806 int err; 1807 1808 switch (sensor->id) { 1809 case ST_LSM6DSX_ID_GYRO: 1810 break; 1811 case ST_LSM6DSX_ID_EXT0: 1812 case ST_LSM6DSX_ID_EXT1: 1813 case ST_LSM6DSX_ID_EXT2: 1814 case ST_LSM6DSX_ID_ACC: { 1815 u32 odr; 1816 int i; 1817 1818 /* 1819 * i2c embedded controller relies on the accelerometer sensor as 1820 * bus read/write trigger so we need to enable accel device 1821 * at odr = max(accel_odr, ext_odr) in order to properly 1822 * communicate with i2c slave devices 1823 */ 1824 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1825 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) { 1826 if (!hw->iio_devs[i] || i == sensor->id) 1827 continue; 1828 1829 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i); 1830 if (odr != req_odr) 1831 /* device already configured */ 1832 return 0; 1833 } 1834 break; 1835 } 1836 default: /* should never occur */ 1837 return -EINVAL; 1838 } 1839 1840 if (req_odr > 0) { 1841 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val); 1842 if (err < 0) 1843 return err; 1844 } 1845 1846 reg = &hw->settings->odr_table[ref_sensor->id].reg; 1847 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1848 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1849 } 1850 1851 static int 1852 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1853 bool enable) 1854 { 1855 struct st_lsm6dsx_hw *hw = sensor->hw; 1856 u32 odr = enable ? sensor->odr : 0; 1857 int err; 1858 1859 err = st_lsm6dsx_set_odr(sensor, odr); 1860 if (err < 0) 1861 return err; 1862 1863 if (enable) 1864 hw->enable_mask |= BIT(sensor->id); 1865 else 1866 hw->enable_mask &= ~BIT(sensor->id); 1867 1868 return 0; 1869 } 1870 1871 static int 1872 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor) 1873 { 1874 struct st_lsm6dsx_hw *hw = sensor->hw; 1875 int event; 1876 1877 if (sensor->id != ST_LSM6DSX_ID_ACC) 1878 return 0; 1879 1880 for (event = 0; event < ST_LSM6DSX_EVENT_MAX; event++) { 1881 if (hw->enable_event[event]) 1882 return true; 1883 } 1884 return false; 1885 } 1886 1887 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1888 bool enable) 1889 { 1890 if (st_lsm6dsx_check_events(sensor)) 1891 return 0; 1892 1893 return __st_lsm6dsx_sensor_set_enable(sensor, enable); 1894 } 1895 1896 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, 1897 u8 addr, int *val) 1898 { 1899 struct st_lsm6dsx_hw *hw = sensor->hw; 1900 int err, delay; 1901 __le16 data; 1902 1903 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1904 if (err < 0) 1905 return err; 1906 1907 /* 1908 * we need to wait for sensor settling time before 1909 * reading data in order to avoid corrupted samples 1910 */ 1911 delay = 1000000000 / sensor->odr; 1912 usleep_range(3 * delay, 4 * delay); 1913 1914 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1915 if (err < 0) 1916 return err; 1917 1918 err = st_lsm6dsx_sensor_set_enable(sensor, false); 1919 if (err < 0) 1920 return err; 1921 1922 *val = (s16)le16_to_cpu(data); 1923 1924 return IIO_VAL_INT; 1925 } 1926 1927 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, 1928 struct iio_chan_spec const *ch, 1929 int *val, int *val2, long mask) 1930 { 1931 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1932 int ret; 1933 1934 switch (mask) { 1935 case IIO_CHAN_INFO_RAW: 1936 if (!iio_device_claim_direct(iio_dev)) 1937 return -EBUSY; 1938 1939 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val); 1940 iio_device_release_direct(iio_dev); 1941 break; 1942 case IIO_CHAN_INFO_SAMP_FREQ: 1943 *val = sensor->odr / 1000; 1944 *val2 = (sensor->odr % 1000) * 1000; 1945 ret = IIO_VAL_INT_PLUS_MICRO; 1946 break; 1947 case IIO_CHAN_INFO_SCALE: 1948 *val = 0; 1949 *val2 = sensor->gain; 1950 ret = IIO_VAL_INT_PLUS_NANO; 1951 break; 1952 default: 1953 ret = -EINVAL; 1954 break; 1955 } 1956 1957 return ret; 1958 } 1959 1960 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, 1961 struct iio_chan_spec const *chan, 1962 int val, int val2, long mask) 1963 { 1964 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1965 int err = 0; 1966 1967 if (!iio_device_claim_direct(iio_dev)) 1968 return -EBUSY; 1969 1970 switch (mask) { 1971 case IIO_CHAN_INFO_SCALE: 1972 err = st_lsm6dsx_set_full_scale(sensor, val2); 1973 break; 1974 case IIO_CHAN_INFO_SAMP_FREQ: { 1975 u8 data; 1976 1977 val = val * 1000 + val2 / 1000; 1978 val = st_lsm6dsx_check_odr(sensor, val, &data); 1979 if (val < 0) { 1980 err = val; 1981 } else { 1982 sensor->odr = val; 1983 sensor->hwfifo_odr_mHz = val; 1984 } 1985 break; 1986 } 1987 default: 1988 err = -EINVAL; 1989 break; 1990 } 1991 1992 iio_device_release_direct(iio_dev); 1993 1994 return err; 1995 } 1996 1997 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, 1998 enum st_lsm6dsx_event_id event, int axis, 1999 bool state) 2000 { 2001 const struct st_lsm6dsx_event_src *src; 2002 unsigned int data; 2003 int err; 2004 u8 old_enable, new_enable; 2005 2006 if (!hw->irq_routing) 2007 return -ENOTSUPP; 2008 2009 /* Enable/disable event interrupt */ 2010 src = &hw->settings->event_settings.sources[event]; 2011 if (src->enable_axis_reg) { 2012 u8 enable_mask; 2013 2014 switch (axis) { 2015 case IIO_MOD_X: 2016 enable_mask = src->enable_x_mask; 2017 break; 2018 case IIO_MOD_Y: 2019 enable_mask = src->enable_y_mask; 2020 break; 2021 case IIO_MOD_Z: 2022 enable_mask = src->enable_z_mask; 2023 break; 2024 default: 2025 enable_mask = 0; 2026 } 2027 if (enable_mask) { 2028 data = ST_LSM6DSX_SHIFT_VAL(state, enable_mask); 2029 err = st_lsm6dsx_update_bits_locked(hw, 2030 src->enable_axis_reg, 2031 enable_mask, data); 2032 if (err < 0) 2033 return err; 2034 } 2035 } 2036 2037 /* 2038 * If the set of axes for which the event source is enabled does not 2039 * change from empty to non-empty or vice versa, there is nothing else 2040 * to do. 2041 */ 2042 old_enable = hw->enable_event[event]; 2043 new_enable = state ? (old_enable | BIT(axis)) : 2044 (old_enable & ~BIT(axis)); 2045 if (!old_enable == !new_enable) 2046 return 0; 2047 2048 data = ST_LSM6DSX_SHIFT_VAL(state, src->enable_mask); 2049 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing, 2050 src->enable_mask, data); 2051 } 2052 2053 static enum st_lsm6dsx_event_id 2054 st_lsm6dsx_get_event_id(enum iio_event_type type) 2055 { 2056 switch (type) { 2057 case IIO_EV_TYPE_THRESH: 2058 return ST_LSM6DSX_EVENT_WAKEUP; 2059 case IIO_EV_TYPE_GESTURE: 2060 return ST_LSM6DSX_EVENT_TAP; 2061 default: 2062 return ST_LSM6DSX_EVENT_MAX; 2063 } 2064 } 2065 2066 static const struct st_lsm6dsx_reg * 2067 st_lsm6dsx_get_event_reg(struct st_lsm6dsx_hw *hw, 2068 enum st_lsm6dsx_event_id event, 2069 const struct iio_chan_spec *chan) 2070 { 2071 const struct st_lsm6dsx_event_src *src; 2072 const struct st_lsm6dsx_reg *reg; 2073 2074 src = &hw->settings->event_settings.sources[event]; 2075 switch (chan->channel2) { 2076 case IIO_MOD_X: 2077 reg = &src->x_value; 2078 break; 2079 case IIO_MOD_Y: 2080 reg = &src->y_value; 2081 break; 2082 case IIO_MOD_Z: 2083 reg = &src->z_value; 2084 break; 2085 default: 2086 return NULL; 2087 } 2088 if (reg->addr) 2089 return reg; 2090 2091 /* 2092 * The sensor does not support configuring this event source on a per 2093 * axis basis: return the register to configure the event source for all 2094 * axes. 2095 */ 2096 return &src->value; 2097 } 2098 2099 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, 2100 const struct iio_chan_spec *chan, 2101 enum iio_event_type type, 2102 enum iio_event_direction dir, 2103 enum iio_event_info info, 2104 int *val, int *val2) 2105 { 2106 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type); 2107 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2108 struct st_lsm6dsx_hw *hw = sensor->hw; 2109 const struct st_lsm6dsx_reg *reg; 2110 u8 data; 2111 int err; 2112 2113 if (event == ST_LSM6DSX_EVENT_MAX) 2114 return -EINVAL; 2115 2116 reg = st_lsm6dsx_get_event_reg(hw, event, chan); 2117 if (!reg) 2118 return -EINVAL; 2119 2120 err = st_lsm6dsx_read_locked(hw, reg->addr, &data, sizeof(data)); 2121 if (err < 0) 2122 return err; 2123 2124 *val2 = 0; 2125 *val = st_lsm6dsx_field_get(reg->mask, data); 2126 2127 return IIO_VAL_INT; 2128 } 2129 2130 static int 2131 st_lsm6dsx_write_event(struct iio_dev *iio_dev, 2132 const struct iio_chan_spec *chan, 2133 enum iio_event_type type, 2134 enum iio_event_direction dir, 2135 enum iio_event_info info, 2136 int val, int val2) 2137 { 2138 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type); 2139 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2140 struct st_lsm6dsx_hw *hw = sensor->hw; 2141 const struct st_lsm6dsx_reg *reg; 2142 unsigned int data; 2143 int err; 2144 2145 if (event == ST_LSM6DSX_EVENT_MAX) 2146 return -EINVAL; 2147 2148 if (val < 0 || val > 31) 2149 return -EINVAL; 2150 2151 reg = st_lsm6dsx_get_event_reg(hw, event, chan); 2152 if (!reg) 2153 return -EINVAL; 2154 2155 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 2156 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 2157 reg->mask, data); 2158 if (err < 0) 2159 return -EINVAL; 2160 2161 return 0; 2162 } 2163 2164 static int 2165 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev, 2166 const struct iio_chan_spec *chan, 2167 enum iio_event_type type, 2168 enum iio_event_direction dir) 2169 { 2170 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type); 2171 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2172 struct st_lsm6dsx_hw *hw = sensor->hw; 2173 2174 if (event == ST_LSM6DSX_EVENT_MAX) 2175 return -EINVAL; 2176 2177 return !!(hw->enable_event[event] & BIT(chan->channel2)); 2178 } 2179 2180 /** 2181 * st_lsm6dsx_check_other_events - Check for enabled sensor events. 2182 * @hw: Sensor hardware instance. 2183 * @curr: Current event type. 2184 * 2185 * Return: whether any events other than @curr are enabled. 2186 */ 2187 static bool st_lsm6dsx_check_other_events(struct st_lsm6dsx_hw *hw, 2188 enum st_lsm6dsx_event_id curr) 2189 { 2190 enum st_lsm6dsx_event_id other; 2191 2192 for (other = 0; other < ST_LSM6DSX_EVENT_MAX; other++) { 2193 if (other != curr && hw->enable_event[other]) 2194 return true; 2195 } 2196 2197 return false; 2198 } 2199 2200 static int st_lsm6dsx_events_enable(struct st_lsm6dsx_sensor *sensor, 2201 bool state) 2202 { 2203 struct st_lsm6dsx_hw *hw = sensor->hw; 2204 const struct st_lsm6dsx_reg *reg; 2205 2206 reg = &hw->settings->event_settings.enable_reg; 2207 if (reg->addr) { 2208 int err; 2209 2210 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2211 ST_LSM6DSX_SHIFT_VAL(state, reg->mask)); 2212 if (err) 2213 return err; 2214 } 2215 2216 if (state || !(hw->fifo_mask & BIT(sensor->id))) 2217 return __st_lsm6dsx_sensor_set_enable(sensor, state); 2218 2219 return 0; 2220 } 2221 2222 static int 2223 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, 2224 const struct iio_chan_spec *chan, 2225 enum iio_event_type type, 2226 enum iio_event_direction dir, bool state) 2227 { 2228 enum st_lsm6dsx_event_id event = st_lsm6dsx_get_event_id(type); 2229 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2230 struct st_lsm6dsx_hw *hw = sensor->hw; 2231 u8 enable_event; 2232 int err; 2233 2234 if (event == ST_LSM6DSX_EVENT_MAX) 2235 return -EINVAL; 2236 2237 if (state) 2238 enable_event = hw->enable_event[event] | BIT(chan->channel2); 2239 else 2240 enable_event = hw->enable_event[event] & ~BIT(chan->channel2); 2241 2242 /* stop here if no changes have been made */ 2243 if (hw->enable_event[event] == enable_event) 2244 return 0; 2245 2246 err = st_lsm6dsx_event_setup(hw, event, chan->channel2, state); 2247 if (err < 0) 2248 return err; 2249 2250 mutex_lock(&hw->conf_lock); 2251 if (enable_event) 2252 err = st_lsm6dsx_events_enable(sensor, true); 2253 else if (!st_lsm6dsx_check_other_events(hw, event)) 2254 err = st_lsm6dsx_events_enable(sensor, false); 2255 mutex_unlock(&hw->conf_lock); 2256 if (err < 0) 2257 return err; 2258 2259 hw->enable_event[event] = enable_event; 2260 2261 return 0; 2262 } 2263 2264 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) 2265 { 2266 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2267 struct st_lsm6dsx_hw *hw = sensor->hw; 2268 int err; 2269 2270 val = clamp_val(val, 1, hw->settings->fifo_ops.max_size); 2271 2272 mutex_lock(&hw->conf_lock); 2273 2274 err = st_lsm6dsx_update_watermark(sensor, val); 2275 2276 mutex_unlock(&hw->conf_lock); 2277 2278 if (err < 0) 2279 return err; 2280 2281 sensor->watermark = val; 2282 2283 return 0; 2284 } 2285 2286 static ssize_t 2287 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, 2288 struct device_attribute *attr, 2289 char *buf) 2290 { 2291 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev)); 2292 const struct st_lsm6dsx_odr_table_entry *odr_table; 2293 int i, len = 0; 2294 2295 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 2296 for (i = 0; i < odr_table->odr_len; i++) 2297 len += sysfs_emit_at(buf, len, "%d.%03d%c", 2298 odr_table->odr_avl[i].milli_hz / 1000, 2299 odr_table->odr_avl[i].milli_hz % 1000, 2300 (i == odr_table->odr_len - 1) ? '\n' : ' '); 2301 2302 return len; 2303 } 2304 2305 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, 2306 struct device_attribute *attr, 2307 char *buf) 2308 { 2309 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev)); 2310 const struct st_lsm6dsx_fs_table_entry *fs_table; 2311 struct st_lsm6dsx_hw *hw = sensor->hw; 2312 int i, len = 0; 2313 2314 fs_table = &hw->settings->fs_table[sensor->id]; 2315 for (i = 0; i < fs_table->fs_len; i++) 2316 len += sysfs_emit_at(buf, len, "0.%09u%c", 2317 fs_table->fs_avl[i].gain, 2318 (i == fs_table->fs_len - 1) ? '\n' : ' '); 2319 2320 return len; 2321 } 2322 2323 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev, 2324 struct iio_chan_spec const *chan, 2325 long mask) 2326 { 2327 switch (mask) { 2328 case IIO_CHAN_INFO_SCALE: 2329 switch (chan->type) { 2330 case IIO_ANGL_VEL: 2331 case IIO_ACCEL: 2332 return IIO_VAL_INT_PLUS_NANO; 2333 default: 2334 return IIO_VAL_INT_PLUS_MICRO; 2335 } 2336 default: 2337 return IIO_VAL_INT_PLUS_MICRO; 2338 } 2339 } 2340 2341 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail); 2342 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, 2343 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 2344 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444, 2345 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 2346 2347 static struct attribute *st_lsm6dsx_acc_attributes[] = { 2348 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 2349 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 2350 NULL, 2351 }; 2352 2353 static const struct attribute_group st_lsm6dsx_acc_attribute_group = { 2354 .attrs = st_lsm6dsx_acc_attributes, 2355 }; 2356 2357 static const struct iio_info st_lsm6dsx_acc_info = { 2358 .attrs = &st_lsm6dsx_acc_attribute_group, 2359 .read_raw = st_lsm6dsx_read_raw, 2360 .write_raw = st_lsm6dsx_write_raw, 2361 .read_event_value = st_lsm6dsx_read_event, 2362 .write_event_value = st_lsm6dsx_write_event, 2363 .read_event_config = st_lsm6dsx_read_event_config, 2364 .write_event_config = st_lsm6dsx_write_event_config, 2365 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 2366 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt, 2367 }; 2368 2369 static struct attribute *st_lsm6dsx_gyro_attributes[] = { 2370 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 2371 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr, 2372 NULL, 2373 }; 2374 2375 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = { 2376 .attrs = st_lsm6dsx_gyro_attributes, 2377 }; 2378 2379 static const struct iio_info st_lsm6dsx_gyro_info = { 2380 .attrs = &st_lsm6dsx_gyro_attribute_group, 2381 .read_raw = st_lsm6dsx_read_raw, 2382 .write_raw = st_lsm6dsx_write_raw, 2383 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 2384 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt, 2385 }; 2386 2387 static int 2388 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, 2389 const struct st_lsm6dsx_reg **drdy_reg) 2390 { 2391 struct device *dev = hw->dev; 2392 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev); 2393 int err = 0, drdy_pin; 2394 2395 if (device_property_read_u32(dev, "st,drdy-int-pin", &drdy_pin) < 0) 2396 drdy_pin = pdata ? pdata->drdy_int_pin : 1; 2397 2398 switch (drdy_pin) { 2399 case 1: 2400 hw->irq_routing = hw->settings->irq_config.irq1_func; 2401 *drdy_reg = &hw->settings->irq_config.irq1; 2402 break; 2403 case 2: 2404 hw->irq_routing = hw->settings->irq_config.irq2_func; 2405 *drdy_reg = &hw->settings->irq_config.irq2; 2406 break; 2407 default: 2408 dev_err(hw->dev, "unsupported data ready pin\n"); 2409 err = -EINVAL; 2410 break; 2411 } 2412 2413 return err; 2414 } 2415 2416 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw) 2417 { 2418 const struct st_lsm6dsx_shub_settings *hub_settings; 2419 struct device *dev = hw->dev; 2420 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev); 2421 unsigned int data; 2422 int err = 0; 2423 2424 hub_settings = &hw->settings->shub_settings; 2425 2426 if (device_property_read_bool(dev, "st,pullups") || 2427 (pdata && pdata->pullups)) { 2428 if (hub_settings->pullup_en.sec_page) { 2429 err = st_lsm6dsx_set_page(hw, true); 2430 if (err < 0) 2431 return err; 2432 } 2433 2434 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask); 2435 err = regmap_update_bits(hw->regmap, 2436 hub_settings->pullup_en.addr, 2437 hub_settings->pullup_en.mask, data); 2438 2439 if (hub_settings->pullup_en.sec_page) 2440 st_lsm6dsx_set_page(hw, false); 2441 2442 if (err < 0) 2443 return err; 2444 } 2445 2446 if (hub_settings->aux_sens.addr) { 2447 /* configure aux sensors */ 2448 err = st_lsm6dsx_set_page(hw, true); 2449 if (err < 0) 2450 return err; 2451 2452 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask); 2453 err = regmap_update_bits(hw->regmap, 2454 hub_settings->aux_sens.addr, 2455 hub_settings->aux_sens.mask, data); 2456 2457 st_lsm6dsx_set_page(hw, false); 2458 2459 if (err < 0) 2460 return err; 2461 } 2462 2463 if (hub_settings->emb_func.addr) { 2464 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask); 2465 err = regmap_update_bits(hw->regmap, 2466 hub_settings->emb_func.addr, 2467 hub_settings->emb_func.mask, data); 2468 } 2469 2470 return err; 2471 } 2472 2473 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) 2474 { 2475 const struct st_lsm6dsx_hw_ts_settings *ts_settings; 2476 int err, val; 2477 2478 ts_settings = &hw->settings->ts_settings; 2479 /* enable hw timestamp generation if necessary */ 2480 if (ts_settings->timer_en.addr) { 2481 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask); 2482 err = regmap_update_bits(hw->regmap, 2483 ts_settings->timer_en.addr, 2484 ts_settings->timer_en.mask, val); 2485 if (err < 0) 2486 return err; 2487 } 2488 2489 /* enable high resolution for hw ts timer if necessary */ 2490 if (ts_settings->hr_timer.addr) { 2491 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask); 2492 err = regmap_update_bits(hw->regmap, 2493 ts_settings->hr_timer.addr, 2494 ts_settings->hr_timer.mask, val); 2495 if (err < 0) 2496 return err; 2497 } 2498 2499 /* enable ts queueing in FIFO if necessary */ 2500 if (ts_settings->fifo_en.addr) { 2501 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask); 2502 err = regmap_update_bits(hw->regmap, 2503 ts_settings->fifo_en.addr, 2504 ts_settings->fifo_en.mask, val); 2505 if (err < 0) 2506 return err; 2507 } 2508 2509 /* calibrate timestamp sensitivity */ 2510 hw->ts_gain = ts_settings->ts_sensitivity; 2511 if (ts_settings->freq_fine) { 2512 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val); 2513 if (err < 0) 2514 return err; 2515 2516 hw->ts_gain -= ((s8)val * ts_settings->ts_trim_coeff) / 1000; 2517 } 2518 2519 return 0; 2520 } 2521 2522 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw) 2523 { 2524 const struct st_lsm6dsx_reg *reg; 2525 int err; 2526 2527 /* 2528 * flush hw FIFO before device reset in order to avoid 2529 * possible races on interrupt line 1. If the first interrupt 2530 * line is asserted during hw reset the device will work in 2531 * I3C-only mode (if it is supported) 2532 */ 2533 err = st_lsm6dsx_flush_fifo(hw); 2534 if (err < 0 && err != -ENOTSUPP) 2535 return err; 2536 2537 /* device sw reset */ 2538 reg = &hw->settings->reset; 2539 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2540 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2541 if (err < 0) 2542 return err; 2543 2544 msleep(50); 2545 2546 /* reload trimming parameter */ 2547 reg = &hw->settings->boot; 2548 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2549 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2550 if (err < 0) 2551 return err; 2552 2553 msleep(50); 2554 2555 return 0; 2556 } 2557 2558 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) 2559 { 2560 const struct st_lsm6dsx_reg *reg; 2561 int err; 2562 2563 err = st_lsm6dsx_reset_device(hw); 2564 if (err < 0) 2565 return err; 2566 2567 /* enable Block Data Update */ 2568 reg = &hw->settings->bdu; 2569 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2570 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2571 if (err < 0) 2572 return err; 2573 2574 /* enable FIFO watermak interrupt */ 2575 err = st_lsm6dsx_get_drdy_reg(hw, ®); 2576 if (err < 0) 2577 return err; 2578 2579 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2580 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2581 if (err < 0) 2582 return err; 2583 2584 /* enable Latched interrupts for device events */ 2585 if (hw->settings->irq_config.lir.addr) { 2586 reg = &hw->settings->irq_config.lir; 2587 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2588 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2589 if (err < 0) 2590 return err; 2591 2592 /* enable clear on read for latched interrupts */ 2593 if (hw->settings->irq_config.clear_on_read.addr) { 2594 reg = &hw->settings->irq_config.clear_on_read; 2595 err = regmap_update_bits(hw->regmap, 2596 reg->addr, reg->mask, 2597 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2598 if (err < 0) 2599 return err; 2600 } 2601 } 2602 2603 /* enable drdy-mas if available */ 2604 if (hw->settings->drdy_mask.addr) { 2605 reg = &hw->settings->drdy_mask; 2606 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2607 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2608 if (err < 0) 2609 return err; 2610 } 2611 2612 err = st_lsm6dsx_init_shub(hw); 2613 if (err < 0) 2614 return err; 2615 2616 return st_lsm6dsx_init_hw_timer(hw); 2617 } 2618 2619 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, 2620 enum st_lsm6dsx_sensor_id id, 2621 const char *name) 2622 { 2623 struct st_lsm6dsx_sensor *sensor; 2624 struct iio_dev *iio_dev; 2625 2626 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 2627 if (!iio_dev) 2628 return NULL; 2629 2630 iio_dev->modes = INDIO_DIRECT_MODE; 2631 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 2632 iio_dev->channels = hw->settings->channels[id].chan; 2633 iio_dev->num_channels = hw->settings->channels[id].len; 2634 2635 sensor = iio_priv(iio_dev); 2636 sensor->id = id; 2637 sensor->hw = hw; 2638 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz; 2639 sensor->hwfifo_odr_mHz = sensor->odr; 2640 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; 2641 sensor->watermark = 1; 2642 2643 switch (id) { 2644 case ST_LSM6DSX_ID_ACC: 2645 iio_dev->info = &st_lsm6dsx_acc_info; 2646 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel", 2647 name); 2648 break; 2649 case ST_LSM6DSX_ID_GYRO: 2650 iio_dev->info = &st_lsm6dsx_gyro_info; 2651 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro", 2652 name); 2653 break; 2654 default: 2655 return NULL; 2656 } 2657 iio_dev->name = sensor->name; 2658 2659 return iio_dev; 2660 } 2661 2662 static bool 2663 st_lsm6dsx_report_events(struct st_lsm6dsx_hw *hw, enum st_lsm6dsx_event_id id, 2664 enum iio_event_type type, enum iio_event_direction dir) 2665 { 2666 const struct st_lsm6dsx_event_settings *event_settings; 2667 const struct st_lsm6dsx_event_src *src; 2668 int err, data; 2669 s64 timestamp; 2670 2671 if (!hw->enable_event[id]) 2672 return false; 2673 2674 event_settings = &hw->settings->event_settings; 2675 src = &event_settings->sources[id]; 2676 err = st_lsm6dsx_read_locked(hw, src->status.addr, 2677 &data, sizeof(data)); 2678 if (err < 0) 2679 return false; 2680 2681 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 2682 if ((data & src->status_z_mask) && 2683 (hw->enable_event[id] & BIT(IIO_MOD_Z))) 2684 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2685 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2686 0, 2687 IIO_MOD_Z, 2688 type, 2689 dir), 2690 timestamp); 2691 2692 if ((data & src->status_y_mask) && 2693 (hw->enable_event[id] & BIT(IIO_MOD_Y))) 2694 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2695 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2696 0, 2697 IIO_MOD_Y, 2698 type, 2699 dir), 2700 timestamp); 2701 2702 if ((data & src->status_x_mask) && 2703 (hw->enable_event[id] & BIT(IIO_MOD_X))) 2704 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2705 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2706 0, 2707 IIO_MOD_X, 2708 type, 2709 dir), 2710 timestamp); 2711 2712 return data & src->status.mask; 2713 } 2714 2715 static bool st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) 2716 { 2717 bool events_found; 2718 2719 events_found = st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_WAKEUP, 2720 IIO_EV_TYPE_THRESH, 2721 IIO_EV_DIR_EITHER); 2722 events_found |= st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_TAP, 2723 IIO_EV_TYPE_GESTURE, 2724 IIO_EV_DIR_SINGLETAP); 2725 2726 return events_found; 2727 } 2728 2729 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) 2730 { 2731 struct st_lsm6dsx_hw *hw = private; 2732 int fifo_len = 0, len; 2733 bool event; 2734 2735 event = st_lsm6dsx_report_motion_event(hw); 2736 2737 if (!hw->settings->fifo_ops.read_fifo) 2738 return event ? IRQ_HANDLED : IRQ_NONE; 2739 2740 /* 2741 * If we are using edge IRQs, new samples can arrive while 2742 * processing current interrupt since there are no hw 2743 * guarantees the irq line stays "low" long enough to properly 2744 * detect the new interrupt. In this case the new sample will 2745 * be missed. 2746 * Polling FIFO status register allow us to read new 2747 * samples even if the interrupt arrives while processing 2748 * previous data and the timeslot where the line is "low" is 2749 * too short to be properly detected. 2750 */ 2751 do { 2752 mutex_lock(&hw->fifo_lock); 2753 len = hw->settings->fifo_ops.read_fifo(hw); 2754 mutex_unlock(&hw->fifo_lock); 2755 2756 if (len > 0) 2757 fifo_len += len; 2758 } while (len > 0); 2759 2760 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE; 2761 } 2762 2763 static irqreturn_t st_lsm6dsx_sw_trigger_handler_thread(int irq, 2764 void *private) 2765 { 2766 struct iio_poll_func *pf = private; 2767 struct iio_dev *iio_dev = pf->indio_dev; 2768 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2769 struct st_lsm6dsx_hw *hw = sensor->hw; 2770 2771 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2772 sensor->id == ST_LSM6DSX_ID_EXT1 || 2773 sensor->id == ST_LSM6DSX_ID_EXT2) 2774 st_lsm6dsx_shub_read_output(hw, 2775 (u8 *)hw->scan[sensor->id].channels, 2776 sizeof(hw->scan[sensor->id].channels)); 2777 else 2778 st_lsm6dsx_read_locked(hw, iio_dev->channels[0].address, 2779 hw->scan[sensor->id].channels, 2780 sizeof(hw->scan[sensor->id].channels)); 2781 2782 iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan[sensor->id], 2783 iio_get_time_ns(iio_dev)); 2784 iio_trigger_notify_done(iio_dev->trig); 2785 2786 return IRQ_HANDLED; 2787 } 2788 2789 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) 2790 { 2791 const struct st_lsm6dsx_reg *reg; 2792 struct device *dev = hw->dev; 2793 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev); 2794 unsigned long irq_type; 2795 bool irq_active_low; 2796 int err; 2797 2798 irq_type = irq_get_trigger_type(hw->irq); 2799 switch (irq_type) { 2800 case IRQF_TRIGGER_HIGH: 2801 case IRQF_TRIGGER_RISING: 2802 irq_active_low = false; 2803 break; 2804 case IRQF_TRIGGER_LOW: 2805 case IRQF_TRIGGER_FALLING: 2806 irq_active_low = true; 2807 break; 2808 default: 2809 dev_info(hw->dev, "mode %lx unsupported\n", irq_type); 2810 return -EINVAL; 2811 } 2812 2813 reg = &hw->settings->irq_config.hla; 2814 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2815 ST_LSM6DSX_SHIFT_VAL(irq_active_low, 2816 reg->mask)); 2817 if (err < 0) 2818 return err; 2819 2820 if (device_property_read_bool(dev, "drive-open-drain") || 2821 (pdata && pdata->open_drain)) { 2822 reg = &hw->settings->irq_config.od; 2823 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2824 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2825 if (err < 0) 2826 return err; 2827 2828 irq_type |= IRQF_SHARED; 2829 } 2830 2831 err = devm_request_threaded_irq(hw->dev, hw->irq, 2832 NULL, 2833 st_lsm6dsx_handler_thread, 2834 irq_type | IRQF_ONESHOT, 2835 "lsm6dsx", hw); 2836 if (err) { 2837 dev_err(hw->dev, "failed to request trigger irq %d\n", 2838 hw->irq); 2839 return err; 2840 } 2841 2842 return 0; 2843 } 2844 2845 static int st_lsm6dsx_sw_buffer_preenable(struct iio_dev *iio_dev) 2846 { 2847 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2848 2849 return st_lsm6dsx_device_set_enable(sensor, true); 2850 } 2851 2852 static int st_lsm6dsx_sw_buffer_postdisable(struct iio_dev *iio_dev) 2853 { 2854 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 2855 2856 return st_lsm6dsx_device_set_enable(sensor, false); 2857 } 2858 2859 static const struct iio_buffer_setup_ops st_lsm6dsx_sw_buffer_ops = { 2860 .preenable = st_lsm6dsx_sw_buffer_preenable, 2861 .postdisable = st_lsm6dsx_sw_buffer_postdisable, 2862 }; 2863 2864 static int st_lsm6dsx_sw_buffers_setup(struct st_lsm6dsx_hw *hw) 2865 { 2866 int i; 2867 2868 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2869 int err; 2870 2871 if (!hw->iio_devs[i]) 2872 continue; 2873 2874 err = devm_iio_triggered_buffer_setup(hw->dev, 2875 hw->iio_devs[i], NULL, 2876 st_lsm6dsx_sw_trigger_handler_thread, 2877 &st_lsm6dsx_sw_buffer_ops); 2878 if (err) 2879 return err; 2880 } 2881 2882 return 0; 2883 } 2884 2885 static int st_lsm6dsx_init_regulators(struct device *dev) 2886 { 2887 /* vdd-vddio power regulators */ 2888 static const char * const regulators[] = { "vdd", "vddio" }; 2889 int err; 2890 2891 err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators), 2892 regulators); 2893 if (err) 2894 return dev_err_probe(dev, err, "failed to enable regulators\n"); 2895 2896 msleep(50); 2897 2898 return 0; 2899 } 2900 2901 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 2902 struct regmap *regmap) 2903 { 2904 const struct st_sensors_platform_data *pdata = dev_get_platdata(dev); 2905 const struct st_lsm6dsx_shub_settings *hub_settings; 2906 struct st_lsm6dsx_hw *hw; 2907 const char *name = NULL; 2908 int i, err; 2909 2910 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL); 2911 if (!hw) 2912 return -ENOMEM; 2913 2914 dev_set_drvdata(dev, hw); 2915 2916 mutex_init(&hw->fifo_lock); 2917 mutex_init(&hw->conf_lock); 2918 mutex_init(&hw->page_lock); 2919 2920 err = st_lsm6dsx_init_regulators(dev); 2921 if (err) 2922 return err; 2923 2924 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL); 2925 if (!hw->buff) 2926 return -ENOMEM; 2927 2928 hw->dev = dev; 2929 hw->irq = irq; 2930 hw->regmap = regmap; 2931 2932 err = st_lsm6dsx_check_whoami(hw, hw_id, &name); 2933 if (err < 0) 2934 return err; 2935 2936 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) { 2937 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name); 2938 if (!hw->iio_devs[i]) 2939 return -ENOMEM; 2940 } 2941 2942 err = st_lsm6dsx_init_device(hw); 2943 if (err < 0) 2944 return err; 2945 2946 hub_settings = &hw->settings->shub_settings; 2947 if (hub_settings->master_en.addr && 2948 !device_property_read_bool(dev, "st,disable-sensor-hub")) { 2949 err = st_lsm6dsx_shub_probe(hw, name); 2950 if (err < 0) 2951 return err; 2952 } 2953 2954 if (hw->settings->fusion_settings.chan) { 2955 err = st_lsm6dsx_fusion_probe(hw, name); 2956 if (err) 2957 return err; 2958 } 2959 2960 if (hw->irq > 0) { 2961 err = st_lsm6dsx_irq_setup(hw); 2962 if (err < 0) 2963 return err; 2964 2965 err = st_lsm6dsx_fifo_setup(hw); 2966 if (err < 0) 2967 return err; 2968 } 2969 2970 if (!hw->irq || !hw->settings->fifo_ops.read_fifo) { 2971 /* 2972 * Rely on sw triggers (e.g. hr-timers) if irq pin is not 2973 * connected of if the device does not support HW FIFO 2974 */ 2975 err = st_lsm6dsx_sw_buffers_setup(hw); 2976 if (err) 2977 return err; 2978 } 2979 2980 if (!iio_read_acpi_mount_matrix(hw->dev, &hw->orientation, "ROTM")) { 2981 err = iio_read_mount_matrix(hw->dev, &hw->orientation); 2982 if (err) 2983 return err; 2984 } 2985 2986 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2987 if (!hw->iio_devs[i]) 2988 continue; 2989 2990 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]); 2991 if (err) 2992 return err; 2993 } 2994 2995 if (device_property_read_bool(dev, "wakeup-source") || 2996 (pdata && pdata->wakeup_source)) { 2997 err = devm_device_init_wakeup(dev); 2998 if (err) 2999 return dev_err_probe(dev, err, "Failed to init wakeup\n"); 3000 } 3001 3002 return 0; 3003 } 3004 EXPORT_SYMBOL_NS(st_lsm6dsx_probe, "IIO_LSM6DSX"); 3005 3006 static int st_lsm6dsx_suspend(struct device *dev) 3007 { 3008 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 3009 struct st_lsm6dsx_sensor *sensor; 3010 int i, err = 0; 3011 3012 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 3013 if (!hw->iio_devs[i]) 3014 continue; 3015 3016 sensor = iio_priv(hw->iio_devs[i]); 3017 if (!(hw->enable_mask & BIT(sensor->id))) 3018 continue; 3019 3020 if (device_may_wakeup(dev) && 3021 st_lsm6dsx_check_events(sensor)) { 3022 /* Enable wake from IRQ */ 3023 enable_irq_wake(hw->irq); 3024 continue; 3025 } 3026 3027 err = st_lsm6dsx_device_set_enable(sensor, false); 3028 if (err < 0) 3029 return err; 3030 3031 hw->suspend_mask |= BIT(sensor->id); 3032 } 3033 3034 if (hw->fifo_mask) 3035 err = st_lsm6dsx_flush_fifo(hw); 3036 3037 return err; 3038 } 3039 3040 static int st_lsm6dsx_resume(struct device *dev) 3041 { 3042 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 3043 struct st_lsm6dsx_sensor *sensor; 3044 int i, err = 0; 3045 3046 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 3047 if (!hw->iio_devs[i]) 3048 continue; 3049 3050 sensor = iio_priv(hw->iio_devs[i]); 3051 if (device_may_wakeup(dev) && 3052 st_lsm6dsx_check_events(sensor)) 3053 disable_irq_wake(hw->irq); 3054 3055 if (!(hw->suspend_mask & BIT(sensor->id))) 3056 continue; 3057 3058 err = st_lsm6dsx_device_set_enable(sensor, true); 3059 if (err < 0) 3060 return err; 3061 3062 hw->suspend_mask &= ~BIT(sensor->id); 3063 } 3064 3065 if (hw->fifo_mask) 3066 err = st_lsm6dsx_resume_fifo(hw); 3067 3068 return err; 3069 } 3070 3071 EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend, 3072 st_lsm6dsx_resume, IIO_LSM6DSX); 3073 3074 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 3075 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 3076 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver"); 3077 MODULE_LICENSE("GPL v2"); 3078