1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /******************************************************************************
3 * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501/NPCT6XX,
4 * based on the TCG TPM Interface Spec version 1.2.
5 * Specifications at www.trustedcomputinggroup.org
6 *
7 * Copyright (C) 2011, Nuvoton Technology Corporation.
8 * Dan Morav <dan.morav@nuvoton.com>
9 * Copyright (C) 2013, Obsidian Research Corp.
10 * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
11 *
12 * Nuvoton contact information: APC.Support@nuvoton.com
13 *****************************************************************************/
14
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/slab.h>
19 #include <linux/interrupt.h>
20 #include <linux/wait.h>
21 #include <linux/i2c.h>
22 #include <linux/of.h>
23 #include <linux/property.h>
24 #include "tpm.h"
25
26 /* I2C interface offsets */
27 #define TPM_STS 0x00
28 #define TPM_BURST_COUNT 0x01
29 #define TPM_DATA_FIFO_W 0x20
30 #define TPM_DATA_FIFO_R 0x40
31 #define TPM_VID_DID_RID 0x60
32 #define TPM_I2C_RETRIES 5
33 /*
34 * I2C bus device maximum buffer size w/o counting I2C address or command
35 * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
36 */
37 #define TPM_I2C_MAX_BUF_SIZE 32
38 #define TPM_I2C_RETRY_COUNT 32
39 #define TPM_I2C_BUS_DELAY 1000 /* usec */
40 #define TPM_I2C_RETRY_DELAY_SHORT (2 * 1000) /* usec */
41 #define TPM_I2C_RETRY_DELAY_LONG (10 * 1000) /* usec */
42 #define TPM_I2C_DELAY_RANGE 300 /* usec */
43
44 #define OF_IS_TPM2 ((void *)1)
45 #define I2C_IS_TPM2 1
46
47 struct priv_data {
48 int irq;
49 unsigned int intrs;
50 wait_queue_head_t read_queue;
51 };
52
i2c_nuvoton_read_buf(struct i2c_client * client,u8 offset,u8 size,u8 * data)53 static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
54 u8 *data)
55 {
56 s32 status;
57
58 status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
59 dev_dbg(&client->dev,
60 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
61 offset, size, (int)size, data, status);
62 return status;
63 }
64
i2c_nuvoton_write_buf(struct i2c_client * client,u8 offset,u8 size,u8 * data)65 static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
66 u8 *data)
67 {
68 s32 status;
69
70 status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
71 dev_dbg(&client->dev,
72 "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
73 offset, size, (int)size, data, status);
74 return status;
75 }
76
77 #define TPM_STS_VALID 0x80
78 #define TPM_STS_COMMAND_READY 0x40
79 #define TPM_STS_GO 0x20
80 #define TPM_STS_DATA_AVAIL 0x10
81 #define TPM_STS_EXPECT 0x08
82 #define TPM_STS_RESPONSE_RETRY 0x02
83 #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
84
85 #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
86 #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
87
88 /* read TPM_STS register */
i2c_nuvoton_read_status(struct tpm_chip * chip)89 static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
90 {
91 struct i2c_client *client = to_i2c_client(chip->dev.parent);
92 s32 status;
93 u8 data;
94
95 status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
96 if (status <= 0) {
97 dev_err(&chip->dev, "%s() error return %d\n", __func__,
98 status);
99 data = TPM_STS_ERR_VAL;
100 }
101
102 return data;
103 }
104
105 /* write byte to TPM_STS register */
i2c_nuvoton_write_status(struct i2c_client * client,u8 data)106 static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
107 {
108 s32 status;
109 int i;
110
111 /* this causes the current command to be aborted */
112 for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
113 status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
114 if (status < 0)
115 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
116 + TPM_I2C_DELAY_RANGE);
117 }
118 return status;
119 }
120
121 /* write commandReady to TPM_STS register */
i2c_nuvoton_ready(struct tpm_chip * chip)122 static void i2c_nuvoton_ready(struct tpm_chip *chip)
123 {
124 struct i2c_client *client = to_i2c_client(chip->dev.parent);
125 s32 status;
126
127 /* this causes the current command to be aborted */
128 status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
129 if (status < 0)
130 dev_err(&chip->dev,
131 "%s() fail to write TPM_STS.commandReady\n", __func__);
132 }
133
134 /* read burstCount field from TPM_STS register
135 * return -1 on fail to read */
i2c_nuvoton_get_burstcount(struct i2c_client * client,struct tpm_chip * chip)136 static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
137 struct tpm_chip *chip)
138 {
139 unsigned long stop = jiffies + chip->timeout_d;
140 s32 status;
141 int burst_count = -1;
142 u8 data;
143
144 /* wait for burstcount to be non-zero */
145 do {
146 /* in I2C burstCount is 1 byte */
147 status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
148 &data);
149 if (status > 0 && data > 0) {
150 burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
151 break;
152 }
153 usleep_range(TPM_I2C_BUS_DELAY, TPM_I2C_BUS_DELAY
154 + TPM_I2C_DELAY_RANGE);
155 } while (time_before(jiffies, stop));
156
157 return burst_count;
158 }
159
160 /*
161 * WPCT301/NPCT501/NPCT6XX SINT# supports only dataAvail
162 * any call to this function which is not waiting for dataAvail will
163 * set queue to NULL to avoid waiting for interrupt
164 */
i2c_nuvoton_check_status(struct tpm_chip * chip,u8 mask,u8 value)165 static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
166 {
167 u8 status = i2c_nuvoton_read_status(chip);
168 return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
169 }
170
i2c_nuvoton_wait_for_stat(struct tpm_chip * chip,u8 mask,u8 value,u32 timeout,wait_queue_head_t * queue)171 static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
172 u32 timeout, wait_queue_head_t *queue)
173 {
174 if ((chip->flags & TPM_CHIP_FLAG_IRQ) && queue) {
175 s32 rc;
176 struct priv_data *priv = dev_get_drvdata(&chip->dev);
177 unsigned int cur_intrs = priv->intrs;
178
179 enable_irq(priv->irq);
180 rc = wait_event_interruptible_timeout(*queue,
181 cur_intrs != priv->intrs,
182 timeout);
183 if (rc > 0)
184 return 0;
185
186 disable_irq(priv->irq);
187 if (rc < 0)
188 return rc;
189 } else {
190 unsigned long ten_msec, stop;
191 bool status_valid;
192
193 /* check current status */
194 status_valid = i2c_nuvoton_check_status(chip, mask, value);
195 if (status_valid)
196 return 0;
197
198 /* use polling to wait for the event */
199 ten_msec = jiffies + usecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
200 stop = jiffies + timeout;
201 do {
202 if (time_before(jiffies, ten_msec))
203 usleep_range(TPM_I2C_RETRY_DELAY_SHORT,
204 TPM_I2C_RETRY_DELAY_SHORT
205 + TPM_I2C_DELAY_RANGE);
206 else
207 usleep_range(TPM_I2C_RETRY_DELAY_LONG,
208 TPM_I2C_RETRY_DELAY_LONG
209 + TPM_I2C_DELAY_RANGE);
210 status_valid = i2c_nuvoton_check_status(chip, mask,
211 value);
212 if (status_valid)
213 return 0;
214 } while (time_before(jiffies, stop));
215 }
216 dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
217 value);
218 return -ETIMEDOUT;
219 }
220
221 /* wait for dataAvail field to be set in the TPM_STS register */
i2c_nuvoton_wait_for_data_avail(struct tpm_chip * chip,u32 timeout,wait_queue_head_t * queue)222 static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
223 wait_queue_head_t *queue)
224 {
225 return i2c_nuvoton_wait_for_stat(chip,
226 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
227 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
228 timeout, queue);
229 }
230
231 /* Read @count bytes into @buf from TPM_RD_FIFO register */
i2c_nuvoton_recv_data(struct i2c_client * client,struct tpm_chip * chip,u8 * buf,size_t count)232 static int i2c_nuvoton_recv_data(struct i2c_client *client,
233 struct tpm_chip *chip, u8 *buf, size_t count)
234 {
235 struct priv_data *priv = dev_get_drvdata(&chip->dev);
236 s32 rc;
237 int burst_count, bytes2read, size = 0;
238
239 while (size < count &&
240 i2c_nuvoton_wait_for_data_avail(chip,
241 chip->timeout_c,
242 &priv->read_queue) == 0) {
243 burst_count = i2c_nuvoton_get_burstcount(client, chip);
244 if (burst_count < 0) {
245 dev_err(&chip->dev,
246 "%s() fail to read burstCount=%d\n", __func__,
247 burst_count);
248 return -EIO;
249 }
250 bytes2read = min_t(size_t, burst_count, count - size);
251 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
252 bytes2read, &buf[size]);
253 if (rc < 0) {
254 dev_err(&chip->dev,
255 "%s() fail on i2c_nuvoton_read_buf()=%d\n",
256 __func__, rc);
257 return -EIO;
258 }
259 dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
260 size += bytes2read;
261 }
262
263 return size;
264 }
265
266 /* Read TPM command results */
i2c_nuvoton_recv(struct tpm_chip * chip,u8 * buf,size_t count)267 static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
268 {
269 struct priv_data *priv = dev_get_drvdata(&chip->dev);
270 struct device *dev = chip->dev.parent;
271 struct i2c_client *client = to_i2c_client(dev);
272 s32 rc;
273 int status;
274 int burst_count;
275 int retries;
276 int size = 0;
277 u32 expected;
278
279 if (count < TPM_HEADER_SIZE) {
280 i2c_nuvoton_ready(chip); /* return to idle */
281 dev_err(dev, "%s() count < header size\n", __func__);
282 return -EIO;
283 }
284 for (retries = 0; retries < TPM_I2C_RETRIES; retries++) {
285 if (retries > 0) {
286 /* if this is not the first trial, set responseRetry */
287 i2c_nuvoton_write_status(client,
288 TPM_STS_RESPONSE_RETRY);
289 }
290 /*
291 * read first available (> 10 bytes), including:
292 * tag, paramsize, and result
293 */
294 status = i2c_nuvoton_wait_for_data_avail(
295 chip, chip->timeout_c, &priv->read_queue);
296 if (status != 0) {
297 dev_err(dev, "%s() timeout on dataAvail\n", __func__);
298 size = -ETIMEDOUT;
299 continue;
300 }
301 burst_count = i2c_nuvoton_get_burstcount(client, chip);
302 if (burst_count < 0) {
303 dev_err(dev, "%s() fail to get burstCount\n", __func__);
304 size = -EIO;
305 continue;
306 }
307 size = i2c_nuvoton_recv_data(client, chip, buf,
308 burst_count);
309 if (size < TPM_HEADER_SIZE) {
310 dev_err(dev, "%s() fail to read header\n", __func__);
311 size = -EIO;
312 continue;
313 }
314 /*
315 * convert number of expected bytes field from big endian 32 bit
316 * to machine native
317 */
318 expected = be32_to_cpu(*(__be32 *) (buf + 2));
319 if (expected > count || expected < size) {
320 dev_err(dev, "%s() expected > count\n", __func__);
321 size = -EIO;
322 continue;
323 }
324 rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
325 expected - size);
326 size += rc;
327 if (rc < 0 || size < expected) {
328 dev_err(dev, "%s() fail to read remainder of result\n",
329 __func__);
330 size = -EIO;
331 continue;
332 }
333 if (i2c_nuvoton_wait_for_stat(
334 chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
335 TPM_STS_VALID, chip->timeout_c,
336 NULL)) {
337 dev_err(dev, "%s() error left over data\n", __func__);
338 size = -ETIMEDOUT;
339 continue;
340 }
341 break;
342 }
343 i2c_nuvoton_ready(chip);
344 dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
345 return size;
346 }
347
348 /*
349 * Send TPM command.
350 *
351 * If interrupts are used (signaled by an irq set in the vendor structure)
352 * tpm.c can skip polling for the data to be available as the interrupt is
353 * waited for here
354 */
i2c_nuvoton_send(struct tpm_chip * chip,u8 * buf,size_t bufsiz,size_t len)355 static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz,
356 size_t len)
357 {
358 struct priv_data *priv = dev_get_drvdata(&chip->dev);
359 struct device *dev = chip->dev.parent;
360 struct i2c_client *client = to_i2c_client(dev);
361 u32 ordinal;
362 unsigned long duration;
363 size_t count = 0;
364 int burst_count, bytes2write, retries, rc = -EIO;
365
366 for (retries = 0; retries < TPM_RETRY; retries++) {
367 i2c_nuvoton_ready(chip);
368 if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
369 TPM_STS_COMMAND_READY,
370 chip->timeout_b, NULL)) {
371 dev_err(dev, "%s() timeout on commandReady\n",
372 __func__);
373 rc = -EIO;
374 continue;
375 }
376 rc = 0;
377 while (count < len - 1) {
378 burst_count = i2c_nuvoton_get_burstcount(client,
379 chip);
380 if (burst_count < 0) {
381 dev_err(dev, "%s() fail get burstCount\n",
382 __func__);
383 rc = -EIO;
384 break;
385 }
386 bytes2write = min_t(size_t, burst_count,
387 len - 1 - count);
388 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
389 bytes2write, &buf[count]);
390 if (rc < 0) {
391 dev_err(dev, "%s() fail i2cWriteBuf\n",
392 __func__);
393 break;
394 }
395 dev_dbg(dev, "%s(%d):", __func__, bytes2write);
396 count += bytes2write;
397 rc = i2c_nuvoton_wait_for_stat(chip,
398 TPM_STS_VALID |
399 TPM_STS_EXPECT,
400 TPM_STS_VALID |
401 TPM_STS_EXPECT,
402 chip->timeout_c,
403 NULL);
404 if (rc < 0) {
405 dev_err(dev, "%s() timeout on Expect\n",
406 __func__);
407 rc = -ETIMEDOUT;
408 break;
409 }
410 }
411 if (rc < 0)
412 continue;
413
414 /* write last byte */
415 rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
416 &buf[count]);
417 if (rc < 0) {
418 dev_err(dev, "%s() fail to write last byte\n",
419 __func__);
420 rc = -EIO;
421 continue;
422 }
423 dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
424 rc = i2c_nuvoton_wait_for_stat(chip,
425 TPM_STS_VALID | TPM_STS_EXPECT,
426 TPM_STS_VALID,
427 chip->timeout_c, NULL);
428 if (rc) {
429 dev_err(dev, "%s() timeout on Expect to clear\n",
430 __func__);
431 rc = -ETIMEDOUT;
432 continue;
433 }
434 break;
435 }
436 if (rc < 0) {
437 /* retries == TPM_RETRY */
438 i2c_nuvoton_ready(chip);
439 return rc;
440 }
441 /* execute the TPM command */
442 rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
443 if (rc < 0) {
444 dev_err(dev, "%s() fail to write Go\n", __func__);
445 i2c_nuvoton_ready(chip);
446 return rc;
447 }
448 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
449 duration = tpm_calc_ordinal_duration(chip, ordinal);
450
451 rc = i2c_nuvoton_wait_for_data_avail(chip, duration, &priv->read_queue);
452 if (rc) {
453 dev_err(dev, "%s() timeout command duration %ld\n",
454 __func__, duration);
455 i2c_nuvoton_ready(chip);
456 return rc;
457 }
458
459 dev_dbg(dev, "%s() -> %zd\n", __func__, len);
460 return 0;
461 }
462
i2c_nuvoton_req_canceled(struct tpm_chip * chip,u8 status)463 static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
464 {
465 return (status == TPM_STS_COMMAND_READY);
466 }
467
468 static const struct tpm_class_ops tpm_i2c = {
469 .flags = TPM_OPS_AUTO_STARTUP,
470 .status = i2c_nuvoton_read_status,
471 .recv = i2c_nuvoton_recv,
472 .send = i2c_nuvoton_send,
473 .cancel = i2c_nuvoton_ready,
474 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
475 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
476 .req_canceled = i2c_nuvoton_req_canceled,
477 };
478
479 /* The only purpose for the handler is to signal to any waiting threads that
480 * the interrupt is currently being asserted. The driver does not do any
481 * processing triggered by interrupts, and the chip provides no way to mask at
482 * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
483 * this means it cannot be shared. */
i2c_nuvoton_int_handler(int dummy,void * dev_id)484 static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
485 {
486 struct tpm_chip *chip = dev_id;
487 struct priv_data *priv = dev_get_drvdata(&chip->dev);
488
489 priv->intrs++;
490 wake_up(&priv->read_queue);
491 disable_irq_nosync(priv->irq);
492 return IRQ_HANDLED;
493 }
494
get_vid(struct i2c_client * client,u32 * res)495 static int get_vid(struct i2c_client *client, u32 *res)
496 {
497 static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
498 u32 temp;
499 s32 rc;
500
501 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
502 return -ENODEV;
503 rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
504 if (rc < 0)
505 return rc;
506
507 /* check WPCT301 values - ignore RID */
508 if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
509 /*
510 * f/w rev 2.81 has an issue where the VID_DID_RID is not
511 * reporting the right value. so give it another chance at
512 * offset 0x20 (FIFO_W).
513 */
514 rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
515 (u8 *) (&temp));
516 if (rc < 0)
517 return rc;
518
519 /* check WPCT301 values - ignore RID */
520 if (memcmp(&temp, vid_did_rid_value,
521 sizeof(vid_did_rid_value)))
522 return -ENODEV;
523 }
524
525 *res = temp;
526 return 0;
527 }
528
i2c_nuvoton_probe(struct i2c_client * client)529 static int i2c_nuvoton_probe(struct i2c_client *client)
530 {
531 int rc;
532 struct tpm_chip *chip;
533 struct device *dev = &client->dev;
534 struct priv_data *priv;
535 u32 vid = 0;
536
537 rc = get_vid(client, &vid);
538 if (rc)
539 return rc;
540
541 dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
542 (u8) (vid >> 16), (u8) (vid >> 24));
543
544 chip = tpmm_chip_alloc(dev, &tpm_i2c);
545 if (IS_ERR(chip))
546 return PTR_ERR(chip);
547
548 priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
549 if (!priv)
550 return -ENOMEM;
551
552 if (i2c_get_match_data(client))
553 chip->flags |= TPM_CHIP_FLAG_TPM2;
554
555 init_waitqueue_head(&priv->read_queue);
556
557 /* Default timeouts */
558 chip->timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
559 chip->timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
560 chip->timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
561 chip->timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
562
563 dev_set_drvdata(&chip->dev, priv);
564
565 /*
566 * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
567 * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
568 * The IRQ should be set in the i2c_board_info (which is done
569 * automatically in of_i2c_register_devices, for device tree users */
570 priv->irq = client->irq;
571 if (client->irq) {
572 dev_dbg(dev, "%s() priv->irq\n", __func__);
573 rc = devm_request_irq(dev, client->irq,
574 i2c_nuvoton_int_handler,
575 IRQF_TRIGGER_LOW,
576 dev_name(&chip->dev),
577 chip);
578 if (rc) {
579 priv->irq = 0;
580 } else {
581 chip->flags |= TPM_CHIP_FLAG_IRQ;
582 /* Clear any pending interrupt */
583 i2c_nuvoton_ready(chip);
584 /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
585 rc = i2c_nuvoton_wait_for_stat(chip,
586 TPM_STS_COMMAND_READY,
587 TPM_STS_COMMAND_READY,
588 chip->timeout_b,
589 NULL);
590 if (rc == 0) {
591 /*
592 * TIS is in ready state
593 * write dummy byte to enter reception state
594 * TPM_DATA_FIFO_W <- rc (0)
595 */
596 rc = i2c_nuvoton_write_buf(client,
597 TPM_DATA_FIFO_W,
598 1, (u8 *) (&rc));
599 if (rc < 0)
600 return rc;
601 /* TPM_STS <- 0x40 (commandReady) */
602 i2c_nuvoton_ready(chip);
603 } else {
604 /*
605 * timeout_b reached - command was
606 * aborted. TIS should now be in idle state -
607 * only TPM_STS_VALID should be set
608 */
609 if (i2c_nuvoton_read_status(chip) !=
610 TPM_STS_VALID)
611 return -EIO;
612 }
613 }
614 }
615
616 return tpm_chip_register(chip);
617 }
618
i2c_nuvoton_remove(struct i2c_client * client)619 static void i2c_nuvoton_remove(struct i2c_client *client)
620 {
621 struct tpm_chip *chip = i2c_get_clientdata(client);
622
623 tpm_chip_unregister(chip);
624 }
625
626 static const struct i2c_device_id i2c_nuvoton_id[] = {
627 {"tpm_i2c_nuvoton"},
628 {"tpm2_i2c_nuvoton", .driver_data = I2C_IS_TPM2},
629 {}
630 };
631 MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
632
633 #ifdef CONFIG_OF
634 static const struct of_device_id i2c_nuvoton_of_match[] = {
635 {.compatible = "nuvoton,npct501"},
636 {.compatible = "winbond,wpct301"},
637 {.compatible = "nuvoton,npct601", .data = OF_IS_TPM2},
638 {},
639 };
640 MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
641 #endif
642
643 static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
644
645 static struct i2c_driver i2c_nuvoton_driver = {
646 .id_table = i2c_nuvoton_id,
647 .probe = i2c_nuvoton_probe,
648 .remove = i2c_nuvoton_remove,
649 .driver = {
650 .name = "tpm_i2c_nuvoton",
651 .pm = &i2c_nuvoton_pm_ops,
652 .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
653 },
654 };
655
656 module_i2c_driver(i2c_nuvoton_driver);
657
658 MODULE_AUTHOR("Dan Morav <dan.morav@nuvoton.com>");
659 MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
660 MODULE_LICENSE("GPL");
661