1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
5 *
6 * Authors:
7 * Leendert van Doorn <leendert@watson.ibm.com>
8 * Kylene Hall <kjhall@us.ibm.com>
9 *
10 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 *
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
14 *
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 */
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/pnp.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/wait.h>
25 #include <linux/acpi.h>
26 #include <linux/freezer.h>
27 #include <linux/dmi.h>
28 #include "tpm.h"
29 #include "tpm_tis_core.h"
30
31 #define TPM_TIS_MAX_UNHANDLED_IRQS 1000
32
33 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
34
wait_for_tpm_stat_cond(struct tpm_chip * chip,u8 mask,bool check_cancel,bool * canceled)35 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
36 bool check_cancel, bool *canceled)
37 {
38 u8 status = chip->ops->status(chip);
39
40 *canceled = false;
41 if ((status & mask) == mask)
42 return true;
43 if (check_cancel && chip->ops->req_canceled(chip, status)) {
44 *canceled = true;
45 return true;
46 }
47 return false;
48 }
49
tpm_tis_filter_sts_mask(u8 int_mask,u8 sts_mask)50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask)
51 {
52 if (!(int_mask & TPM_INTF_STS_VALID_INT))
53 sts_mask &= ~TPM_STS_VALID;
54
55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT))
56 sts_mask &= ~TPM_STS_DATA_AVAIL;
57
58 if (!(int_mask & TPM_INTF_CMD_READY_INT))
59 sts_mask &= ~TPM_STS_COMMAND_READY;
60
61 return sts_mask;
62 }
63
wait_for_tpm_stat(struct tpm_chip * chip,u8 mask,unsigned long timeout,wait_queue_head_t * queue,bool check_cancel)64 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
65 unsigned long timeout, wait_queue_head_t *queue,
66 bool check_cancel)
67 {
68 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
69 unsigned long stop;
70 long rc;
71 u8 status;
72 bool canceled = false;
73 u8 sts_mask;
74 int ret = 0;
75
76 /* check current status */
77 status = chip->ops->status(chip);
78 if ((status & mask) == mask)
79 return 0;
80
81 sts_mask = mask & (TPM_STS_VALID | TPM_STS_DATA_AVAIL |
82 TPM_STS_COMMAND_READY);
83 /* check what status changes can be handled by irqs */
84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask);
85
86 stop = jiffies + timeout;
87 /* process status changes with irq support */
88 if (sts_mask) {
89 ret = -ETIME;
90 again:
91 timeout = stop - jiffies;
92 if ((long)timeout <= 0)
93 return -ETIME;
94 rc = wait_event_interruptible_timeout(*queue,
95 wait_for_tpm_stat_cond(chip, sts_mask, check_cancel,
96 &canceled),
97 timeout);
98 if (rc > 0) {
99 if (canceled)
100 return -ECANCELED;
101 ret = 0;
102 }
103 if (rc == -ERESTARTSYS && freezing(current)) {
104 clear_thread_flag(TIF_SIGPENDING);
105 goto again;
106 }
107 }
108
109 if (ret)
110 return ret;
111
112 mask &= ~sts_mask;
113 if (!mask) /* all done */
114 return 0;
115 /* process status changes without irq support */
116 do {
117 usleep_range(priv->timeout_min, priv->timeout_max);
118 status = chip->ops->status(chip);
119 if ((status & mask) == mask)
120 return 0;
121 } while (time_before(jiffies, stop));
122 return -ETIME;
123 }
124
125 /* Before we attempt to access the TPM we must see that the valid bit is set.
126 * The specification says that this bit is 0 at reset and remains 0 until the
127 * 'TPM has gone through its self test and initialization and has established
128 * correct values in the other bits.'
129 */
wait_startup(struct tpm_chip * chip,int l)130 static int wait_startup(struct tpm_chip *chip, int l)
131 {
132 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
133 unsigned long stop = jiffies + chip->timeout_a;
134
135 do {
136 int rc;
137 u8 access;
138
139 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
140 if (rc < 0)
141 return rc;
142
143 if (access & TPM_ACCESS_VALID)
144 return 0;
145 tpm_msleep(TPM_TIMEOUT);
146 } while (time_before(jiffies, stop));
147 return -1;
148 }
149
check_locality(struct tpm_chip * chip,int l)150 static bool check_locality(struct tpm_chip *chip, int l)
151 {
152 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
153 int rc;
154 u8 access;
155
156 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
157 if (rc < 0)
158 return false;
159
160 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
161 | TPM_ACCESS_REQUEST_USE)) ==
162 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
163 priv->locality = l;
164 return true;
165 }
166
167 return false;
168 }
169
__tpm_tis_relinquish_locality(struct tpm_tis_data * priv,int l)170 static int __tpm_tis_relinquish_locality(struct tpm_tis_data *priv, int l)
171 {
172 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
173
174 return 0;
175 }
176
tpm_tis_relinquish_locality(struct tpm_chip * chip,int l)177 static int tpm_tis_relinquish_locality(struct tpm_chip *chip, int l)
178 {
179 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
180
181 mutex_lock(&priv->locality_count_mutex);
182 priv->locality_count--;
183 if (priv->locality_count == 0)
184 __tpm_tis_relinquish_locality(priv, l);
185 mutex_unlock(&priv->locality_count_mutex);
186
187 return 0;
188 }
189
__tpm_tis_request_locality(struct tpm_chip * chip,int l)190 static int __tpm_tis_request_locality(struct tpm_chip *chip, int l)
191 {
192 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
193 unsigned long stop, timeout;
194 long rc;
195
196 if (check_locality(chip, l))
197 return l;
198
199 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
200 if (rc < 0)
201 return rc;
202
203 stop = jiffies + chip->timeout_a;
204
205 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
206 again:
207 timeout = stop - jiffies;
208 if ((long)timeout <= 0)
209 return -1;
210 rc = wait_event_interruptible_timeout(priv->int_queue,
211 (check_locality
212 (chip, l)),
213 timeout);
214 if (rc > 0)
215 return l;
216 if (rc == -ERESTARTSYS && freezing(current)) {
217 clear_thread_flag(TIF_SIGPENDING);
218 goto again;
219 }
220 } else {
221 /* wait for burstcount */
222 do {
223 if (check_locality(chip, l))
224 return l;
225 tpm_msleep(TPM_TIMEOUT);
226 } while (time_before(jiffies, stop));
227 }
228 return -1;
229 }
230
tpm_tis_request_locality(struct tpm_chip * chip,int l)231 static int tpm_tis_request_locality(struct tpm_chip *chip, int l)
232 {
233 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
234 int ret = 0;
235
236 mutex_lock(&priv->locality_count_mutex);
237 if (priv->locality_count == 0)
238 ret = __tpm_tis_request_locality(chip, l);
239 if (!ret)
240 priv->locality_count++;
241 mutex_unlock(&priv->locality_count_mutex);
242 return ret;
243 }
244
tpm_tis_status(struct tpm_chip * chip)245 static u8 tpm_tis_status(struct tpm_chip *chip)
246 {
247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
248 int rc;
249 u8 status;
250
251 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
252 if (rc < 0)
253 return 0;
254
255 if (unlikely((status & TPM_STS_READ_ZERO) != 0)) {
256 if (!test_and_set_bit(TPM_TIS_INVALID_STATUS, &priv->flags)) {
257 /*
258 * If this trips, the chances are the read is
259 * returning 0xff because the locality hasn't been
260 * acquired. Usually because tpm_try_get_ops() hasn't
261 * been called before doing a TPM operation.
262 */
263 dev_err(&chip->dev, "invalid TPM_STS.x 0x%02x, dumping stack for forensics\n",
264 status);
265
266 /*
267 * Dump stack for forensics, as invalid TPM_STS.x could be
268 * potentially triggered by impaired tpm_try_get_ops() or
269 * tpm_find_get_ops().
270 */
271 dump_stack();
272 }
273
274 return 0;
275 }
276
277 return status;
278 }
279
tpm_tis_ready(struct tpm_chip * chip)280 static void tpm_tis_ready(struct tpm_chip *chip)
281 {
282 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
283
284 /* this causes the current command to be aborted */
285 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
286 }
287
get_burstcount(struct tpm_chip * chip)288 static int get_burstcount(struct tpm_chip *chip)
289 {
290 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
291 unsigned long stop;
292 int burstcnt, rc;
293 u32 value;
294
295 /* wait for burstcount */
296 if (chip->flags & TPM_CHIP_FLAG_TPM2)
297 stop = jiffies + chip->timeout_a;
298 else
299 stop = jiffies + chip->timeout_d;
300 do {
301 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
302 if (rc < 0)
303 return rc;
304
305 burstcnt = (value >> 8) & 0xFFFF;
306 if (burstcnt)
307 return burstcnt;
308 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
309 } while (time_before(jiffies, stop));
310 return -EBUSY;
311 }
312
recv_data(struct tpm_chip * chip,u8 * buf,size_t count)313 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
314 {
315 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
316 int size = 0, burstcnt, rc;
317
318 while (size < count) {
319 rc = wait_for_tpm_stat(chip,
320 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
321 chip->timeout_c,
322 &priv->read_queue, true);
323 if (rc < 0)
324 return rc;
325 burstcnt = get_burstcount(chip);
326 if (burstcnt < 0) {
327 dev_err(&chip->dev, "Unable to read burstcount\n");
328 return burstcnt;
329 }
330 burstcnt = min_t(int, burstcnt, count - size);
331
332 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
333 burstcnt, buf + size);
334 if (rc < 0)
335 return rc;
336
337 size += burstcnt;
338 }
339 return size;
340 }
341
tpm_tis_try_recv(struct tpm_chip * chip,u8 * buf,size_t count)342 static int tpm_tis_try_recv(struct tpm_chip *chip, u8 *buf, size_t count)
343 {
344 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
345 int size = 0;
346 int status;
347 u32 expected;
348 int rc;
349
350 size = recv_data(chip, buf, TPM_HEADER_SIZE);
351 /* read first 10 bytes, including tag, paramsize, and result */
352 if (size < TPM_HEADER_SIZE) {
353 dev_err(&chip->dev, "Unable to read header\n");
354 goto out;
355 }
356
357 expected = be32_to_cpu(*(__be32 *) (buf + 2));
358 if (expected > count || expected < TPM_HEADER_SIZE) {
359 size = -EIO;
360 goto out;
361 }
362
363 rc = recv_data(chip, &buf[TPM_HEADER_SIZE],
364 expected - TPM_HEADER_SIZE);
365 if (rc < 0) {
366 size = rc;
367 goto out;
368 }
369 size += rc;
370 if (size < expected) {
371 dev_err(&chip->dev, "Unable to read remainder of result\n");
372 size = -ETIME;
373 goto out;
374 }
375
376 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
377 &priv->int_queue, false) < 0) {
378 size = -ETIME;
379 goto out;
380 }
381 status = tpm_tis_status(chip);
382 if (status & TPM_STS_DATA_AVAIL) {
383 dev_err(&chip->dev, "Error left over data\n");
384 size = -EIO;
385 goto out;
386 }
387
388 rc = tpm_tis_verify_crc(priv, (size_t)size, buf);
389 if (rc < 0) {
390 dev_err(&chip->dev, "CRC mismatch for response.\n");
391 size = rc;
392 goto out;
393 }
394
395 out:
396 return size;
397 }
398
tpm_tis_recv(struct tpm_chip * chip,u8 * buf,size_t count)399 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
400 {
401 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
402 unsigned int try;
403 int rc = 0;
404
405 if (count < TPM_HEADER_SIZE)
406 return -EIO;
407
408 for (try = 0; try < TPM_RETRY; try++) {
409 rc = tpm_tis_try_recv(chip, buf, count);
410
411 if (rc == -EIO)
412 /* Data transfer errors, indicated by EIO, can be
413 * recovered by rereading the response.
414 */
415 tpm_tis_write8(priv, TPM_STS(priv->locality),
416 TPM_STS_RESPONSE_RETRY);
417 else
418 break;
419 }
420
421 tpm_tis_ready(chip);
422
423 return rc;
424 }
425
426 /*
427 * If interrupts are used (signaled by an irq set in the vendor structure)
428 * tpm.c can skip polling for the data to be available as the interrupt is
429 * waited for here
430 */
tpm_tis_send_data(struct tpm_chip * chip,const u8 * buf,size_t len)431 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
432 {
433 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
434 int rc, status, burstcnt;
435 size_t count = 0;
436 bool itpm = test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
437
438 status = tpm_tis_status(chip);
439 if ((status & TPM_STS_COMMAND_READY) == 0) {
440 tpm_tis_ready(chip);
441 if (wait_for_tpm_stat
442 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
443 &priv->int_queue, false) < 0) {
444 rc = -ETIME;
445 goto out_err;
446 }
447 }
448
449 while (count < len - 1) {
450 burstcnt = get_burstcount(chip);
451 if (burstcnt < 0) {
452 dev_err(&chip->dev, "Unable to read burstcount\n");
453 rc = burstcnt;
454 goto out_err;
455 }
456 burstcnt = min_t(int, burstcnt, len - count - 1);
457 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
458 burstcnt, buf + count);
459 if (rc < 0)
460 goto out_err;
461
462 count += burstcnt;
463
464 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
465 &priv->int_queue, false) < 0) {
466 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
467 rc = -EAGAIN;
468 else
469 rc = -ETIME;
470 goto out_err;
471 }
472 status = tpm_tis_status(chip);
473 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
474 rc = -EIO;
475 goto out_err;
476 }
477 }
478
479 /* write last byte */
480 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
481 if (rc < 0)
482 goto out_err;
483
484 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
485 &priv->int_queue, false) < 0) {
486 if (test_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags))
487 rc = -EAGAIN;
488 else
489 rc = -ETIME;
490 goto out_err;
491 }
492 status = tpm_tis_status(chip);
493 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
494 rc = -EIO;
495 goto out_err;
496 }
497
498 rc = tpm_tis_verify_crc(priv, len, buf);
499 if (rc < 0) {
500 dev_err(&chip->dev, "CRC mismatch for command.\n");
501 goto out_err;
502 }
503
504 return 0;
505
506 out_err:
507 tpm_tis_ready(chip);
508 return rc;
509 }
510
__tpm_tis_disable_interrupts(struct tpm_chip * chip)511 static void __tpm_tis_disable_interrupts(struct tpm_chip *chip)
512 {
513 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
514 u32 int_mask = 0;
515
516 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask);
517 int_mask &= ~TPM_GLOBAL_INT_ENABLE;
518 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask);
519
520 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
521 }
522
tpm_tis_disable_interrupts(struct tpm_chip * chip)523 static void tpm_tis_disable_interrupts(struct tpm_chip *chip)
524 {
525 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
526
527 if (priv->irq == 0)
528 return;
529
530 __tpm_tis_disable_interrupts(chip);
531
532 devm_free_irq(chip->dev.parent, priv->irq, chip);
533 priv->irq = 0;
534 }
535
536 /*
537 * If interrupts are used (signaled by an irq set in the vendor structure)
538 * tpm.c can skip polling for the data to be available as the interrupt is
539 * waited for here
540 */
tpm_tis_send_main(struct tpm_chip * chip,const u8 * buf,size_t len)541 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
542 {
543 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
544 int rc;
545 u32 ordinal;
546 unsigned long dur;
547 unsigned int try;
548
549 for (try = 0; try < TPM_RETRY; try++) {
550 rc = tpm_tis_send_data(chip, buf, len);
551 if (rc >= 0)
552 /* Data transfer done successfully */
553 break;
554 else if (rc != -EAGAIN && rc != -EIO)
555 /* Data transfer failed, not recoverable */
556 return rc;
557
558 usleep_range(priv->timeout_min, priv->timeout_max);
559 }
560
561 /* go and do it */
562 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
563 if (rc < 0)
564 goto out_err;
565
566 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
567 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
568
569 dur = tpm_calc_ordinal_duration(chip, ordinal);
570 if (wait_for_tpm_stat
571 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
572 &priv->read_queue, false) < 0) {
573 rc = -ETIME;
574 goto out_err;
575 }
576 }
577 return 0;
578 out_err:
579 tpm_tis_ready(chip);
580 return rc;
581 }
582
tpm_tis_send(struct tpm_chip * chip,u8 * buf,size_t bufsiz,size_t len)583 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t bufsiz,
584 size_t len)
585 {
586 int rc, irq;
587 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
588
589 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) ||
590 test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
591 return tpm_tis_send_main(chip, buf, len);
592
593 /* Verify receipt of the expected IRQ */
594 irq = priv->irq;
595 priv->irq = 0;
596 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
597 rc = tpm_tis_send_main(chip, buf, len);
598 priv->irq = irq;
599 chip->flags |= TPM_CHIP_FLAG_IRQ;
600 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
601 tpm_msleep(1);
602 if (!test_bit(TPM_TIS_IRQ_TESTED, &priv->flags))
603 tpm_tis_disable_interrupts(chip);
604 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
605 return rc;
606 }
607
608 struct tis_vendor_durations_override {
609 u32 did_vid;
610 struct tpm1_version version;
611 unsigned long durations[3];
612 };
613
614 static const struct tis_vendor_durations_override vendor_dur_overrides[] = {
615 /* STMicroelectronics 0x104a */
616 { 0x0000104a,
617 { 1, 2, 8, 28 },
618 { (2 * 60 * HZ), (2 * 60 * HZ), (2 * 60 * HZ) } },
619 };
620
tpm_tis_update_durations(struct tpm_chip * chip,unsigned long * duration_cap)621 static void tpm_tis_update_durations(struct tpm_chip *chip,
622 unsigned long *duration_cap)
623 {
624 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
625 struct tpm1_version *version;
626 u32 did_vid;
627 int i, rc;
628 cap_t cap;
629
630 chip->duration_adjusted = false;
631
632 if (chip->ops->clk_enable != NULL)
633 chip->ops->clk_enable(chip, true);
634
635 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
636 if (rc < 0) {
637 dev_warn(&chip->dev, "%s: failed to read did_vid. %d\n",
638 __func__, rc);
639 goto out;
640 }
641
642 /* Try to get a TPM version 1.2 or 1.1 TPM_CAP_VERSION_INFO */
643 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_2, &cap,
644 "attempting to determine the 1.2 version",
645 sizeof(cap.version2));
646 if (!rc) {
647 version = &cap.version2.version;
648 } else {
649 rc = tpm1_getcap(chip, TPM_CAP_VERSION_1_1, &cap,
650 "attempting to determine the 1.1 version",
651 sizeof(cap.version1));
652
653 if (rc)
654 goto out;
655
656 version = &cap.version1;
657 }
658
659 for (i = 0; i != ARRAY_SIZE(vendor_dur_overrides); i++) {
660 if (vendor_dur_overrides[i].did_vid != did_vid)
661 continue;
662
663 if ((version->major ==
664 vendor_dur_overrides[i].version.major) &&
665 (version->minor ==
666 vendor_dur_overrides[i].version.minor) &&
667 (version->rev_major ==
668 vendor_dur_overrides[i].version.rev_major) &&
669 (version->rev_minor ==
670 vendor_dur_overrides[i].version.rev_minor)) {
671
672 memcpy(duration_cap,
673 vendor_dur_overrides[i].durations,
674 sizeof(vendor_dur_overrides[i].durations));
675
676 chip->duration_adjusted = true;
677 goto out;
678 }
679 }
680
681 out:
682 if (chip->ops->clk_enable != NULL)
683 chip->ops->clk_enable(chip, false);
684 }
685
686 struct tis_vendor_timeout_override {
687 u32 did_vid;
688 unsigned long timeout_us[4];
689 };
690
691 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
692 /* Atmel 3204 */
693 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
694 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
695 };
696
tpm_tis_update_timeouts(struct tpm_chip * chip,unsigned long * timeout_cap)697 static void tpm_tis_update_timeouts(struct tpm_chip *chip,
698 unsigned long *timeout_cap)
699 {
700 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
701 int i, rc;
702 u32 did_vid;
703
704 chip->timeout_adjusted = false;
705
706 if (chip->ops->clk_enable != NULL)
707 chip->ops->clk_enable(chip, true);
708
709 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
710 if (rc < 0) {
711 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
712 __func__, rc);
713 goto out;
714 }
715
716 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
717 if (vendor_timeout_overrides[i].did_vid != did_vid)
718 continue;
719 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
720 sizeof(vendor_timeout_overrides[i].timeout_us));
721 chip->timeout_adjusted = true;
722 }
723
724 out:
725 if (chip->ops->clk_enable != NULL)
726 chip->ops->clk_enable(chip, false);
727
728 return;
729 }
730
731 /*
732 * Early probing for iTPM with STS_DATA_EXPECT flaw.
733 * Try sending command without itpm flag set and if that
734 * fails, repeat with itpm flag set.
735 */
probe_itpm(struct tpm_chip * chip)736 static int probe_itpm(struct tpm_chip *chip)
737 {
738 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
739 int rc = 0;
740 static const u8 cmd_getticks[] = {
741 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
742 0x00, 0x00, 0x00, 0xf1
743 };
744 size_t len = sizeof(cmd_getticks);
745 u16 vendor;
746
747 if (test_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags))
748 return 0;
749
750 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
751 if (rc < 0)
752 return rc;
753
754 /* probe only iTPMS */
755 if (vendor != TPM_VID_INTEL)
756 return 0;
757
758 if (tpm_tis_request_locality(chip, 0) != 0)
759 return -EBUSY;
760
761 rc = tpm_tis_send_data(chip, cmd_getticks, len);
762 if (rc == 0)
763 goto out;
764
765 tpm_tis_ready(chip);
766
767 set_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
768
769 rc = tpm_tis_send_data(chip, cmd_getticks, len);
770 if (rc == 0)
771 dev_info(&chip->dev, "Detected an iTPM.\n");
772 else {
773 clear_bit(TPM_TIS_ITPM_WORKAROUND, &priv->flags);
774 rc = -EFAULT;
775 }
776
777 out:
778 tpm_tis_ready(chip);
779 tpm_tis_relinquish_locality(chip, priv->locality);
780
781 return rc;
782 }
783
tpm_tis_req_canceled(struct tpm_chip * chip,u8 status)784 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
785 {
786 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
787
788 if (!test_bit(TPM_TIS_DEFAULT_CANCELLATION, &priv->flags)) {
789 switch (priv->manufacturer_id) {
790 case TPM_VID_WINBOND:
791 return ((status == TPM_STS_VALID) ||
792 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
793 case TPM_VID_STM:
794 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
795 default:
796 break;
797 }
798 }
799
800 return status == TPM_STS_COMMAND_READY;
801 }
802
tpm_tis_revert_interrupts(struct tpm_chip * chip)803 static irqreturn_t tpm_tis_revert_interrupts(struct tpm_chip *chip)
804 {
805 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
806 const char *product;
807 const char *vendor;
808
809 dev_warn(&chip->dev, FW_BUG
810 "TPM interrupt storm detected, polling instead\n");
811
812 vendor = dmi_get_system_info(DMI_SYS_VENDOR);
813 product = dmi_get_system_info(DMI_PRODUCT_VERSION);
814
815 if (vendor && product) {
816 dev_info(&chip->dev,
817 "Consider adding the following entry to tpm_tis_dmi_table:\n");
818 dev_info(&chip->dev, "\tDMI_SYS_VENDOR: %s\n", vendor);
819 dev_info(&chip->dev, "\tDMI_PRODUCT_VERSION: %s\n", product);
820 }
821
822 if (tpm_tis_request_locality(chip, 0) != 0)
823 return IRQ_NONE;
824
825 __tpm_tis_disable_interrupts(chip);
826 tpm_tis_relinquish_locality(chip, 0);
827
828 schedule_work(&priv->free_irq_work);
829
830 return IRQ_HANDLED;
831 }
832
tpm_tis_update_unhandled_irqs(struct tpm_chip * chip)833 static irqreturn_t tpm_tis_update_unhandled_irqs(struct tpm_chip *chip)
834 {
835 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
836 irqreturn_t irqret = IRQ_HANDLED;
837
838 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
839 return IRQ_HANDLED;
840
841 if (time_after(jiffies, priv->last_unhandled_irq + HZ/10))
842 priv->unhandled_irqs = 1;
843 else
844 priv->unhandled_irqs++;
845
846 priv->last_unhandled_irq = jiffies;
847
848 if (priv->unhandled_irqs > TPM_TIS_MAX_UNHANDLED_IRQS)
849 irqret = tpm_tis_revert_interrupts(chip);
850
851 return irqret;
852 }
853
tis_int_handler(int dummy,void * dev_id)854 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
855 {
856 struct tpm_chip *chip = dev_id;
857 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
858 u32 interrupt;
859 int rc;
860
861 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
862 if (rc < 0)
863 goto err;
864
865 if (interrupt == 0)
866 goto err;
867
868 set_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
869 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
870 wake_up_interruptible(&priv->read_queue);
871
872 if (interrupt &
873 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
874 TPM_INTF_CMD_READY_INT))
875 wake_up_interruptible(&priv->int_queue);
876
877 /* Clear interrupts handled with TPM_EOI */
878 tpm_tis_request_locality(chip, 0);
879 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
880 tpm_tis_relinquish_locality(chip, 0);
881 if (rc < 0)
882 goto err;
883
884 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
885 return IRQ_HANDLED;
886
887 err:
888 return tpm_tis_update_unhandled_irqs(chip);
889 }
890
tpm_tis_gen_interrupt(struct tpm_chip * chip)891 static void tpm_tis_gen_interrupt(struct tpm_chip *chip)
892 {
893 const char *desc = "attempting to generate an interrupt";
894 u32 cap2;
895 cap_t cap;
896 int ret;
897
898 chip->flags |= TPM_CHIP_FLAG_IRQ;
899
900 if (chip->flags & TPM_CHIP_FLAG_TPM2)
901 ret = tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
902 else
903 ret = tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc, 0);
904
905 if (ret)
906 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
907 }
908
tpm_tis_free_irq_func(struct work_struct * work)909 static void tpm_tis_free_irq_func(struct work_struct *work)
910 {
911 struct tpm_tis_data *priv = container_of(work, typeof(*priv), free_irq_work);
912 struct tpm_chip *chip = priv->chip;
913
914 devm_free_irq(chip->dev.parent, priv->irq, chip);
915 priv->irq = 0;
916 }
917
918 /* Register the IRQ and issue a command that will cause an interrupt. If an
919 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
920 * everything and leave in polling mode. Returns 0 on success.
921 */
tpm_tis_probe_irq_single(struct tpm_chip * chip,u32 intmask,int flags,int irq)922 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
923 int flags, int irq)
924 {
925 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
926 u8 original_int_vec;
927 int rc;
928 u32 int_status;
929
930 rc = devm_request_threaded_irq(chip->dev.parent, irq, NULL,
931 tis_int_handler, IRQF_ONESHOT | flags,
932 dev_name(&chip->dev), chip);
933 if (rc) {
934 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
935 irq);
936 return -1;
937 }
938 priv->irq = irq;
939
940 rc = tpm_tis_request_locality(chip, 0);
941 if (rc < 0)
942 return rc;
943
944 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
945 &original_int_vec);
946 if (rc < 0) {
947 tpm_tis_relinquish_locality(chip, priv->locality);
948 return rc;
949 }
950
951 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
952 if (rc < 0)
953 goto restore_irqs;
954
955 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
956 if (rc < 0)
957 goto restore_irqs;
958
959 /* Clear all existing */
960 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
961 if (rc < 0)
962 goto restore_irqs;
963 /* Turn on */
964 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
965 intmask | TPM_GLOBAL_INT_ENABLE);
966 if (rc < 0)
967 goto restore_irqs;
968
969 clear_bit(TPM_TIS_IRQ_TESTED, &priv->flags);
970
971 /* Generate an interrupt by having the core call through to
972 * tpm_tis_send
973 */
974 tpm_tis_gen_interrupt(chip);
975
976 restore_irqs:
977 /* tpm_tis_send will either confirm the interrupt is working or it
978 * will call disable_irq which undoes all of the above.
979 */
980 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
981 tpm_tis_write8(priv, original_int_vec,
982 TPM_INT_VECTOR(priv->locality));
983 rc = -1;
984 }
985
986 tpm_tis_relinquish_locality(chip, priv->locality);
987
988 return rc;
989 }
990
991 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
992 * do not have ACPI/etc. We typically expect the interrupt to be declared if
993 * present.
994 */
tpm_tis_probe_irq(struct tpm_chip * chip,u32 intmask)995 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
996 {
997 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
998 u8 original_int_vec;
999 int i, rc;
1000
1001 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
1002 &original_int_vec);
1003 if (rc < 0)
1004 return;
1005
1006 if (!original_int_vec) {
1007 if (IS_ENABLED(CONFIG_X86))
1008 for (i = 3; i <= 15; i++)
1009 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1010 i))
1011 return;
1012 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
1013 original_int_vec))
1014 return;
1015 }
1016
tpm_tis_remove(struct tpm_chip * chip)1017 void tpm_tis_remove(struct tpm_chip *chip)
1018 {
1019 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1020 u32 reg = TPM_INT_ENABLE(priv->locality);
1021 u32 interrupt;
1022 int rc;
1023
1024 tpm_tis_clkrun_enable(chip, true);
1025
1026 rc = tpm_tis_read32(priv, reg, &interrupt);
1027 if (rc < 0)
1028 interrupt = 0;
1029
1030 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
1031 if (priv->free_irq_work.func)
1032 flush_work(&priv->free_irq_work);
1033
1034 tpm_tis_clkrun_enable(chip, false);
1035
1036 if (priv->ilb_base_addr)
1037 iounmap(priv->ilb_base_addr);
1038 }
1039 EXPORT_SYMBOL_GPL(tpm_tis_remove);
1040
1041 /**
1042 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
1043 * of a single TPM command
1044 * @chip: TPM chip to use
1045 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
1046 * 0 - Enable CLKRUN protocol
1047 * Call this function directly in tpm_tis_remove() in error or driver removal
1048 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
1049 */
tpm_tis_clkrun_enable(struct tpm_chip * chip,bool value)1050 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
1051 {
1052 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
1053 u32 clkrun_val;
1054
1055 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
1056 !data->ilb_base_addr)
1057 return;
1058
1059 if (value) {
1060 data->clkrun_enabled++;
1061 if (data->clkrun_enabled > 1)
1062 return;
1063 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1064
1065 /* Disable LPC CLKRUN# */
1066 clkrun_val &= ~LPC_CLKRUN_EN;
1067 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1068
1069 } else {
1070 data->clkrun_enabled--;
1071 if (data->clkrun_enabled)
1072 return;
1073
1074 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
1075
1076 /* Enable LPC CLKRUN# */
1077 clkrun_val |= LPC_CLKRUN_EN;
1078 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
1079 }
1080
1081 #ifdef CONFIG_HAS_IOPORT
1082 /*
1083 * Write any random value on port 0x80 which is on LPC, to make
1084 * sure LPC clock is running before sending any TPM command.
1085 */
1086 outb(0xCC, 0x80);
1087 #endif
1088 }
1089
1090 static const struct tpm_class_ops tpm_tis = {
1091 .flags = TPM_OPS_AUTO_STARTUP,
1092 .status = tpm_tis_status,
1093 .recv = tpm_tis_recv,
1094 .send = tpm_tis_send,
1095 .cancel = tpm_tis_ready,
1096 .update_timeouts = tpm_tis_update_timeouts,
1097 .update_durations = tpm_tis_update_durations,
1098 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1099 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
1100 .req_canceled = tpm_tis_req_canceled,
1101 .request_locality = tpm_tis_request_locality,
1102 .relinquish_locality = tpm_tis_relinquish_locality,
1103 .clk_enable = tpm_tis_clkrun_enable,
1104 };
1105
tpm_tis_core_init(struct device * dev,struct tpm_tis_data * priv,int irq,const struct tpm_tis_phy_ops * phy_ops,acpi_handle acpi_dev_handle)1106 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
1107 const struct tpm_tis_phy_ops *phy_ops,
1108 acpi_handle acpi_dev_handle)
1109 {
1110 u32 vendor;
1111 u32 intfcaps;
1112 u32 intmask;
1113 u32 clkrun_val;
1114 u8 rid;
1115 int rc, probe;
1116 struct tpm_chip *chip;
1117
1118 chip = tpmm_chip_alloc(dev, &tpm_tis);
1119 if (IS_ERR(chip))
1120 return PTR_ERR(chip);
1121
1122 #ifdef CONFIG_ACPI
1123 chip->acpi_dev_handle = acpi_dev_handle;
1124 #endif
1125
1126 chip->hwrng.quality = priv->rng_quality;
1127
1128 /* Maximum timeouts */
1129 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
1130 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
1131 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
1132 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
1133 priv->chip = chip;
1134 priv->timeout_min = TPM_TIMEOUT_USECS_MIN;
1135 priv->timeout_max = TPM_TIMEOUT_USECS_MAX;
1136 priv->phy_ops = phy_ops;
1137 priv->locality_count = 0;
1138 mutex_init(&priv->locality_count_mutex);
1139 INIT_WORK(&priv->free_irq_work, tpm_tis_free_irq_func);
1140
1141 dev_set_drvdata(&chip->dev, priv);
1142
1143 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
1144 if (rc < 0)
1145 return rc;
1146
1147 priv->manufacturer_id = vendor;
1148
1149 if (priv->manufacturer_id == TPM_VID_ATML &&
1150 !(chip->flags & TPM_CHIP_FLAG_TPM2)) {
1151 priv->timeout_min = TIS_TIMEOUT_MIN_ATML;
1152 priv->timeout_max = TIS_TIMEOUT_MAX_ATML;
1153 }
1154
1155 if (priv->manufacturer_id == TPM_VID_IFX)
1156 set_bit(TPM_TIS_STATUS_VALID_RETRY, &priv->flags);
1157
1158 if (is_bsw()) {
1159 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
1160 ILB_REMAP_SIZE);
1161 if (!priv->ilb_base_addr)
1162 return -ENOMEM;
1163
1164 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
1165 /* Check if CLKRUN# is already not enabled in the LPC bus */
1166 if (!(clkrun_val & LPC_CLKRUN_EN)) {
1167 iounmap(priv->ilb_base_addr);
1168 priv->ilb_base_addr = NULL;
1169 }
1170 }
1171
1172 if (chip->ops->clk_enable != NULL)
1173 chip->ops->clk_enable(chip, true);
1174
1175 if (wait_startup(chip, 0) != 0) {
1176 rc = -ENODEV;
1177 goto out_err;
1178 }
1179
1180 /* Take control of the TPM's interrupt hardware and shut it off */
1181 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1182 if (rc < 0)
1183 goto out_err;
1184
1185 /* Figure out the capabilities */
1186 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
1187 if (rc < 0)
1188 goto out_err;
1189
1190 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
1191 intfcaps);
1192 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
1193 dev_dbg(dev, "\tBurst Count Static\n");
1194 if (intfcaps & TPM_INTF_CMD_READY_INT) {
1195 intmask |= TPM_INTF_CMD_READY_INT;
1196 dev_dbg(dev, "\tCommand Ready Int Support\n");
1197 }
1198 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
1199 dev_dbg(dev, "\tInterrupt Edge Falling\n");
1200 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
1201 dev_dbg(dev, "\tInterrupt Edge Rising\n");
1202 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
1203 dev_dbg(dev, "\tInterrupt Level Low\n");
1204 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
1205 dev_dbg(dev, "\tInterrupt Level High\n");
1206 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT) {
1207 intmask |= TPM_INTF_LOCALITY_CHANGE_INT;
1208 dev_dbg(dev, "\tLocality Change Int Support\n");
1209 }
1210 if (intfcaps & TPM_INTF_STS_VALID_INT) {
1211 intmask |= TPM_INTF_STS_VALID_INT;
1212 dev_dbg(dev, "\tSts Valid Int Support\n");
1213 }
1214 if (intfcaps & TPM_INTF_DATA_AVAIL_INT) {
1215 intmask |= TPM_INTF_DATA_AVAIL_INT;
1216 dev_dbg(dev, "\tData Avail Int Support\n");
1217 }
1218
1219 intmask &= ~TPM_GLOBAL_INT_ENABLE;
1220
1221 rc = tpm_tis_request_locality(chip, 0);
1222 if (rc < 0) {
1223 rc = -ENODEV;
1224 goto out_err;
1225 }
1226
1227 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1228 tpm_tis_relinquish_locality(chip, 0);
1229
1230 rc = tpm_chip_start(chip);
1231 if (rc)
1232 goto out_err;
1233 rc = tpm2_probe(chip);
1234 tpm_chip_stop(chip);
1235 if (rc)
1236 goto out_err;
1237
1238 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
1239 if (rc < 0)
1240 goto out_err;
1241
1242 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
1243 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
1244 vendor >> 16, rid);
1245
1246 probe = probe_itpm(chip);
1247 if (probe < 0) {
1248 rc = -ENODEV;
1249 goto out_err;
1250 }
1251
1252 /* INTERRUPT Setup */
1253 init_waitqueue_head(&priv->read_queue);
1254 init_waitqueue_head(&priv->int_queue);
1255
1256 rc = tpm_chip_bootstrap(chip);
1257 if (rc)
1258 goto out_err;
1259
1260 if (irq != -1) {
1261 /*
1262 * Before doing irq testing issue a command to the TPM in polling mode
1263 * to make sure it works. May as well use that command to set the
1264 * proper timeouts for the driver.
1265 */
1266
1267 rc = tpm_tis_request_locality(chip, 0);
1268 if (rc < 0)
1269 goto out_err;
1270
1271 rc = tpm_get_timeouts(chip);
1272
1273 tpm_tis_relinquish_locality(chip, 0);
1274
1275 if (rc) {
1276 dev_err(dev, "Could not get TPM timeouts and durations\n");
1277 rc = -ENODEV;
1278 goto out_err;
1279 }
1280
1281 if (irq)
1282 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
1283 irq);
1284 else
1285 tpm_tis_probe_irq(chip, intmask);
1286
1287 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
1288 priv->int_mask = intmask;
1289 } else {
1290 dev_err(&chip->dev, FW_BUG
1291 "TPM interrupt not working, polling instead\n");
1292
1293 rc = tpm_tis_request_locality(chip, 0);
1294 if (rc < 0)
1295 goto out_err;
1296 tpm_tis_disable_interrupts(chip);
1297 tpm_tis_relinquish_locality(chip, 0);
1298 }
1299 }
1300
1301 rc = tpm_chip_register(chip);
1302 if (rc)
1303 goto out_err;
1304
1305 if (chip->ops->clk_enable != NULL)
1306 chip->ops->clk_enable(chip, false);
1307
1308 return 0;
1309 out_err:
1310 if (chip->ops->clk_enable != NULL)
1311 chip->ops->clk_enable(chip, false);
1312
1313 tpm_tis_remove(chip);
1314
1315 return rc;
1316 }
1317 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1318
1319 #ifdef CONFIG_PM_SLEEP
tpm_tis_reenable_interrupts(struct tpm_chip * chip)1320 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1321 {
1322 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1323 u32 intmask;
1324 int rc;
1325
1326 /*
1327 * Re-enable interrupts that device may have lost or BIOS/firmware may
1328 * have disabled.
1329 */
1330 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1331 if (rc < 0) {
1332 dev_err(&chip->dev, "Setting IRQ failed.\n");
1333 return;
1334 }
1335
1336 intmask = priv->int_mask | TPM_GLOBAL_INT_ENABLE;
1337 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1338 if (rc < 0)
1339 dev_err(&chip->dev, "Enabling interrupts failed.\n");
1340 }
1341
tpm_tis_resume(struct device * dev)1342 int tpm_tis_resume(struct device *dev)
1343 {
1344 struct tpm_chip *chip = dev_get_drvdata(dev);
1345 int ret;
1346
1347 ret = tpm_chip_start(chip);
1348 if (ret)
1349 return ret;
1350
1351 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1352 tpm_tis_reenable_interrupts(chip);
1353
1354 /*
1355 * TPM 1.2 requires self-test on resume. This function actually returns
1356 * an error code but for unknown reason it isn't handled.
1357 */
1358 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1359 tpm1_do_selftest(chip);
1360
1361 tpm_chip_stop(chip);
1362
1363 ret = tpm_pm_resume(dev);
1364 if (ret)
1365 return ret;
1366
1367 return 0;
1368 }
1369 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1370 #endif
1371
1372 MODULE_AUTHOR("Leendert van Doorn <leendert@watson.ibm.com>");
1373 MODULE_DESCRIPTION("TPM Driver");
1374 MODULE_VERSION("2.0");
1375 MODULE_LICENSE("GPL");
1376