1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2020 - 2022, Google LLC
4 *
5 * MAXIM TCPCI based TCPC driver
6 */
7
8 #include <linux/interrupt.h>
9 #include <linux/i2c.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/regmap.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/usb/pd.h>
15 #include <linux/usb/tcpci.h>
16 #include <linux/usb/tcpm.h>
17 #include <linux/usb/typec.h>
18
19 #include "tcpci_maxim.h"
20
21 #define PD_ACTIVITY_TIMEOUT_MS 10000
22
23 #define TCPC_VENDOR_ALERT 0x80
24 #define TCPC_VENDOR_USBSW_CTRL 0x93
25 #define TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA 0x9
26 #define TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA 0
27
28 #define TCPC_RECEIVE_BUFFER_COUNT_OFFSET 0
29 #define TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET 1
30 #define TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET 2
31
32 /*
33 * LongMessage not supported, hence 32 bytes for buf to be read from RECEIVE_BUFFER.
34 * DEVICE_CAPABILITIES_2.LongMessage = 0, the value in READABLE_BYTE_COUNT reg shall be
35 * less than or equal to 31. Since, RECEIVE_BUFFER len = 31 + 1(READABLE_BYTE_COUNT).
36 */
37 #define TCPC_RECEIVE_BUFFER_LEN 32
38
39 static const struct regmap_range max_tcpci_tcpci_range[] = {
40 regmap_reg_range(0x00, 0x95)
41 };
42
43 static const struct regmap_access_table max_tcpci_tcpci_write_table = {
44 .yes_ranges = max_tcpci_tcpci_range,
45 .n_yes_ranges = ARRAY_SIZE(max_tcpci_tcpci_range),
46 };
47
48 static const struct regmap_config max_tcpci_regmap_config = {
49 .reg_bits = 8,
50 .val_bits = 8,
51 .max_register = 0x95,
52 .wr_table = &max_tcpci_tcpci_write_table,
53 };
54
tdata_to_max_tcpci(struct tcpci_data * tdata)55 static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata)
56 {
57 return container_of(tdata, struct max_tcpci_chip, data);
58 }
59
max_tcpci_init_regs(struct max_tcpci_chip * chip)60 static void max_tcpci_init_regs(struct max_tcpci_chip *chip)
61 {
62 u16 alert_mask = 0;
63 int ret;
64
65 ret = max_tcpci_write16(chip, TCPC_ALERT, 0xffff);
66 if (ret < 0) {
67 dev_err(chip->dev, "Error writing to TCPC_ALERT ret:%d\n", ret);
68 return;
69 }
70
71 ret = max_tcpci_write16(chip, TCPC_VENDOR_ALERT, 0xffff);
72 if (ret < 0) {
73 dev_err(chip->dev, "Error writing to TCPC_VENDOR_ALERT ret:%d\n", ret);
74 return;
75 }
76
77 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, 0xff);
78 if (ret < 0) {
79 dev_err(chip->dev, "Unable to clear TCPC_ALERT_EXTENDED ret:%d\n", ret);
80 return;
81 }
82
83 /* Enable VSAFE0V detection */
84 ret = max_tcpci_write8(chip, TCPC_EXTENDED_STATUS_MASK, TCPC_EXTENDED_STATUS_VSAFE0V);
85 if (ret < 0) {
86 dev_err(chip->dev, "Unable to unmask TCPC_EXTENDED_STATUS_VSAFE0V ret:%d\n", ret);
87 return;
88 }
89
90 /* Vconn Over Current Protection */
91 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS_MASK, TCPC_FAULT_STATUS_MASK_VCONN_OC);
92 if (ret < 0)
93 return;
94
95 alert_mask = (TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_DISCARDED |
96 TCPC_ALERT_TX_FAILED | TCPC_ALERT_RX_HARD_RST |
97 TCPC_ALERT_RX_STATUS | TCPC_ALERT_POWER_STATUS |
98 TCPC_ALERT_CC_STATUS |
99 TCPC_ALERT_EXTND | TCPC_ALERT_EXTENDED_STATUS |
100 TCPC_ALERT_VBUS_DISCNCT | TCPC_ALERT_RX_BUF_OVF |
101 TCPC_ALERT_FAULT);
102
103 ret = max_tcpci_write16(chip, TCPC_ALERT_MASK, alert_mask);
104 if (ret < 0) {
105 dev_err(chip->dev,
106 "Error enabling TCPC_ALERT: TCPC_ALERT_MASK write failed ret:%d\n", ret);
107 return;
108 }
109
110 /* Enable vbus voltage monitoring and voltage alerts */
111 ret = max_tcpci_write8(chip, TCPC_POWER_CTRL, 0);
112 if (ret < 0) {
113 dev_err(chip->dev, "Error writing to TCPC_POWER_CTRL ret:%d\n", ret);
114 return;
115 }
116
117 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED_MASK, TCPC_SINK_FAST_ROLE_SWAP);
118 if (ret < 0)
119 return;
120 }
121
process_rx(struct max_tcpci_chip * chip,u16 status)122 static void process_rx(struct max_tcpci_chip *chip, u16 status)
123 {
124 struct pd_message msg;
125 u8 count, frame_type, rx_buf[TCPC_RECEIVE_BUFFER_LEN];
126 int ret, payload_index;
127 u8 *rx_buf_ptr;
128 enum tcpm_transmit_type rx_type;
129
130 /*
131 * READABLE_BYTE_COUNT: Indicates the number of bytes in the RX_BUF_BYTE_x registers
132 * plus one (for the RX_BUF_FRAME_TYPE) Table 4-36.
133 * Read the count and frame type.
134 */
135 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, 2);
136 if (ret < 0) {
137 dev_err(chip->dev, "TCPC_RX_BYTE_CNT read failed ret:%d\n", ret);
138 return;
139 }
140
141 count = rx_buf[TCPC_RECEIVE_BUFFER_COUNT_OFFSET];
142 frame_type = rx_buf[TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET];
143
144 switch (frame_type) {
145 case TCPC_RX_BUF_FRAME_TYPE_SOP1:
146 rx_type = TCPC_TX_SOP_PRIME;
147 break;
148 case TCPC_RX_BUF_FRAME_TYPE_SOP:
149 rx_type = TCPC_TX_SOP;
150 break;
151 default:
152 rx_type = TCPC_TX_SOP;
153 break;
154 }
155
156 if (count == 0 || (frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP &&
157 frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP1)) {
158 max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
159 dev_err(chip->dev, "%s\n", count == 0 ? "error: count is 0" :
160 "error frame_type is not SOP/SOP'");
161 return;
162 }
163
164 if (count > sizeof(struct pd_message) + 1 ||
165 count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
166 dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d\n", count);
167 return;
168 }
169
170 /*
171 * Read count + 1 as RX_BUF_BYTE_x is hidden and can only be read through
172 * TCPC_RX_BYTE_CNT
173 */
174 count += 1;
175 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, count);
176 if (ret < 0) {
177 dev_err(chip->dev, "Error: TCPC_RX_BYTE_CNT read failed: %d\n", ret);
178 return;
179 }
180
181 rx_buf_ptr = rx_buf + TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET;
182 msg.header = cpu_to_le16(*(u16 *)rx_buf_ptr);
183 rx_buf_ptr = rx_buf_ptr + sizeof(msg.header);
184
185 if (count < TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET + sizeof(msg.header) +
186 pd_header_cnt_le(msg.header) * sizeof(msg.payload[0])) {
187 max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
188 dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d for header cnt %d\n",
189 count, pd_header_cnt_le(msg.header));
190 return;
191 }
192
193 for (payload_index = 0; payload_index < pd_header_cnt_le(msg.header); payload_index++,
194 rx_buf_ptr += sizeof(msg.payload[0]))
195 msg.payload[payload_index] = cpu_to_le32(*(u32 *)rx_buf_ptr);
196
197 /*
198 * Read complete, clear RX status alert bit.
199 * Clear overflow as well if set.
200 */
201 ret = max_tcpci_write16(chip, TCPC_ALERT,
202 TCPC_ALERT_RX_STATUS | (status & TCPC_ALERT_RX_BUF_OVF));
203 if (ret < 0)
204 return;
205
206 tcpm_pd_receive(chip->port, &msg, rx_type);
207 }
208
get_vbus_regulator_handle(struct max_tcpci_chip * chip)209 static int get_vbus_regulator_handle(struct max_tcpci_chip *chip)
210 {
211 if (IS_ERR_OR_NULL(chip->vbus_reg)) {
212 chip->vbus_reg = devm_regulator_get_exclusive(chip->dev,
213 "vbus");
214 if (IS_ERR_OR_NULL(chip->vbus_reg)) {
215 dev_err(chip->dev,
216 "Failed to get vbus regulator handle\n");
217 return -ENODEV;
218 }
219 }
220
221 return 0;
222 }
223
max_tcpci_set_vbus(struct tcpci * tcpci,struct tcpci_data * tdata,bool source,bool sink)224 static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, bool source, bool sink)
225 {
226 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
227 int ret;
228
229 if (source && sink) {
230 dev_err(chip->dev, "Both source and sink set\n");
231 return -EINVAL;
232 }
233
234 ret = get_vbus_regulator_handle(chip);
235 if (ret) {
236 /*
237 * Regulator is not necessary for sink only applications. Return
238 * success in cases where sink mode is being modified.
239 */
240 return source ? ret : 1;
241 }
242
243 if (source) {
244 if (!regulator_is_enabled(chip->vbus_reg))
245 ret = regulator_enable(chip->vbus_reg);
246 } else {
247 if (regulator_is_enabled(chip->vbus_reg))
248 ret = regulator_disable(chip->vbus_reg);
249 }
250
251 return ret < 0 ? ret : 1;
252 }
253
process_power_status(struct max_tcpci_chip * chip)254 static void process_power_status(struct max_tcpci_chip *chip)
255 {
256 u8 pwr_status;
257 int ret;
258
259 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &pwr_status);
260 if (ret < 0)
261 return;
262
263 if (pwr_status == 0xff)
264 max_tcpci_init_regs(chip);
265 else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS)
266 tcpm_sourcing_vbus(chip->port);
267 else
268 tcpm_vbus_change(chip->port);
269 }
270
max_tcpci_frs_sourcing_vbus(struct tcpci * tcpci,struct tcpci_data * tdata)271 static void max_tcpci_frs_sourcing_vbus(struct tcpci *tcpci, struct tcpci_data *tdata)
272 {
273 /*
274 * For Fast Role Swap case, Boost turns on autonomously without
275 * AP intervention, but, needs AP to enable source mode explicitly
276 * for AP to regain control.
277 */
278 max_tcpci_set_vbus(tcpci, tdata, true, false);
279 }
280
process_tx(struct max_tcpci_chip * chip,u16 status)281 static void process_tx(struct max_tcpci_chip *chip, u16 status)
282 {
283 if (status & TCPC_ALERT_TX_SUCCESS)
284 tcpm_pd_transmit_complete(chip->port, TCPC_TX_SUCCESS);
285 else if (status & TCPC_ALERT_TX_DISCARDED)
286 tcpm_pd_transmit_complete(chip->port, TCPC_TX_DISCARDED);
287 else if (status & TCPC_ALERT_TX_FAILED)
288 tcpm_pd_transmit_complete(chip->port, TCPC_TX_FAILED);
289
290 /* Reinit regs as Hard reset sets them to default value */
291 if ((status & TCPC_ALERT_TX_SUCCESS) && (status & TCPC_ALERT_TX_FAILED))
292 max_tcpci_init_regs(chip);
293 }
294
295 /* Enable USB switches when partner is USB communications capable */
max_tcpci_set_partner_usb_comm_capable(struct tcpci * tcpci,struct tcpci_data * data,bool capable)296 static void max_tcpci_set_partner_usb_comm_capable(struct tcpci *tcpci, struct tcpci_data *data,
297 bool capable)
298 {
299 struct max_tcpci_chip *chip = tdata_to_max_tcpci(data);
300 int ret;
301
302 ret = max_tcpci_write8(chip, TCPC_VENDOR_USBSW_CTRL, capable ?
303 TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA :
304 TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA);
305
306 if (ret < 0)
307 dev_err(chip->dev, "Failed to enable USB switches");
308 }
309
_max_tcpci_irq(struct max_tcpci_chip * chip,u16 status)310 static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status)
311 {
312 u16 mask;
313 int ret;
314 u8 reg_status;
315
316 /*
317 * Clear alert status for everything except RX_STATUS, which shouldn't
318 * be cleared until we have successfully retrieved message.
319 */
320 if (status & ~TCPC_ALERT_RX_STATUS) {
321 mask = status & ~(TCPC_ALERT_RX_STATUS
322 | (status & TCPC_ALERT_RX_BUF_OVF));
323 ret = max_tcpci_write16(chip, TCPC_ALERT, mask);
324 if (ret < 0) {
325 dev_err(chip->dev, "ALERT clear failed\n");
326 return ret;
327 }
328 }
329
330 if (status & TCPC_ALERT_RX_BUF_OVF && !(status & TCPC_ALERT_RX_STATUS)) {
331 ret = max_tcpci_write16(chip, TCPC_ALERT, (TCPC_ALERT_RX_STATUS |
332 TCPC_ALERT_RX_BUF_OVF));
333 if (ret < 0) {
334 dev_err(chip->dev, "ALERT clear failed\n");
335 return ret;
336 }
337 }
338
339 if (status & TCPC_ALERT_FAULT) {
340 ret = max_tcpci_read8(chip, TCPC_FAULT_STATUS, ®_status);
341 if (ret < 0)
342 return ret;
343
344 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS, reg_status);
345 if (ret < 0)
346 return ret;
347
348 if (reg_status & TCPC_FAULT_STATUS_VCONN_OC) {
349 chip->veto_vconn_swap = true;
350 tcpm_port_error_recovery(chip->port);
351 }
352 }
353
354 if (status & TCPC_ALERT_EXTND) {
355 ret = max_tcpci_read8(chip, TCPC_ALERT_EXTENDED, ®_status);
356 if (ret < 0)
357 return ret;
358
359 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, reg_status);
360 if (ret < 0)
361 return ret;
362
363 if (reg_status & TCPC_SINK_FAST_ROLE_SWAP) {
364 dev_info(chip->dev, "FRS Signal\n");
365 tcpm_sink_frs(chip->port);
366 }
367 }
368
369 if (status & TCPC_ALERT_EXTENDED_STATUS) {
370 ret = max_tcpci_read8(chip, TCPC_EXTENDED_STATUS, (u8 *)®_status);
371 if (ret >= 0 && (reg_status & TCPC_EXTENDED_STATUS_VSAFE0V))
372 tcpm_vbus_change(chip->port);
373 }
374
375 if (status & TCPC_ALERT_RX_STATUS)
376 process_rx(chip, status);
377
378 if (status & TCPC_ALERT_VBUS_DISCNCT)
379 tcpm_vbus_change(chip->port);
380
381 if (status & TCPC_ALERT_CC_STATUS) {
382 bool cc_handled = false;
383
384 if (chip->contaminant_state == DETECTED || tcpm_port_is_toggling(chip->port)) {
385 if (!max_contaminant_is_contaminant(chip, false, &cc_handled))
386 tcpm_port_clean(chip->port);
387 }
388 if (!cc_handled)
389 tcpm_cc_change(chip->port);
390 }
391
392 if (status & TCPC_ALERT_POWER_STATUS)
393 process_power_status(chip);
394
395 if (status & TCPC_ALERT_RX_HARD_RST) {
396 tcpm_pd_hard_reset(chip->port);
397 max_tcpci_init_regs(chip);
398 }
399
400 if (status & TCPC_ALERT_TX_SUCCESS || status & TCPC_ALERT_TX_DISCARDED || status &
401 TCPC_ALERT_TX_FAILED)
402 process_tx(chip, status);
403
404 return IRQ_HANDLED;
405 }
406
max_tcpci_irq(int irq,void * dev_id)407 static irqreturn_t max_tcpci_irq(int irq, void *dev_id)
408 {
409 struct max_tcpci_chip *chip = dev_id;
410 u16 status;
411 irqreturn_t irq_return = IRQ_HANDLED;
412 int ret;
413
414 if (!chip->port)
415 return IRQ_HANDLED;
416
417 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
418 if (ret < 0) {
419 dev_err(chip->dev, "ALERT read failed\n");
420 return ret;
421 }
422 while (status) {
423 irq_return = _max_tcpci_irq(chip, status);
424 /* Do not return if a (new) ALERT is set (again). */
425 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
426 if (ret < 0)
427 break;
428 }
429
430 return irq_return;
431 }
432
max_tcpci_isr(int irq,void * dev_id)433 static irqreturn_t max_tcpci_isr(int irq, void *dev_id)
434 {
435 struct max_tcpci_chip *chip = dev_id;
436
437 pm_wakeup_event(chip->dev, PD_ACTIVITY_TIMEOUT_MS);
438
439 if (!chip->port)
440 return IRQ_HANDLED;
441
442 return IRQ_WAKE_THREAD;
443 }
444
max_tcpci_start_toggling(struct tcpci * tcpci,struct tcpci_data * tdata,enum typec_cc_status cc)445 static int max_tcpci_start_toggling(struct tcpci *tcpci, struct tcpci_data *tdata,
446 enum typec_cc_status cc)
447 {
448 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
449
450 max_tcpci_init_regs(chip);
451
452 return 0;
453 }
454
tcpci_init(struct tcpci * tcpci,struct tcpci_data * data)455 static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data)
456 {
457 /*
458 * Generic TCPCI overwrites the regs once this driver initializes
459 * them. Prevent this by returning -1.
460 */
461 return -1;
462 }
463
max_tcpci_check_contaminant(struct tcpci * tcpci,struct tcpci_data * tdata)464 static void max_tcpci_check_contaminant(struct tcpci *tcpci, struct tcpci_data *tdata)
465 {
466 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
467 bool cc_handled;
468
469 if (!max_contaminant_is_contaminant(chip, true, &cc_handled))
470 tcpm_port_clean(chip->port);
471 }
472
max_tcpci_attempt_vconn_swap_discovery(struct tcpci * tcpci,struct tcpci_data * tdata)473 static bool max_tcpci_attempt_vconn_swap_discovery(struct tcpci *tcpci, struct tcpci_data *tdata)
474 {
475 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
476
477 if (chip->veto_vconn_swap) {
478 chip->veto_vconn_swap = false;
479 return false;
480 }
481
482 return true;
483 }
484
max_tcpci_unregister_tcpci_port(void * tcpci)485 static void max_tcpci_unregister_tcpci_port(void *tcpci)
486 {
487 tcpci_unregister_port(tcpci);
488 }
489
max_tcpci_probe(struct i2c_client * client)490 static int max_tcpci_probe(struct i2c_client *client)
491 {
492 int ret;
493 struct max_tcpci_chip *chip;
494 u8 power_status;
495
496 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
497 if (!chip)
498 return -ENOMEM;
499
500 chip->client = client;
501 chip->data.regmap = devm_regmap_init_i2c(client, &max_tcpci_regmap_config);
502 if (IS_ERR(chip->data.regmap))
503 return dev_err_probe(&client->dev, PTR_ERR(chip->data.regmap),
504 "Regmap init failed\n");
505
506 chip->dev = &client->dev;
507 i2c_set_clientdata(client, chip);
508
509 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &power_status);
510 if (ret < 0)
511 return dev_err_probe(&client->dev, ret,
512 "Failed to read TCPC_POWER_STATUS\n");
513
514 /* Chip level tcpci callbacks */
515 chip->data.set_vbus = max_tcpci_set_vbus;
516 chip->data.start_drp_toggling = max_tcpci_start_toggling;
517 chip->data.TX_BUF_BYTE_x_hidden = true;
518 chip->data.init = tcpci_init;
519 chip->data.frs_sourcing_vbus = max_tcpci_frs_sourcing_vbus;
520 chip->data.auto_discharge_disconnect = true;
521 chip->data.vbus_vsafe0v = true;
522 chip->data.set_partner_usb_comm_capable = max_tcpci_set_partner_usb_comm_capable;
523 chip->data.check_contaminant = max_tcpci_check_contaminant;
524 chip->data.cable_comm_capable = true;
525 chip->data.attempt_vconn_swap_discovery = max_tcpci_attempt_vconn_swap_discovery;
526
527 max_tcpci_init_regs(chip);
528 chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
529 if (IS_ERR(chip->tcpci))
530 return dev_err_probe(&client->dev, PTR_ERR(chip->tcpci),
531 "TCPCI port registration failed\n");
532
533 ret = devm_add_action_or_reset(&client->dev,
534 max_tcpci_unregister_tcpci_port,
535 chip->tcpci);
536 if (ret)
537 return ret;
538
539 chip->port = tcpci_get_tcpm_port(chip->tcpci);
540
541 ret = devm_request_threaded_irq(&client->dev, client->irq, max_tcpci_isr, max_tcpci_irq,
542 (IRQF_TRIGGER_LOW | IRQF_ONESHOT), dev_name(chip->dev),
543 chip);
544 if (ret < 0)
545 return dev_err_probe(&client->dev, ret,
546 "IRQ initialization failed\n");
547
548 ret = devm_device_init_wakeup(chip->dev);
549 if (ret)
550 return dev_err_probe(chip->dev, ret, "Failed to init wakeup\n");
551
552 return 0;
553 }
554
555 #ifdef CONFIG_PM_SLEEP
max_tcpci_resume(struct device * dev)556 static int max_tcpci_resume(struct device *dev)
557 {
558 struct i2c_client *client = to_i2c_client(dev);
559 int ret = 0;
560
561 if (client->irq && device_may_wakeup(dev))
562 ret = disable_irq_wake(client->irq);
563
564 return ret;
565 }
566
max_tcpci_suspend(struct device * dev)567 static int max_tcpci_suspend(struct device *dev)
568 {
569 struct i2c_client *client = to_i2c_client(dev);
570 int ret = 0;
571
572 if (client->irq && device_may_wakeup(dev))
573 ret = enable_irq_wake(client->irq);
574
575 return ret;
576 }
577 #endif /* CONFIG_PM_SLEEP */
578
579 static SIMPLE_DEV_PM_OPS(max_tcpci_pm_ops, max_tcpci_suspend, max_tcpci_resume);
580
581 static const struct i2c_device_id max_tcpci_id[] = {
582 { "maxtcpc" },
583 { }
584 };
585 MODULE_DEVICE_TABLE(i2c, max_tcpci_id);
586
587 static const struct of_device_id max_tcpci_of_match[] = {
588 { .compatible = "maxim,max33359", },
589 {},
590 };
591 MODULE_DEVICE_TABLE(of, max_tcpci_of_match);
592
593 static struct i2c_driver max_tcpci_i2c_driver = {
594 .driver = {
595 .name = "maxtcpc",
596 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
597 .of_match_table = max_tcpci_of_match,
598 .pm = &max_tcpci_pm_ops,
599 },
600 .probe = max_tcpci_probe,
601 .id_table = max_tcpci_id,
602 };
603 module_i2c_driver(max_tcpci_i2c_driver);
604
605 MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>");
606 MODULE_DESCRIPTION("Maxim TCPCI based USB Type-C Port Controller Interface Driver");
607 MODULE_LICENSE("GPL v2");
608