1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * PCI Express Precision Time Measurement
4 * Copyright (c) 2016, Intel Corporation.
5 */
6
7 #include <linux/bitfield.h>
8 #include <linux/debugfs.h>
9 #include <linux/module.h>
10 #include <linux/init.h>
11 #include <linux/pci.h>
12 #include "../pci.h"
13
14 /*
15 * If the next upstream device supports PTM, return it; otherwise return
16 * NULL. PTM Messages are local, so both link partners must support it.
17 */
pci_upstream_ptm(struct pci_dev * dev)18 static struct pci_dev *pci_upstream_ptm(struct pci_dev *dev)
19 {
20 struct pci_dev *ups = pci_upstream_bridge(dev);
21
22 /*
23 * Switch Downstream Ports are not permitted to have a PTM
24 * capability; their PTM behavior is controlled by the Upstream
25 * Port (PCIe r5.0, sec 7.9.16), so if the upstream bridge is a
26 * Switch Downstream Port, look up one more level.
27 */
28 if (ups && pci_pcie_type(ups) == PCI_EXP_TYPE_DOWNSTREAM)
29 ups = pci_upstream_bridge(ups);
30
31 if (ups && ups->ptm_cap)
32 return ups;
33
34 return NULL;
35 }
36
37 /*
38 * Find the PTM Capability (if present) and extract the information we need
39 * to use it.
40 */
pci_ptm_init(struct pci_dev * dev)41 void pci_ptm_init(struct pci_dev *dev)
42 {
43 u16 ptm;
44 u32 cap;
45 struct pci_dev *ups;
46
47 if (!pci_is_pcie(dev))
48 return;
49
50 ptm = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);
51 if (!ptm)
52 return;
53
54 dev->ptm_cap = ptm;
55 atomic_set(&dev->ptm_enable_cnt, 0);
56 pci_add_ext_cap_save_buffer(dev, PCI_EXT_CAP_ID_PTM, sizeof(u32));
57
58 pci_read_config_dword(dev, ptm + PCI_PTM_CAP, &cap);
59 dev->ptm_granularity = FIELD_GET(PCI_PTM_GRANULARITY_MASK, cap);
60
61 /*
62 * Per the spec recommendation (PCIe r6.0, sec 7.9.15.3), select the
63 * furthest upstream Time Source as the PTM Root. For Endpoints,
64 * "the Effective Granularity is the maximum Local Clock Granularity
65 * reported by the PTM Root and all intervening PTM Time Sources."
66 */
67 ups = pci_upstream_ptm(dev);
68 if (ups) {
69 if (ups->ptm_granularity == 0)
70 dev->ptm_granularity = 0;
71 else if (ups->ptm_granularity > dev->ptm_granularity)
72 dev->ptm_granularity = ups->ptm_granularity;
73 } else if (cap & PCI_PTM_CAP_ROOT) {
74 dev->ptm_root = 1;
75 } else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {
76
77 /*
78 * Per sec 7.9.15.3, this should be the Local Clock
79 * Granularity of the associated Time Source. But it
80 * doesn't say how to find that Time Source.
81 */
82 dev->ptm_granularity = 0;
83 }
84
85 if (cap & PCI_PTM_CAP_RES)
86 dev->ptm_responder = 1;
87 if (cap & PCI_PTM_CAP_REQ)
88 dev->ptm_requester = 1;
89 }
90
pci_save_ptm_state(struct pci_dev * dev)91 void pci_save_ptm_state(struct pci_dev *dev)
92 {
93 u16 ptm = dev->ptm_cap;
94 struct pci_cap_saved_state *save_state;
95 u32 *cap;
96
97 if (!ptm)
98 return;
99
100 save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
101 if (!save_state)
102 return;
103
104 cap = (u32 *)&save_state->cap.data[0];
105 pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, cap);
106 }
107
pci_restore_ptm_state(struct pci_dev * dev)108 void pci_restore_ptm_state(struct pci_dev *dev)
109 {
110 u16 ptm = dev->ptm_cap;
111 struct pci_cap_saved_state *save_state;
112 u32 *cap;
113
114 if (!ptm)
115 return;
116
117 save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_PTM);
118 if (!save_state)
119 return;
120
121 cap = (u32 *)&save_state->cap.data[0];
122 pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, *cap);
123 }
124
125 /* Enable PTM in the Control register if possible */
__pci_enable_ptm(struct pci_dev * dev)126 static int __pci_enable_ptm(struct pci_dev *dev)
127 {
128 u16 ptm = dev->ptm_cap;
129 u32 ctrl;
130
131 if (!ptm)
132 return -EINVAL;
133
134 switch (pci_pcie_type(dev)) {
135 case PCI_EXP_TYPE_ROOT_PORT:
136 if (!dev->ptm_root)
137 return -EINVAL;
138 break;
139 case PCI_EXP_TYPE_UPSTREAM:
140 if (!dev->ptm_responder)
141 return -EINVAL;
142 break;
143 case PCI_EXP_TYPE_ENDPOINT:
144 case PCI_EXP_TYPE_LEG_END:
145 if (!dev->ptm_requester)
146 return -EINVAL;
147 break;
148 default:
149 return -EINVAL;
150 }
151
152 pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
153
154 ctrl |= PCI_PTM_CTRL_ENABLE;
155 FIELD_MODIFY(PCI_PTM_GRANULARITY_MASK, &ctrl, dev->ptm_granularity);
156 if (dev->ptm_root)
157 ctrl |= PCI_PTM_CTRL_ROOT;
158
159 pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
160 return 0;
161 }
162
163 /**
164 * pci_enable_ptm() - Enable Precision Time Measurement
165 * @dev: PCI device
166 *
167 * Enable Precision Time Measurement for @dev.
168 *
169 * Return: zero if successful, or -EINVAL if @dev lacks a PTM Capability or
170 * is not a PTM Root and lacks an upstream path of PTM-enabled devices.
171 */
pci_enable_ptm(struct pci_dev * dev)172 int pci_enable_ptm(struct pci_dev *dev)
173 {
174 int rc;
175 char clock_desc[8];
176
177 /*
178 * A device uses local PTM Messages to request time information
179 * from a PTM Root that's farther upstream. Every device along
180 * the path must support PTM and have it enabled so it can
181 * handle the messages. Therefore, if this device is not a PTM
182 * Root, the upstream link partner must have PTM enabled before
183 * we can enable PTM.
184 */
185 if (!dev->ptm_root) {
186 struct pci_dev *parent;
187
188 parent = pci_upstream_ptm(dev);
189 if (!parent)
190 return -EINVAL;
191 /* Enable PTM for the parent */
192 rc = pci_enable_ptm(parent);
193 if (rc)
194 return rc;
195 }
196
197 /* Already enabled? */
198 if (atomic_inc_return(&dev->ptm_enable_cnt) > 1)
199 return 0;
200
201 rc = __pci_enable_ptm(dev);
202 if (rc) {
203 atomic_dec(&dev->ptm_enable_cnt);
204 return rc;
205 }
206
207 switch (dev->ptm_granularity) {
208 case 0:
209 snprintf(clock_desc, sizeof(clock_desc), "unknown");
210 break;
211 case 255:
212 snprintf(clock_desc, sizeof(clock_desc), ">254ns");
213 break;
214 default:
215 snprintf(clock_desc, sizeof(clock_desc), "%uns",
216 dev->ptm_granularity);
217 break;
218 }
219 pci_info(dev, "PTM enabled%s, %s granularity\n",
220 dev->ptm_root ? " (root)" : "", clock_desc);
221
222 return 0;
223 }
224 EXPORT_SYMBOL(pci_enable_ptm);
225
__pci_disable_ptm(struct pci_dev * dev)226 static void __pci_disable_ptm(struct pci_dev *dev)
227 {
228 u16 ptm = dev->ptm_cap;
229 u32 ctrl;
230
231 if (!ptm)
232 return;
233
234 pci_read_config_dword(dev, ptm + PCI_PTM_CTRL, &ctrl);
235 ctrl &= ~(PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT);
236 pci_write_config_dword(dev, ptm + PCI_PTM_CTRL, ctrl);
237 }
238
239 /**
240 * pci_disable_ptm() - Disable Precision Time Measurement
241 * @dev: PCI device
242 *
243 * Disable Precision Time Measurement for @dev.
244 */
pci_disable_ptm(struct pci_dev * dev)245 void pci_disable_ptm(struct pci_dev *dev)
246 {
247 struct pci_dev *parent;
248
249 if (atomic_dec_and_test(&dev->ptm_enable_cnt))
250 __pci_disable_ptm(dev);
251
252 parent = pci_upstream_ptm(dev);
253 if (parent)
254 pci_disable_ptm(parent);
255 }
256 EXPORT_SYMBOL(pci_disable_ptm);
257
258 /*
259 * Disable PTM, but preserve dev->ptm_enable_cnt so we silently re-enable it on
260 * resume if necessary.
261 */
pci_suspend_ptm(struct pci_dev * dev)262 void pci_suspend_ptm(struct pci_dev *dev)
263 {
264 if (atomic_read(&dev->ptm_enable_cnt))
265 __pci_disable_ptm(dev);
266 }
267
268 /* If PTM was enabled before suspend, re-enable it when resuming */
pci_resume_ptm(struct pci_dev * dev)269 void pci_resume_ptm(struct pci_dev *dev)
270 {
271 if (atomic_read(&dev->ptm_enable_cnt))
272 __pci_enable_ptm(dev);
273 }
274
pcie_ptm_enabled(struct pci_dev * dev)275 bool pcie_ptm_enabled(struct pci_dev *dev)
276 {
277 if (!dev)
278 return false;
279
280 return atomic_read(&dev->ptm_enable_cnt);
281 }
282 EXPORT_SYMBOL(pcie_ptm_enabled);
283
284 #if IS_ENABLED(CONFIG_DEBUG_FS)
context_update_write(struct file * file,const char __user * ubuf,size_t count,loff_t * ppos)285 static ssize_t context_update_write(struct file *file, const char __user *ubuf,
286 size_t count, loff_t *ppos)
287 {
288 struct pci_ptm_debugfs *ptm_debugfs = file->private_data;
289 char buf[7];
290 int ret;
291 u8 mode;
292
293 if (!ptm_debugfs->ops->context_update_write)
294 return -EOPNOTSUPP;
295
296 if (count < 1 || count >= sizeof(buf))
297 return -EINVAL;
298
299 ret = copy_from_user(buf, ubuf, count);
300 if (ret)
301 return -EFAULT;
302
303 buf[count] = '\0';
304
305 if (sysfs_streq(buf, "auto"))
306 mode = PCIE_PTM_CONTEXT_UPDATE_AUTO;
307 else if (sysfs_streq(buf, "manual"))
308 mode = PCIE_PTM_CONTEXT_UPDATE_MANUAL;
309 else
310 return -EINVAL;
311
312 mutex_lock(&ptm_debugfs->lock);
313 ret = ptm_debugfs->ops->context_update_write(ptm_debugfs->pdata, mode);
314 mutex_unlock(&ptm_debugfs->lock);
315 if (ret)
316 return ret;
317
318 return count;
319 }
320
context_update_read(struct file * file,char __user * ubuf,size_t count,loff_t * ppos)321 static ssize_t context_update_read(struct file *file, char __user *ubuf,
322 size_t count, loff_t *ppos)
323 {
324 struct pci_ptm_debugfs *ptm_debugfs = file->private_data;
325 char buf[8]; /* Extra space for NULL termination at the end */
326 ssize_t pos;
327 u8 mode;
328
329 if (!ptm_debugfs->ops->context_update_read)
330 return -EOPNOTSUPP;
331
332 mutex_lock(&ptm_debugfs->lock);
333 ptm_debugfs->ops->context_update_read(ptm_debugfs->pdata, &mode);
334 mutex_unlock(&ptm_debugfs->lock);
335
336 if (mode == PCIE_PTM_CONTEXT_UPDATE_AUTO)
337 pos = scnprintf(buf, sizeof(buf), "auto\n");
338 else
339 pos = scnprintf(buf, sizeof(buf), "manual\n");
340
341 return simple_read_from_buffer(ubuf, count, ppos, buf, pos);
342 }
343
344 static const struct file_operations context_update_fops = {
345 .open = simple_open,
346 .read = context_update_read,
347 .write = context_update_write,
348 };
349
context_valid_get(void * data,u64 * val)350 static int context_valid_get(void *data, u64 *val)
351 {
352 struct pci_ptm_debugfs *ptm_debugfs = data;
353 bool valid;
354 int ret;
355
356 if (!ptm_debugfs->ops->context_valid_read)
357 return -EOPNOTSUPP;
358
359 mutex_lock(&ptm_debugfs->lock);
360 ret = ptm_debugfs->ops->context_valid_read(ptm_debugfs->pdata, &valid);
361 mutex_unlock(&ptm_debugfs->lock);
362 if (ret)
363 return ret;
364
365 *val = valid;
366
367 return 0;
368 }
369
context_valid_set(void * data,u64 val)370 static int context_valid_set(void *data, u64 val)
371 {
372 struct pci_ptm_debugfs *ptm_debugfs = data;
373 int ret;
374
375 if (!ptm_debugfs->ops->context_valid_write)
376 return -EOPNOTSUPP;
377
378 mutex_lock(&ptm_debugfs->lock);
379 ret = ptm_debugfs->ops->context_valid_write(ptm_debugfs->pdata, !!val);
380 mutex_unlock(&ptm_debugfs->lock);
381
382 return ret;
383 }
384
385 DEFINE_DEBUGFS_ATTRIBUTE(context_valid_fops, context_valid_get,
386 context_valid_set, "%llu\n");
387
local_clock_get(void * data,u64 * val)388 static int local_clock_get(void *data, u64 *val)
389 {
390 struct pci_ptm_debugfs *ptm_debugfs = data;
391 u64 clock;
392 int ret;
393
394 if (!ptm_debugfs->ops->local_clock_read)
395 return -EOPNOTSUPP;
396
397 ret = ptm_debugfs->ops->local_clock_read(ptm_debugfs->pdata, &clock);
398 if (ret)
399 return ret;
400
401 *val = clock;
402
403 return 0;
404 }
405
406 DEFINE_DEBUGFS_ATTRIBUTE(local_clock_fops, local_clock_get, NULL, "%llu\n");
407
master_clock_get(void * data,u64 * val)408 static int master_clock_get(void *data, u64 *val)
409 {
410 struct pci_ptm_debugfs *ptm_debugfs = data;
411 u64 clock;
412 int ret;
413
414 if (!ptm_debugfs->ops->master_clock_read)
415 return -EOPNOTSUPP;
416
417 ret = ptm_debugfs->ops->master_clock_read(ptm_debugfs->pdata, &clock);
418 if (ret)
419 return ret;
420
421 *val = clock;
422
423 return 0;
424 }
425
426 DEFINE_DEBUGFS_ATTRIBUTE(master_clock_fops, master_clock_get, NULL, "%llu\n");
427
t1_get(void * data,u64 * val)428 static int t1_get(void *data, u64 *val)
429 {
430 struct pci_ptm_debugfs *ptm_debugfs = data;
431 u64 clock;
432 int ret;
433
434 if (!ptm_debugfs->ops->t1_read)
435 return -EOPNOTSUPP;
436
437 ret = ptm_debugfs->ops->t1_read(ptm_debugfs->pdata, &clock);
438 if (ret)
439 return ret;
440
441 *val = clock;
442
443 return 0;
444 }
445
446 DEFINE_DEBUGFS_ATTRIBUTE(t1_fops, t1_get, NULL, "%llu\n");
447
t2_get(void * data,u64 * val)448 static int t2_get(void *data, u64 *val)
449 {
450 struct pci_ptm_debugfs *ptm_debugfs = data;
451 u64 clock;
452 int ret;
453
454 if (!ptm_debugfs->ops->t2_read)
455 return -EOPNOTSUPP;
456
457 ret = ptm_debugfs->ops->t2_read(ptm_debugfs->pdata, &clock);
458 if (ret)
459 return ret;
460
461 *val = clock;
462
463 return 0;
464 }
465
466 DEFINE_DEBUGFS_ATTRIBUTE(t2_fops, t2_get, NULL, "%llu\n");
467
t3_get(void * data,u64 * val)468 static int t3_get(void *data, u64 *val)
469 {
470 struct pci_ptm_debugfs *ptm_debugfs = data;
471 u64 clock;
472 int ret;
473
474 if (!ptm_debugfs->ops->t3_read)
475 return -EOPNOTSUPP;
476
477 ret = ptm_debugfs->ops->t3_read(ptm_debugfs->pdata, &clock);
478 if (ret)
479 return ret;
480
481 *val = clock;
482
483 return 0;
484 }
485
486 DEFINE_DEBUGFS_ATTRIBUTE(t3_fops, t3_get, NULL, "%llu\n");
487
t4_get(void * data,u64 * val)488 static int t4_get(void *data, u64 *val)
489 {
490 struct pci_ptm_debugfs *ptm_debugfs = data;
491 u64 clock;
492 int ret;
493
494 if (!ptm_debugfs->ops->t4_read)
495 return -EOPNOTSUPP;
496
497 ret = ptm_debugfs->ops->t4_read(ptm_debugfs->pdata, &clock);
498 if (ret)
499 return ret;
500
501 *val = clock;
502
503 return 0;
504 }
505
506 DEFINE_DEBUGFS_ATTRIBUTE(t4_fops, t4_get, NULL, "%llu\n");
507
508 #define pcie_ptm_create_debugfs_file(pdata, mode, attr) \
509 do { \
510 if (ops->attr##_visible && ops->attr##_visible(pdata)) \
511 debugfs_create_file(#attr, mode, ptm_debugfs->debugfs, \
512 ptm_debugfs, &attr##_fops); \
513 } while (0)
514
515 /*
516 * pcie_ptm_create_debugfs() - Create debugfs entries for the PTM context
517 * @dev: PTM capable component device
518 * @pdata: Private data of the PTM capable component device
519 * @ops: PTM callback structure
520 *
521 * Create debugfs entries for exposing the PTM context of the PTM capable
522 * components such as Root Complex and Endpoint controllers.
523 *
524 * Return: Pointer to 'struct pci_ptm_debugfs' if success, NULL otherwise.
525 */
pcie_ptm_create_debugfs(struct device * dev,void * pdata,const struct pcie_ptm_ops * ops)526 struct pci_ptm_debugfs *pcie_ptm_create_debugfs(struct device *dev, void *pdata,
527 const struct pcie_ptm_ops *ops)
528 {
529 struct pci_ptm_debugfs *ptm_debugfs;
530 char *dirname;
531 int ret;
532
533 /* Caller must provide check_capability() callback */
534 if (!ops->check_capability)
535 return NULL;
536
537 /* Check for PTM capability before creating debugfs attributes */
538 ret = ops->check_capability(pdata);
539 if (!ret) {
540 dev_dbg(dev, "PTM capability not present\n");
541 return NULL;
542 }
543
544 ptm_debugfs = kzalloc_obj(*ptm_debugfs);
545 if (!ptm_debugfs)
546 return NULL;
547
548 dirname = devm_kasprintf(dev, GFP_KERNEL, "pcie_ptm_%s", dev_name(dev));
549 if (!dirname) {
550 kfree(ptm_debugfs);
551 return NULL;
552 }
553
554 ptm_debugfs->debugfs = debugfs_create_dir(dirname, NULL);
555 ptm_debugfs->pdata = pdata;
556 ptm_debugfs->ops = ops;
557 mutex_init(&ptm_debugfs->lock);
558
559 pcie_ptm_create_debugfs_file(pdata, 0644, context_update);
560 pcie_ptm_create_debugfs_file(pdata, 0644, context_valid);
561 pcie_ptm_create_debugfs_file(pdata, 0444, local_clock);
562 pcie_ptm_create_debugfs_file(pdata, 0444, master_clock);
563 pcie_ptm_create_debugfs_file(pdata, 0444, t1);
564 pcie_ptm_create_debugfs_file(pdata, 0444, t2);
565 pcie_ptm_create_debugfs_file(pdata, 0444, t3);
566 pcie_ptm_create_debugfs_file(pdata, 0444, t4);
567
568 return ptm_debugfs;
569 }
570 EXPORT_SYMBOL_GPL(pcie_ptm_create_debugfs);
571
572 /*
573 * pcie_ptm_destroy_debugfs() - Destroy debugfs entries for the PTM context
574 * @ptm_debugfs: Pointer to the PTM debugfs struct
575 */
pcie_ptm_destroy_debugfs(struct pci_ptm_debugfs * ptm_debugfs)576 void pcie_ptm_destroy_debugfs(struct pci_ptm_debugfs *ptm_debugfs)
577 {
578 if (!ptm_debugfs)
579 return;
580
581 mutex_destroy(&ptm_debugfs->lock);
582 debugfs_remove_recursive(ptm_debugfs->debugfs);
583 kfree(ptm_debugfs);
584 }
585 EXPORT_SYMBOL_GPL(pcie_ptm_destroy_debugfs);
586 #endif
587