1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/kvm_irqfd.h> 40 #include <linux/irqbypass.h> 41 #include <linux/module.h> 42 #include <linux/compiler.h> 43 #include <linux/of.h> 44 #include <linux/irqdomain.h> 45 #include <linux/smp.h> 46 47 #include <asm/ftrace.h> 48 #include <asm/reg.h> 49 #include <asm/ppc-opcode.h> 50 #include <asm/asm-prototypes.h> 51 #include <asm/archrandom.h> 52 #include <asm/debug.h> 53 #include <asm/disassemble.h> 54 #include <asm/cputable.h> 55 #include <asm/cacheflush.h> 56 #include <linux/uaccess.h> 57 #include <asm/interrupt.h> 58 #include <asm/io.h> 59 #include <asm/kvm_ppc.h> 60 #include <asm/kvm_book3s.h> 61 #include <asm/mmu_context.h> 62 #include <asm/lppaca.h> 63 #include <asm/pmc.h> 64 #include <asm/processor.h> 65 #include <asm/cputhreads.h> 66 #include <asm/page.h> 67 #include <asm/hvcall.h> 68 #include <asm/switch_to.h> 69 #include <asm/smp.h> 70 #include <asm/dbell.h> 71 #include <asm/hmi.h> 72 #include <asm/pnv-pci.h> 73 #include <asm/mmu.h> 74 #include <asm/opal.h> 75 #include <asm/xics.h> 76 #include <asm/xive.h> 77 #include <asm/hw_breakpoint.h> 78 #include <asm/kvm_book3s_uvmem.h> 79 #include <asm/ultravisor.h> 80 #include <asm/dtl.h> 81 #include <asm/plpar_wrappers.h> 82 83 #include <trace/events/ipi.h> 84 85 #include "book3s.h" 86 #include "book3s_hv.h" 87 88 #define CREATE_TRACE_POINTS 89 #include "trace_hv.h" 90 91 /* #define EXIT_DEBUG */ 92 /* #define EXIT_DEBUG_SIMPLE */ 93 /* #define EXIT_DEBUG_INT */ 94 95 /* Used to indicate that a guest page fault needs to be handled */ 96 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 97 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 98 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 99 100 /* Used as a "null" value for timebase values */ 101 #define TB_NIL (~(u64)0) 102 103 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 104 105 static int dynamic_mt_modes = 6; 106 module_param(dynamic_mt_modes, int, 0644); 107 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 108 static int target_smt_mode; 109 module_param(target_smt_mode, int, 0644); 110 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 111 112 static bool one_vm_per_core; 113 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 114 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires POWER8 or older)"); 115 116 #ifdef CONFIG_KVM_XICS 117 static const struct kernel_param_ops module_param_ops = { 118 .set = param_set_int, 119 .get = param_get_int, 120 }; 121 122 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 123 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 124 125 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 126 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 127 #endif 128 129 /* If set, guests are allowed to create and control nested guests */ 130 static bool nested = true; 131 module_param(nested, bool, S_IRUGO | S_IWUSR); 132 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 133 134 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 135 136 /* 137 * RWMR values for POWER8. These control the rate at which PURR 138 * and SPURR count and should be set according to the number of 139 * online threads in the vcore being run. 140 */ 141 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 142 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 143 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 144 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 145 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 146 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 147 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 148 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 149 150 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 151 RWMR_RPA_P8_1THREAD, 152 RWMR_RPA_P8_1THREAD, 153 RWMR_RPA_P8_2THREAD, 154 RWMR_RPA_P8_3THREAD, 155 RWMR_RPA_P8_4THREAD, 156 RWMR_RPA_P8_5THREAD, 157 RWMR_RPA_P8_6THREAD, 158 RWMR_RPA_P8_7THREAD, 159 RWMR_RPA_P8_8THREAD, 160 }; 161 162 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 163 int *ip) 164 { 165 int i = *ip; 166 struct kvm_vcpu *vcpu; 167 168 while (++i < MAX_SMT_THREADS) { 169 vcpu = READ_ONCE(vc->runnable_threads[i]); 170 if (vcpu) { 171 *ip = i; 172 return vcpu; 173 } 174 } 175 return NULL; 176 } 177 178 /* Used to traverse the list of runnable threads for a given vcore */ 179 #define for_each_runnable_thread(i, vcpu, vc) \ 180 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 181 182 static bool kvmppc_ipi_thread(int cpu) 183 { 184 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 185 186 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 187 if (kvmhv_on_pseries()) 188 return false; 189 190 /* On POWER9 we can use msgsnd to IPI any cpu */ 191 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 192 msg |= get_hard_smp_processor_id(cpu); 193 smp_mb(); 194 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 195 return true; 196 } 197 198 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 199 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 200 preempt_disable(); 201 if (cpu_first_thread_sibling(cpu) == 202 cpu_first_thread_sibling(smp_processor_id())) { 203 msg |= cpu_thread_in_core(cpu); 204 smp_mb(); 205 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 206 preempt_enable(); 207 return true; 208 } 209 preempt_enable(); 210 } 211 212 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 213 if (cpu >= 0 && cpu < nr_cpu_ids) { 214 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 215 xics_wake_cpu(cpu); 216 return true; 217 } 218 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 219 return true; 220 } 221 #endif 222 223 return false; 224 } 225 226 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 227 { 228 int cpu; 229 struct rcuwait *waitp; 230 231 /* 232 * rcuwait_wake_up contains smp_mb() which orders prior stores that 233 * create pending work vs below loads of cpu fields. The other side 234 * is the barrier in vcpu run that orders setting the cpu fields vs 235 * testing for pending work. 236 */ 237 238 waitp = kvm_arch_vcpu_get_wait(vcpu); 239 if (rcuwait_wake_up(waitp)) 240 ++vcpu->stat.generic.halt_wakeup; 241 242 cpu = READ_ONCE(vcpu->arch.thread_cpu); 243 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 244 return; 245 246 /* CPU points to the first thread of the core */ 247 cpu = vcpu->cpu; 248 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 249 smp_send_reschedule(cpu); 250 } 251 252 /* 253 * We use the vcpu_load/put functions to measure stolen time. 254 * 255 * Stolen time is counted as time when either the vcpu is able to 256 * run as part of a virtual core, but the task running the vcore 257 * is preempted or sleeping, or when the vcpu needs something done 258 * in the kernel by the task running the vcpu, but that task is 259 * preempted or sleeping. Those two things have to be counted 260 * separately, since one of the vcpu tasks will take on the job 261 * of running the core, and the other vcpu tasks in the vcore will 262 * sleep waiting for it to do that, but that sleep shouldn't count 263 * as stolen time. 264 * 265 * Hence we accumulate stolen time when the vcpu can run as part of 266 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 267 * needs its task to do other things in the kernel (for example, 268 * service a page fault) in busy_stolen. We don't accumulate 269 * stolen time for a vcore when it is inactive, or for a vcpu 270 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 271 * a misnomer; it means that the vcpu task is not executing in 272 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 273 * the kernel. We don't have any way of dividing up that time 274 * between time that the vcpu is genuinely stopped, time that 275 * the task is actively working on behalf of the vcpu, and time 276 * that the task is preempted, so we don't count any of it as 277 * stolen. 278 * 279 * Updates to busy_stolen are protected by arch.tbacct_lock; 280 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 281 * lock. The stolen times are measured in units of timebase ticks. 282 * (Note that the != TB_NIL checks below are purely defensive; 283 * they should never fail.) 284 * 285 * The POWER9 path is simpler, one vcpu per virtual core so the 286 * former case does not exist. If a vcpu is preempted when it is 287 * BUSY_IN_HOST and not ceded or otherwise blocked, then accumulate 288 * the stolen cycles in busy_stolen. RUNNING is not a preemptible 289 * state in the P9 path. 290 */ 291 292 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc, u64 tb) 293 { 294 unsigned long flags; 295 296 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 297 298 spin_lock_irqsave(&vc->stoltb_lock, flags); 299 vc->preempt_tb = tb; 300 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 301 } 302 303 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc, u64 tb) 304 { 305 unsigned long flags; 306 307 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 308 309 spin_lock_irqsave(&vc->stoltb_lock, flags); 310 if (vc->preempt_tb != TB_NIL) { 311 vc->stolen_tb += tb - vc->preempt_tb; 312 vc->preempt_tb = TB_NIL; 313 } 314 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 315 } 316 317 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 318 { 319 struct kvmppc_vcore *vc = vcpu->arch.vcore; 320 unsigned long flags; 321 u64 now; 322 323 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 324 if (vcpu->arch.busy_preempt != TB_NIL) { 325 WARN_ON_ONCE(vcpu->arch.state != KVMPPC_VCPU_BUSY_IN_HOST); 326 vc->stolen_tb += mftb() - vcpu->arch.busy_preempt; 327 vcpu->arch.busy_preempt = TB_NIL; 328 } 329 return; 330 } 331 332 now = mftb(); 333 334 /* 335 * We can test vc->runner without taking the vcore lock, 336 * because only this task ever sets vc->runner to this 337 * vcpu, and once it is set to this vcpu, only this task 338 * ever sets it to NULL. 339 */ 340 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 341 kvmppc_core_end_stolen(vc, now); 342 343 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 344 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 345 vcpu->arch.busy_preempt != TB_NIL) { 346 vcpu->arch.busy_stolen += now - vcpu->arch.busy_preempt; 347 vcpu->arch.busy_preempt = TB_NIL; 348 } 349 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 350 } 351 352 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 353 { 354 struct kvmppc_vcore *vc = vcpu->arch.vcore; 355 unsigned long flags; 356 u64 now; 357 358 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 359 /* 360 * In the P9 path, RUNNABLE is not preemptible 361 * (nor takes host interrupts) 362 */ 363 WARN_ON_ONCE(vcpu->arch.state == KVMPPC_VCPU_RUNNABLE); 364 /* 365 * Account stolen time when preempted while the vcpu task is 366 * running in the kernel (but not in qemu, which is INACTIVE). 367 */ 368 if (task_is_running(current) && 369 vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 370 vcpu->arch.busy_preempt = mftb(); 371 return; 372 } 373 374 now = mftb(); 375 376 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 377 kvmppc_core_start_stolen(vc, now); 378 379 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 380 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 381 vcpu->arch.busy_preempt = now; 382 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 383 } 384 385 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 386 { 387 vcpu->arch.pvr = pvr; 388 } 389 390 /* Dummy value used in computing PCR value below */ 391 #define PCR_ARCH_32 (PCR_ARCH_31 << 1) 392 393 static inline unsigned long map_pcr_to_cap(unsigned long pcr) 394 { 395 unsigned long cap = 0; 396 397 switch (pcr) { 398 case PCR_ARCH_300: 399 cap = H_GUEST_CAP_POWER9; 400 break; 401 case PCR_ARCH_31: 402 if (cpu_has_feature(CPU_FTR_P11_PVR)) 403 cap = H_GUEST_CAP_POWER11; 404 else 405 cap = H_GUEST_CAP_POWER10; 406 break; 407 default: 408 break; 409 } 410 411 return cap; 412 } 413 414 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 415 { 416 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0, cap = 0; 417 struct kvmppc_vcore *vc = vcpu->arch.vcore; 418 419 /* We can (emulate) our own architecture version and anything older */ 420 if (cpu_has_feature(CPU_FTR_ARCH_32)) 421 host_pcr_bit = PCR_ARCH_32; 422 else if (cpu_has_feature(CPU_FTR_P11_PVR) || cpu_has_feature(CPU_FTR_ARCH_31)) 423 host_pcr_bit = PCR_ARCH_31; 424 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 425 host_pcr_bit = PCR_ARCH_300; 426 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 427 host_pcr_bit = PCR_ARCH_207; 428 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 429 host_pcr_bit = PCR_ARCH_206; 430 else 431 host_pcr_bit = PCR_ARCH_205; 432 433 /* Determine lowest PCR bit needed to run guest in given PVR level */ 434 guest_pcr_bit = host_pcr_bit; 435 if (arch_compat) { 436 switch (arch_compat) { 437 case PVR_ARCH_205: 438 guest_pcr_bit = PCR_ARCH_205; 439 break; 440 case PVR_ARCH_206: 441 case PVR_ARCH_206p: 442 guest_pcr_bit = PCR_ARCH_206; 443 break; 444 case PVR_ARCH_207: 445 guest_pcr_bit = PCR_ARCH_207; 446 break; 447 case PVR_ARCH_300: 448 guest_pcr_bit = PCR_ARCH_300; 449 break; 450 case PVR_ARCH_31: 451 guest_pcr_bit = PCR_ARCH_31; 452 break; 453 case PVR_ARCH_31_P11: 454 /* 455 * Need to check this for ISA 3.1, as Power10 and 456 * Power11 share the same PCR. For any subsequent ISA 457 * versions, this will be taken care of by the guest vs 458 * host PCR comparison below. 459 */ 460 if (!cpu_has_feature(CPU_FTR_P11_PVR)) { 461 arch_compat = PVR_ARCH_INVALID; 462 goto out; 463 } 464 guest_pcr_bit = PCR_ARCH_31; 465 break; 466 case PVR_ARCH_32: 467 guest_pcr_bit = PCR_ARCH_32; 468 break; 469 default: 470 return -EINVAL; 471 } 472 } 473 474 /* Check requested PCR bits don't exceed our capabilities */ 475 if (guest_pcr_bit > host_pcr_bit) 476 return -EINVAL; 477 478 if (kvmhv_on_pseries() && kvmhv_is_nestedv2()) { 479 /* 480 * 'arch_compat == 0' would mean the guest should default to 481 * L1's compatibility. In this case, the guest would pick 482 * host's PCR and evaluate the corresponding capabilities. 483 */ 484 cap = map_pcr_to_cap(guest_pcr_bit); 485 if (!(cap & nested_capabilities)) 486 return -EINVAL; 487 } 488 489 out: 490 spin_lock(&vc->lock); 491 vc->arch_compat = arch_compat; 492 kvmhv_nestedv2_mark_dirty(vcpu, KVMPPC_GSID_LOGICAL_PVR); 493 /* 494 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 495 * Also set all reserved PCR bits 496 */ 497 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 498 spin_unlock(&vc->lock); 499 500 return kvmppc_sanity_check(vcpu); 501 } 502 503 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 504 { 505 int r; 506 507 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 508 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 509 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 510 for (r = 0; r < 16; ++r) 511 pr_err("r%2d = %.16lx r%d = %.16lx\n", 512 r, kvmppc_get_gpr(vcpu, r), 513 r+16, kvmppc_get_gpr(vcpu, r+16)); 514 pr_err("ctr = %.16lx lr = %.16lx\n", 515 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 516 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 517 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 518 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 519 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 520 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 521 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 522 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 523 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 524 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 525 pr_err("fault dar = %.16lx dsisr = %.8x\n", 526 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 527 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 528 for (r = 0; r < vcpu->arch.slb_max; ++r) 529 pr_err(" ESID = %.16llx VSID = %.16llx\n", 530 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 531 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.16lx\n", 532 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 533 vcpu->arch.last_inst); 534 } 535 536 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 537 { 538 return kvm_get_vcpu_by_id(kvm, id); 539 } 540 541 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 542 { 543 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 544 vpa->yield_count = cpu_to_be32(1); 545 } 546 547 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 548 unsigned long addr, unsigned long len) 549 { 550 /* check address is cacheline aligned */ 551 if (addr & (L1_CACHE_BYTES - 1)) 552 return -EINVAL; 553 spin_lock(&vcpu->arch.vpa_update_lock); 554 if (v->next_gpa != addr || v->len != len) { 555 v->next_gpa = addr; 556 v->len = addr ? len : 0; 557 v->update_pending = 1; 558 } 559 spin_unlock(&vcpu->arch.vpa_update_lock); 560 return 0; 561 } 562 563 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 564 struct reg_vpa { 565 u32 dummy; 566 union { 567 __be16 hword; 568 __be32 word; 569 } length; 570 }; 571 572 static int vpa_is_registered(struct kvmppc_vpa *vpap) 573 { 574 if (vpap->update_pending) 575 return vpap->next_gpa != 0; 576 return vpap->pinned_addr != NULL; 577 } 578 579 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 580 unsigned long flags, 581 unsigned long vcpuid, unsigned long vpa) 582 { 583 struct kvm *kvm = vcpu->kvm; 584 unsigned long len, nb; 585 void *va; 586 struct kvm_vcpu *tvcpu; 587 int err; 588 int subfunc; 589 struct kvmppc_vpa *vpap; 590 591 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 592 if (!tvcpu) 593 return H_PARAMETER; 594 595 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 596 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 597 subfunc == H_VPA_REG_SLB) { 598 /* Registering new area - address must be cache-line aligned */ 599 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 600 return H_PARAMETER; 601 602 /* convert logical addr to kernel addr and read length */ 603 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 604 if (va == NULL) 605 return H_PARAMETER; 606 if (subfunc == H_VPA_REG_VPA) 607 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 608 else 609 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 610 kvmppc_unpin_guest_page(kvm, va, vpa, false); 611 612 /* Check length */ 613 if (len > nb || len < sizeof(struct reg_vpa)) 614 return H_PARAMETER; 615 } else { 616 vpa = 0; 617 len = 0; 618 } 619 620 err = H_PARAMETER; 621 vpap = NULL; 622 spin_lock(&tvcpu->arch.vpa_update_lock); 623 624 switch (subfunc) { 625 case H_VPA_REG_VPA: /* register VPA */ 626 /* 627 * The size of our lppaca is 1kB because of the way we align 628 * it for the guest to avoid crossing a 4kB boundary. We only 629 * use 640 bytes of the structure though, so we should accept 630 * clients that set a size of 640. 631 */ 632 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 633 if (len < sizeof(struct lppaca)) 634 break; 635 vpap = &tvcpu->arch.vpa; 636 err = 0; 637 break; 638 639 case H_VPA_REG_DTL: /* register DTL */ 640 if (len < sizeof(struct dtl_entry)) 641 break; 642 len -= len % sizeof(struct dtl_entry); 643 644 /* Check that they have previously registered a VPA */ 645 err = H_RESOURCE; 646 if (!vpa_is_registered(&tvcpu->arch.vpa)) 647 break; 648 649 vpap = &tvcpu->arch.dtl; 650 err = 0; 651 break; 652 653 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 654 /* Check that they have previously registered a VPA */ 655 err = H_RESOURCE; 656 if (!vpa_is_registered(&tvcpu->arch.vpa)) 657 break; 658 659 vpap = &tvcpu->arch.slb_shadow; 660 err = 0; 661 break; 662 663 case H_VPA_DEREG_VPA: /* deregister VPA */ 664 /* Check they don't still have a DTL or SLB buf registered */ 665 err = H_RESOURCE; 666 if (vpa_is_registered(&tvcpu->arch.dtl) || 667 vpa_is_registered(&tvcpu->arch.slb_shadow)) 668 break; 669 670 vpap = &tvcpu->arch.vpa; 671 err = 0; 672 break; 673 674 case H_VPA_DEREG_DTL: /* deregister DTL */ 675 vpap = &tvcpu->arch.dtl; 676 err = 0; 677 break; 678 679 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 680 vpap = &tvcpu->arch.slb_shadow; 681 err = 0; 682 break; 683 } 684 685 if (vpap) { 686 vpap->next_gpa = vpa; 687 vpap->len = len; 688 vpap->update_pending = 1; 689 } 690 691 spin_unlock(&tvcpu->arch.vpa_update_lock); 692 693 return err; 694 } 695 696 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap, 697 struct kvmppc_vpa *old_vpap) 698 { 699 struct kvm *kvm = vcpu->kvm; 700 void *va; 701 unsigned long nb; 702 unsigned long gpa; 703 704 /* 705 * We need to pin the page pointed to by vpap->next_gpa, 706 * but we can't call kvmppc_pin_guest_page under the lock 707 * as it does get_user_pages() and down_read(). So we 708 * have to drop the lock, pin the page, then get the lock 709 * again and check that a new area didn't get registered 710 * in the meantime. 711 */ 712 for (;;) { 713 gpa = vpap->next_gpa; 714 spin_unlock(&vcpu->arch.vpa_update_lock); 715 va = NULL; 716 nb = 0; 717 if (gpa) 718 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 719 spin_lock(&vcpu->arch.vpa_update_lock); 720 if (gpa == vpap->next_gpa) 721 break; 722 /* sigh... unpin that one and try again */ 723 if (va) 724 kvmppc_unpin_guest_page(kvm, va, gpa, false); 725 } 726 727 vpap->update_pending = 0; 728 if (va && nb < vpap->len) { 729 /* 730 * If it's now too short, it must be that userspace 731 * has changed the mappings underlying guest memory, 732 * so unregister the region. 733 */ 734 kvmppc_unpin_guest_page(kvm, va, gpa, false); 735 va = NULL; 736 } 737 *old_vpap = *vpap; 738 739 vpap->gpa = gpa; 740 vpap->pinned_addr = va; 741 vpap->dirty = false; 742 if (va) 743 vpap->pinned_end = va + vpap->len; 744 } 745 746 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 747 { 748 struct kvm *kvm = vcpu->kvm; 749 struct kvmppc_vpa old_vpa = { 0 }; 750 751 if (!(vcpu->arch.vpa.update_pending || 752 vcpu->arch.slb_shadow.update_pending || 753 vcpu->arch.dtl.update_pending)) 754 return; 755 756 spin_lock(&vcpu->arch.vpa_update_lock); 757 if (vcpu->arch.vpa.update_pending) { 758 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa, &old_vpa); 759 if (old_vpa.pinned_addr) { 760 if (kvmhv_is_nestedv2()) 761 kvmhv_nestedv2_set_vpa(vcpu, ~0ull); 762 kvmppc_unpin_guest_page(kvm, old_vpa.pinned_addr, old_vpa.gpa, 763 old_vpa.dirty); 764 } 765 if (vcpu->arch.vpa.pinned_addr) { 766 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 767 if (kvmhv_is_nestedv2()) 768 kvmhv_nestedv2_set_vpa(vcpu, __pa(vcpu->arch.vpa.pinned_addr)); 769 } 770 } 771 if (vcpu->arch.dtl.update_pending) { 772 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl, &old_vpa); 773 if (old_vpa.pinned_addr) 774 kvmppc_unpin_guest_page(kvm, old_vpa.pinned_addr, old_vpa.gpa, 775 old_vpa.dirty); 776 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 777 vcpu->arch.dtl_index = 0; 778 } 779 if (vcpu->arch.slb_shadow.update_pending) { 780 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow, &old_vpa); 781 if (old_vpa.pinned_addr) 782 kvmppc_unpin_guest_page(kvm, old_vpa.pinned_addr, old_vpa.gpa, 783 old_vpa.dirty); 784 } 785 786 spin_unlock(&vcpu->arch.vpa_update_lock); 787 } 788 789 /* 790 * Return the accumulated stolen time for the vcore up until `now'. 791 * The caller should hold the vcore lock. 792 */ 793 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 794 { 795 u64 p; 796 unsigned long flags; 797 798 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 799 800 spin_lock_irqsave(&vc->stoltb_lock, flags); 801 p = vc->stolen_tb; 802 if (vc->vcore_state != VCORE_INACTIVE && 803 vc->preempt_tb != TB_NIL) 804 p += now - vc->preempt_tb; 805 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 806 return p; 807 } 808 809 static void __kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 810 struct lppaca *vpa, 811 unsigned int pcpu, u64 now, 812 unsigned long stolen) 813 { 814 struct dtl_entry *dt; 815 816 dt = vcpu->arch.dtl_ptr; 817 818 if (!dt) 819 return; 820 821 dt->dispatch_reason = 7; 822 dt->preempt_reason = 0; 823 dt->processor_id = cpu_to_be16(pcpu + vcpu->arch.ptid); 824 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 825 dt->ready_to_enqueue_time = 0; 826 dt->waiting_to_ready_time = 0; 827 dt->timebase = cpu_to_be64(now); 828 dt->fault_addr = 0; 829 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 830 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 831 832 ++dt; 833 if (dt == vcpu->arch.dtl.pinned_end) 834 dt = vcpu->arch.dtl.pinned_addr; 835 vcpu->arch.dtl_ptr = dt; 836 /* order writing *dt vs. writing vpa->dtl_idx */ 837 smp_wmb(); 838 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 839 840 /* vcpu->arch.dtl.dirty is set by the caller */ 841 } 842 843 static void kvmppc_update_vpa_dispatch(struct kvm_vcpu *vcpu, 844 struct kvmppc_vcore *vc) 845 { 846 struct lppaca *vpa; 847 unsigned long stolen; 848 unsigned long core_stolen; 849 u64 now; 850 unsigned long flags; 851 852 vpa = vcpu->arch.vpa.pinned_addr; 853 if (!vpa) 854 return; 855 856 now = mftb(); 857 858 core_stolen = vcore_stolen_time(vc, now); 859 stolen = core_stolen - vcpu->arch.stolen_logged; 860 vcpu->arch.stolen_logged = core_stolen; 861 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 862 stolen += vcpu->arch.busy_stolen; 863 vcpu->arch.busy_stolen = 0; 864 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 865 866 vpa->enqueue_dispatch_tb = cpu_to_be64(be64_to_cpu(vpa->enqueue_dispatch_tb) + stolen); 867 868 __kvmppc_create_dtl_entry(vcpu, vpa, vc->pcpu, now + kvmppc_get_tb_offset(vcpu), stolen); 869 870 vcpu->arch.vpa.dirty = true; 871 } 872 873 static void kvmppc_update_vpa_dispatch_p9(struct kvm_vcpu *vcpu, 874 struct kvmppc_vcore *vc, 875 u64 now) 876 { 877 struct lppaca *vpa; 878 unsigned long stolen; 879 unsigned long stolen_delta; 880 881 vpa = vcpu->arch.vpa.pinned_addr; 882 if (!vpa) 883 return; 884 885 stolen = vc->stolen_tb; 886 stolen_delta = stolen - vcpu->arch.stolen_logged; 887 vcpu->arch.stolen_logged = stolen; 888 889 vpa->enqueue_dispatch_tb = cpu_to_be64(stolen); 890 891 __kvmppc_create_dtl_entry(vcpu, vpa, vc->pcpu, now, stolen_delta); 892 893 vcpu->arch.vpa.dirty = true; 894 } 895 896 /* See if there is a doorbell interrupt pending for a vcpu */ 897 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 898 { 899 int thr; 900 struct kvmppc_vcore *vc; 901 902 if (vcpu->arch.doorbell_request) 903 return true; 904 if (cpu_has_feature(CPU_FTR_ARCH_300)) 905 return false; 906 /* 907 * Ensure that the read of vcore->dpdes comes after the read 908 * of vcpu->doorbell_request. This barrier matches the 909 * smp_wmb() in kvmppc_guest_entry_inject(). 910 */ 911 smp_rmb(); 912 vc = vcpu->arch.vcore; 913 thr = vcpu->vcpu_id - vc->first_vcpuid; 914 return !!(vc->dpdes & (1 << thr)); 915 } 916 917 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 918 { 919 if (kvmppc_get_arch_compat(vcpu) >= PVR_ARCH_207) 920 return true; 921 if ((!kvmppc_get_arch_compat(vcpu)) && 922 cpu_has_feature(CPU_FTR_ARCH_207S)) 923 return true; 924 return false; 925 } 926 927 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 928 unsigned long resource, unsigned long value1, 929 unsigned long value2) 930 { 931 switch (resource) { 932 case H_SET_MODE_RESOURCE_SET_CIABR: 933 if (!kvmppc_power8_compatible(vcpu)) 934 return H_P2; 935 if (value2) 936 return H_P4; 937 if (mflags) 938 return H_UNSUPPORTED_FLAG_START; 939 /* Guests can't breakpoint the hypervisor */ 940 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 941 return H_P3; 942 kvmppc_set_ciabr_hv(vcpu, value1); 943 return H_SUCCESS; 944 case H_SET_MODE_RESOURCE_SET_DAWR0: 945 if (!kvmppc_power8_compatible(vcpu)) 946 return H_P2; 947 if (!ppc_breakpoint_available()) 948 return H_P2; 949 if (mflags) 950 return H_UNSUPPORTED_FLAG_START; 951 if (value2 & DABRX_HYP) 952 return H_P4; 953 kvmppc_set_dawr0_hv(vcpu, value1); 954 kvmppc_set_dawrx0_hv(vcpu, value2); 955 return H_SUCCESS; 956 case H_SET_MODE_RESOURCE_SET_DAWR1: 957 if (!kvmppc_power8_compatible(vcpu)) 958 return H_P2; 959 if (!ppc_breakpoint_available()) 960 return H_P2; 961 if (!cpu_has_feature(CPU_FTR_DAWR1)) 962 return H_P2; 963 if (!vcpu->kvm->arch.dawr1_enabled) 964 return H_FUNCTION; 965 if (mflags) 966 return H_UNSUPPORTED_FLAG_START; 967 if (value2 & DABRX_HYP) 968 return H_P4; 969 kvmppc_set_dawr1_hv(vcpu, value1); 970 kvmppc_set_dawrx1_hv(vcpu, value2); 971 return H_SUCCESS; 972 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 973 /* 974 * KVM does not support mflags=2 (AIL=2) and AIL=1 is reserved. 975 * Keep this in synch with kvmppc_filter_guest_lpcr_hv. 976 */ 977 if (cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG) && 978 kvmhv_vcpu_is_radix(vcpu) && mflags == 3) 979 return H_UNSUPPORTED_FLAG_START; 980 return H_TOO_HARD; 981 default: 982 return H_TOO_HARD; 983 } 984 } 985 986 /* Copy guest memory in place - must reside within a single memslot */ 987 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 988 unsigned long len) 989 { 990 struct kvm_memory_slot *to_memslot = NULL; 991 struct kvm_memory_slot *from_memslot = NULL; 992 unsigned long to_addr, from_addr; 993 int r; 994 995 /* Get HPA for from address */ 996 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 997 if (!from_memslot) 998 return -EFAULT; 999 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 1000 << PAGE_SHIFT)) 1001 return -EINVAL; 1002 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 1003 if (kvm_is_error_hva(from_addr)) 1004 return -EFAULT; 1005 from_addr |= (from & (PAGE_SIZE - 1)); 1006 1007 /* Get HPA for to address */ 1008 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 1009 if (!to_memslot) 1010 return -EFAULT; 1011 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 1012 << PAGE_SHIFT)) 1013 return -EINVAL; 1014 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 1015 if (kvm_is_error_hva(to_addr)) 1016 return -EFAULT; 1017 to_addr |= (to & (PAGE_SIZE - 1)); 1018 1019 /* Perform copy */ 1020 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 1021 len); 1022 if (r) 1023 return -EFAULT; 1024 mark_page_dirty(kvm, to >> PAGE_SHIFT); 1025 return 0; 1026 } 1027 1028 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 1029 unsigned long dest, unsigned long src) 1030 { 1031 u64 pg_sz = SZ_4K; /* 4K page size */ 1032 u64 pg_mask = SZ_4K - 1; 1033 int ret; 1034 1035 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 1036 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 1037 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 1038 return H_PARAMETER; 1039 1040 /* dest (and src if copy_page flag set) must be page aligned */ 1041 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 1042 return H_PARAMETER; 1043 1044 /* zero and/or copy the page as determined by the flags */ 1045 if (flags & H_COPY_PAGE) { 1046 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 1047 if (ret < 0) 1048 return H_PARAMETER; 1049 } else if (flags & H_ZERO_PAGE) { 1050 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 1051 if (ret < 0) 1052 return H_PARAMETER; 1053 } 1054 1055 /* We can ignore the remaining flags */ 1056 1057 return H_SUCCESS; 1058 } 1059 1060 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 1061 { 1062 struct kvmppc_vcore *vcore = target->arch.vcore; 1063 1064 /* 1065 * We expect to have been called by the real mode handler 1066 * (kvmppc_rm_h_confer()) which would have directly returned 1067 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 1068 * have useful work to do and should not confer) so we don't 1069 * recheck that here. 1070 * 1071 * In the case of the P9 single vcpu per vcore case, the real 1072 * mode handler is not called but no other threads are in the 1073 * source vcore. 1074 */ 1075 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 1076 spin_lock(&vcore->lock); 1077 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 1078 vcore->vcore_state != VCORE_INACTIVE && 1079 vcore->runner) 1080 target = vcore->runner; 1081 spin_unlock(&vcore->lock); 1082 } 1083 1084 return kvm_vcpu_yield_to(target); 1085 } 1086 1087 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 1088 { 1089 int yield_count = 0; 1090 struct lppaca *lppaca; 1091 1092 spin_lock(&vcpu->arch.vpa_update_lock); 1093 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 1094 if (lppaca) 1095 yield_count = be32_to_cpu(lppaca->yield_count); 1096 spin_unlock(&vcpu->arch.vpa_update_lock); 1097 return yield_count; 1098 } 1099 1100 /* 1101 * H_RPT_INVALIDATE hcall handler for nested guests. 1102 * 1103 * Handles only nested process-scoped invalidation requests in L0. 1104 */ 1105 static int kvmppc_nested_h_rpt_invalidate(struct kvm_vcpu *vcpu) 1106 { 1107 unsigned long type = kvmppc_get_gpr(vcpu, 6); 1108 unsigned long pid, pg_sizes, start, end; 1109 1110 /* 1111 * The partition-scoped invalidations aren't handled here in L0. 1112 */ 1113 if (type & H_RPTI_TYPE_NESTED) 1114 return RESUME_HOST; 1115 1116 pid = kvmppc_get_gpr(vcpu, 4); 1117 pg_sizes = kvmppc_get_gpr(vcpu, 7); 1118 start = kvmppc_get_gpr(vcpu, 8); 1119 end = kvmppc_get_gpr(vcpu, 9); 1120 1121 do_h_rpt_invalidate_prt(pid, vcpu->arch.nested->shadow_lpid, 1122 type, pg_sizes, start, end); 1123 1124 kvmppc_set_gpr(vcpu, 3, H_SUCCESS); 1125 return RESUME_GUEST; 1126 } 1127 1128 static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu, 1129 unsigned long id, unsigned long target, 1130 unsigned long type, unsigned long pg_sizes, 1131 unsigned long start, unsigned long end) 1132 { 1133 if (!kvm_is_radix(vcpu->kvm)) 1134 return H_UNSUPPORTED; 1135 1136 if (end < start) 1137 return H_P5; 1138 1139 /* 1140 * Partition-scoped invalidation for nested guests. 1141 */ 1142 if (type & H_RPTI_TYPE_NESTED) { 1143 if (!nesting_enabled(vcpu->kvm)) 1144 return H_FUNCTION; 1145 1146 /* Support only cores as target */ 1147 if (target != H_RPTI_TARGET_CMMU) 1148 return H_P2; 1149 1150 return do_h_rpt_invalidate_pat(vcpu, id, type, pg_sizes, 1151 start, end); 1152 } 1153 1154 /* 1155 * Process-scoped invalidation for L1 guests. 1156 */ 1157 do_h_rpt_invalidate_prt(id, vcpu->kvm->arch.lpid, 1158 type, pg_sizes, start, end); 1159 return H_SUCCESS; 1160 } 1161 1162 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 1163 { 1164 struct kvm *kvm = vcpu->kvm; 1165 unsigned long req = kvmppc_get_gpr(vcpu, 3); 1166 unsigned long target, ret = H_SUCCESS; 1167 int yield_count; 1168 struct kvm_vcpu *tvcpu; 1169 int idx, rc; 1170 1171 if (req <= MAX_HCALL_OPCODE && 1172 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 1173 return RESUME_HOST; 1174 1175 switch (req) { 1176 case H_REMOVE: 1177 ret = kvmppc_h_remove(vcpu, kvmppc_get_gpr(vcpu, 4), 1178 kvmppc_get_gpr(vcpu, 5), 1179 kvmppc_get_gpr(vcpu, 6)); 1180 if (ret == H_TOO_HARD) 1181 return RESUME_HOST; 1182 break; 1183 case H_ENTER: 1184 ret = kvmppc_h_enter(vcpu, kvmppc_get_gpr(vcpu, 4), 1185 kvmppc_get_gpr(vcpu, 5), 1186 kvmppc_get_gpr(vcpu, 6), 1187 kvmppc_get_gpr(vcpu, 7)); 1188 if (ret == H_TOO_HARD) 1189 return RESUME_HOST; 1190 break; 1191 case H_READ: 1192 ret = kvmppc_h_read(vcpu, kvmppc_get_gpr(vcpu, 4), 1193 kvmppc_get_gpr(vcpu, 5)); 1194 if (ret == H_TOO_HARD) 1195 return RESUME_HOST; 1196 break; 1197 case H_CLEAR_MOD: 1198 ret = kvmppc_h_clear_mod(vcpu, kvmppc_get_gpr(vcpu, 4), 1199 kvmppc_get_gpr(vcpu, 5)); 1200 if (ret == H_TOO_HARD) 1201 return RESUME_HOST; 1202 break; 1203 case H_CLEAR_REF: 1204 ret = kvmppc_h_clear_ref(vcpu, kvmppc_get_gpr(vcpu, 4), 1205 kvmppc_get_gpr(vcpu, 5)); 1206 if (ret == H_TOO_HARD) 1207 return RESUME_HOST; 1208 break; 1209 case H_PROTECT: 1210 ret = kvmppc_h_protect(vcpu, kvmppc_get_gpr(vcpu, 4), 1211 kvmppc_get_gpr(vcpu, 5), 1212 kvmppc_get_gpr(vcpu, 6)); 1213 if (ret == H_TOO_HARD) 1214 return RESUME_HOST; 1215 break; 1216 case H_BULK_REMOVE: 1217 ret = kvmppc_h_bulk_remove(vcpu); 1218 if (ret == H_TOO_HARD) 1219 return RESUME_HOST; 1220 break; 1221 1222 case H_CEDE: 1223 break; 1224 case H_PROD: 1225 target = kvmppc_get_gpr(vcpu, 4); 1226 tvcpu = kvmppc_find_vcpu(kvm, target); 1227 if (!tvcpu) { 1228 ret = H_PARAMETER; 1229 break; 1230 } 1231 tvcpu->arch.prodded = 1; 1232 smp_mb(); /* This orders prodded store vs ceded load */ 1233 if (tvcpu->arch.ceded) 1234 kvmppc_fast_vcpu_kick_hv(tvcpu); 1235 break; 1236 case H_CONFER: 1237 target = kvmppc_get_gpr(vcpu, 4); 1238 if (target == -1) 1239 break; 1240 tvcpu = kvmppc_find_vcpu(kvm, target); 1241 if (!tvcpu) { 1242 ret = H_PARAMETER; 1243 break; 1244 } 1245 yield_count = kvmppc_get_gpr(vcpu, 5); 1246 if (kvmppc_get_yield_count(tvcpu) != yield_count) 1247 break; 1248 kvm_arch_vcpu_yield_to(tvcpu); 1249 break; 1250 case H_REGISTER_VPA: 1251 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 1252 kvmppc_get_gpr(vcpu, 5), 1253 kvmppc_get_gpr(vcpu, 6)); 1254 break; 1255 case H_RTAS: 1256 if (list_empty(&kvm->arch.rtas_tokens)) 1257 return RESUME_HOST; 1258 1259 idx = srcu_read_lock(&kvm->srcu); 1260 rc = kvmppc_rtas_hcall(vcpu); 1261 srcu_read_unlock(&kvm->srcu, idx); 1262 1263 if (rc == -ENOENT) 1264 return RESUME_HOST; 1265 else if (rc == 0) 1266 break; 1267 1268 /* Send the error out to userspace via KVM_RUN */ 1269 return rc; 1270 case H_LOGICAL_CI_LOAD: 1271 ret = kvmppc_h_logical_ci_load(vcpu); 1272 if (ret == H_TOO_HARD) 1273 return RESUME_HOST; 1274 break; 1275 case H_LOGICAL_CI_STORE: 1276 ret = kvmppc_h_logical_ci_store(vcpu); 1277 if (ret == H_TOO_HARD) 1278 return RESUME_HOST; 1279 break; 1280 case H_SET_MODE: 1281 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 1282 kvmppc_get_gpr(vcpu, 5), 1283 kvmppc_get_gpr(vcpu, 6), 1284 kvmppc_get_gpr(vcpu, 7)); 1285 if (ret == H_TOO_HARD) 1286 return RESUME_HOST; 1287 break; 1288 case H_XIRR: 1289 case H_CPPR: 1290 case H_EOI: 1291 case H_IPI: 1292 case H_IPOLL: 1293 case H_XIRR_X: 1294 if (kvmppc_xics_enabled(vcpu)) { 1295 if (xics_on_xive()) { 1296 ret = H_NOT_AVAILABLE; 1297 return RESUME_GUEST; 1298 } 1299 ret = kvmppc_xics_hcall(vcpu, req); 1300 break; 1301 } 1302 return RESUME_HOST; 1303 case H_SET_DABR: 1304 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1305 break; 1306 case H_SET_XDABR: 1307 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1308 kvmppc_get_gpr(vcpu, 5)); 1309 break; 1310 #ifdef CONFIG_SPAPR_TCE_IOMMU 1311 case H_GET_TCE: 1312 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1313 kvmppc_get_gpr(vcpu, 5)); 1314 if (ret == H_TOO_HARD) 1315 return RESUME_HOST; 1316 break; 1317 case H_PUT_TCE: 1318 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1319 kvmppc_get_gpr(vcpu, 5), 1320 kvmppc_get_gpr(vcpu, 6)); 1321 if (ret == H_TOO_HARD) 1322 return RESUME_HOST; 1323 break; 1324 case H_PUT_TCE_INDIRECT: 1325 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1326 kvmppc_get_gpr(vcpu, 5), 1327 kvmppc_get_gpr(vcpu, 6), 1328 kvmppc_get_gpr(vcpu, 7)); 1329 if (ret == H_TOO_HARD) 1330 return RESUME_HOST; 1331 break; 1332 case H_STUFF_TCE: 1333 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1334 kvmppc_get_gpr(vcpu, 5), 1335 kvmppc_get_gpr(vcpu, 6), 1336 kvmppc_get_gpr(vcpu, 7)); 1337 if (ret == H_TOO_HARD) 1338 return RESUME_HOST; 1339 break; 1340 #endif 1341 case H_RANDOM: { 1342 unsigned long rand; 1343 1344 if (!arch_get_random_seed_longs(&rand, 1)) 1345 ret = H_HARDWARE; 1346 kvmppc_set_gpr(vcpu, 4, rand); 1347 break; 1348 } 1349 case H_RPT_INVALIDATE: 1350 ret = kvmppc_h_rpt_invalidate(vcpu, kvmppc_get_gpr(vcpu, 4), 1351 kvmppc_get_gpr(vcpu, 5), 1352 kvmppc_get_gpr(vcpu, 6), 1353 kvmppc_get_gpr(vcpu, 7), 1354 kvmppc_get_gpr(vcpu, 8), 1355 kvmppc_get_gpr(vcpu, 9)); 1356 break; 1357 1358 case H_SET_PARTITION_TABLE: 1359 ret = H_FUNCTION; 1360 if (nesting_enabled(kvm)) 1361 ret = kvmhv_set_partition_table(vcpu); 1362 break; 1363 case H_ENTER_NESTED: 1364 ret = H_FUNCTION; 1365 if (!nesting_enabled(kvm)) 1366 break; 1367 ret = kvmhv_enter_nested_guest(vcpu); 1368 if (ret == H_INTERRUPT) { 1369 kvmppc_set_gpr(vcpu, 3, 0); 1370 vcpu->arch.hcall_needed = 0; 1371 return -EINTR; 1372 } else if (ret == H_TOO_HARD) { 1373 kvmppc_set_gpr(vcpu, 3, 0); 1374 vcpu->arch.hcall_needed = 0; 1375 return RESUME_HOST; 1376 } 1377 break; 1378 case H_TLB_INVALIDATE: 1379 ret = H_FUNCTION; 1380 if (nesting_enabled(kvm)) 1381 ret = kvmhv_do_nested_tlbie(vcpu); 1382 break; 1383 case H_COPY_TOFROM_GUEST: 1384 ret = H_FUNCTION; 1385 if (nesting_enabled(kvm)) 1386 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1387 break; 1388 case H_PAGE_INIT: 1389 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1390 kvmppc_get_gpr(vcpu, 5), 1391 kvmppc_get_gpr(vcpu, 6)); 1392 break; 1393 case H_SVM_PAGE_IN: 1394 ret = H_UNSUPPORTED; 1395 if (kvmppc_get_srr1(vcpu) & MSR_S) 1396 ret = kvmppc_h_svm_page_in(kvm, 1397 kvmppc_get_gpr(vcpu, 4), 1398 kvmppc_get_gpr(vcpu, 5), 1399 kvmppc_get_gpr(vcpu, 6)); 1400 break; 1401 case H_SVM_PAGE_OUT: 1402 ret = H_UNSUPPORTED; 1403 if (kvmppc_get_srr1(vcpu) & MSR_S) 1404 ret = kvmppc_h_svm_page_out(kvm, 1405 kvmppc_get_gpr(vcpu, 4), 1406 kvmppc_get_gpr(vcpu, 5), 1407 kvmppc_get_gpr(vcpu, 6)); 1408 break; 1409 case H_SVM_INIT_START: 1410 ret = H_UNSUPPORTED; 1411 if (kvmppc_get_srr1(vcpu) & MSR_S) 1412 ret = kvmppc_h_svm_init_start(kvm); 1413 break; 1414 case H_SVM_INIT_DONE: 1415 ret = H_UNSUPPORTED; 1416 if (kvmppc_get_srr1(vcpu) & MSR_S) 1417 ret = kvmppc_h_svm_init_done(kvm); 1418 break; 1419 case H_SVM_INIT_ABORT: 1420 /* 1421 * Even if that call is made by the Ultravisor, the SSR1 value 1422 * is the guest context one, with the secure bit clear as it has 1423 * not yet been secured. So we can't check it here. 1424 * Instead the kvm->arch.secure_guest flag is checked inside 1425 * kvmppc_h_svm_init_abort(). 1426 */ 1427 ret = kvmppc_h_svm_init_abort(kvm); 1428 break; 1429 1430 default: 1431 return RESUME_HOST; 1432 } 1433 WARN_ON_ONCE(ret == H_TOO_HARD); 1434 kvmppc_set_gpr(vcpu, 3, ret); 1435 vcpu->arch.hcall_needed = 0; 1436 return RESUME_GUEST; 1437 } 1438 1439 /* 1440 * Handle H_CEDE in the P9 path where we don't call the real-mode hcall 1441 * handlers in book3s_hv_rmhandlers.S. 1442 * 1443 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1444 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1445 */ 1446 static void kvmppc_cede(struct kvm_vcpu *vcpu) 1447 { 1448 __kvmppc_set_msr_hv(vcpu, __kvmppc_get_msr_hv(vcpu) | MSR_EE); 1449 vcpu->arch.ceded = 1; 1450 smp_mb(); 1451 if (vcpu->arch.prodded) { 1452 vcpu->arch.prodded = 0; 1453 smp_mb(); 1454 vcpu->arch.ceded = 0; 1455 } 1456 } 1457 1458 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1459 { 1460 switch (cmd) { 1461 case H_CEDE: 1462 case H_PROD: 1463 case H_CONFER: 1464 case H_REGISTER_VPA: 1465 case H_SET_MODE: 1466 #ifdef CONFIG_SPAPR_TCE_IOMMU 1467 case H_GET_TCE: 1468 case H_PUT_TCE: 1469 case H_PUT_TCE_INDIRECT: 1470 case H_STUFF_TCE: 1471 #endif 1472 case H_LOGICAL_CI_LOAD: 1473 case H_LOGICAL_CI_STORE: 1474 #ifdef CONFIG_KVM_XICS 1475 case H_XIRR: 1476 case H_CPPR: 1477 case H_EOI: 1478 case H_IPI: 1479 case H_IPOLL: 1480 case H_XIRR_X: 1481 #endif 1482 case H_PAGE_INIT: 1483 case H_RPT_INVALIDATE: 1484 return 1; 1485 } 1486 1487 /* See if it's in the real-mode table */ 1488 return kvmppc_hcall_impl_hv_realmode(cmd); 1489 } 1490 1491 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu) 1492 { 1493 ppc_inst_t last_inst; 1494 1495 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1496 EMULATE_DONE) { 1497 /* 1498 * Fetch failed, so return to guest and 1499 * try executing it again. 1500 */ 1501 return RESUME_GUEST; 1502 } 1503 1504 if (ppc_inst_val(last_inst) == KVMPPC_INST_SW_BREAKPOINT) { 1505 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 1506 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); 1507 return RESUME_HOST; 1508 } else { 1509 kvmppc_core_queue_program(vcpu, SRR1_PROGILL | 1510 (kvmppc_get_msr(vcpu) & SRR1_PREFIXED)); 1511 return RESUME_GUEST; 1512 } 1513 } 1514 1515 static void do_nothing(void *x) 1516 { 1517 } 1518 1519 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1520 { 1521 int thr, cpu, pcpu, nthreads; 1522 struct kvm_vcpu *v; 1523 unsigned long dpdes; 1524 1525 nthreads = vcpu->kvm->arch.emul_smt_mode; 1526 dpdes = 0; 1527 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1528 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1529 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1530 if (!v) 1531 continue; 1532 /* 1533 * If the vcpu is currently running on a physical cpu thread, 1534 * interrupt it in order to pull it out of the guest briefly, 1535 * which will update its vcore->dpdes value. 1536 */ 1537 pcpu = READ_ONCE(v->cpu); 1538 if (pcpu >= 0) 1539 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1540 if (kvmppc_doorbell_pending(v)) 1541 dpdes |= 1 << thr; 1542 } 1543 return dpdes; 1544 } 1545 1546 /* 1547 * On POWER9, emulate doorbell-related instructions in order to 1548 * give the guest the illusion of running on a multi-threaded core. 1549 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1550 * and mfspr DPDES. 1551 */ 1552 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1553 { 1554 u32 inst, rb, thr; 1555 unsigned long arg; 1556 struct kvm *kvm = vcpu->kvm; 1557 struct kvm_vcpu *tvcpu; 1558 ppc_inst_t pinst; 1559 1560 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &pinst) != EMULATE_DONE) 1561 return RESUME_GUEST; 1562 inst = ppc_inst_val(pinst); 1563 if (get_op(inst) != 31) 1564 return EMULATE_FAIL; 1565 rb = get_rb(inst); 1566 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1567 switch (get_xop(inst)) { 1568 case OP_31_XOP_MSGSNDP: 1569 arg = kvmppc_get_gpr(vcpu, rb); 1570 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1571 break; 1572 arg &= 0x7f; 1573 if (arg >= kvm->arch.emul_smt_mode) 1574 break; 1575 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1576 if (!tvcpu) 1577 break; 1578 if (!tvcpu->arch.doorbell_request) { 1579 tvcpu->arch.doorbell_request = 1; 1580 kvmppc_fast_vcpu_kick_hv(tvcpu); 1581 } 1582 break; 1583 case OP_31_XOP_MSGCLRP: 1584 arg = kvmppc_get_gpr(vcpu, rb); 1585 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1586 break; 1587 vcpu->arch.vcore->dpdes = 0; 1588 vcpu->arch.doorbell_request = 0; 1589 break; 1590 case OP_31_XOP_MFSPR: 1591 switch (get_sprn(inst)) { 1592 case SPRN_TIR: 1593 arg = thr; 1594 break; 1595 case SPRN_DPDES: 1596 arg = kvmppc_read_dpdes(vcpu); 1597 break; 1598 default: 1599 return EMULATE_FAIL; 1600 } 1601 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1602 break; 1603 default: 1604 return EMULATE_FAIL; 1605 } 1606 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1607 return RESUME_GUEST; 1608 } 1609 1610 /* 1611 * If the lppaca had pmcregs_in_use clear when we exited the guest, then 1612 * HFSCR_PM is cleared for next entry. If the guest then tries to access 1613 * the PMU SPRs, we get this facility unavailable interrupt. Putting HFSCR_PM 1614 * back in the guest HFSCR will cause the next entry to load the PMU SPRs and 1615 * allow the guest access to continue. 1616 */ 1617 static int kvmppc_pmu_unavailable(struct kvm_vcpu *vcpu) 1618 { 1619 if (!(vcpu->arch.hfscr_permitted & HFSCR_PM)) 1620 return EMULATE_FAIL; 1621 1622 kvmppc_set_hfscr_hv(vcpu, kvmppc_get_hfscr_hv(vcpu) | HFSCR_PM); 1623 1624 return RESUME_GUEST; 1625 } 1626 1627 static int kvmppc_ebb_unavailable(struct kvm_vcpu *vcpu) 1628 { 1629 if (!(vcpu->arch.hfscr_permitted & HFSCR_EBB)) 1630 return EMULATE_FAIL; 1631 1632 kvmppc_set_hfscr_hv(vcpu, kvmppc_get_hfscr_hv(vcpu) | HFSCR_EBB); 1633 1634 return RESUME_GUEST; 1635 } 1636 1637 static int kvmppc_tm_unavailable(struct kvm_vcpu *vcpu) 1638 { 1639 if (!(vcpu->arch.hfscr_permitted & HFSCR_TM)) 1640 return EMULATE_FAIL; 1641 1642 kvmppc_set_hfscr_hv(vcpu, kvmppc_get_hfscr_hv(vcpu) | HFSCR_TM); 1643 1644 return RESUME_GUEST; 1645 } 1646 1647 static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, 1648 struct task_struct *tsk) 1649 { 1650 struct kvm_run *run = vcpu->run; 1651 int r = RESUME_HOST; 1652 1653 vcpu->stat.sum_exits++; 1654 1655 /* 1656 * This can happen if an interrupt occurs in the last stages 1657 * of guest entry or the first stages of guest exit (i.e. after 1658 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1659 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1660 * That can happen due to a bug, or due to a machine check 1661 * occurring at just the wrong time. 1662 */ 1663 if (!kvmhv_is_nestedv2() && (__kvmppc_get_msr_hv(vcpu) & MSR_HV)) { 1664 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1665 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1666 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1667 vcpu->arch.shregs.msr); 1668 kvmppc_dump_regs(vcpu); 1669 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1670 run->hw.hardware_exit_reason = vcpu->arch.trap; 1671 return RESUME_HOST; 1672 } 1673 run->exit_reason = KVM_EXIT_UNKNOWN; 1674 run->ready_for_interrupt_injection = 1; 1675 switch (vcpu->arch.trap) { 1676 /* We're good on these - the host merely wanted to get our attention */ 1677 case BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER: 1678 WARN_ON_ONCE(1); /* Should never happen */ 1679 vcpu->arch.trap = BOOK3S_INTERRUPT_HV_DECREMENTER; 1680 fallthrough; 1681 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1682 vcpu->stat.dec_exits++; 1683 r = RESUME_GUEST; 1684 break; 1685 case BOOK3S_INTERRUPT_EXTERNAL: 1686 case BOOK3S_INTERRUPT_H_DOORBELL: 1687 case BOOK3S_INTERRUPT_H_VIRT: 1688 vcpu->stat.ext_intr_exits++; 1689 r = RESUME_GUEST; 1690 break; 1691 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1692 case BOOK3S_INTERRUPT_HMI: 1693 case BOOK3S_INTERRUPT_PERFMON: 1694 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1695 r = RESUME_GUEST; 1696 break; 1697 case BOOK3S_INTERRUPT_MACHINE_CHECK: { 1698 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1699 DEFAULT_RATELIMIT_BURST); 1700 /* 1701 * Print the MCE event to host console. Ratelimit so the guest 1702 * can't flood the host log. 1703 */ 1704 if (__ratelimit(&rs)) 1705 machine_check_print_event_info(&vcpu->arch.mce_evt,false, true); 1706 1707 /* 1708 * If the guest can do FWNMI, exit to userspace so it can 1709 * deliver a FWNMI to the guest. 1710 * Otherwise we synthesize a machine check for the guest 1711 * so that it knows that the machine check occurred. 1712 */ 1713 if (!vcpu->kvm->arch.fwnmi_enabled) { 1714 ulong flags = (__kvmppc_get_msr_hv(vcpu) & 0x083c0000) | 1715 (kvmppc_get_msr(vcpu) & SRR1_PREFIXED); 1716 kvmppc_core_queue_machine_check(vcpu, flags); 1717 r = RESUME_GUEST; 1718 break; 1719 } 1720 1721 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1722 run->exit_reason = KVM_EXIT_NMI; 1723 run->hw.hardware_exit_reason = vcpu->arch.trap; 1724 /* Clear out the old NMI status from run->flags */ 1725 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1726 /* Now set the NMI status */ 1727 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1728 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1729 else 1730 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1731 1732 r = RESUME_HOST; 1733 break; 1734 } 1735 case BOOK3S_INTERRUPT_PROGRAM: 1736 { 1737 ulong flags; 1738 /* 1739 * Normally program interrupts are delivered directly 1740 * to the guest by the hardware, but we can get here 1741 * as a result of a hypervisor emulation interrupt 1742 * (e40) getting turned into a 700 by BML RTAS. 1743 */ 1744 flags = (__kvmppc_get_msr_hv(vcpu) & 0x1f0000ull) | 1745 (kvmppc_get_msr(vcpu) & SRR1_PREFIXED); 1746 kvmppc_core_queue_program(vcpu, flags); 1747 r = RESUME_GUEST; 1748 break; 1749 } 1750 case BOOK3S_INTERRUPT_SYSCALL: 1751 { 1752 int i; 1753 1754 if (!kvmhv_is_nestedv2() && unlikely(__kvmppc_get_msr_hv(vcpu) & MSR_PR)) { 1755 /* 1756 * Guest userspace executed sc 1. This can only be 1757 * reached by the P9 path because the old path 1758 * handles this case in realmode hcall handlers. 1759 */ 1760 if (!kvmhv_vcpu_is_radix(vcpu)) { 1761 /* 1762 * A guest could be running PR KVM, so this 1763 * may be a PR KVM hcall. It must be reflected 1764 * to the guest kernel as a sc interrupt. 1765 */ 1766 kvmppc_core_queue_syscall(vcpu); 1767 } else { 1768 /* 1769 * Radix guests can not run PR KVM or nested HV 1770 * hash guests which might run PR KVM, so this 1771 * is always a privilege fault. Send a program 1772 * check to guest kernel. 1773 */ 1774 kvmppc_core_queue_program(vcpu, SRR1_PROGPRIV); 1775 } 1776 r = RESUME_GUEST; 1777 break; 1778 } 1779 1780 /* 1781 * hcall - gather args and set exit_reason. This will next be 1782 * handled by kvmppc_pseries_do_hcall which may be able to deal 1783 * with it and resume guest, or may punt to userspace. 1784 */ 1785 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1786 for (i = 0; i < 9; ++i) 1787 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1788 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1789 vcpu->arch.hcall_needed = 1; 1790 r = RESUME_HOST; 1791 break; 1792 } 1793 /* 1794 * We get these next two if the guest accesses a page which it thinks 1795 * it has mapped but which is not actually present, either because 1796 * it is for an emulated I/O device or because the corresonding 1797 * host page has been paged out. 1798 * 1799 * Any other HDSI/HISI interrupts have been handled already for P7/8 1800 * guests. For POWER9 hash guests not using rmhandlers, basic hash 1801 * fault handling is done here. 1802 */ 1803 case BOOK3S_INTERRUPT_H_DATA_STORAGE: { 1804 unsigned long vsid; 1805 long err; 1806 1807 if (cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG) && 1808 unlikely(vcpu->arch.fault_dsisr == HDSISR_CANARY)) { 1809 r = RESUME_GUEST; /* Just retry if it's the canary */ 1810 break; 1811 } 1812 1813 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1814 /* 1815 * Radix doesn't require anything, and pre-ISAv3.0 hash 1816 * already attempted to handle this in rmhandlers. The 1817 * hash fault handling below is v3 only (it uses ASDR 1818 * via fault_gpa). 1819 */ 1820 r = RESUME_PAGE_FAULT; 1821 break; 1822 } 1823 1824 if (!(vcpu->arch.fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT))) { 1825 kvmppc_core_queue_data_storage(vcpu, 1826 kvmppc_get_msr(vcpu) & SRR1_PREFIXED, 1827 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 1828 r = RESUME_GUEST; 1829 break; 1830 } 1831 1832 if (!(__kvmppc_get_msr_hv(vcpu) & MSR_DR)) 1833 vsid = vcpu->kvm->arch.vrma_slb_v; 1834 else 1835 vsid = vcpu->arch.fault_gpa; 1836 1837 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1838 vsid, vcpu->arch.fault_dsisr, true); 1839 if (err == 0) { 1840 r = RESUME_GUEST; 1841 } else if (err == -1 || err == -2) { 1842 r = RESUME_PAGE_FAULT; 1843 } else { 1844 kvmppc_core_queue_data_storage(vcpu, 1845 kvmppc_get_msr(vcpu) & SRR1_PREFIXED, 1846 vcpu->arch.fault_dar, err); 1847 r = RESUME_GUEST; 1848 } 1849 break; 1850 } 1851 case BOOK3S_INTERRUPT_H_INST_STORAGE: { 1852 unsigned long vsid; 1853 long err; 1854 1855 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1856 vcpu->arch.fault_dsisr = __kvmppc_get_msr_hv(vcpu) & 1857 DSISR_SRR1_MATCH_64S; 1858 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1859 /* 1860 * Radix doesn't require anything, and pre-ISAv3.0 hash 1861 * already attempted to handle this in rmhandlers. The 1862 * hash fault handling below is v3 only (it uses ASDR 1863 * via fault_gpa). 1864 */ 1865 if (__kvmppc_get_msr_hv(vcpu) & HSRR1_HISI_WRITE) 1866 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1867 r = RESUME_PAGE_FAULT; 1868 break; 1869 } 1870 1871 if (!(vcpu->arch.fault_dsisr & SRR1_ISI_NOPT)) { 1872 kvmppc_core_queue_inst_storage(vcpu, 1873 vcpu->arch.fault_dsisr | 1874 (kvmppc_get_msr(vcpu) & SRR1_PREFIXED)); 1875 r = RESUME_GUEST; 1876 break; 1877 } 1878 1879 if (!(__kvmppc_get_msr_hv(vcpu) & MSR_IR)) 1880 vsid = vcpu->kvm->arch.vrma_slb_v; 1881 else 1882 vsid = vcpu->arch.fault_gpa; 1883 1884 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1885 vsid, vcpu->arch.fault_dsisr, false); 1886 if (err == 0) { 1887 r = RESUME_GUEST; 1888 } else if (err == -1) { 1889 r = RESUME_PAGE_FAULT; 1890 } else { 1891 kvmppc_core_queue_inst_storage(vcpu, 1892 err | (kvmppc_get_msr(vcpu) & SRR1_PREFIXED)); 1893 r = RESUME_GUEST; 1894 } 1895 break; 1896 } 1897 1898 /* 1899 * This occurs if the guest executes an illegal instruction. 1900 * If the guest debug is disabled, generate a program interrupt 1901 * to the guest. If guest debug is enabled, we need to check 1902 * whether the instruction is a software breakpoint instruction. 1903 * Accordingly return to Guest or Host. 1904 */ 1905 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1906 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1907 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1908 swab32(vcpu->arch.emul_inst) : 1909 vcpu->arch.emul_inst; 1910 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1911 r = kvmppc_emulate_debug_inst(vcpu); 1912 } else { 1913 kvmppc_core_queue_program(vcpu, SRR1_PROGILL | 1914 (kvmppc_get_msr(vcpu) & SRR1_PREFIXED)); 1915 r = RESUME_GUEST; 1916 } 1917 break; 1918 1919 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1920 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1921 /* 1922 * This occurs for various TM-related instructions that 1923 * we need to emulate on POWER9 DD2.2. We have already 1924 * handled the cases where the guest was in real-suspend 1925 * mode and was transitioning to transactional state. 1926 */ 1927 r = kvmhv_p9_tm_emulation(vcpu); 1928 if (r != -1) 1929 break; 1930 fallthrough; /* go to facility unavailable handler */ 1931 #endif 1932 1933 /* 1934 * This occurs if the guest (kernel or userspace), does something that 1935 * is prohibited by HFSCR. 1936 * On POWER9, this could be a doorbell instruction that we need 1937 * to emulate. 1938 * Otherwise, we just generate a program interrupt to the guest. 1939 */ 1940 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: { 1941 u64 cause = kvmppc_get_hfscr_hv(vcpu) >> 56; 1942 1943 r = EMULATE_FAIL; 1944 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1945 switch (cause) { 1946 case FSCR_MSGP_LG: 1947 r = kvmppc_emulate_doorbell_instr(vcpu); 1948 break; 1949 case FSCR_PM_LG: 1950 r = kvmppc_pmu_unavailable(vcpu); 1951 break; 1952 case FSCR_EBB_LG: 1953 r = kvmppc_ebb_unavailable(vcpu); 1954 break; 1955 case FSCR_TM_LG: 1956 r = kvmppc_tm_unavailable(vcpu); 1957 break; 1958 default: 1959 break; 1960 } 1961 } 1962 if (r == EMULATE_FAIL) { 1963 kvmppc_core_queue_program(vcpu, SRR1_PROGILL | 1964 (kvmppc_get_msr(vcpu) & SRR1_PREFIXED)); 1965 r = RESUME_GUEST; 1966 } 1967 break; 1968 } 1969 1970 case BOOK3S_INTERRUPT_HV_RM_HARD: 1971 r = RESUME_PASSTHROUGH; 1972 break; 1973 default: 1974 kvmppc_dump_regs(vcpu); 1975 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1976 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1977 __kvmppc_get_msr_hv(vcpu)); 1978 run->hw.hardware_exit_reason = vcpu->arch.trap; 1979 r = RESUME_HOST; 1980 break; 1981 } 1982 1983 return r; 1984 } 1985 1986 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) 1987 { 1988 int r; 1989 int srcu_idx; 1990 1991 vcpu->stat.sum_exits++; 1992 1993 /* 1994 * This can happen if an interrupt occurs in the last stages 1995 * of guest entry or the first stages of guest exit (i.e. after 1996 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1997 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1998 * That can happen due to a bug, or due to a machine check 1999 * occurring at just the wrong time. 2000 */ 2001 if (__kvmppc_get_msr_hv(vcpu) & MSR_HV) { 2002 pr_emerg("KVM trap in HV mode while nested!\n"); 2003 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 2004 vcpu->arch.trap, kvmppc_get_pc(vcpu), 2005 __kvmppc_get_msr_hv(vcpu)); 2006 kvmppc_dump_regs(vcpu); 2007 return RESUME_HOST; 2008 } 2009 switch (vcpu->arch.trap) { 2010 /* We're good on these - the host merely wanted to get our attention */ 2011 case BOOK3S_INTERRUPT_HV_DECREMENTER: 2012 vcpu->stat.dec_exits++; 2013 r = RESUME_GUEST; 2014 break; 2015 case BOOK3S_INTERRUPT_EXTERNAL: 2016 vcpu->stat.ext_intr_exits++; 2017 r = RESUME_HOST; 2018 break; 2019 case BOOK3S_INTERRUPT_H_DOORBELL: 2020 case BOOK3S_INTERRUPT_H_VIRT: 2021 vcpu->stat.ext_intr_exits++; 2022 r = RESUME_GUEST; 2023 break; 2024 /* These need to go to the nested HV */ 2025 case BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER: 2026 vcpu->arch.trap = BOOK3S_INTERRUPT_HV_DECREMENTER; 2027 vcpu->stat.dec_exits++; 2028 r = RESUME_HOST; 2029 break; 2030 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 2031 case BOOK3S_INTERRUPT_HMI: 2032 case BOOK3S_INTERRUPT_PERFMON: 2033 case BOOK3S_INTERRUPT_SYSTEM_RESET: 2034 r = RESUME_GUEST; 2035 break; 2036 case BOOK3S_INTERRUPT_MACHINE_CHECK: 2037 { 2038 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 2039 DEFAULT_RATELIMIT_BURST); 2040 /* Pass the machine check to the L1 guest */ 2041 r = RESUME_HOST; 2042 /* Print the MCE event to host console. */ 2043 if (__ratelimit(&rs)) 2044 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 2045 break; 2046 } 2047 /* 2048 * We get these next two if the guest accesses a page which it thinks 2049 * it has mapped but which is not actually present, either because 2050 * it is for an emulated I/O device or because the corresonding 2051 * host page has been paged out. 2052 */ 2053 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 2054 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 2055 r = kvmhv_nested_page_fault(vcpu); 2056 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 2057 break; 2058 case BOOK3S_INTERRUPT_H_INST_STORAGE: 2059 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 2060 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 2061 DSISR_SRR1_MATCH_64S; 2062 if (__kvmppc_get_msr_hv(vcpu) & HSRR1_HISI_WRITE) 2063 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 2064 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 2065 r = kvmhv_nested_page_fault(vcpu); 2066 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 2067 break; 2068 2069 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2070 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 2071 /* 2072 * This occurs for various TM-related instructions that 2073 * we need to emulate on POWER9 DD2.2. We have already 2074 * handled the cases where the guest was in real-suspend 2075 * mode and was transitioning to transactional state. 2076 */ 2077 r = kvmhv_p9_tm_emulation(vcpu); 2078 if (r != -1) 2079 break; 2080 fallthrough; /* go to facility unavailable handler */ 2081 #endif 2082 2083 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 2084 r = RESUME_HOST; 2085 break; 2086 2087 case BOOK3S_INTERRUPT_HV_RM_HARD: 2088 vcpu->arch.trap = 0; 2089 r = RESUME_GUEST; 2090 if (!xics_on_xive()) 2091 kvmppc_xics_rm_complete(vcpu, 0); 2092 break; 2093 case BOOK3S_INTERRUPT_SYSCALL: 2094 { 2095 unsigned long req = kvmppc_get_gpr(vcpu, 3); 2096 2097 /* 2098 * The H_RPT_INVALIDATE hcalls issued by nested 2099 * guests for process-scoped invalidations when 2100 * GTSE=0, are handled here in L0. 2101 */ 2102 if (req == H_RPT_INVALIDATE) { 2103 r = kvmppc_nested_h_rpt_invalidate(vcpu); 2104 break; 2105 } 2106 2107 r = RESUME_HOST; 2108 break; 2109 } 2110 default: 2111 r = RESUME_HOST; 2112 break; 2113 } 2114 2115 return r; 2116 } 2117 2118 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 2119 struct kvm_sregs *sregs) 2120 { 2121 int i; 2122 2123 memset(sregs, 0, sizeof(struct kvm_sregs)); 2124 sregs->pvr = vcpu->arch.pvr; 2125 for (i = 0; i < vcpu->arch.slb_max; i++) { 2126 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 2127 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 2128 } 2129 2130 return 0; 2131 } 2132 2133 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 2134 struct kvm_sregs *sregs) 2135 { 2136 int i, j; 2137 2138 /* Only accept the same PVR as the host's, since we can't spoof it */ 2139 if (sregs->pvr != vcpu->arch.pvr) 2140 return -EINVAL; 2141 2142 j = 0; 2143 for (i = 0; i < vcpu->arch.slb_nr; i++) { 2144 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 2145 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 2146 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 2147 ++j; 2148 } 2149 } 2150 vcpu->arch.slb_max = j; 2151 2152 return 0; 2153 } 2154 2155 /* 2156 * Enforce limits on guest LPCR values based on hardware availability, 2157 * guest configuration, and possibly hypervisor support and security 2158 * concerns. 2159 */ 2160 unsigned long kvmppc_filter_lpcr_hv(struct kvm *kvm, unsigned long lpcr) 2161 { 2162 /* LPCR_TC only applies to HPT guests */ 2163 if (kvm_is_radix(kvm)) 2164 lpcr &= ~LPCR_TC; 2165 2166 /* On POWER8 and above, userspace can modify AIL */ 2167 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2168 lpcr &= ~LPCR_AIL; 2169 if ((lpcr & LPCR_AIL) != LPCR_AIL_3) 2170 lpcr &= ~LPCR_AIL; /* LPCR[AIL]=1/2 is disallowed */ 2171 /* 2172 * On some POWER9s we force AIL off for radix guests to prevent 2173 * executing in MSR[HV]=1 mode with the MMU enabled and PIDR set to 2174 * guest, which can result in Q0 translations with LPID=0 PID=PIDR to 2175 * be cached, which the host TLB management does not expect. 2176 */ 2177 if (kvm_is_radix(kvm) && cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) 2178 lpcr &= ~LPCR_AIL; 2179 2180 /* 2181 * On POWER9, allow userspace to enable large decrementer for the 2182 * guest, whether or not the host has it enabled. 2183 */ 2184 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 2185 lpcr &= ~LPCR_LD; 2186 2187 return lpcr; 2188 } 2189 2190 static void verify_lpcr(struct kvm *kvm, unsigned long lpcr) 2191 { 2192 if (lpcr != kvmppc_filter_lpcr_hv(kvm, lpcr)) { 2193 WARN_ONCE(1, "lpcr 0x%lx differs from filtered 0x%lx\n", 2194 lpcr, kvmppc_filter_lpcr_hv(kvm, lpcr)); 2195 } 2196 } 2197 2198 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 2199 bool preserve_top32) 2200 { 2201 struct kvm *kvm = vcpu->kvm; 2202 struct kvmppc_vcore *vc = vcpu->arch.vcore; 2203 u64 mask; 2204 2205 spin_lock(&vc->lock); 2206 2207 /* 2208 * Userspace can only modify 2209 * DPFD (default prefetch depth), ILE (interrupt little-endian), 2210 * TC (translation control), AIL (alternate interrupt location), 2211 * LD (large decrementer). 2212 * These are subject to restrictions from kvmppc_filter_lcpr_hv(). 2213 */ 2214 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC | LPCR_AIL | LPCR_LD; 2215 2216 /* Broken 32-bit version of LPCR must not clear top bits */ 2217 if (preserve_top32) 2218 mask &= 0xFFFFFFFF; 2219 2220 new_lpcr = kvmppc_filter_lpcr_hv(kvm, 2221 (vc->lpcr & ~mask) | (new_lpcr & mask)); 2222 2223 /* 2224 * If ILE (interrupt little-endian) has changed, update the 2225 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 2226 */ 2227 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 2228 struct kvm_vcpu *vcpu; 2229 unsigned long i; 2230 2231 kvm_for_each_vcpu(i, vcpu, kvm) { 2232 if (vcpu->arch.vcore != vc) 2233 continue; 2234 if (new_lpcr & LPCR_ILE) 2235 vcpu->arch.intr_msr |= MSR_LE; 2236 else 2237 vcpu->arch.intr_msr &= ~MSR_LE; 2238 } 2239 } 2240 2241 vc->lpcr = new_lpcr; 2242 kvmhv_nestedv2_mark_dirty(vcpu, KVMPPC_GSID_LPCR); 2243 2244 spin_unlock(&vc->lock); 2245 } 2246 2247 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 2248 union kvmppc_one_reg *val) 2249 { 2250 int r = 0; 2251 long int i; 2252 2253 switch (id) { 2254 case KVM_REG_PPC_DEBUG_INST: 2255 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 2256 break; 2257 case KVM_REG_PPC_HIOR: 2258 *val = get_reg_val(id, 0); 2259 break; 2260 case KVM_REG_PPC_DABR: 2261 *val = get_reg_val(id, vcpu->arch.dabr); 2262 break; 2263 case KVM_REG_PPC_DABRX: 2264 *val = get_reg_val(id, vcpu->arch.dabrx); 2265 break; 2266 case KVM_REG_PPC_DSCR: 2267 *val = get_reg_val(id, kvmppc_get_dscr_hv(vcpu)); 2268 break; 2269 case KVM_REG_PPC_PURR: 2270 *val = get_reg_val(id, kvmppc_get_purr_hv(vcpu)); 2271 break; 2272 case KVM_REG_PPC_SPURR: 2273 *val = get_reg_val(id, kvmppc_get_spurr_hv(vcpu)); 2274 break; 2275 case KVM_REG_PPC_AMR: 2276 *val = get_reg_val(id, kvmppc_get_amr_hv(vcpu)); 2277 break; 2278 case KVM_REG_PPC_UAMOR: 2279 *val = get_reg_val(id, kvmppc_get_uamor_hv(vcpu)); 2280 break; 2281 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2282 i = id - KVM_REG_PPC_MMCR0; 2283 *val = get_reg_val(id, kvmppc_get_mmcr_hv(vcpu, i)); 2284 break; 2285 case KVM_REG_PPC_MMCR2: 2286 *val = get_reg_val(id, kvmppc_get_mmcr_hv(vcpu, 2)); 2287 break; 2288 case KVM_REG_PPC_MMCRA: 2289 *val = get_reg_val(id, kvmppc_get_mmcra_hv(vcpu)); 2290 break; 2291 case KVM_REG_PPC_MMCRS: 2292 *val = get_reg_val(id, vcpu->arch.mmcrs); 2293 break; 2294 case KVM_REG_PPC_MMCR3: 2295 *val = get_reg_val(id, kvmppc_get_mmcr_hv(vcpu, 3)); 2296 break; 2297 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2298 i = id - KVM_REG_PPC_PMC1; 2299 *val = get_reg_val(id, kvmppc_get_pmc_hv(vcpu, i)); 2300 break; 2301 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2302 i = id - KVM_REG_PPC_SPMC1; 2303 *val = get_reg_val(id, vcpu->arch.spmc[i]); 2304 break; 2305 case KVM_REG_PPC_SIAR: 2306 *val = get_reg_val(id, kvmppc_get_siar_hv(vcpu)); 2307 break; 2308 case KVM_REG_PPC_SDAR: 2309 *val = get_reg_val(id, kvmppc_get_sdar_hv(vcpu)); 2310 break; 2311 case KVM_REG_PPC_SIER: 2312 *val = get_reg_val(id, kvmppc_get_sier_hv(vcpu, 0)); 2313 break; 2314 case KVM_REG_PPC_SIER2: 2315 *val = get_reg_val(id, kvmppc_get_sier_hv(vcpu, 1)); 2316 break; 2317 case KVM_REG_PPC_SIER3: 2318 *val = get_reg_val(id, kvmppc_get_sier_hv(vcpu, 2)); 2319 break; 2320 case KVM_REG_PPC_IAMR: 2321 *val = get_reg_val(id, kvmppc_get_iamr_hv(vcpu)); 2322 break; 2323 case KVM_REG_PPC_PSPB: 2324 *val = get_reg_val(id, kvmppc_get_pspb_hv(vcpu)); 2325 break; 2326 case KVM_REG_PPC_DPDES: 2327 /* 2328 * On POWER9, where we are emulating msgsndp etc., 2329 * we return 1 bit for each vcpu, which can come from 2330 * either vcore->dpdes or doorbell_request. 2331 * On POWER8, doorbell_request is 0. 2332 */ 2333 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2334 *val = get_reg_val(id, vcpu->arch.doorbell_request); 2335 else 2336 *val = get_reg_val(id, vcpu->arch.vcore->dpdes); 2337 break; 2338 case KVM_REG_PPC_VTB: 2339 *val = get_reg_val(id, kvmppc_get_vtb(vcpu)); 2340 break; 2341 case KVM_REG_PPC_DAWR: 2342 *val = get_reg_val(id, kvmppc_get_dawr0_hv(vcpu)); 2343 break; 2344 case KVM_REG_PPC_DAWRX: 2345 *val = get_reg_val(id, kvmppc_get_dawrx0_hv(vcpu)); 2346 break; 2347 case KVM_REG_PPC_DAWR1: 2348 *val = get_reg_val(id, kvmppc_get_dawr1_hv(vcpu)); 2349 break; 2350 case KVM_REG_PPC_DAWRX1: 2351 *val = get_reg_val(id, kvmppc_get_dawrx1_hv(vcpu)); 2352 break; 2353 case KVM_REG_PPC_DEXCR: 2354 *val = get_reg_val(id, kvmppc_get_dexcr_hv(vcpu)); 2355 break; 2356 case KVM_REG_PPC_HASHKEYR: 2357 *val = get_reg_val(id, kvmppc_get_hashkeyr_hv(vcpu)); 2358 break; 2359 case KVM_REG_PPC_HASHPKEYR: 2360 *val = get_reg_val(id, kvmppc_get_hashpkeyr_hv(vcpu)); 2361 break; 2362 case KVM_REG_PPC_CIABR: 2363 *val = get_reg_val(id, kvmppc_get_ciabr_hv(vcpu)); 2364 break; 2365 case KVM_REG_PPC_CSIGR: 2366 *val = get_reg_val(id, vcpu->arch.csigr); 2367 break; 2368 case KVM_REG_PPC_TACR: 2369 *val = get_reg_val(id, vcpu->arch.tacr); 2370 break; 2371 case KVM_REG_PPC_TCSCR: 2372 *val = get_reg_val(id, vcpu->arch.tcscr); 2373 break; 2374 case KVM_REG_PPC_PID: 2375 *val = get_reg_val(id, kvmppc_get_pid(vcpu)); 2376 break; 2377 case KVM_REG_PPC_ACOP: 2378 *val = get_reg_val(id, vcpu->arch.acop); 2379 break; 2380 case KVM_REG_PPC_WORT: 2381 *val = get_reg_val(id, kvmppc_get_wort_hv(vcpu)); 2382 break; 2383 case KVM_REG_PPC_TIDR: 2384 *val = get_reg_val(id, vcpu->arch.tid); 2385 break; 2386 case KVM_REG_PPC_PSSCR: 2387 *val = get_reg_val(id, vcpu->arch.psscr); 2388 break; 2389 case KVM_REG_PPC_VPA_ADDR: 2390 spin_lock(&vcpu->arch.vpa_update_lock); 2391 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 2392 spin_unlock(&vcpu->arch.vpa_update_lock); 2393 break; 2394 case KVM_REG_PPC_VPA_SLB: 2395 spin_lock(&vcpu->arch.vpa_update_lock); 2396 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 2397 val->vpaval.length = vcpu->arch.slb_shadow.len; 2398 spin_unlock(&vcpu->arch.vpa_update_lock); 2399 break; 2400 case KVM_REG_PPC_VPA_DTL: 2401 spin_lock(&vcpu->arch.vpa_update_lock); 2402 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 2403 val->vpaval.length = vcpu->arch.dtl.len; 2404 spin_unlock(&vcpu->arch.vpa_update_lock); 2405 break; 2406 case KVM_REG_PPC_TB_OFFSET: 2407 *val = get_reg_val(id, kvmppc_get_tb_offset(vcpu)); 2408 break; 2409 case KVM_REG_PPC_LPCR: 2410 case KVM_REG_PPC_LPCR_64: 2411 *val = get_reg_val(id, kvmppc_get_lpcr(vcpu)); 2412 break; 2413 case KVM_REG_PPC_PPR: 2414 *val = get_reg_val(id, kvmppc_get_ppr_hv(vcpu)); 2415 break; 2416 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2417 case KVM_REG_PPC_TFHAR: 2418 *val = get_reg_val(id, vcpu->arch.tfhar); 2419 break; 2420 case KVM_REG_PPC_TFIAR: 2421 *val = get_reg_val(id, vcpu->arch.tfiar); 2422 break; 2423 case KVM_REG_PPC_TEXASR: 2424 *val = get_reg_val(id, vcpu->arch.texasr); 2425 break; 2426 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2427 i = id - KVM_REG_PPC_TM_GPR0; 2428 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 2429 break; 2430 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2431 { 2432 int j; 2433 i = id - KVM_REG_PPC_TM_VSR0; 2434 if (i < 32) 2435 for (j = 0; j < TS_FPRWIDTH; j++) 2436 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 2437 else { 2438 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2439 val->vval = vcpu->arch.vr_tm.vr[i-32]; 2440 else 2441 r = -ENXIO; 2442 } 2443 break; 2444 } 2445 case KVM_REG_PPC_TM_CR: 2446 *val = get_reg_val(id, vcpu->arch.cr_tm); 2447 break; 2448 case KVM_REG_PPC_TM_XER: 2449 *val = get_reg_val(id, vcpu->arch.xer_tm); 2450 break; 2451 case KVM_REG_PPC_TM_LR: 2452 *val = get_reg_val(id, vcpu->arch.lr_tm); 2453 break; 2454 case KVM_REG_PPC_TM_CTR: 2455 *val = get_reg_val(id, vcpu->arch.ctr_tm); 2456 break; 2457 case KVM_REG_PPC_TM_FPSCR: 2458 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 2459 break; 2460 case KVM_REG_PPC_TM_AMR: 2461 *val = get_reg_val(id, vcpu->arch.amr_tm); 2462 break; 2463 case KVM_REG_PPC_TM_PPR: 2464 *val = get_reg_val(id, vcpu->arch.ppr_tm); 2465 break; 2466 case KVM_REG_PPC_TM_VRSAVE: 2467 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 2468 break; 2469 case KVM_REG_PPC_TM_VSCR: 2470 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2471 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 2472 else 2473 r = -ENXIO; 2474 break; 2475 case KVM_REG_PPC_TM_DSCR: 2476 *val = get_reg_val(id, vcpu->arch.dscr_tm); 2477 break; 2478 case KVM_REG_PPC_TM_TAR: 2479 *val = get_reg_val(id, vcpu->arch.tar_tm); 2480 break; 2481 #endif 2482 case KVM_REG_PPC_ARCH_COMPAT: 2483 *val = get_reg_val(id, kvmppc_get_arch_compat(vcpu)); 2484 break; 2485 case KVM_REG_PPC_DEC_EXPIRY: 2486 *val = get_reg_val(id, kvmppc_get_dec_expires(vcpu)); 2487 break; 2488 case KVM_REG_PPC_ONLINE: 2489 *val = get_reg_val(id, vcpu->arch.online); 2490 break; 2491 case KVM_REG_PPC_PTCR: 2492 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 2493 break; 2494 case KVM_REG_PPC_FSCR: 2495 *val = get_reg_val(id, kvmppc_get_fscr_hv(vcpu)); 2496 break; 2497 default: 2498 r = -EINVAL; 2499 break; 2500 } 2501 2502 return r; 2503 } 2504 2505 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 2506 union kvmppc_one_reg *val) 2507 { 2508 int r = 0; 2509 long int i; 2510 unsigned long addr, len; 2511 2512 switch (id) { 2513 case KVM_REG_PPC_HIOR: 2514 /* Only allow this to be set to zero */ 2515 if (set_reg_val(id, *val)) 2516 r = -EINVAL; 2517 break; 2518 case KVM_REG_PPC_DABR: 2519 vcpu->arch.dabr = set_reg_val(id, *val); 2520 break; 2521 case KVM_REG_PPC_DABRX: 2522 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 2523 break; 2524 case KVM_REG_PPC_DSCR: 2525 kvmppc_set_dscr_hv(vcpu, set_reg_val(id, *val)); 2526 break; 2527 case KVM_REG_PPC_PURR: 2528 kvmppc_set_purr_hv(vcpu, set_reg_val(id, *val)); 2529 break; 2530 case KVM_REG_PPC_SPURR: 2531 kvmppc_set_spurr_hv(vcpu, set_reg_val(id, *val)); 2532 break; 2533 case KVM_REG_PPC_AMR: 2534 kvmppc_set_amr_hv(vcpu, set_reg_val(id, *val)); 2535 break; 2536 case KVM_REG_PPC_UAMOR: 2537 kvmppc_set_uamor_hv(vcpu, set_reg_val(id, *val)); 2538 break; 2539 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2540 i = id - KVM_REG_PPC_MMCR0; 2541 kvmppc_set_mmcr_hv(vcpu, i, set_reg_val(id, *val)); 2542 break; 2543 case KVM_REG_PPC_MMCR2: 2544 kvmppc_set_mmcr_hv(vcpu, 2, set_reg_val(id, *val)); 2545 break; 2546 case KVM_REG_PPC_MMCRA: 2547 kvmppc_set_mmcra_hv(vcpu, set_reg_val(id, *val)); 2548 break; 2549 case KVM_REG_PPC_MMCRS: 2550 vcpu->arch.mmcrs = set_reg_val(id, *val); 2551 break; 2552 case KVM_REG_PPC_MMCR3: 2553 kvmppc_set_mmcr_hv(vcpu, 3, set_reg_val(id, *val)); 2554 break; 2555 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2556 i = id - KVM_REG_PPC_PMC1; 2557 kvmppc_set_pmc_hv(vcpu, i, set_reg_val(id, *val)); 2558 break; 2559 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2560 i = id - KVM_REG_PPC_SPMC1; 2561 vcpu->arch.spmc[i] = set_reg_val(id, *val); 2562 break; 2563 case KVM_REG_PPC_SIAR: 2564 kvmppc_set_siar_hv(vcpu, set_reg_val(id, *val)); 2565 break; 2566 case KVM_REG_PPC_SDAR: 2567 kvmppc_set_sdar_hv(vcpu, set_reg_val(id, *val)); 2568 break; 2569 case KVM_REG_PPC_SIER: 2570 kvmppc_set_sier_hv(vcpu, 0, set_reg_val(id, *val)); 2571 break; 2572 case KVM_REG_PPC_SIER2: 2573 kvmppc_set_sier_hv(vcpu, 1, set_reg_val(id, *val)); 2574 break; 2575 case KVM_REG_PPC_SIER3: 2576 kvmppc_set_sier_hv(vcpu, 2, set_reg_val(id, *val)); 2577 break; 2578 case KVM_REG_PPC_IAMR: 2579 kvmppc_set_iamr_hv(vcpu, set_reg_val(id, *val)); 2580 break; 2581 case KVM_REG_PPC_PSPB: 2582 kvmppc_set_pspb_hv(vcpu, set_reg_val(id, *val)); 2583 break; 2584 case KVM_REG_PPC_DPDES: 2585 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2586 vcpu->arch.doorbell_request = set_reg_val(id, *val) & 1; 2587 else 2588 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 2589 break; 2590 case KVM_REG_PPC_VTB: 2591 kvmppc_set_vtb(vcpu, set_reg_val(id, *val)); 2592 break; 2593 case KVM_REG_PPC_DAWR: 2594 kvmppc_set_dawr0_hv(vcpu, set_reg_val(id, *val)); 2595 break; 2596 case KVM_REG_PPC_DAWRX: 2597 kvmppc_set_dawrx0_hv(vcpu, set_reg_val(id, *val) & ~DAWRX_HYP); 2598 break; 2599 case KVM_REG_PPC_DAWR1: 2600 kvmppc_set_dawr1_hv(vcpu, set_reg_val(id, *val)); 2601 break; 2602 case KVM_REG_PPC_DAWRX1: 2603 kvmppc_set_dawrx1_hv(vcpu, set_reg_val(id, *val) & ~DAWRX_HYP); 2604 break; 2605 case KVM_REG_PPC_DEXCR: 2606 kvmppc_set_dexcr_hv(vcpu, set_reg_val(id, *val)); 2607 break; 2608 case KVM_REG_PPC_HASHKEYR: 2609 kvmppc_set_hashkeyr_hv(vcpu, set_reg_val(id, *val)); 2610 break; 2611 case KVM_REG_PPC_HASHPKEYR: 2612 kvmppc_set_hashpkeyr_hv(vcpu, set_reg_val(id, *val)); 2613 break; 2614 case KVM_REG_PPC_CIABR: 2615 kvmppc_set_ciabr_hv(vcpu, set_reg_val(id, *val)); 2616 /* Don't allow setting breakpoints in hypervisor code */ 2617 if ((kvmppc_get_ciabr_hv(vcpu) & CIABR_PRIV) == CIABR_PRIV_HYPER) 2618 kvmppc_set_ciabr_hv(vcpu, kvmppc_get_ciabr_hv(vcpu) & ~CIABR_PRIV); 2619 break; 2620 case KVM_REG_PPC_CSIGR: 2621 vcpu->arch.csigr = set_reg_val(id, *val); 2622 break; 2623 case KVM_REG_PPC_TACR: 2624 vcpu->arch.tacr = set_reg_val(id, *val); 2625 break; 2626 case KVM_REG_PPC_TCSCR: 2627 vcpu->arch.tcscr = set_reg_val(id, *val); 2628 break; 2629 case KVM_REG_PPC_PID: 2630 kvmppc_set_pid(vcpu, set_reg_val(id, *val)); 2631 break; 2632 case KVM_REG_PPC_ACOP: 2633 vcpu->arch.acop = set_reg_val(id, *val); 2634 break; 2635 case KVM_REG_PPC_WORT: 2636 kvmppc_set_wort_hv(vcpu, set_reg_val(id, *val)); 2637 break; 2638 case KVM_REG_PPC_TIDR: 2639 vcpu->arch.tid = set_reg_val(id, *val); 2640 break; 2641 case KVM_REG_PPC_PSSCR: 2642 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 2643 break; 2644 case KVM_REG_PPC_VPA_ADDR: 2645 addr = set_reg_val(id, *val); 2646 r = -EINVAL; 2647 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 2648 vcpu->arch.dtl.next_gpa)) 2649 break; 2650 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 2651 break; 2652 case KVM_REG_PPC_VPA_SLB: 2653 addr = val->vpaval.addr; 2654 len = val->vpaval.length; 2655 r = -EINVAL; 2656 if (addr && !vcpu->arch.vpa.next_gpa) 2657 break; 2658 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 2659 break; 2660 case KVM_REG_PPC_VPA_DTL: 2661 addr = val->vpaval.addr; 2662 len = val->vpaval.length; 2663 r = -EINVAL; 2664 if (addr && (len < sizeof(struct dtl_entry) || 2665 !vcpu->arch.vpa.next_gpa)) 2666 break; 2667 len -= len % sizeof(struct dtl_entry); 2668 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 2669 break; 2670 case KVM_REG_PPC_TB_OFFSET: 2671 { 2672 /* round up to multiple of 2^24 */ 2673 u64 tb_offset = ALIGN(set_reg_val(id, *val), 1UL << 24); 2674 2675 /* 2676 * Now that we know the timebase offset, update the 2677 * decrementer expiry with a guest timebase value. If 2678 * the userspace does not set DEC_EXPIRY, this ensures 2679 * a migrated vcpu at least starts with an expired 2680 * decrementer, which is better than a large one that 2681 * causes a hang. 2682 */ 2683 kvmppc_set_tb_offset(vcpu, tb_offset); 2684 if (!kvmppc_get_dec_expires(vcpu) && tb_offset) 2685 kvmppc_set_dec_expires(vcpu, get_tb() + tb_offset); 2686 2687 kvmppc_set_tb_offset(vcpu, tb_offset); 2688 break; 2689 } 2690 case KVM_REG_PPC_LPCR: 2691 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2692 break; 2693 case KVM_REG_PPC_LPCR_64: 2694 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2695 break; 2696 case KVM_REG_PPC_PPR: 2697 kvmppc_set_ppr_hv(vcpu, set_reg_val(id, *val)); 2698 break; 2699 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2700 case KVM_REG_PPC_TFHAR: 2701 vcpu->arch.tfhar = set_reg_val(id, *val); 2702 break; 2703 case KVM_REG_PPC_TFIAR: 2704 vcpu->arch.tfiar = set_reg_val(id, *val); 2705 break; 2706 case KVM_REG_PPC_TEXASR: 2707 vcpu->arch.texasr = set_reg_val(id, *val); 2708 break; 2709 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2710 i = id - KVM_REG_PPC_TM_GPR0; 2711 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2712 break; 2713 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2714 { 2715 int j; 2716 i = id - KVM_REG_PPC_TM_VSR0; 2717 if (i < 32) 2718 for (j = 0; j < TS_FPRWIDTH; j++) 2719 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2720 else 2721 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2722 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2723 else 2724 r = -ENXIO; 2725 break; 2726 } 2727 case KVM_REG_PPC_TM_CR: 2728 vcpu->arch.cr_tm = set_reg_val(id, *val); 2729 break; 2730 case KVM_REG_PPC_TM_XER: 2731 vcpu->arch.xer_tm = set_reg_val(id, *val); 2732 break; 2733 case KVM_REG_PPC_TM_LR: 2734 vcpu->arch.lr_tm = set_reg_val(id, *val); 2735 break; 2736 case KVM_REG_PPC_TM_CTR: 2737 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2738 break; 2739 case KVM_REG_PPC_TM_FPSCR: 2740 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2741 break; 2742 case KVM_REG_PPC_TM_AMR: 2743 vcpu->arch.amr_tm = set_reg_val(id, *val); 2744 break; 2745 case KVM_REG_PPC_TM_PPR: 2746 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2747 break; 2748 case KVM_REG_PPC_TM_VRSAVE: 2749 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2750 break; 2751 case KVM_REG_PPC_TM_VSCR: 2752 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2753 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2754 else 2755 r = - ENXIO; 2756 break; 2757 case KVM_REG_PPC_TM_DSCR: 2758 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2759 break; 2760 case KVM_REG_PPC_TM_TAR: 2761 vcpu->arch.tar_tm = set_reg_val(id, *val); 2762 break; 2763 #endif 2764 case KVM_REG_PPC_ARCH_COMPAT: 2765 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2766 break; 2767 case KVM_REG_PPC_DEC_EXPIRY: 2768 kvmppc_set_dec_expires(vcpu, set_reg_val(id, *val)); 2769 break; 2770 case KVM_REG_PPC_ONLINE: 2771 i = set_reg_val(id, *val); 2772 if (i && !vcpu->arch.online) 2773 atomic_inc(&vcpu->arch.vcore->online_count); 2774 else if (!i && vcpu->arch.online) 2775 atomic_dec(&vcpu->arch.vcore->online_count); 2776 vcpu->arch.online = i; 2777 break; 2778 case KVM_REG_PPC_PTCR: 2779 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2780 break; 2781 case KVM_REG_PPC_FSCR: 2782 kvmppc_set_fscr_hv(vcpu, set_reg_val(id, *val)); 2783 break; 2784 default: 2785 r = -EINVAL; 2786 break; 2787 } 2788 2789 return r; 2790 } 2791 2792 /* 2793 * On POWER9, threads are independent and can be in different partitions. 2794 * Therefore we consider each thread to be a subcore. 2795 * There is a restriction that all threads have to be in the same 2796 * MMU mode (radix or HPT), unfortunately, but since we only support 2797 * HPT guests on a HPT host so far, that isn't an impediment yet. 2798 */ 2799 static int threads_per_vcore(struct kvm *kvm) 2800 { 2801 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2802 return 1; 2803 return threads_per_subcore; 2804 } 2805 2806 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2807 { 2808 struct kvmppc_vcore *vcore; 2809 2810 vcore = kzalloc_obj(struct kvmppc_vcore); 2811 2812 if (vcore == NULL) 2813 return NULL; 2814 2815 spin_lock_init(&vcore->lock); 2816 spin_lock_init(&vcore->stoltb_lock); 2817 rcuwait_init(&vcore->wait); 2818 vcore->preempt_tb = TB_NIL; 2819 vcore->lpcr = kvm->arch.lpcr; 2820 vcore->first_vcpuid = id; 2821 vcore->kvm = kvm; 2822 INIT_LIST_HEAD(&vcore->preempt_list); 2823 2824 return vcore; 2825 } 2826 2827 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2828 static struct debugfs_timings_element { 2829 const char *name; 2830 size_t offset; 2831 } timings[] = { 2832 #ifdef CONFIG_KVM_BOOK3S_HV_P9_TIMING 2833 {"vcpu_entry", offsetof(struct kvm_vcpu, arch.vcpu_entry)}, 2834 {"guest_entry", offsetof(struct kvm_vcpu, arch.guest_entry)}, 2835 {"in_guest", offsetof(struct kvm_vcpu, arch.in_guest)}, 2836 {"guest_exit", offsetof(struct kvm_vcpu, arch.guest_exit)}, 2837 {"vcpu_exit", offsetof(struct kvm_vcpu, arch.vcpu_exit)}, 2838 {"hypercall", offsetof(struct kvm_vcpu, arch.hcall)}, 2839 {"page_fault", offsetof(struct kvm_vcpu, arch.pg_fault)}, 2840 #else 2841 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2842 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2843 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2844 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2845 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2846 #endif 2847 }; 2848 2849 #define N_TIMINGS (ARRAY_SIZE(timings)) 2850 2851 struct debugfs_timings_state { 2852 struct kvm_vcpu *vcpu; 2853 unsigned int buflen; 2854 char buf[N_TIMINGS * 100]; 2855 }; 2856 2857 static int debugfs_timings_open(struct inode *inode, struct file *file) 2858 { 2859 struct kvm_vcpu *vcpu = inode->i_private; 2860 struct debugfs_timings_state *p; 2861 2862 p = kzalloc_obj(*p); 2863 if (!p) 2864 return -ENOMEM; 2865 2866 kvm_get_kvm(vcpu->kvm); 2867 p->vcpu = vcpu; 2868 file->private_data = p; 2869 2870 return nonseekable_open(inode, file); 2871 } 2872 2873 static int debugfs_timings_release(struct inode *inode, struct file *file) 2874 { 2875 struct debugfs_timings_state *p = file->private_data; 2876 2877 kvm_put_kvm(p->vcpu->kvm); 2878 kfree(p); 2879 return 0; 2880 } 2881 2882 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2883 size_t len, loff_t *ppos) 2884 { 2885 struct debugfs_timings_state *p = file->private_data; 2886 struct kvm_vcpu *vcpu = p->vcpu; 2887 char *s, *buf_end; 2888 struct kvmhv_tb_accumulator tb; 2889 u64 count; 2890 loff_t pos; 2891 ssize_t n; 2892 int i, loops; 2893 bool ok; 2894 2895 if (!p->buflen) { 2896 s = p->buf; 2897 buf_end = s + sizeof(p->buf); 2898 for (i = 0; i < N_TIMINGS; ++i) { 2899 struct kvmhv_tb_accumulator *acc; 2900 2901 acc = (struct kvmhv_tb_accumulator *) 2902 ((unsigned long)vcpu + timings[i].offset); 2903 ok = false; 2904 for (loops = 0; loops < 1000; ++loops) { 2905 count = acc->seqcount; 2906 if (!(count & 1)) { 2907 smp_rmb(); 2908 tb = *acc; 2909 smp_rmb(); 2910 if (count == acc->seqcount) { 2911 ok = true; 2912 break; 2913 } 2914 } 2915 udelay(1); 2916 } 2917 if (!ok) 2918 snprintf(s, buf_end - s, "%s: stuck\n", 2919 timings[i].name); 2920 else 2921 snprintf(s, buf_end - s, 2922 "%s: %llu %llu %llu %llu\n", 2923 timings[i].name, count / 2, 2924 tb_to_ns(tb.tb_total), 2925 tb_to_ns(tb.tb_min), 2926 tb_to_ns(tb.tb_max)); 2927 s += strlen(s); 2928 } 2929 p->buflen = s - p->buf; 2930 } 2931 2932 pos = *ppos; 2933 if (pos >= p->buflen) 2934 return 0; 2935 if (len > p->buflen - pos) 2936 len = p->buflen - pos; 2937 n = copy_to_user(buf, p->buf + pos, len); 2938 if (n) { 2939 if (n == len) 2940 return -EFAULT; 2941 len -= n; 2942 } 2943 *ppos = pos + len; 2944 return len; 2945 } 2946 2947 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2948 size_t len, loff_t *ppos) 2949 { 2950 return -EACCES; 2951 } 2952 2953 static const struct file_operations debugfs_timings_ops = { 2954 .owner = THIS_MODULE, 2955 .open = debugfs_timings_open, 2956 .release = debugfs_timings_release, 2957 .read = debugfs_timings_read, 2958 .write = debugfs_timings_write, 2959 .llseek = generic_file_llseek, 2960 }; 2961 2962 /* Create a debugfs directory for the vcpu */ 2963 static int kvmppc_arch_create_vcpu_debugfs_hv(struct kvm_vcpu *vcpu, struct dentry *debugfs_dentry) 2964 { 2965 if (cpu_has_feature(CPU_FTR_ARCH_300) == IS_ENABLED(CONFIG_KVM_BOOK3S_HV_P9_TIMING)) 2966 debugfs_create_file("timings", 0444, debugfs_dentry, vcpu, 2967 &debugfs_timings_ops); 2968 return 0; 2969 } 2970 2971 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2972 static int kvmppc_arch_create_vcpu_debugfs_hv(struct kvm_vcpu *vcpu, struct dentry *debugfs_dentry) 2973 { 2974 return 0; 2975 } 2976 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2977 2978 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2979 { 2980 int err; 2981 int core; 2982 struct kvmppc_vcore *vcore; 2983 struct kvm *kvm; 2984 unsigned int id; 2985 2986 kvm = vcpu->kvm; 2987 id = vcpu->vcpu_id; 2988 2989 vcpu->arch.shared = &vcpu->arch.shregs; 2990 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2991 /* 2992 * The shared struct is never shared on HV, 2993 * so we can always use host endianness 2994 */ 2995 #ifdef __BIG_ENDIAN__ 2996 vcpu->arch.shared_big_endian = true; 2997 #else 2998 vcpu->arch.shared_big_endian = false; 2999 #endif 3000 #endif 3001 3002 if (kvmhv_is_nestedv2()) { 3003 err = kvmhv_nestedv2_vcpu_create(vcpu, &vcpu->arch.nestedv2_io); 3004 if (err < 0) 3005 return err; 3006 } 3007 3008 kvmppc_set_mmcr_hv(vcpu, 0, MMCR0_FC); 3009 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 3010 kvmppc_set_mmcr_hv(vcpu, 0, kvmppc_get_mmcr_hv(vcpu, 0) | MMCR0_PMCCEXT); 3011 kvmppc_set_mmcra_hv(vcpu, MMCRA_BHRB_DISABLE); 3012 } 3013 3014 kvmppc_set_ctrl_hv(vcpu, CTRL_RUNLATCH); 3015 /* default to host PVR, since we can't spoof it */ 3016 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 3017 spin_lock_init(&vcpu->arch.vpa_update_lock); 3018 spin_lock_init(&vcpu->arch.tbacct_lock); 3019 vcpu->arch.busy_preempt = TB_NIL; 3020 __kvmppc_set_msr_hv(vcpu, MSR_ME); 3021 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 3022 3023 /* 3024 * Set the default HFSCR for the guest from the host value. 3025 * This value is only used on POWER9 and later. 3026 * On >= POWER9, we want to virtualize the doorbell facility, so we 3027 * don't set the HFSCR_MSGP bit, and that causes those instructions 3028 * to trap and then we emulate them. 3029 */ 3030 kvmppc_set_hfscr_hv(vcpu, HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 3031 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP); 3032 3033 /* On POWER10 and later, allow prefixed instructions */ 3034 if (cpu_has_feature(CPU_FTR_ARCH_31)) 3035 kvmppc_set_hfscr_hv(vcpu, kvmppc_get_hfscr_hv(vcpu) | HFSCR_PREFIX); 3036 3037 if (cpu_has_feature(CPU_FTR_HVMODE)) { 3038 kvmppc_set_hfscr_hv(vcpu, kvmppc_get_hfscr_hv(vcpu) & mfspr(SPRN_HFSCR)); 3039 3040 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 3041 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3042 kvmppc_set_hfscr_hv(vcpu, kvmppc_get_hfscr_hv(vcpu) | HFSCR_TM); 3043 #endif 3044 } 3045 if (cpu_has_feature(CPU_FTR_TM_COMP)) 3046 vcpu->arch.hfscr |= HFSCR_TM; 3047 3048 vcpu->arch.hfscr_permitted = kvmppc_get_hfscr_hv(vcpu); 3049 3050 /* 3051 * PM, EBB, TM are demand-faulted so start with it clear. 3052 */ 3053 kvmppc_set_hfscr_hv(vcpu, kvmppc_get_hfscr_hv(vcpu) & ~(HFSCR_PM | HFSCR_EBB | HFSCR_TM)); 3054 3055 kvmppc_mmu_book3s_hv_init(vcpu); 3056 3057 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 3058 3059 init_waitqueue_head(&vcpu->arch.cpu_run); 3060 3061 vcore = NULL; 3062 err = -EINVAL; 3063 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 3064 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 3065 pr_devel("KVM: VCPU ID too high\n"); 3066 core = KVM_MAX_VCORES; 3067 } else { 3068 BUG_ON(kvm->arch.smt_mode != 1); 3069 core = kvmppc_pack_vcpu_id(kvm, id); 3070 } 3071 } else { 3072 core = id / kvm->arch.smt_mode; 3073 } 3074 if (core < KVM_MAX_VCORES) { 3075 vcore = kvm->arch.vcores[core]; 3076 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 3077 pr_devel("KVM: collision on id %u", id); 3078 vcore = NULL; 3079 } else if (!vcore) { 3080 /* 3081 * Take mmu_setup_lock for mutual exclusion 3082 * with kvmppc_update_lpcr(). 3083 */ 3084 err = -ENOMEM; 3085 vcore = kvmppc_vcore_create(kvm, 3086 id & ~(kvm->arch.smt_mode - 1)); 3087 mutex_lock(&kvm->arch.mmu_setup_lock); 3088 kvm->arch.vcores[core] = vcore; 3089 kvm->arch.online_vcores++; 3090 mutex_unlock(&kvm->arch.mmu_setup_lock); 3091 } 3092 } 3093 3094 if (!vcore) 3095 return err; 3096 3097 spin_lock(&vcore->lock); 3098 ++vcore->num_threads; 3099 spin_unlock(&vcore->lock); 3100 vcpu->arch.vcore = vcore; 3101 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 3102 vcpu->arch.thread_cpu = -1; 3103 vcpu->arch.prev_cpu = -1; 3104 3105 vcpu->arch.cpu_type = KVM_CPU_3S_64; 3106 kvmppc_sanity_check(vcpu); 3107 3108 return 0; 3109 } 3110 3111 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 3112 unsigned long flags) 3113 { 3114 int err; 3115 int esmt = 0; 3116 3117 if (flags) 3118 return -EINVAL; 3119 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 3120 return -EINVAL; 3121 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 3122 /* 3123 * On POWER8 (or POWER7), the threading mode is "strict", 3124 * so we pack smt_mode vcpus per vcore. 3125 */ 3126 if (smt_mode > threads_per_subcore) 3127 return -EINVAL; 3128 } else { 3129 /* 3130 * On POWER9, the threading mode is "loose", 3131 * so each vcpu gets its own vcore. 3132 */ 3133 esmt = smt_mode; 3134 smt_mode = 1; 3135 } 3136 mutex_lock(&kvm->lock); 3137 err = -EBUSY; 3138 if (!kvm->arch.online_vcores) { 3139 kvm->arch.smt_mode = smt_mode; 3140 kvm->arch.emul_smt_mode = esmt; 3141 err = 0; 3142 } 3143 mutex_unlock(&kvm->lock); 3144 3145 return err; 3146 } 3147 3148 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 3149 { 3150 if (vpa->pinned_addr) 3151 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 3152 vpa->dirty); 3153 } 3154 3155 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 3156 { 3157 spin_lock(&vcpu->arch.vpa_update_lock); 3158 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 3159 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 3160 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 3161 spin_unlock(&vcpu->arch.vpa_update_lock); 3162 if (kvmhv_is_nestedv2()) 3163 kvmhv_nestedv2_vcpu_free(vcpu, &vcpu->arch.nestedv2_io); 3164 } 3165 3166 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 3167 { 3168 /* Indicate we want to get back into the guest */ 3169 return 1; 3170 } 3171 3172 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 3173 { 3174 unsigned long dec_nsec, now; 3175 3176 now = get_tb(); 3177 if (now > kvmppc_dec_expires_host_tb(vcpu)) { 3178 /* decrementer has already gone negative */ 3179 kvmppc_core_queue_dec(vcpu); 3180 kvmppc_core_prepare_to_enter(vcpu); 3181 return; 3182 } 3183 dec_nsec = tb_to_ns(kvmppc_dec_expires_host_tb(vcpu) - now); 3184 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 3185 vcpu->arch.timer_running = 1; 3186 } 3187 3188 extern int __kvmppc_vcore_entry(void); 3189 3190 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 3191 struct kvm_vcpu *vcpu, u64 tb) 3192 { 3193 u64 now; 3194 3195 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 3196 return; 3197 spin_lock_irq(&vcpu->arch.tbacct_lock); 3198 now = tb; 3199 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 3200 vcpu->arch.stolen_logged; 3201 vcpu->arch.busy_preempt = now; 3202 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 3203 spin_unlock_irq(&vcpu->arch.tbacct_lock); 3204 --vc->n_runnable; 3205 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 3206 } 3207 3208 static int kvmppc_grab_hwthread(int cpu) 3209 { 3210 struct paca_struct *tpaca; 3211 long timeout = 10000; 3212 3213 tpaca = paca_ptrs[cpu]; 3214 3215 /* Ensure the thread won't go into the kernel if it wakes */ 3216 tpaca->kvm_hstate.kvm_vcpu = NULL; 3217 tpaca->kvm_hstate.kvm_vcore = NULL; 3218 tpaca->kvm_hstate.napping = 0; 3219 smp_wmb(); 3220 tpaca->kvm_hstate.hwthread_req = 1; 3221 3222 /* 3223 * If the thread is already executing in the kernel (e.g. handling 3224 * a stray interrupt), wait for it to get back to nap mode. 3225 * The smp_mb() is to ensure that our setting of hwthread_req 3226 * is visible before we look at hwthread_state, so if this 3227 * races with the code at system_reset_pSeries and the thread 3228 * misses our setting of hwthread_req, we are sure to see its 3229 * setting of hwthread_state, and vice versa. 3230 */ 3231 smp_mb(); 3232 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 3233 if (--timeout <= 0) { 3234 pr_err("KVM: couldn't grab cpu %d\n", cpu); 3235 return -EBUSY; 3236 } 3237 udelay(1); 3238 } 3239 return 0; 3240 } 3241 3242 static void kvmppc_release_hwthread(int cpu) 3243 { 3244 struct paca_struct *tpaca; 3245 3246 tpaca = paca_ptrs[cpu]; 3247 tpaca->kvm_hstate.hwthread_req = 0; 3248 tpaca->kvm_hstate.kvm_vcpu = NULL; 3249 tpaca->kvm_hstate.kvm_vcore = NULL; 3250 tpaca->kvm_hstate.kvm_split_mode = NULL; 3251 } 3252 3253 static DEFINE_PER_CPU(struct kvm *, cpu_in_guest); 3254 3255 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 3256 { 3257 struct kvm_nested_guest *nested = vcpu->arch.nested; 3258 cpumask_t *need_tlb_flush; 3259 int i; 3260 3261 if (nested) 3262 need_tlb_flush = &nested->need_tlb_flush; 3263 else 3264 need_tlb_flush = &kvm->arch.need_tlb_flush; 3265 3266 cpu = cpu_first_tlb_thread_sibling(cpu); 3267 for (i = cpu; i <= cpu_last_tlb_thread_sibling(cpu); 3268 i += cpu_tlb_thread_sibling_step()) 3269 cpumask_set_cpu(i, need_tlb_flush); 3270 3271 /* 3272 * Make sure setting of bit in need_tlb_flush precedes testing of 3273 * cpu_in_guest. The matching barrier on the other side is hwsync 3274 * when switching to guest MMU mode, which happens between 3275 * cpu_in_guest being set to the guest kvm, and need_tlb_flush bit 3276 * being tested. 3277 */ 3278 smp_mb(); 3279 3280 for (i = cpu; i <= cpu_last_tlb_thread_sibling(cpu); 3281 i += cpu_tlb_thread_sibling_step()) { 3282 struct kvm *running = *per_cpu_ptr(&cpu_in_guest, i); 3283 3284 if (running == kvm) 3285 smp_call_function_single(i, do_nothing, NULL, 1); 3286 } 3287 } 3288 3289 static void do_migrate_away_vcpu(void *arg) 3290 { 3291 struct kvm_vcpu *vcpu = arg; 3292 struct kvm *kvm = vcpu->kvm; 3293 3294 /* 3295 * If the guest has GTSE, it may execute tlbie, so do a eieio; tlbsync; 3296 * ptesync sequence on the old CPU before migrating to a new one, in 3297 * case we interrupted the guest between a tlbie ; eieio ; 3298 * tlbsync; ptesync sequence. 3299 * 3300 * Otherwise, ptesync is sufficient for ordering tlbiel sequences. 3301 */ 3302 if (kvm->arch.lpcr & LPCR_GTSE) 3303 asm volatile("eieio; tlbsync; ptesync"); 3304 else 3305 asm volatile("ptesync"); 3306 } 3307 3308 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 3309 { 3310 struct kvm_nested_guest *nested = vcpu->arch.nested; 3311 struct kvm *kvm = vcpu->kvm; 3312 int prev_cpu; 3313 3314 if (!cpu_has_feature(CPU_FTR_HVMODE)) 3315 return; 3316 3317 if (nested) 3318 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 3319 else 3320 prev_cpu = vcpu->arch.prev_cpu; 3321 3322 /* 3323 * With radix, the guest can do TLB invalidations itself, 3324 * and it could choose to use the local form (tlbiel) if 3325 * it is invalidating a translation that has only ever been 3326 * used on one vcpu. However, that doesn't mean it has 3327 * only ever been used on one physical cpu, since vcpus 3328 * can move around between pcpus. To cope with this, when 3329 * a vcpu moves from one pcpu to another, we need to tell 3330 * any vcpus running on the same core as this vcpu previously 3331 * ran to flush the TLB. 3332 */ 3333 if (prev_cpu != pcpu) { 3334 if (prev_cpu >= 0) { 3335 if (cpu_first_tlb_thread_sibling(prev_cpu) != 3336 cpu_first_tlb_thread_sibling(pcpu)) 3337 radix_flush_cpu(kvm, prev_cpu, vcpu); 3338 3339 smp_call_function_single(prev_cpu, 3340 do_migrate_away_vcpu, vcpu, 1); 3341 } 3342 if (nested) 3343 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 3344 else 3345 vcpu->arch.prev_cpu = pcpu; 3346 } 3347 } 3348 3349 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 3350 { 3351 int cpu; 3352 struct paca_struct *tpaca; 3353 3354 cpu = vc->pcpu; 3355 if (vcpu) { 3356 if (vcpu->arch.timer_running) { 3357 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 3358 vcpu->arch.timer_running = 0; 3359 } 3360 cpu += vcpu->arch.ptid; 3361 vcpu->cpu = vc->pcpu; 3362 vcpu->arch.thread_cpu = cpu; 3363 } 3364 tpaca = paca_ptrs[cpu]; 3365 tpaca->kvm_hstate.kvm_vcpu = vcpu; 3366 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 3367 tpaca->kvm_hstate.fake_suspend = 0; 3368 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 3369 smp_wmb(); 3370 tpaca->kvm_hstate.kvm_vcore = vc; 3371 if (cpu != smp_processor_id()) 3372 kvmppc_ipi_thread(cpu); 3373 } 3374 3375 static void kvmppc_wait_for_nap(int n_threads) 3376 { 3377 int cpu = smp_processor_id(); 3378 int i, loops; 3379 3380 if (n_threads <= 1) 3381 return; 3382 for (loops = 0; loops < 1000000; ++loops) { 3383 /* 3384 * Check if all threads are finished. 3385 * We set the vcore pointer when starting a thread 3386 * and the thread clears it when finished, so we look 3387 * for any threads that still have a non-NULL vcore ptr. 3388 */ 3389 for (i = 1; i < n_threads; ++i) 3390 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3391 break; 3392 if (i == n_threads) { 3393 HMT_medium(); 3394 return; 3395 } 3396 HMT_low(); 3397 } 3398 HMT_medium(); 3399 for (i = 1; i < n_threads; ++i) 3400 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3401 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 3402 } 3403 3404 /* 3405 * Check that we are on thread 0 and that any other threads in 3406 * this core are off-line. Then grab the threads so they can't 3407 * enter the kernel. 3408 */ 3409 static int on_primary_thread(void) 3410 { 3411 int cpu = smp_processor_id(); 3412 int thr; 3413 3414 /* Are we on a primary subcore? */ 3415 if (cpu_thread_in_subcore(cpu)) 3416 return 0; 3417 3418 thr = 0; 3419 while (++thr < threads_per_subcore) 3420 if (cpu_online(cpu + thr)) 3421 return 0; 3422 3423 /* Grab all hw threads so they can't go into the kernel */ 3424 for (thr = 1; thr < threads_per_subcore; ++thr) { 3425 if (kvmppc_grab_hwthread(cpu + thr)) { 3426 /* Couldn't grab one; let the others go */ 3427 do { 3428 kvmppc_release_hwthread(cpu + thr); 3429 } while (--thr > 0); 3430 return 0; 3431 } 3432 } 3433 return 1; 3434 } 3435 3436 /* 3437 * A list of virtual cores for each physical CPU. 3438 * These are vcores that could run but their runner VCPU tasks are 3439 * (or may be) preempted. 3440 */ 3441 struct preempted_vcore_list { 3442 struct list_head list; 3443 spinlock_t lock; 3444 }; 3445 3446 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 3447 3448 static void init_vcore_lists(void) 3449 { 3450 int cpu; 3451 3452 for_each_possible_cpu(cpu) { 3453 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 3454 spin_lock_init(&lp->lock); 3455 INIT_LIST_HEAD(&lp->list); 3456 } 3457 } 3458 3459 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 3460 { 3461 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3462 3463 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 3464 3465 vc->vcore_state = VCORE_PREEMPT; 3466 vc->pcpu = smp_processor_id(); 3467 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 3468 spin_lock(&lp->lock); 3469 list_add_tail(&vc->preempt_list, &lp->list); 3470 spin_unlock(&lp->lock); 3471 } 3472 3473 /* Start accumulating stolen time */ 3474 kvmppc_core_start_stolen(vc, mftb()); 3475 } 3476 3477 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 3478 { 3479 struct preempted_vcore_list *lp; 3480 3481 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 3482 3483 kvmppc_core_end_stolen(vc, mftb()); 3484 if (!list_empty(&vc->preempt_list)) { 3485 lp = &per_cpu(preempted_vcores, vc->pcpu); 3486 spin_lock(&lp->lock); 3487 list_del_init(&vc->preempt_list); 3488 spin_unlock(&lp->lock); 3489 } 3490 vc->vcore_state = VCORE_INACTIVE; 3491 } 3492 3493 /* 3494 * This stores information about the virtual cores currently 3495 * assigned to a physical core. 3496 */ 3497 struct core_info { 3498 int n_subcores; 3499 int max_subcore_threads; 3500 int total_threads; 3501 int subcore_threads[MAX_SUBCORES]; 3502 struct kvmppc_vcore *vc[MAX_SUBCORES]; 3503 }; 3504 3505 /* 3506 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 3507 * respectively in 2-way micro-threading (split-core) mode on POWER8. 3508 */ 3509 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 3510 3511 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 3512 { 3513 memset(cip, 0, sizeof(*cip)); 3514 cip->n_subcores = 1; 3515 cip->max_subcore_threads = vc->num_threads; 3516 cip->total_threads = vc->num_threads; 3517 cip->subcore_threads[0] = vc->num_threads; 3518 cip->vc[0] = vc; 3519 } 3520 3521 static bool subcore_config_ok(int n_subcores, int n_threads) 3522 { 3523 /* 3524 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 3525 * split-core mode, with one thread per subcore. 3526 */ 3527 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3528 return n_subcores <= 4 && n_threads == 1; 3529 3530 /* On POWER8, can only dynamically split if unsplit to begin with */ 3531 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 3532 return false; 3533 if (n_subcores > MAX_SUBCORES) 3534 return false; 3535 if (n_subcores > 1) { 3536 if (!(dynamic_mt_modes & 2)) 3537 n_subcores = 4; 3538 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 3539 return false; 3540 } 3541 3542 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 3543 } 3544 3545 static void init_vcore_to_run(struct kvmppc_vcore *vc) 3546 { 3547 vc->entry_exit_map = 0; 3548 vc->in_guest = 0; 3549 vc->napping_threads = 0; 3550 vc->conferring_threads = 0; 3551 vc->tb_offset_applied = 0; 3552 } 3553 3554 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 3555 { 3556 int n_threads = vc->num_threads; 3557 int sub; 3558 3559 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 3560 return false; 3561 3562 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 3563 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 3564 return false; 3565 3566 if (n_threads < cip->max_subcore_threads) 3567 n_threads = cip->max_subcore_threads; 3568 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 3569 return false; 3570 cip->max_subcore_threads = n_threads; 3571 3572 sub = cip->n_subcores; 3573 ++cip->n_subcores; 3574 cip->total_threads += vc->num_threads; 3575 cip->subcore_threads[sub] = vc->num_threads; 3576 cip->vc[sub] = vc; 3577 init_vcore_to_run(vc); 3578 list_del_init(&vc->preempt_list); 3579 3580 return true; 3581 } 3582 3583 /* 3584 * Work out whether it is possible to piggyback the execution of 3585 * vcore *pvc onto the execution of the other vcores described in *cip. 3586 */ 3587 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 3588 int target_threads) 3589 { 3590 if (cip->total_threads + pvc->num_threads > target_threads) 3591 return false; 3592 3593 return can_dynamic_split(pvc, cip); 3594 } 3595 3596 static void prepare_threads(struct kvmppc_vcore *vc) 3597 { 3598 int i; 3599 struct kvm_vcpu *vcpu; 3600 3601 for_each_runnable_thread(i, vcpu, vc) { 3602 if (signal_pending(vcpu->arch.run_task)) 3603 vcpu->arch.ret = -EINTR; 3604 else if (vcpu->arch.vpa.update_pending || 3605 vcpu->arch.slb_shadow.update_pending || 3606 vcpu->arch.dtl.update_pending) 3607 vcpu->arch.ret = RESUME_GUEST; 3608 else 3609 continue; 3610 kvmppc_remove_runnable(vc, vcpu, mftb()); 3611 wake_up(&vcpu->arch.cpu_run); 3612 } 3613 } 3614 3615 static void collect_piggybacks(struct core_info *cip, int target_threads) 3616 { 3617 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3618 struct kvmppc_vcore *pvc, *vcnext; 3619 3620 spin_lock(&lp->lock); 3621 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 3622 if (!spin_trylock(&pvc->lock)) 3623 continue; 3624 prepare_threads(pvc); 3625 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 3626 list_del_init(&pvc->preempt_list); 3627 if (pvc->runner == NULL) { 3628 pvc->vcore_state = VCORE_INACTIVE; 3629 kvmppc_core_end_stolen(pvc, mftb()); 3630 } 3631 spin_unlock(&pvc->lock); 3632 continue; 3633 } 3634 if (!can_piggyback(pvc, cip, target_threads)) { 3635 spin_unlock(&pvc->lock); 3636 continue; 3637 } 3638 kvmppc_core_end_stolen(pvc, mftb()); 3639 pvc->vcore_state = VCORE_PIGGYBACK; 3640 if (cip->total_threads >= target_threads) 3641 break; 3642 } 3643 spin_unlock(&lp->lock); 3644 } 3645 3646 static bool recheck_signals_and_mmu(struct core_info *cip) 3647 { 3648 int sub, i; 3649 struct kvm_vcpu *vcpu; 3650 struct kvmppc_vcore *vc; 3651 3652 for (sub = 0; sub < cip->n_subcores; ++sub) { 3653 vc = cip->vc[sub]; 3654 if (!vc->kvm->arch.mmu_ready) 3655 return true; 3656 for_each_runnable_thread(i, vcpu, vc) 3657 if (signal_pending(vcpu->arch.run_task)) 3658 return true; 3659 } 3660 return false; 3661 } 3662 3663 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 3664 { 3665 int still_running = 0, i; 3666 u64 now; 3667 long ret; 3668 struct kvm_vcpu *vcpu; 3669 3670 spin_lock(&vc->lock); 3671 now = get_tb(); 3672 for_each_runnable_thread(i, vcpu, vc) { 3673 /* 3674 * It's safe to unlock the vcore in the loop here, because 3675 * for_each_runnable_thread() is safe against removal of 3676 * the vcpu, and the vcore state is VCORE_EXITING here, 3677 * so any vcpus becoming runnable will have their arch.trap 3678 * set to zero and can't actually run in the guest. 3679 */ 3680 spin_unlock(&vc->lock); 3681 /* cancel pending dec exception if dec is positive */ 3682 if (now < kvmppc_dec_expires_host_tb(vcpu) && 3683 kvmppc_core_pending_dec(vcpu)) 3684 kvmppc_core_dequeue_dec(vcpu); 3685 3686 trace_kvm_guest_exit(vcpu); 3687 3688 ret = RESUME_GUEST; 3689 if (vcpu->arch.trap) 3690 ret = kvmppc_handle_exit_hv(vcpu, 3691 vcpu->arch.run_task); 3692 3693 vcpu->arch.ret = ret; 3694 vcpu->arch.trap = 0; 3695 3696 spin_lock(&vc->lock); 3697 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 3698 if (vcpu->arch.pending_exceptions) 3699 kvmppc_core_prepare_to_enter(vcpu); 3700 if (vcpu->arch.ceded) 3701 kvmppc_set_timer(vcpu); 3702 else 3703 ++still_running; 3704 } else { 3705 kvmppc_remove_runnable(vc, vcpu, mftb()); 3706 wake_up(&vcpu->arch.cpu_run); 3707 } 3708 } 3709 if (!is_master) { 3710 if (still_running > 0) { 3711 kvmppc_vcore_preempt(vc); 3712 } else if (vc->runner) { 3713 vc->vcore_state = VCORE_PREEMPT; 3714 kvmppc_core_start_stolen(vc, mftb()); 3715 } else { 3716 vc->vcore_state = VCORE_INACTIVE; 3717 } 3718 if (vc->n_runnable > 0 && vc->runner == NULL) { 3719 /* make sure there's a candidate runner awake */ 3720 i = -1; 3721 vcpu = next_runnable_thread(vc, &i); 3722 wake_up(&vcpu->arch.cpu_run); 3723 } 3724 } 3725 spin_unlock(&vc->lock); 3726 } 3727 3728 /* 3729 * Clear core from the list of active host cores as we are about to 3730 * enter the guest. Only do this if it is the primary thread of the 3731 * core (not if a subcore) that is entering the guest. 3732 */ 3733 static inline int kvmppc_clear_host_core(unsigned int cpu) 3734 { 3735 int core; 3736 3737 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3738 return 0; 3739 /* 3740 * Memory barrier can be omitted here as we will do a smp_wmb() 3741 * later in kvmppc_start_thread and we need ensure that state is 3742 * visible to other CPUs only after we enter guest. 3743 */ 3744 core = cpu >> threads_shift; 3745 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 3746 return 0; 3747 } 3748 3749 /* 3750 * Advertise this core as an active host core since we exited the guest 3751 * Only need to do this if it is the primary thread of the core that is 3752 * exiting. 3753 */ 3754 static inline int kvmppc_set_host_core(unsigned int cpu) 3755 { 3756 int core; 3757 3758 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3759 return 0; 3760 3761 /* 3762 * Memory barrier can be omitted here because we do a spin_unlock 3763 * immediately after this which provides the memory barrier. 3764 */ 3765 core = cpu >> threads_shift; 3766 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3767 return 0; 3768 } 3769 3770 static void set_irq_happened(int trap) 3771 { 3772 switch (trap) { 3773 case BOOK3S_INTERRUPT_EXTERNAL: 3774 local_paca->irq_happened |= PACA_IRQ_EE; 3775 break; 3776 case BOOK3S_INTERRUPT_H_DOORBELL: 3777 local_paca->irq_happened |= PACA_IRQ_DBELL; 3778 break; 3779 case BOOK3S_INTERRUPT_HMI: 3780 local_paca->irq_happened |= PACA_IRQ_HMI; 3781 break; 3782 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3783 replay_system_reset(); 3784 break; 3785 } 3786 } 3787 3788 /* 3789 * Run a set of guest threads on a physical core. 3790 * Called with vc->lock held. 3791 */ 3792 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3793 { 3794 struct kvm_vcpu *vcpu; 3795 int i; 3796 int srcu_idx; 3797 struct core_info core_info; 3798 struct kvmppc_vcore *pvc; 3799 struct kvm_split_mode split_info, *sip; 3800 int split, subcore_size, active; 3801 int sub; 3802 bool thr0_done; 3803 unsigned long cmd_bit, stat_bit; 3804 int pcpu, thr; 3805 int target_threads; 3806 int controlled_threads; 3807 int trap; 3808 bool is_power8; 3809 3810 if (WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300))) 3811 return; 3812 3813 /* 3814 * Remove from the list any threads that have a signal pending 3815 * or need a VPA update done 3816 */ 3817 prepare_threads(vc); 3818 3819 /* if the runner is no longer runnable, let the caller pick a new one */ 3820 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3821 return; 3822 3823 /* 3824 * Initialize *vc. 3825 */ 3826 init_vcore_to_run(vc); 3827 vc->preempt_tb = TB_NIL; 3828 3829 /* 3830 * Number of threads that we will be controlling: the same as 3831 * the number of threads per subcore, except on POWER9, 3832 * where it's 1 because the threads are (mostly) independent. 3833 */ 3834 controlled_threads = threads_per_vcore(vc->kvm); 3835 3836 /* 3837 * Make sure we are running on primary threads, and that secondary 3838 * threads are offline. Also check if the number of threads in this 3839 * guest are greater than the current system threads per guest. 3840 */ 3841 if ((controlled_threads > 1) && 3842 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) { 3843 for_each_runnable_thread(i, vcpu, vc) { 3844 vcpu->arch.ret = -EBUSY; 3845 kvmppc_remove_runnable(vc, vcpu, mftb()); 3846 wake_up(&vcpu->arch.cpu_run); 3847 } 3848 goto out; 3849 } 3850 3851 /* 3852 * See if we could run any other vcores on the physical core 3853 * along with this one. 3854 */ 3855 init_core_info(&core_info, vc); 3856 pcpu = smp_processor_id(); 3857 target_threads = controlled_threads; 3858 if (target_smt_mode && target_smt_mode < target_threads) 3859 target_threads = target_smt_mode; 3860 if (vc->num_threads < target_threads) 3861 collect_piggybacks(&core_info, target_threads); 3862 3863 /* 3864 * Hard-disable interrupts, and check resched flag and signals. 3865 * If we need to reschedule or deliver a signal, clean up 3866 * and return without going into the guest(s). 3867 * If the mmu_ready flag has been cleared, don't go into the 3868 * guest because that means a HPT resize operation is in progress. 3869 */ 3870 local_irq_disable(); 3871 hard_irq_disable(); 3872 xfer_to_guest_mode_prepare(); 3873 if (lazy_irq_pending() || xfer_to_guest_mode_work_pending() || 3874 recheck_signals_and_mmu(&core_info)) { 3875 local_irq_enable(); 3876 vc->vcore_state = VCORE_INACTIVE; 3877 /* Unlock all except the primary vcore */ 3878 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3879 pvc = core_info.vc[sub]; 3880 /* Put back on to the preempted vcores list */ 3881 kvmppc_vcore_preempt(pvc); 3882 spin_unlock(&pvc->lock); 3883 } 3884 for (i = 0; i < controlled_threads; ++i) 3885 kvmppc_release_hwthread(pcpu + i); 3886 return; 3887 } 3888 3889 kvmppc_clear_host_core(pcpu); 3890 3891 /* Decide on micro-threading (split-core) mode */ 3892 subcore_size = threads_per_subcore; 3893 cmd_bit = stat_bit = 0; 3894 split = core_info.n_subcores; 3895 sip = NULL; 3896 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S); 3897 3898 if (split > 1) { 3899 sip = &split_info; 3900 memset(&split_info, 0, sizeof(split_info)); 3901 for (sub = 0; sub < core_info.n_subcores; ++sub) 3902 split_info.vc[sub] = core_info.vc[sub]; 3903 3904 if (is_power8) { 3905 if (split == 2 && (dynamic_mt_modes & 2)) { 3906 cmd_bit = HID0_POWER8_1TO2LPAR; 3907 stat_bit = HID0_POWER8_2LPARMODE; 3908 } else { 3909 split = 4; 3910 cmd_bit = HID0_POWER8_1TO4LPAR; 3911 stat_bit = HID0_POWER8_4LPARMODE; 3912 } 3913 subcore_size = MAX_SMT_THREADS / split; 3914 split_info.rpr = mfspr(SPRN_RPR); 3915 split_info.pmmar = mfspr(SPRN_PMMAR); 3916 split_info.ldbar = mfspr(SPRN_LDBAR); 3917 split_info.subcore_size = subcore_size; 3918 } else { 3919 split_info.subcore_size = 1; 3920 } 3921 3922 /* order writes to split_info before kvm_split_mode pointer */ 3923 smp_wmb(); 3924 } 3925 3926 for (thr = 0; thr < controlled_threads; ++thr) { 3927 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3928 3929 paca->kvm_hstate.napping = 0; 3930 paca->kvm_hstate.kvm_split_mode = sip; 3931 } 3932 3933 /* Initiate micro-threading (split-core) on POWER8 if required */ 3934 if (cmd_bit) { 3935 unsigned long hid0 = mfspr(SPRN_HID0); 3936 3937 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3938 mb(); 3939 mtspr(SPRN_HID0, hid0); 3940 isync(); 3941 for (;;) { 3942 hid0 = mfspr(SPRN_HID0); 3943 if (hid0 & stat_bit) 3944 break; 3945 cpu_relax(); 3946 } 3947 } 3948 3949 /* 3950 * On POWER8, set RWMR register. 3951 * Since it only affects PURR and SPURR, it doesn't affect 3952 * the host, so we don't save/restore the host value. 3953 */ 3954 if (is_power8) { 3955 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3956 int n_online = atomic_read(&vc->online_count); 3957 3958 /* 3959 * Use the 8-thread value if we're doing split-core 3960 * or if the vcore's online count looks bogus. 3961 */ 3962 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3963 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3964 rwmr_val = p8_rwmr_values[n_online]; 3965 mtspr(SPRN_RWMR, rwmr_val); 3966 } 3967 3968 /* Start all the threads */ 3969 active = 0; 3970 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3971 thr = is_power8 ? subcore_thread_map[sub] : sub; 3972 thr0_done = false; 3973 active |= 1 << thr; 3974 pvc = core_info.vc[sub]; 3975 pvc->pcpu = pcpu + thr; 3976 for_each_runnable_thread(i, vcpu, pvc) { 3977 /* 3978 * XXX: is kvmppc_start_thread called too late here? 3979 * It updates vcpu->cpu and vcpu->arch.thread_cpu 3980 * which are used by kvmppc_fast_vcpu_kick_hv(), but 3981 * kick is called after new exceptions become available 3982 * and exceptions are checked earlier than here, by 3983 * kvmppc_core_prepare_to_enter. 3984 */ 3985 kvmppc_start_thread(vcpu, pvc); 3986 kvmppc_update_vpa_dispatch(vcpu, pvc); 3987 trace_kvm_guest_enter(vcpu); 3988 if (!vcpu->arch.ptid) 3989 thr0_done = true; 3990 active |= 1 << (thr + vcpu->arch.ptid); 3991 } 3992 /* 3993 * We need to start the first thread of each subcore 3994 * even if it doesn't have a vcpu. 3995 */ 3996 if (!thr0_done) 3997 kvmppc_start_thread(NULL, pvc); 3998 } 3999 4000 /* 4001 * Ensure that split_info.do_nap is set after setting 4002 * the vcore pointer in the PACA of the secondaries. 4003 */ 4004 smp_mb(); 4005 4006 /* 4007 * When doing micro-threading, poke the inactive threads as well. 4008 * This gets them to the nap instruction after kvm_do_nap, 4009 * which reduces the time taken to unsplit later. 4010 */ 4011 if (cmd_bit) { 4012 split_info.do_nap = 1; /* ask secondaries to nap when done */ 4013 for (thr = 1; thr < threads_per_subcore; ++thr) 4014 if (!(active & (1 << thr))) 4015 kvmppc_ipi_thread(pcpu + thr); 4016 } 4017 4018 vc->vcore_state = VCORE_RUNNING; 4019 preempt_disable(); 4020 4021 trace_kvmppc_run_core(vc, 0); 4022 4023 for (sub = 0; sub < core_info.n_subcores; ++sub) 4024 spin_unlock(&core_info.vc[sub]->lock); 4025 4026 guest_timing_enter_irqoff(); 4027 4028 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 4029 4030 guest_state_enter_irqoff(); 4031 this_cpu_disable_ftrace(); 4032 4033 trap = __kvmppc_vcore_entry(); 4034 4035 this_cpu_enable_ftrace(); 4036 guest_state_exit_irqoff(); 4037 4038 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 4039 4040 set_irq_happened(trap); 4041 4042 spin_lock(&vc->lock); 4043 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 4044 vc->vcore_state = VCORE_EXITING; 4045 4046 /* wait for secondary threads to finish writing their state to memory */ 4047 kvmppc_wait_for_nap(controlled_threads); 4048 4049 /* Return to whole-core mode if we split the core earlier */ 4050 if (cmd_bit) { 4051 unsigned long hid0 = mfspr(SPRN_HID0); 4052 4053 hid0 &= ~HID0_POWER8_DYNLPARDIS; 4054 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 4055 mb(); 4056 mtspr(SPRN_HID0, hid0); 4057 isync(); 4058 for (;;) { 4059 hid0 = mfspr(SPRN_HID0); 4060 if (!(hid0 & stat_bit)) 4061 break; 4062 cpu_relax(); 4063 } 4064 split_info.do_nap = 0; 4065 } 4066 4067 kvmppc_set_host_core(pcpu); 4068 4069 if (!vtime_accounting_enabled_this_cpu()) { 4070 local_irq_enable(); 4071 /* 4072 * Service IRQs here before guest_timing_exit_irqoff() so any 4073 * ticks that occurred while running the guest are accounted to 4074 * the guest. If vtime accounting is enabled, accounting uses 4075 * TB rather than ticks, so it can be done without enabling 4076 * interrupts here, which has the problem that it accounts 4077 * interrupt processing overhead to the host. 4078 */ 4079 local_irq_disable(); 4080 } 4081 guest_timing_exit_irqoff(); 4082 4083 local_irq_enable(); 4084 4085 /* Let secondaries go back to the offline loop */ 4086 for (i = 0; i < controlled_threads; ++i) { 4087 kvmppc_release_hwthread(pcpu + i); 4088 if (sip && sip->napped[i]) 4089 kvmppc_ipi_thread(pcpu + i); 4090 } 4091 4092 spin_unlock(&vc->lock); 4093 4094 /* make sure updates to secondary vcpu structs are visible now */ 4095 smp_mb(); 4096 4097 preempt_enable(); 4098 4099 for (sub = 0; sub < core_info.n_subcores; ++sub) { 4100 pvc = core_info.vc[sub]; 4101 post_guest_process(pvc, pvc == vc); 4102 } 4103 4104 spin_lock(&vc->lock); 4105 4106 out: 4107 vc->vcore_state = VCORE_INACTIVE; 4108 trace_kvmppc_run_core(vc, 1); 4109 } 4110 4111 static inline bool hcall_is_xics(unsigned long req) 4112 { 4113 return req == H_EOI || req == H_CPPR || req == H_IPI || 4114 req == H_IPOLL || req == H_XIRR || req == H_XIRR_X; 4115 } 4116 4117 static void vcpu_vpa_increment_dispatch(struct kvm_vcpu *vcpu) 4118 { 4119 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 4120 if (lp) { 4121 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 4122 lp->yield_count = cpu_to_be32(yield_count); 4123 vcpu->arch.vpa.dirty = 1; 4124 } 4125 } 4126 4127 /* Helper functions for reading L2's stats from L1's VPA */ 4128 #ifdef CONFIG_PPC_PSERIES 4129 static DEFINE_PER_CPU(u64, l1_to_l2_cs); 4130 static DEFINE_PER_CPU(u64, l2_to_l1_cs); 4131 static DEFINE_PER_CPU(u64, l2_runtime_agg); 4132 4133 int kvmhv_get_l2_counters_status(void) 4134 { 4135 return firmware_has_feature(FW_FEATURE_LPAR) && 4136 get_lppaca()->l2_counters_enable; 4137 } 4138 4139 void kvmhv_set_l2_counters_status(int cpu, bool status) 4140 { 4141 if (!firmware_has_feature(FW_FEATURE_LPAR)) 4142 return; 4143 if (status) 4144 lppaca_of(cpu).l2_counters_enable = 1; 4145 else 4146 lppaca_of(cpu).l2_counters_enable = 0; 4147 } 4148 EXPORT_SYMBOL(kvmhv_set_l2_counters_status); 4149 4150 int kvmhv_counters_tracepoint_regfunc(void) 4151 { 4152 int cpu; 4153 4154 for_each_present_cpu(cpu) { 4155 kvmhv_set_l2_counters_status(cpu, true); 4156 } 4157 return 0; 4158 } 4159 4160 void kvmhv_counters_tracepoint_unregfunc(void) 4161 { 4162 int cpu; 4163 4164 for_each_present_cpu(cpu) { 4165 kvmhv_set_l2_counters_status(cpu, false); 4166 } 4167 } 4168 4169 static void do_trace_nested_cs_time(struct kvm_vcpu *vcpu) 4170 { 4171 struct lppaca *lp = get_lppaca(); 4172 u64 l1_to_l2_ns, l2_to_l1_ns, l2_runtime_ns; 4173 u64 *l1_to_l2_cs_ptr = this_cpu_ptr(&l1_to_l2_cs); 4174 u64 *l2_to_l1_cs_ptr = this_cpu_ptr(&l2_to_l1_cs); 4175 u64 *l2_runtime_agg_ptr = this_cpu_ptr(&l2_runtime_agg); 4176 4177 l1_to_l2_ns = tb_to_ns(be64_to_cpu(lp->l1_to_l2_cs_tb)); 4178 l2_to_l1_ns = tb_to_ns(be64_to_cpu(lp->l2_to_l1_cs_tb)); 4179 l2_runtime_ns = tb_to_ns(be64_to_cpu(lp->l2_runtime_tb)); 4180 trace_kvmppc_vcpu_stats(vcpu, l1_to_l2_ns - *l1_to_l2_cs_ptr, 4181 l2_to_l1_ns - *l2_to_l1_cs_ptr, 4182 l2_runtime_ns - *l2_runtime_agg_ptr); 4183 *l1_to_l2_cs_ptr = l1_to_l2_ns; 4184 *l2_to_l1_cs_ptr = l2_to_l1_ns; 4185 *l2_runtime_agg_ptr = l2_runtime_ns; 4186 vcpu->arch.l1_to_l2_cs = l1_to_l2_ns; 4187 vcpu->arch.l2_to_l1_cs = l2_to_l1_ns; 4188 vcpu->arch.l2_runtime_agg = l2_runtime_ns; 4189 } 4190 4191 u64 kvmhv_get_l1_to_l2_cs_time(void) 4192 { 4193 return tb_to_ns(be64_to_cpu(get_lppaca()->l1_to_l2_cs_tb)); 4194 } 4195 EXPORT_SYMBOL(kvmhv_get_l1_to_l2_cs_time); 4196 4197 u64 kvmhv_get_l2_to_l1_cs_time(void) 4198 { 4199 return tb_to_ns(be64_to_cpu(get_lppaca()->l2_to_l1_cs_tb)); 4200 } 4201 EXPORT_SYMBOL(kvmhv_get_l2_to_l1_cs_time); 4202 4203 u64 kvmhv_get_l2_runtime_agg(void) 4204 { 4205 return tb_to_ns(be64_to_cpu(get_lppaca()->l2_runtime_tb)); 4206 } 4207 EXPORT_SYMBOL(kvmhv_get_l2_runtime_agg); 4208 4209 u64 kvmhv_get_l1_to_l2_cs_time_vcpu(void) 4210 { 4211 struct kvm_vcpu *vcpu; 4212 struct kvm_vcpu_arch *arch; 4213 4214 vcpu = local_paca->kvm_hstate.kvm_vcpu; 4215 if (vcpu) { 4216 arch = &vcpu->arch; 4217 return arch->l1_to_l2_cs; 4218 } else { 4219 return 0; 4220 } 4221 } 4222 EXPORT_SYMBOL(kvmhv_get_l1_to_l2_cs_time_vcpu); 4223 4224 u64 kvmhv_get_l2_to_l1_cs_time_vcpu(void) 4225 { 4226 struct kvm_vcpu *vcpu; 4227 struct kvm_vcpu_arch *arch; 4228 4229 vcpu = local_paca->kvm_hstate.kvm_vcpu; 4230 if (vcpu) { 4231 arch = &vcpu->arch; 4232 return arch->l2_to_l1_cs; 4233 } else { 4234 return 0; 4235 } 4236 } 4237 EXPORT_SYMBOL(kvmhv_get_l2_to_l1_cs_time_vcpu); 4238 4239 u64 kvmhv_get_l2_runtime_agg_vcpu(void) 4240 { 4241 struct kvm_vcpu *vcpu; 4242 struct kvm_vcpu_arch *arch; 4243 4244 vcpu = local_paca->kvm_hstate.kvm_vcpu; 4245 if (vcpu) { 4246 arch = &vcpu->arch; 4247 return arch->l2_runtime_agg; 4248 } else { 4249 return 0; 4250 } 4251 } 4252 EXPORT_SYMBOL(kvmhv_get_l2_runtime_agg_vcpu); 4253 4254 #else 4255 int kvmhv_get_l2_counters_status(void) 4256 { 4257 return 0; 4258 } 4259 4260 static void do_trace_nested_cs_time(struct kvm_vcpu *vcpu) 4261 { 4262 } 4263 #endif 4264 4265 static int kvmhv_vcpu_entry_nestedv2(struct kvm_vcpu *vcpu, u64 time_limit, 4266 unsigned long lpcr, u64 *tb) 4267 { 4268 struct kvmhv_nestedv2_io *io; 4269 unsigned long msr, i; 4270 int trap; 4271 long rc; 4272 4273 if (vcpu->arch.doorbell_request) { 4274 vcpu->arch.doorbell_request = 0; 4275 kvmppc_set_dpdes(vcpu, 1); 4276 } 4277 4278 io = &vcpu->arch.nestedv2_io; 4279 4280 msr = mfmsr(); 4281 kvmppc_msr_hard_disable_set_facilities(vcpu, msr); 4282 if (lazy_irq_pending()) 4283 return 0; 4284 4285 rc = kvmhv_nestedv2_flush_vcpu(vcpu, time_limit); 4286 if (rc < 0) 4287 return -EINVAL; 4288 4289 kvmppc_gse_put_u64(io->vcpu_run_input, KVMPPC_GSID_LPCR, lpcr); 4290 4291 accumulate_time(vcpu, &vcpu->arch.in_guest); 4292 rc = plpar_guest_run_vcpu(0, vcpu->kvm->arch.lpid, vcpu->vcpu_id, 4293 &trap, &i); 4294 4295 if (rc != H_SUCCESS) { 4296 pr_err("KVM Guest Run VCPU hcall failed\n"); 4297 if (rc == H_INVALID_ELEMENT_ID) 4298 pr_err("KVM: Guest Run VCPU invalid element id at %ld\n", i); 4299 else if (rc == H_INVALID_ELEMENT_SIZE) 4300 pr_err("KVM: Guest Run VCPU invalid element size at %ld\n", i); 4301 else if (rc == H_INVALID_ELEMENT_VALUE) 4302 pr_err("KVM: Guest Run VCPU invalid element value at %ld\n", i); 4303 return -EINVAL; 4304 } 4305 accumulate_time(vcpu, &vcpu->arch.guest_exit); 4306 4307 *tb = mftb(); 4308 kvmppc_gsm_reset(io->vcpu_message); 4309 kvmppc_gsm_reset(io->vcore_message); 4310 kvmppc_gsbm_zero(&io->valids); 4311 4312 rc = kvmhv_nestedv2_parse_output(vcpu); 4313 if (rc < 0) 4314 return -EINVAL; 4315 4316 timer_rearm_host_dec(*tb); 4317 4318 /* Record context switch and guest_run_time data */ 4319 if (kvmhv_get_l2_counters_status()) 4320 do_trace_nested_cs_time(vcpu); 4321 4322 return trap; 4323 } 4324 4325 /* call our hypervisor to load up HV regs and go */ 4326 static int kvmhv_vcpu_entry_p9_nested(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpcr, u64 *tb) 4327 { 4328 unsigned long host_psscr; 4329 unsigned long msr; 4330 struct hv_guest_state hvregs; 4331 struct p9_host_os_sprs host_os_sprs; 4332 s64 dec; 4333 int trap; 4334 4335 msr = mfmsr(); 4336 4337 save_p9_host_os_sprs(&host_os_sprs); 4338 4339 /* 4340 * We need to save and restore the guest visible part of the 4341 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 4342 * doesn't do this for us. Note only required if pseries since 4343 * this is done in kvmhv_vcpu_entry_p9() below otherwise. 4344 */ 4345 host_psscr = mfspr(SPRN_PSSCR_PR); 4346 4347 kvmppc_msr_hard_disable_set_facilities(vcpu, msr); 4348 if (lazy_irq_pending()) 4349 return 0; 4350 4351 if (unlikely(load_vcpu_state(vcpu, &host_os_sprs))) 4352 msr = mfmsr(); /* TM restore can update msr */ 4353 4354 if (vcpu->arch.psscr != host_psscr) 4355 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 4356 4357 kvmhv_save_hv_regs(vcpu, &hvregs); 4358 hvregs.lpcr = lpcr; 4359 hvregs.amor = ~0; 4360 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 4361 hvregs.version = HV_GUEST_STATE_VERSION; 4362 if (vcpu->arch.nested) { 4363 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 4364 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 4365 } else { 4366 hvregs.lpid = vcpu->kvm->arch.lpid; 4367 hvregs.vcpu_token = vcpu->vcpu_id; 4368 } 4369 hvregs.hdec_expiry = time_limit; 4370 4371 /* 4372 * hvregs has the doorbell status, so zero it here which 4373 * enables us to receive doorbells when H_ENTER_NESTED is 4374 * in progress for this vCPU 4375 */ 4376 4377 if (vcpu->arch.doorbell_request) 4378 vcpu->arch.doorbell_request = 0; 4379 4380 /* 4381 * When setting DEC, we must always deal with irq_work_raise 4382 * via NMI vs setting DEC. The problem occurs right as we 4383 * switch into guest mode if a NMI hits and sets pending work 4384 * and sets DEC, then that will apply to the guest and not 4385 * bring us back to the host. 4386 * 4387 * irq_work_raise could check a flag (or possibly LPCR[HDICE] 4388 * for example) and set HDEC to 1? That wouldn't solve the 4389 * nested hv case which needs to abort the hcall or zero the 4390 * time limit. 4391 * 4392 * XXX: Another day's problem. 4393 */ 4394 mtspr(SPRN_DEC, kvmppc_dec_expires_host_tb(vcpu) - *tb); 4395 4396 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 4397 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 4398 switch_pmu_to_guest(vcpu, &host_os_sprs); 4399 accumulate_time(vcpu, &vcpu->arch.in_guest); 4400 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 4401 __pa(&vcpu->arch.regs)); 4402 accumulate_time(vcpu, &vcpu->arch.guest_exit); 4403 kvmhv_restore_hv_return_state(vcpu, &hvregs); 4404 switch_pmu_to_host(vcpu, &host_os_sprs); 4405 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 4406 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 4407 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 4408 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 4409 4410 store_vcpu_state(vcpu); 4411 4412 dec = mfspr(SPRN_DEC); 4413 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 4414 dec = (s32) dec; 4415 *tb = mftb(); 4416 vcpu->arch.dec_expires = dec + (*tb + kvmppc_get_tb_offset(vcpu)); 4417 4418 timer_rearm_host_dec(*tb); 4419 4420 restore_p9_host_os_sprs(vcpu, &host_os_sprs); 4421 if (vcpu->arch.psscr != host_psscr) 4422 mtspr(SPRN_PSSCR_PR, host_psscr); 4423 4424 return trap; 4425 } 4426 4427 /* 4428 * Guest entry for POWER9 and later CPUs. 4429 */ 4430 static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 4431 unsigned long lpcr, u64 *tb) 4432 { 4433 struct kvm *kvm = vcpu->kvm; 4434 struct kvm_nested_guest *nested = vcpu->arch.nested; 4435 u64 next_timer; 4436 int trap; 4437 4438 next_timer = timer_get_next_tb(); 4439 if (*tb >= next_timer) 4440 return BOOK3S_INTERRUPT_HV_DECREMENTER; 4441 if (next_timer < time_limit) 4442 time_limit = next_timer; 4443 else if (*tb >= time_limit) /* nested time limit */ 4444 return BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER; 4445 4446 vcpu->arch.ceded = 0; 4447 4448 vcpu_vpa_increment_dispatch(vcpu); 4449 4450 if (kvmhv_on_pseries()) { 4451 if (kvmhv_is_nestedv1()) 4452 trap = kvmhv_vcpu_entry_p9_nested(vcpu, time_limit, lpcr, tb); 4453 else 4454 trap = kvmhv_vcpu_entry_nestedv2(vcpu, time_limit, lpcr, tb); 4455 4456 /* H_CEDE has to be handled now, not later */ 4457 if (trap == BOOK3S_INTERRUPT_SYSCALL && !nested && 4458 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 4459 kvmppc_cede(vcpu); 4460 kvmppc_set_gpr(vcpu, 3, 0); 4461 trap = 0; 4462 } 4463 4464 } else if (nested) { 4465 __this_cpu_write(cpu_in_guest, kvm); 4466 trap = kvmhv_vcpu_entry_p9(vcpu, time_limit, lpcr, tb); 4467 __this_cpu_write(cpu_in_guest, NULL); 4468 4469 } else { 4470 kvmppc_xive_push_vcpu(vcpu); 4471 4472 __this_cpu_write(cpu_in_guest, kvm); 4473 trap = kvmhv_vcpu_entry_p9(vcpu, time_limit, lpcr, tb); 4474 __this_cpu_write(cpu_in_guest, NULL); 4475 4476 if (trap == BOOK3S_INTERRUPT_SYSCALL && 4477 !(__kvmppc_get_msr_hv(vcpu) & MSR_PR)) { 4478 unsigned long req = kvmppc_get_gpr(vcpu, 3); 4479 4480 /* 4481 * XIVE rearm and XICS hcalls must be handled 4482 * before xive context is pulled (is this 4483 * true?) 4484 */ 4485 if (req == H_CEDE) { 4486 /* H_CEDE has to be handled now */ 4487 kvmppc_cede(vcpu); 4488 if (!kvmppc_xive_rearm_escalation(vcpu)) { 4489 /* 4490 * Pending escalation so abort 4491 * the cede. 4492 */ 4493 vcpu->arch.ceded = 0; 4494 } 4495 kvmppc_set_gpr(vcpu, 3, 0); 4496 trap = 0; 4497 4498 } else if (req == H_ENTER_NESTED) { 4499 /* 4500 * L2 should not run with the L1 4501 * context so rearm and pull it. 4502 */ 4503 if (!kvmppc_xive_rearm_escalation(vcpu)) { 4504 /* 4505 * Pending escalation so abort 4506 * H_ENTER_NESTED. 4507 */ 4508 kvmppc_set_gpr(vcpu, 3, 0); 4509 trap = 0; 4510 } 4511 4512 } else if (hcall_is_xics(req)) { 4513 int ret; 4514 4515 ret = kvmppc_xive_xics_hcall(vcpu, req); 4516 if (ret != H_TOO_HARD) { 4517 kvmppc_set_gpr(vcpu, 3, ret); 4518 trap = 0; 4519 } 4520 } 4521 } 4522 kvmppc_xive_pull_vcpu(vcpu); 4523 4524 if (kvm_is_radix(kvm)) 4525 vcpu->arch.slb_max = 0; 4526 } 4527 4528 vcpu_vpa_increment_dispatch(vcpu); 4529 4530 return trap; 4531 } 4532 4533 /* 4534 * Wait for some other vcpu thread to execute us, and 4535 * wake us up when we need to handle something in the host. 4536 */ 4537 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 4538 struct kvm_vcpu *vcpu, int wait_state) 4539 { 4540 DEFINE_WAIT(wait); 4541 4542 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 4543 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4544 spin_unlock(&vc->lock); 4545 schedule(); 4546 spin_lock(&vc->lock); 4547 } 4548 finish_wait(&vcpu->arch.cpu_run, &wait); 4549 } 4550 4551 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 4552 { 4553 if (!halt_poll_ns_grow) 4554 return; 4555 4556 vc->halt_poll_ns *= halt_poll_ns_grow; 4557 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 4558 vc->halt_poll_ns = halt_poll_ns_grow_start; 4559 } 4560 4561 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 4562 { 4563 if (halt_poll_ns_shrink == 0) 4564 vc->halt_poll_ns = 0; 4565 else 4566 vc->halt_poll_ns /= halt_poll_ns_shrink; 4567 } 4568 4569 #ifdef CONFIG_KVM_XICS 4570 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4571 { 4572 if (!xics_on_xive()) 4573 return false; 4574 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 4575 vcpu->arch.xive_saved_state.cppr; 4576 } 4577 #else 4578 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4579 { 4580 return false; 4581 } 4582 #endif /* CONFIG_KVM_XICS */ 4583 4584 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 4585 { 4586 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 4587 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 4588 return true; 4589 4590 return false; 4591 } 4592 4593 static bool kvmppc_vcpu_check_block(struct kvm_vcpu *vcpu) 4594 { 4595 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 4596 return true; 4597 return false; 4598 } 4599 4600 /* 4601 * Check to see if any of the runnable vcpus on the vcore have pending 4602 * exceptions or are no longer ceded 4603 */ 4604 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 4605 { 4606 struct kvm_vcpu *vcpu; 4607 int i; 4608 4609 for_each_runnable_thread(i, vcpu, vc) { 4610 if (kvmppc_vcpu_check_block(vcpu)) 4611 return 1; 4612 } 4613 4614 return 0; 4615 } 4616 4617 /* 4618 * All the vcpus in this vcore are idle, so wait for a decrementer 4619 * or external interrupt to one of the vcpus. vc->lock is held. 4620 */ 4621 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 4622 { 4623 ktime_t cur, start_poll, start_wait; 4624 int do_sleep = 1; 4625 u64 block_ns; 4626 4627 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 4628 4629 /* Poll for pending exceptions and ceded state */ 4630 cur = start_poll = ktime_get(); 4631 if (vc->halt_poll_ns) { 4632 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 4633 ++vc->runner->stat.generic.halt_attempted_poll; 4634 4635 vc->vcore_state = VCORE_POLLING; 4636 spin_unlock(&vc->lock); 4637 4638 do { 4639 if (kvmppc_vcore_check_block(vc)) { 4640 do_sleep = 0; 4641 break; 4642 } 4643 cur = ktime_get(); 4644 } while (kvm_vcpu_can_poll(cur, stop)); 4645 4646 spin_lock(&vc->lock); 4647 vc->vcore_state = VCORE_INACTIVE; 4648 4649 if (!do_sleep) { 4650 ++vc->runner->stat.generic.halt_successful_poll; 4651 goto out; 4652 } 4653 } 4654 4655 prepare_to_rcuwait(&vc->wait); 4656 set_current_state(TASK_INTERRUPTIBLE); 4657 if (kvmppc_vcore_check_block(vc)) { 4658 finish_rcuwait(&vc->wait); 4659 do_sleep = 0; 4660 /* If we polled, count this as a successful poll */ 4661 if (vc->halt_poll_ns) 4662 ++vc->runner->stat.generic.halt_successful_poll; 4663 goto out; 4664 } 4665 4666 start_wait = ktime_get(); 4667 4668 vc->vcore_state = VCORE_SLEEPING; 4669 trace_kvmppc_vcore_blocked(vc->runner, 0); 4670 spin_unlock(&vc->lock); 4671 schedule(); 4672 finish_rcuwait(&vc->wait); 4673 spin_lock(&vc->lock); 4674 vc->vcore_state = VCORE_INACTIVE; 4675 trace_kvmppc_vcore_blocked(vc->runner, 1); 4676 ++vc->runner->stat.halt_successful_wait; 4677 4678 cur = ktime_get(); 4679 4680 out: 4681 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 4682 4683 /* Attribute wait time */ 4684 if (do_sleep) { 4685 vc->runner->stat.generic.halt_wait_ns += 4686 ktime_to_ns(cur) - ktime_to_ns(start_wait); 4687 KVM_STATS_LOG_HIST_UPDATE( 4688 vc->runner->stat.generic.halt_wait_hist, 4689 ktime_to_ns(cur) - ktime_to_ns(start_wait)); 4690 /* Attribute failed poll time */ 4691 if (vc->halt_poll_ns) { 4692 vc->runner->stat.generic.halt_poll_fail_ns += 4693 ktime_to_ns(start_wait) - 4694 ktime_to_ns(start_poll); 4695 KVM_STATS_LOG_HIST_UPDATE( 4696 vc->runner->stat.generic.halt_poll_fail_hist, 4697 ktime_to_ns(start_wait) - 4698 ktime_to_ns(start_poll)); 4699 } 4700 } else { 4701 /* Attribute successful poll time */ 4702 if (vc->halt_poll_ns) { 4703 vc->runner->stat.generic.halt_poll_success_ns += 4704 ktime_to_ns(cur) - 4705 ktime_to_ns(start_poll); 4706 KVM_STATS_LOG_HIST_UPDATE( 4707 vc->runner->stat.generic.halt_poll_success_hist, 4708 ktime_to_ns(cur) - ktime_to_ns(start_poll)); 4709 } 4710 } 4711 4712 /* Adjust poll time */ 4713 if (halt_poll_ns) { 4714 if (block_ns <= vc->halt_poll_ns) 4715 ; 4716 /* We slept and blocked for longer than the max halt time */ 4717 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 4718 shrink_halt_poll_ns(vc); 4719 /* We slept and our poll time is too small */ 4720 else if (vc->halt_poll_ns < halt_poll_ns && 4721 block_ns < halt_poll_ns) 4722 grow_halt_poll_ns(vc); 4723 if (vc->halt_poll_ns > halt_poll_ns) 4724 vc->halt_poll_ns = halt_poll_ns; 4725 } else 4726 vc->halt_poll_ns = 0; 4727 4728 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 4729 } 4730 4731 /* 4732 * This never fails for a radix guest, as none of the operations it does 4733 * for a radix guest can fail or have a way to report failure. 4734 */ 4735 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 4736 { 4737 int r = 0; 4738 struct kvm *kvm = vcpu->kvm; 4739 4740 mutex_lock(&kvm->arch.mmu_setup_lock); 4741 if (!kvm->arch.mmu_ready) { 4742 if (!kvm_is_radix(kvm)) 4743 r = kvmppc_hv_setup_htab_rma(vcpu); 4744 if (!r) { 4745 if (cpu_has_feature(CPU_FTR_ARCH_300)) 4746 kvmppc_setup_partition_table(kvm); 4747 kvm->arch.mmu_ready = 1; 4748 } 4749 } 4750 mutex_unlock(&kvm->arch.mmu_setup_lock); 4751 return r; 4752 } 4753 4754 static int kvmppc_run_vcpu(struct kvm_vcpu *vcpu) 4755 { 4756 struct kvm_run *run = vcpu->run; 4757 int n_ceded, i, r; 4758 struct kvmppc_vcore *vc; 4759 struct kvm_vcpu *v; 4760 4761 trace_kvmppc_run_vcpu_enter(vcpu); 4762 4763 run->exit_reason = 0; 4764 vcpu->arch.ret = RESUME_GUEST; 4765 vcpu->arch.trap = 0; 4766 kvmppc_update_vpas(vcpu); 4767 4768 /* 4769 * Synchronize with other threads in this virtual core 4770 */ 4771 vc = vcpu->arch.vcore; 4772 spin_lock(&vc->lock); 4773 vcpu->arch.ceded = 0; 4774 vcpu->arch.run_task = current; 4775 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4776 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4777 vcpu->arch.busy_preempt = TB_NIL; 4778 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 4779 ++vc->n_runnable; 4780 4781 /* 4782 * This happens the first time this is called for a vcpu. 4783 * If the vcore is already running, we may be able to start 4784 * this thread straight away and have it join in. 4785 */ 4786 if (!signal_pending(current)) { 4787 if ((vc->vcore_state == VCORE_PIGGYBACK || 4788 vc->vcore_state == VCORE_RUNNING) && 4789 !VCORE_IS_EXITING(vc)) { 4790 kvmppc_update_vpa_dispatch(vcpu, vc); 4791 kvmppc_start_thread(vcpu, vc); 4792 trace_kvm_guest_enter(vcpu); 4793 } else if (vc->vcore_state == VCORE_SLEEPING) { 4794 rcuwait_wake_up(&vc->wait); 4795 } 4796 4797 } 4798 4799 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4800 !signal_pending(current)) { 4801 /* See if the MMU is ready to go */ 4802 if (!vcpu->kvm->arch.mmu_ready) { 4803 spin_unlock(&vc->lock); 4804 r = kvmhv_setup_mmu(vcpu); 4805 spin_lock(&vc->lock); 4806 if (r) { 4807 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4808 run->fail_entry. 4809 hardware_entry_failure_reason = 0; 4810 vcpu->arch.ret = r; 4811 break; 4812 } 4813 } 4814 4815 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4816 kvmppc_vcore_end_preempt(vc); 4817 4818 if (vc->vcore_state != VCORE_INACTIVE) { 4819 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 4820 continue; 4821 } 4822 for_each_runnable_thread(i, v, vc) { 4823 kvmppc_core_prepare_to_enter(v); 4824 if (signal_pending(v->arch.run_task)) { 4825 kvmppc_remove_runnable(vc, v, mftb()); 4826 v->stat.signal_exits++; 4827 v->run->exit_reason = KVM_EXIT_INTR; 4828 v->arch.ret = -EINTR; 4829 wake_up(&v->arch.cpu_run); 4830 } 4831 } 4832 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 4833 break; 4834 n_ceded = 0; 4835 for_each_runnable_thread(i, v, vc) { 4836 if (!kvmppc_vcpu_woken(v)) 4837 n_ceded += v->arch.ceded; 4838 else 4839 v->arch.ceded = 0; 4840 } 4841 vc->runner = vcpu; 4842 if (n_ceded == vc->n_runnable) { 4843 kvmppc_vcore_blocked(vc); 4844 } else if (__xfer_to_guest_mode_work_pending()) { 4845 kvmppc_vcore_preempt(vc); 4846 /* 4847 * Let something else run. The raw helper is used as 4848 * signal exits are accounted by this path already; 4849 * it may schedule(), so drop the vcore lock. 4850 */ 4851 spin_unlock(&vc->lock); 4852 xfer_to_guest_mode_handle_work(); 4853 spin_lock(&vc->lock); 4854 if (vc->vcore_state == VCORE_PREEMPT) 4855 kvmppc_vcore_end_preempt(vc); 4856 } else { 4857 kvmppc_run_core(vc); 4858 } 4859 vc->runner = NULL; 4860 } 4861 4862 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4863 (vc->vcore_state == VCORE_RUNNING || 4864 vc->vcore_state == VCORE_EXITING || 4865 vc->vcore_state == VCORE_PIGGYBACK)) 4866 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4867 4868 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4869 kvmppc_vcore_end_preempt(vc); 4870 4871 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4872 kvmppc_remove_runnable(vc, vcpu, mftb()); 4873 vcpu->stat.signal_exits++; 4874 run->exit_reason = KVM_EXIT_INTR; 4875 vcpu->arch.ret = -EINTR; 4876 } 4877 4878 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4879 /* Wake up some vcpu to run the core */ 4880 i = -1; 4881 v = next_runnable_thread(vc, &i); 4882 wake_up(&v->arch.cpu_run); 4883 } 4884 4885 trace_kvmppc_run_vcpu_exit(vcpu); 4886 spin_unlock(&vc->lock); 4887 return vcpu->arch.ret; 4888 } 4889 4890 int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 4891 unsigned long lpcr) 4892 { 4893 struct rcuwait *wait = kvm_arch_vcpu_get_wait(vcpu); 4894 struct kvm_run *run = vcpu->run; 4895 int trap, r, pcpu; 4896 int srcu_idx; 4897 struct kvmppc_vcore *vc; 4898 struct kvm *kvm = vcpu->kvm; 4899 struct kvm_nested_guest *nested = vcpu->arch.nested; 4900 unsigned long flags; 4901 u64 tb; 4902 4903 trace_kvmppc_run_vcpu_enter(vcpu); 4904 4905 run->exit_reason = 0; 4906 vcpu->arch.ret = RESUME_GUEST; 4907 vcpu->arch.trap = 0; 4908 4909 vc = vcpu->arch.vcore; 4910 vcpu->arch.ceded = 0; 4911 vcpu->arch.run_task = current; 4912 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4913 4914 /* See if the MMU is ready to go */ 4915 if (unlikely(!kvm->arch.mmu_ready)) { 4916 r = kvmhv_setup_mmu(vcpu); 4917 if (r) { 4918 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4919 run->fail_entry.hardware_entry_failure_reason = 0; 4920 vcpu->arch.ret = r; 4921 goto done; 4922 } 4923 } 4924 4925 r = kvm_xfer_to_guest_mode_handle_work(vcpu); 4926 if (r) { 4927 /* -EINTR: signal pending, exit to userspace (KVM_EXIT_INTR) */ 4928 vcpu->arch.ret = r; 4929 goto done; 4930 } 4931 4932 kvmppc_update_vpas(vcpu); 4933 4934 preempt_disable(); 4935 pcpu = smp_processor_id(); 4936 if (kvm_is_radix(kvm)) 4937 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4938 4939 /* flags save not required, but irq_pmu has no disable/enable API */ 4940 powerpc_local_irq_pmu_save(flags); 4941 4942 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4943 4944 xfer_to_guest_mode_prepare(); 4945 4946 /* 4947 * IRQs are disabled here, so on pending work bail to the outer loop, 4948 * which handles it via kvm_xfer_to_guest_mode_handle_work() above. 4949 */ 4950 if (xfer_to_guest_mode_work_pending() || !kvm->arch.mmu_ready) 4951 goto out; 4952 4953 vcpu->cpu = pcpu; 4954 vcpu->arch.thread_cpu = pcpu; 4955 vc->pcpu = pcpu; 4956 local_paca->kvm_hstate.kvm_vcpu = vcpu; 4957 local_paca->kvm_hstate.ptid = 0; 4958 local_paca->kvm_hstate.fake_suspend = 0; 4959 4960 /* 4961 * Orders set cpu/thread_cpu vs testing for pending interrupts and 4962 * doorbells below. The other side is when these fields are set vs 4963 * kvmppc_fast_vcpu_kick_hv reading the cpu/thread_cpu fields to 4964 * kick a vCPU to notice the pending interrupt. 4965 */ 4966 smp_mb(); 4967 4968 if (!nested) { 4969 kvmppc_core_prepare_to_enter(vcpu); 4970 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4971 &vcpu->arch.pending_exceptions) || 4972 xive_interrupt_pending(vcpu)) { 4973 /* 4974 * For nested HV, don't synthesize but always pass MER, 4975 * the L0 will be able to optimise that more 4976 * effectively than manipulating registers directly. 4977 */ 4978 if (!kvmhv_on_pseries() && (__kvmppc_get_msr_hv(vcpu) & MSR_EE)) 4979 kvmppc_inject_interrupt_hv(vcpu, 4980 BOOK3S_INTERRUPT_EXTERNAL, 0); 4981 else 4982 lpcr |= LPCR_MER; 4983 } else { 4984 /* 4985 * L1's copy of L2's LPCR (vcpu->arch.vcore->lpcr) can get its MER bit 4986 * unexpectedly set - for e.g. during NMI handling when all register 4987 * states are synchronized from L0 to L1. L1 needs to inform L0 about 4988 * MER=1 only when there are pending external interrupts. 4989 * In the above if check, MER bit is set if there are pending 4990 * external interrupts. Hence, explicitly mask off MER bit 4991 * here as otherwise it may generate spurious interrupts in L2 KVM 4992 * causing an endless loop, which results in L2 guest getting hung. 4993 */ 4994 lpcr &= ~LPCR_MER; 4995 } 4996 } else if (vcpu->arch.pending_exceptions || 4997 xive_interrupt_pending(vcpu)) { 4998 vcpu->arch.ret = RESUME_HOST; 4999 goto out; 5000 } 5001 5002 if (vcpu->arch.timer_running) { 5003 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 5004 vcpu->arch.timer_running = 0; 5005 } 5006 5007 tb = mftb(); 5008 5009 kvmppc_update_vpa_dispatch_p9(vcpu, vc, tb + kvmppc_get_tb_offset(vcpu)); 5010 5011 trace_kvm_guest_enter(vcpu); 5012 5013 guest_timing_enter_irqoff(); 5014 5015 srcu_idx = srcu_read_lock(&kvm->srcu); 5016 5017 guest_state_enter_irqoff(); 5018 this_cpu_disable_ftrace(); 5019 5020 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr, &tb); 5021 vcpu->arch.trap = trap; 5022 5023 this_cpu_enable_ftrace(); 5024 guest_state_exit_irqoff(); 5025 5026 srcu_read_unlock(&kvm->srcu, srcu_idx); 5027 5028 set_irq_happened(trap); 5029 5030 vcpu->cpu = -1; 5031 vcpu->arch.thread_cpu = -1; 5032 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 5033 5034 if (!vtime_accounting_enabled_this_cpu()) { 5035 powerpc_local_irq_pmu_restore(flags); 5036 /* 5037 * Service IRQs here before guest_timing_exit_irqoff() so any 5038 * ticks that occurred while running the guest are accounted to 5039 * the guest. If vtime accounting is enabled, accounting uses 5040 * TB rather than ticks, so it can be done without enabling 5041 * interrupts here, which has the problem that it accounts 5042 * interrupt processing overhead to the host. 5043 */ 5044 powerpc_local_irq_pmu_save(flags); 5045 } 5046 guest_timing_exit_irqoff(); 5047 5048 powerpc_local_irq_pmu_restore(flags); 5049 5050 preempt_enable(); 5051 5052 /* 5053 * cancel pending decrementer exception if DEC is now positive, or if 5054 * entering a nested guest in which case the decrementer is now owned 5055 * by L2 and the L1 decrementer is provided in hdec_expires 5056 */ 5057 if (kvmppc_core_pending_dec(vcpu) && 5058 ((tb < kvmppc_dec_expires_host_tb(vcpu)) || 5059 (trap == BOOK3S_INTERRUPT_SYSCALL && 5060 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 5061 kvmppc_core_dequeue_dec(vcpu); 5062 5063 trace_kvm_guest_exit(vcpu); 5064 r = RESUME_GUEST; 5065 if (trap) { 5066 if (!nested) 5067 r = kvmppc_handle_exit_hv(vcpu, current); 5068 else 5069 r = kvmppc_handle_nested_exit(vcpu); 5070 } 5071 vcpu->arch.ret = r; 5072 5073 if (is_kvmppc_resume_guest(r) && !kvmppc_vcpu_check_block(vcpu)) { 5074 kvmppc_set_timer(vcpu); 5075 5076 prepare_to_rcuwait(wait); 5077 for (;;) { 5078 set_current_state(TASK_INTERRUPTIBLE); 5079 if (signal_pending(current)) { 5080 vcpu->stat.signal_exits++; 5081 run->exit_reason = KVM_EXIT_INTR; 5082 vcpu->arch.ret = -EINTR; 5083 break; 5084 } 5085 5086 if (kvmppc_vcpu_check_block(vcpu)) 5087 break; 5088 5089 trace_kvmppc_vcore_blocked(vcpu, 0); 5090 schedule(); 5091 trace_kvmppc_vcore_blocked(vcpu, 1); 5092 } 5093 finish_rcuwait(wait); 5094 } 5095 vcpu->arch.ceded = 0; 5096 5097 done: 5098 trace_kvmppc_run_vcpu_exit(vcpu); 5099 5100 return vcpu->arch.ret; 5101 5102 out: 5103 vcpu->cpu = -1; 5104 vcpu->arch.thread_cpu = -1; 5105 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 5106 powerpc_local_irq_pmu_restore(flags); 5107 preempt_enable(); 5108 goto done; 5109 } 5110 5111 static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu) 5112 { 5113 struct kvm_run *run = vcpu->run; 5114 int r; 5115 int srcu_idx; 5116 struct kvm *kvm; 5117 unsigned long msr; 5118 5119 start_timing(vcpu, &vcpu->arch.vcpu_entry); 5120 5121 if (!vcpu->arch.sane) { 5122 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 5123 return -EINVAL; 5124 } 5125 5126 /* No need to go into the guest when all we'll do is come back out */ 5127 if (signal_pending(current)) { 5128 run->exit_reason = KVM_EXIT_INTR; 5129 return -EINTR; 5130 } 5131 5132 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 5133 /* 5134 * Don't allow entry with a suspended transaction, because 5135 * the guest entry/exit code will lose it. 5136 */ 5137 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 5138 (current->thread.regs->msr & MSR_TM)) { 5139 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 5140 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 5141 run->fail_entry.hardware_entry_failure_reason = 0; 5142 return -EINVAL; 5143 } 5144 } 5145 #endif 5146 5147 /* 5148 * Force online to 1 for the sake of old userspace which doesn't 5149 * set it. 5150 */ 5151 if (!vcpu->arch.online) { 5152 atomic_inc(&vcpu->arch.vcore->online_count); 5153 vcpu->arch.online = 1; 5154 } 5155 5156 kvmppc_core_prepare_to_enter(vcpu); 5157 5158 kvm = vcpu->kvm; 5159 atomic_inc(&kvm->arch.vcpus_running); 5160 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 5161 smp_mb(); 5162 5163 msr = 0; 5164 if (IS_ENABLED(CONFIG_PPC_FPU)) 5165 msr |= MSR_FP; 5166 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 5167 msr |= MSR_VEC; 5168 if (cpu_has_feature(CPU_FTR_VSX)) 5169 msr |= MSR_VSX; 5170 if ((cpu_has_feature(CPU_FTR_TM) || 5171 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) && 5172 (kvmppc_get_hfscr_hv(vcpu) & HFSCR_TM)) 5173 msr |= MSR_TM; 5174 msr = msr_check_and_set(msr); 5175 5176 kvmppc_save_user_regs(); 5177 5178 kvmppc_save_current_sprs(); 5179 5180 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5181 vcpu->arch.waitp = &vcpu->arch.vcore->wait; 5182 vcpu->arch.pgdir = kvm->mm->pgd; 5183 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 5184 5185 do { 5186 accumulate_time(vcpu, &vcpu->arch.guest_entry); 5187 if (cpu_has_feature(CPU_FTR_ARCH_300)) 5188 r = kvmhv_run_single_vcpu(vcpu, ~(u64)0, 5189 vcpu->arch.vcore->lpcr); 5190 else 5191 r = kvmppc_run_vcpu(vcpu); 5192 5193 if (run->exit_reason == KVM_EXIT_PAPR_HCALL) { 5194 accumulate_time(vcpu, &vcpu->arch.hcall); 5195 5196 if (!kvmhv_is_nestedv2() && WARN_ON_ONCE(__kvmppc_get_msr_hv(vcpu) & MSR_PR)) { 5197 /* 5198 * These should have been caught reflected 5199 * into the guest by now. Final sanity check: 5200 * don't allow userspace to execute hcalls in 5201 * the hypervisor. 5202 */ 5203 r = RESUME_GUEST; 5204 continue; 5205 } 5206 trace_kvm_hcall_enter(vcpu); 5207 r = kvmppc_pseries_do_hcall(vcpu); 5208 trace_kvm_hcall_exit(vcpu, r); 5209 kvmppc_core_prepare_to_enter(vcpu); 5210 } else if (r == RESUME_PAGE_FAULT) { 5211 accumulate_time(vcpu, &vcpu->arch.pg_fault); 5212 srcu_idx = srcu_read_lock(&kvm->srcu); 5213 r = kvmppc_book3s_hv_page_fault(vcpu, 5214 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 5215 srcu_read_unlock(&kvm->srcu, srcu_idx); 5216 } else if (r == RESUME_PASSTHROUGH) { 5217 if (WARN_ON(xics_on_xive())) 5218 r = H_SUCCESS; 5219 else 5220 r = kvmppc_xics_rm_complete(vcpu, 0); 5221 } 5222 } while (is_kvmppc_resume_guest(r)); 5223 accumulate_time(vcpu, &vcpu->arch.vcpu_exit); 5224 5225 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 5226 atomic_dec(&kvm->arch.vcpus_running); 5227 5228 srr_regs_clobbered(); 5229 5230 end_timing(vcpu); 5231 5232 return r; 5233 } 5234 5235 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 5236 int shift, int sllp) 5237 { 5238 (*sps)->page_shift = shift; 5239 (*sps)->slb_enc = sllp; 5240 (*sps)->enc[0].page_shift = shift; 5241 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 5242 /* 5243 * Add 16MB MPSS support (may get filtered out by userspace) 5244 */ 5245 if (shift != 24) { 5246 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 5247 if (penc != -1) { 5248 (*sps)->enc[1].page_shift = 24; 5249 (*sps)->enc[1].pte_enc = penc; 5250 } 5251 } 5252 (*sps)++; 5253 } 5254 5255 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 5256 struct kvm_ppc_smmu_info *info) 5257 { 5258 struct kvm_ppc_one_seg_page_size *sps; 5259 5260 /* 5261 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 5262 * POWER7 doesn't support keys for instruction accesses, 5263 * POWER8 and POWER9 do. 5264 */ 5265 info->data_keys = 32; 5266 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 5267 5268 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 5269 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 5270 info->slb_size = 32; 5271 5272 /* We only support these sizes for now, and no muti-size segments */ 5273 sps = &info->sps[0]; 5274 kvmppc_add_seg_page_size(&sps, 12, 0); 5275 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 5276 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 5277 5278 /* If running as a nested hypervisor, we don't support HPT guests */ 5279 if (kvmhv_on_pseries()) 5280 info->flags |= KVM_PPC_NO_HASH; 5281 5282 return 0; 5283 } 5284 5285 /* 5286 * Get (and clear) the dirty memory log for a memory slot. 5287 */ 5288 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 5289 struct kvm_dirty_log *log) 5290 { 5291 struct kvm_memslots *slots; 5292 struct kvm_memory_slot *memslot; 5293 int r; 5294 unsigned long n, i; 5295 unsigned long *buf, *p; 5296 struct kvm_vcpu *vcpu; 5297 5298 mutex_lock(&kvm->slots_lock); 5299 5300 r = -EINVAL; 5301 if (log->slot >= KVM_USER_MEM_SLOTS) 5302 goto out; 5303 5304 slots = kvm_memslots(kvm); 5305 memslot = id_to_memslot(slots, log->slot); 5306 r = -ENOENT; 5307 if (!memslot || !memslot->dirty_bitmap) 5308 goto out; 5309 5310 /* 5311 * Use second half of bitmap area because both HPT and radix 5312 * accumulate bits in the first half. 5313 */ 5314 n = kvm_dirty_bitmap_bytes(memslot); 5315 buf = memslot->dirty_bitmap + n / sizeof(long); 5316 memset(buf, 0, n); 5317 5318 if (kvm_is_radix(kvm)) 5319 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 5320 else 5321 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 5322 if (r) 5323 goto out; 5324 5325 /* 5326 * We accumulate dirty bits in the first half of the 5327 * memslot's dirty_bitmap area, for when pages are paged 5328 * out or modified by the host directly. Pick up these 5329 * bits and add them to the map. 5330 */ 5331 p = memslot->dirty_bitmap; 5332 for (i = 0; i < n / sizeof(long); ++i) 5333 buf[i] |= xchg(&p[i], 0); 5334 5335 /* Harvest dirty bits from VPA and DTL updates */ 5336 /* Note: we never modify the SLB shadow buffer areas */ 5337 kvm_for_each_vcpu(i, vcpu, kvm) { 5338 spin_lock(&vcpu->arch.vpa_update_lock); 5339 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 5340 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 5341 spin_unlock(&vcpu->arch.vpa_update_lock); 5342 } 5343 5344 r = -EFAULT; 5345 if (copy_to_user(log->dirty_bitmap, buf, n)) 5346 goto out; 5347 5348 r = 0; 5349 out: 5350 mutex_unlock(&kvm->slots_lock); 5351 return r; 5352 } 5353 5354 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 5355 { 5356 vfree(slot->arch.rmap); 5357 slot->arch.rmap = NULL; 5358 } 5359 5360 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 5361 const struct kvm_memory_slot *old, 5362 struct kvm_memory_slot *new, 5363 enum kvm_mr_change change) 5364 { 5365 if (change == KVM_MR_CREATE) { 5366 unsigned long size = array_size(new->npages, sizeof(*new->arch.rmap)); 5367 5368 if ((size >> PAGE_SHIFT) > totalram_pages()) 5369 return -ENOMEM; 5370 5371 new->arch.rmap = vzalloc(size); 5372 if (!new->arch.rmap) 5373 return -ENOMEM; 5374 } else if (change != KVM_MR_DELETE) { 5375 new->arch.rmap = old->arch.rmap; 5376 } 5377 5378 return 0; 5379 } 5380 5381 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 5382 struct kvm_memory_slot *old, 5383 const struct kvm_memory_slot *new, 5384 enum kvm_mr_change change) 5385 { 5386 /* 5387 * If we are creating or modifying a memslot, it might make 5388 * some address that was previously cached as emulated 5389 * MMIO be no longer emulated MMIO, so invalidate 5390 * all the caches of emulated MMIO translations. 5391 */ 5392 if (change != KVM_MR_DELETE) 5393 atomic64_inc(&kvm->arch.mmio_update); 5394 5395 /* 5396 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 5397 * have already called kvm_arch_flush_shadow_memslot() to 5398 * flush shadow mappings. For KVM_MR_CREATE we have no 5399 * previous mappings. So the only case to handle is 5400 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 5401 * has been changed. 5402 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 5403 * to get rid of any THP PTEs in the partition-scoped page tables 5404 * so we can track dirtiness at the page level; we flush when 5405 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 5406 * using THP PTEs. 5407 */ 5408 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 5409 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 5410 kvmppc_radix_flush_memslot(kvm, old); 5411 /* 5412 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 5413 */ 5414 if (!kvm->arch.secure_guest) 5415 return; 5416 5417 switch (change) { 5418 case KVM_MR_CREATE: 5419 /* 5420 * @TODO kvmppc_uvmem_memslot_create() can fail and 5421 * return error. Fix this. 5422 */ 5423 kvmppc_uvmem_memslot_create(kvm, new); 5424 break; 5425 case KVM_MR_DELETE: 5426 kvmppc_uvmem_memslot_delete(kvm, old); 5427 break; 5428 default: 5429 /* TODO: Handle KVM_MR_MOVE */ 5430 break; 5431 } 5432 } 5433 5434 /* 5435 * Update LPCR values in kvm->arch and in vcores. 5436 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 5437 * of kvm->arch.lpcr update). 5438 */ 5439 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 5440 { 5441 long int i; 5442 u32 cores_done = 0; 5443 5444 if ((kvm->arch.lpcr & mask) == lpcr) 5445 return; 5446 5447 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 5448 5449 for (i = 0; i < KVM_MAX_VCORES; ++i) { 5450 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 5451 if (!vc) 5452 continue; 5453 5454 spin_lock(&vc->lock); 5455 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 5456 verify_lpcr(kvm, vc->lpcr); 5457 spin_unlock(&vc->lock); 5458 if (++cores_done >= kvm->arch.online_vcores) 5459 break; 5460 } 5461 5462 if (kvmhv_is_nestedv2()) { 5463 struct kvm_vcpu *vcpu; 5464 5465 kvm_for_each_vcpu(i, vcpu, kvm) { 5466 kvmhv_nestedv2_mark_dirty(vcpu, KVMPPC_GSID_LPCR); 5467 } 5468 } 5469 } 5470 5471 void kvmppc_setup_partition_table(struct kvm *kvm) 5472 { 5473 unsigned long dw0, dw1; 5474 5475 if (!kvm_is_radix(kvm)) { 5476 /* PS field - page size for VRMA */ 5477 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 5478 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 5479 /* HTABSIZE and HTABORG fields */ 5480 dw0 |= kvm->arch.sdr1; 5481 5482 /* Second dword as set by userspace */ 5483 dw1 = kvm->arch.process_table; 5484 } else { 5485 dw0 = PATB_HR | radix__get_tree_size() | 5486 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 5487 dw1 = PATB_GR | kvm->arch.process_table; 5488 } 5489 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 5490 } 5491 5492 /* 5493 * Set up HPT (hashed page table) and RMA (real-mode area). 5494 * Must be called with kvm->arch.mmu_setup_lock held. 5495 */ 5496 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 5497 { 5498 int err = 0; 5499 struct kvm *kvm = vcpu->kvm; 5500 unsigned long hva; 5501 struct kvm_memory_slot *memslot; 5502 struct vm_area_struct *vma; 5503 unsigned long lpcr = 0, senc; 5504 unsigned long psize, porder; 5505 int srcu_idx; 5506 5507 /* Allocate hashed page table (if not done already) and reset it */ 5508 if (!kvm->arch.hpt.virt) { 5509 int order = KVM_DEFAULT_HPT_ORDER; 5510 struct kvm_hpt_info info; 5511 5512 err = kvmppc_allocate_hpt(&info, order); 5513 /* If we get here, it means userspace didn't specify a 5514 * size explicitly. So, try successively smaller 5515 * sizes if the default failed. */ 5516 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 5517 err = kvmppc_allocate_hpt(&info, order); 5518 5519 if (err < 0) { 5520 pr_err("KVM: Couldn't alloc HPT\n"); 5521 goto out; 5522 } 5523 5524 kvmppc_set_hpt(kvm, &info); 5525 } 5526 5527 /* Look up the memslot for guest physical address 0 */ 5528 srcu_idx = srcu_read_lock(&kvm->srcu); 5529 memslot = gfn_to_memslot(kvm, 0); 5530 5531 /* We must have some memory at 0 by now */ 5532 err = -EINVAL; 5533 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 5534 goto out_srcu; 5535 5536 /* Look up the VMA for the start of this memory slot */ 5537 hva = memslot->userspace_addr; 5538 mmap_read_lock(kvm->mm); 5539 vma = vma_lookup(kvm->mm, hva); 5540 if (!vma || (vma->vm_flags & VM_IO)) 5541 goto up_out; 5542 5543 psize = vma_kernel_pagesize(vma); 5544 5545 mmap_read_unlock(kvm->mm); 5546 5547 /* We can handle 4k, 64k or 16M pages in the VRMA */ 5548 if (psize >= 0x1000000) 5549 psize = 0x1000000; 5550 else if (psize >= 0x10000) 5551 psize = 0x10000; 5552 else 5553 psize = 0x1000; 5554 porder = __ilog2(psize); 5555 5556 senc = slb_pgsize_encoding(psize); 5557 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 5558 (VRMA_VSID << SLB_VSID_SHIFT_1T); 5559 /* Create HPTEs in the hash page table for the VRMA */ 5560 kvmppc_map_vrma(vcpu, memslot, porder); 5561 5562 /* Update VRMASD field in the LPCR */ 5563 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 5564 /* the -4 is to account for senc values starting at 0x10 */ 5565 lpcr = senc << (LPCR_VRMASD_SH - 4); 5566 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 5567 } 5568 5569 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 5570 smp_wmb(); 5571 err = 0; 5572 out_srcu: 5573 srcu_read_unlock(&kvm->srcu, srcu_idx); 5574 out: 5575 return err; 5576 5577 up_out: 5578 mmap_read_unlock(kvm->mm); 5579 goto out_srcu; 5580 } 5581 5582 /* 5583 * Must be called with kvm->arch.mmu_setup_lock held and 5584 * mmu_ready = 0 and no vcpus running. 5585 */ 5586 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 5587 { 5588 unsigned long lpcr, lpcr_mask; 5589 5590 if (nesting_enabled(kvm)) 5591 kvmhv_release_all_nested(kvm); 5592 kvmppc_rmap_reset(kvm); 5593 kvm->arch.process_table = 0; 5594 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 5595 spin_lock(&kvm->mmu_lock); 5596 kvm->arch.radix = 0; 5597 spin_unlock(&kvm->mmu_lock); 5598 kvmppc_free_radix(kvm); 5599 5600 lpcr = LPCR_VPM1; 5601 lpcr_mask = LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5602 if (cpu_has_feature(CPU_FTR_ARCH_31)) 5603 lpcr_mask |= LPCR_HAIL; 5604 kvmppc_update_lpcr(kvm, lpcr, lpcr_mask); 5605 5606 return 0; 5607 } 5608 5609 /* 5610 * Must be called with kvm->arch.mmu_setup_lock held and 5611 * mmu_ready = 0 and no vcpus running. 5612 */ 5613 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 5614 { 5615 unsigned long lpcr, lpcr_mask; 5616 int err; 5617 5618 err = kvmppc_init_vm_radix(kvm); 5619 if (err) 5620 return err; 5621 kvmppc_rmap_reset(kvm); 5622 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 5623 spin_lock(&kvm->mmu_lock); 5624 kvm->arch.radix = 1; 5625 spin_unlock(&kvm->mmu_lock); 5626 kvmppc_free_hpt(&kvm->arch.hpt); 5627 5628 lpcr = LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5629 lpcr_mask = LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5630 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 5631 lpcr_mask |= LPCR_HAIL; 5632 if (cpu_has_feature(CPU_FTR_HVMODE) && 5633 (kvm->arch.host_lpcr & LPCR_HAIL)) 5634 lpcr |= LPCR_HAIL; 5635 } 5636 kvmppc_update_lpcr(kvm, lpcr, lpcr_mask); 5637 5638 return 0; 5639 } 5640 5641 #ifdef CONFIG_KVM_XICS 5642 /* 5643 * Allocate a per-core structure for managing state about which cores are 5644 * running in the host versus the guest and for exchanging data between 5645 * real mode KVM and CPU running in the host. 5646 * This is only done for the first VM. 5647 * The allocated structure stays even if all VMs have stopped. 5648 * It is only freed when the kvm-hv module is unloaded. 5649 * It's OK for this routine to fail, we just don't support host 5650 * core operations like redirecting H_IPI wakeups. 5651 */ 5652 void kvmppc_alloc_host_rm_ops(void) 5653 { 5654 struct kvmppc_host_rm_ops *ops; 5655 unsigned long l_ops; 5656 int cpu, core; 5657 int size; 5658 5659 if (cpu_has_feature(CPU_FTR_ARCH_300)) 5660 return; 5661 5662 /* Not the first time here ? */ 5663 if (kvmppc_host_rm_ops_hv != NULL) 5664 return; 5665 5666 ops = kzalloc_obj(struct kvmppc_host_rm_ops); 5667 if (!ops) 5668 return; 5669 5670 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 5671 ops->rm_core = kzalloc(size, GFP_KERNEL); 5672 5673 if (!ops->rm_core) { 5674 kfree(ops); 5675 return; 5676 } 5677 5678 cpus_read_lock(); 5679 5680 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 5681 if (!cpu_online(cpu)) 5682 continue; 5683 5684 core = cpu >> threads_shift; 5685 ops->rm_core[core].rm_state.in_host = 1; 5686 } 5687 5688 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 5689 5690 /* 5691 * Make the contents of the kvmppc_host_rm_ops structure visible 5692 * to other CPUs before we assign it to the global variable. 5693 * Do an atomic assignment (no locks used here), but if someone 5694 * beats us to it, just free our copy and return. 5695 */ 5696 smp_wmb(); 5697 l_ops = (unsigned long) ops; 5698 5699 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 5700 cpus_read_unlock(); 5701 kfree(ops->rm_core); 5702 kfree(ops); 5703 return; 5704 } 5705 5706 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 5707 "ppc/kvm_book3s:prepare", 5708 kvmppc_set_host_core, 5709 kvmppc_clear_host_core); 5710 cpus_read_unlock(); 5711 } 5712 5713 void kvmppc_free_host_rm_ops(void) 5714 { 5715 if (kvmppc_host_rm_ops_hv) { 5716 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 5717 kfree(kvmppc_host_rm_ops_hv->rm_core); 5718 kfree(kvmppc_host_rm_ops_hv); 5719 kvmppc_host_rm_ops_hv = NULL; 5720 } 5721 } 5722 #endif 5723 5724 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 5725 { 5726 unsigned long lpcr, lpid; 5727 int ret; 5728 5729 mutex_init(&kvm->arch.uvmem_lock); 5730 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 5731 mutex_init(&kvm->arch.mmu_setup_lock); 5732 5733 /* Allocate the guest's logical partition ID */ 5734 5735 if (!kvmhv_is_nestedv2()) { 5736 lpid = kvmppc_alloc_lpid(); 5737 if ((long)lpid < 0) 5738 return -ENOMEM; 5739 kvm->arch.lpid = lpid; 5740 } 5741 5742 kvmppc_alloc_host_rm_ops(); 5743 5744 kvmhv_vm_nested_init(kvm); 5745 5746 if (kvmhv_is_nestedv2()) { 5747 long rc; 5748 unsigned long guest_id; 5749 5750 rc = plpar_guest_create(0, &guest_id); 5751 5752 if (rc != H_SUCCESS) 5753 pr_err("KVM: Create Guest hcall failed, rc=%ld\n", rc); 5754 5755 switch (rc) { 5756 case H_PARAMETER: 5757 case H_FUNCTION: 5758 case H_STATE: 5759 return -EINVAL; 5760 case H_NOT_ENOUGH_RESOURCES: 5761 case H_ABORTED: 5762 return -ENOMEM; 5763 case H_AUTHORITY: 5764 return -EPERM; 5765 case H_NOT_AVAILABLE: 5766 return -EBUSY; 5767 } 5768 kvm->arch.lpid = guest_id; 5769 } 5770 5771 5772 /* 5773 * Since we don't flush the TLB when tearing down a VM, 5774 * and this lpid might have previously been used, 5775 * make sure we flush on each core before running the new VM. 5776 * On POWER9, the tlbie in mmu_partition_table_set_entry() 5777 * does this flush for us. 5778 */ 5779 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5780 cpumask_setall(&kvm->arch.need_tlb_flush); 5781 5782 /* Start out with the default set of hcalls enabled */ 5783 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 5784 sizeof(kvm->arch.enabled_hcalls)); 5785 5786 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5787 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 5788 5789 /* Init LPCR for virtual RMA mode */ 5790 if (cpu_has_feature(CPU_FTR_HVMODE)) { 5791 kvm->arch.host_lpid = mfspr(SPRN_LPID); 5792 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 5793 lpcr &= LPCR_PECE | LPCR_LPES; 5794 } else { 5795 /* 5796 * The L2 LPES mode will be set by the L0 according to whether 5797 * or not it needs to take external interrupts in HV mode. 5798 */ 5799 lpcr = 0; 5800 } 5801 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 5802 LPCR_VPM0 | LPCR_VPM1; 5803 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 5804 (VRMA_VSID << SLB_VSID_SHIFT_1T); 5805 /* On POWER8 turn on online bit to enable PURR/SPURR */ 5806 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5807 lpcr |= LPCR_ONL; 5808 /* 5809 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 5810 * Set HVICE bit to enable hypervisor virtualization interrupts. 5811 * Set HEIC to prevent OS interrupts to go to hypervisor (should 5812 * be unnecessary but better safe than sorry in case we re-enable 5813 * EE in HV mode with this LPCR still set) 5814 */ 5815 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5816 lpcr &= ~LPCR_VPM0; 5817 lpcr |= LPCR_HVICE | LPCR_HEIC; 5818 5819 /* 5820 * If xive is enabled, we route 0x500 interrupts directly 5821 * to the guest. 5822 */ 5823 if (xics_on_xive()) 5824 lpcr |= LPCR_LPES; 5825 } 5826 5827 /* 5828 * If the host uses radix, the guest starts out as radix. 5829 */ 5830 if (radix_enabled()) { 5831 kvm->arch.radix = 1; 5832 kvm->arch.mmu_ready = 1; 5833 lpcr &= ~LPCR_VPM1; 5834 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5835 if (cpu_has_feature(CPU_FTR_HVMODE) && 5836 cpu_has_feature(CPU_FTR_ARCH_31) && 5837 (kvm->arch.host_lpcr & LPCR_HAIL)) 5838 lpcr |= LPCR_HAIL; 5839 ret = kvmppc_init_vm_radix(kvm); 5840 if (ret) { 5841 if (kvmhv_is_nestedv2()) 5842 plpar_guest_delete(0, kvm->arch.lpid); 5843 else 5844 kvmppc_free_lpid(kvm->arch.lpid); 5845 return ret; 5846 } 5847 kvmppc_setup_partition_table(kvm); 5848 } 5849 5850 verify_lpcr(kvm, lpcr); 5851 kvm->arch.lpcr = lpcr; 5852 5853 /* Initialization for future HPT resizes */ 5854 kvm->arch.resize_hpt = NULL; 5855 5856 /* 5857 * Work out how many sets the TLB has, for the use of 5858 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 5859 */ 5860 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 5861 /* 5862 * P10 will flush all the congruence class with a single tlbiel 5863 */ 5864 kvm->arch.tlb_sets = 1; 5865 } else if (radix_enabled()) 5866 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 5867 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 5868 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 5869 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5870 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 5871 else 5872 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 5873 5874 /* 5875 * Track that we now have a HV mode VM active. This blocks secondary 5876 * CPU threads from coming online. 5877 */ 5878 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5879 kvm_hv_vm_activated(); 5880 5881 /* 5882 * Initialize smt_mode depending on processor. 5883 * POWER8 and earlier have to use "strict" threading, where 5884 * all vCPUs in a vcore have to run on the same (sub)core, 5885 * whereas on POWER9 the threads can each run a different 5886 * guest. 5887 */ 5888 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5889 kvm->arch.smt_mode = threads_per_subcore; 5890 else 5891 kvm->arch.smt_mode = 1; 5892 kvm->arch.emul_smt_mode = 1; 5893 5894 return 0; 5895 } 5896 5897 static int kvmppc_arch_create_vm_debugfs_hv(struct kvm *kvm) 5898 { 5899 kvmppc_mmu_debugfs_init(kvm); 5900 if (radix_enabled()) 5901 kvmhv_radix_debugfs_init(kvm); 5902 return 0; 5903 } 5904 5905 static void kvmppc_free_vcores(struct kvm *kvm) 5906 { 5907 long int i; 5908 5909 for (i = 0; i < KVM_MAX_VCORES; ++i) 5910 kfree(kvm->arch.vcores[i]); 5911 kvm->arch.online_vcores = 0; 5912 } 5913 5914 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 5915 { 5916 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5917 kvm_hv_vm_deactivated(); 5918 5919 kvmppc_free_vcores(kvm); 5920 5921 5922 if (kvm_is_radix(kvm)) 5923 kvmppc_free_radix(kvm); 5924 else 5925 kvmppc_free_hpt(&kvm->arch.hpt); 5926 5927 /* Perform global invalidation and return lpid to the pool */ 5928 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5929 if (nesting_enabled(kvm)) 5930 kvmhv_release_all_nested(kvm); 5931 kvm->arch.process_table = 0; 5932 if (kvm->arch.secure_guest) 5933 uv_svm_terminate(kvm->arch.lpid); 5934 if (!kvmhv_is_nestedv2()) 5935 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 5936 } 5937 5938 if (kvmhv_is_nestedv2()) { 5939 kvmhv_flush_lpid(kvm->arch.lpid); 5940 plpar_guest_delete(0, kvm->arch.lpid); 5941 } else { 5942 kvmppc_free_lpid(kvm->arch.lpid); 5943 } 5944 5945 kvmppc_free_pimap(kvm); 5946 } 5947 5948 /* We don't need to emulate any privileged instructions or dcbz */ 5949 static int kvmppc_core_emulate_op_hv(struct kvm_vcpu *vcpu, 5950 unsigned int inst, int *advance) 5951 { 5952 return EMULATE_FAIL; 5953 } 5954 5955 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 5956 ulong spr_val) 5957 { 5958 return EMULATE_FAIL; 5959 } 5960 5961 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 5962 ulong *spr_val) 5963 { 5964 return EMULATE_FAIL; 5965 } 5966 5967 static int kvmppc_core_check_processor_compat_hv(void) 5968 { 5969 if (cpu_has_feature(CPU_FTR_HVMODE) && 5970 cpu_has_feature(CPU_FTR_ARCH_206)) 5971 return 0; 5972 5973 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5974 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5975 return 0; 5976 5977 return -EIO; 5978 } 5979 5980 #ifdef CONFIG_KVM_XICS 5981 5982 void kvmppc_free_pimap(struct kvm *kvm) 5983 { 5984 kfree(kvm->arch.pimap); 5985 } 5986 5987 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5988 { 5989 return kzalloc_obj(struct kvmppc_passthru_irqmap); 5990 } 5991 5992 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5993 { 5994 struct irq_desc *desc; 5995 struct kvmppc_irq_map *irq_map; 5996 struct kvmppc_passthru_irqmap *pimap; 5997 struct irq_chip *chip; 5998 int i, rc = 0; 5999 struct irq_data *host_data; 6000 6001 if (!kvm_irq_bypass) 6002 return 1; 6003 6004 desc = irq_to_desc(host_irq); 6005 if (!desc) 6006 return -EIO; 6007 6008 mutex_lock(&kvm->lock); 6009 6010 pimap = kvm->arch.pimap; 6011 if (pimap == NULL) { 6012 /* First call, allocate structure to hold IRQ map */ 6013 pimap = kvmppc_alloc_pimap(); 6014 if (pimap == NULL) { 6015 mutex_unlock(&kvm->lock); 6016 return -ENOMEM; 6017 } 6018 kvm->arch.pimap = pimap; 6019 } 6020 6021 /* 6022 * For now, we only support interrupts for which the EOI operation 6023 * is an OPAL call followed by a write to XIRR, since that's 6024 * what our real-mode EOI code does, or a XIVE interrupt 6025 */ 6026 chip = irq_data_get_irq_chip(&desc->irq_data); 6027 if (!chip || !is_pnv_opal_msi(chip)) { 6028 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 6029 host_irq, guest_gsi); 6030 mutex_unlock(&kvm->lock); 6031 return -ENOENT; 6032 } 6033 6034 /* 6035 * See if we already have an entry for this guest IRQ number. 6036 * If it's mapped to a hardware IRQ number, that's an error, 6037 * otherwise re-use this entry. 6038 */ 6039 for (i = 0; i < pimap->n_mapped; i++) { 6040 if (guest_gsi == pimap->mapped[i].v_hwirq) { 6041 if (pimap->mapped[i].r_hwirq) { 6042 mutex_unlock(&kvm->lock); 6043 return -EINVAL; 6044 } 6045 break; 6046 } 6047 } 6048 6049 if (i == KVMPPC_PIRQ_MAPPED) { 6050 mutex_unlock(&kvm->lock); 6051 return -EAGAIN; /* table is full */ 6052 } 6053 6054 irq_map = &pimap->mapped[i]; 6055 6056 irq_map->v_hwirq = guest_gsi; 6057 irq_map->desc = desc; 6058 6059 /* 6060 * Order the above two stores before the next to serialize with 6061 * the KVM real mode handler. 6062 */ 6063 smp_wmb(); 6064 6065 /* 6066 * The 'host_irq' number is mapped in the PCI-MSI domain but 6067 * the underlying calls, which will EOI the interrupt in real 6068 * mode, need an HW IRQ number mapped in the XICS IRQ domain. 6069 */ 6070 host_data = irq_domain_get_irq_data(irq_get_default_domain(), host_irq); 6071 irq_map->r_hwirq = (unsigned int)irqd_to_hwirq(host_data); 6072 6073 if (i == pimap->n_mapped) 6074 pimap->n_mapped++; 6075 6076 if (xics_on_xive()) 6077 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, host_irq); 6078 else 6079 kvmppc_xics_set_mapped(kvm, guest_gsi, irq_map->r_hwirq); 6080 if (rc) 6081 irq_map->r_hwirq = 0; 6082 6083 mutex_unlock(&kvm->lock); 6084 6085 return 0; 6086 } 6087 6088 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 6089 { 6090 struct irq_desc *desc; 6091 struct kvmppc_passthru_irqmap *pimap; 6092 int i, rc = 0; 6093 6094 if (!kvm_irq_bypass) 6095 return 0; 6096 6097 desc = irq_to_desc(host_irq); 6098 if (!desc) 6099 return -EIO; 6100 6101 mutex_lock(&kvm->lock); 6102 if (!kvm->arch.pimap) 6103 goto unlock; 6104 6105 pimap = kvm->arch.pimap; 6106 6107 for (i = 0; i < pimap->n_mapped; i++) { 6108 if (guest_gsi == pimap->mapped[i].v_hwirq) 6109 break; 6110 } 6111 6112 if (i == pimap->n_mapped) { 6113 mutex_unlock(&kvm->lock); 6114 return -ENODEV; 6115 } 6116 6117 if (xics_on_xive()) 6118 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, host_irq); 6119 else 6120 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 6121 6122 /* invalidate the entry (what to do on error from the above ?) */ 6123 pimap->mapped[i].r_hwirq = 0; 6124 6125 /* 6126 * We don't free this structure even when the count goes to 6127 * zero. The structure is freed when we destroy the VM. 6128 */ 6129 unlock: 6130 mutex_unlock(&kvm->lock); 6131 return rc; 6132 } 6133 6134 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 6135 struct irq_bypass_producer *prod) 6136 { 6137 int ret = 0; 6138 struct kvm_kernel_irqfd *irqfd = 6139 container_of(cons, struct kvm_kernel_irqfd, consumer); 6140 6141 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 6142 if (ret) 6143 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 6144 prod->irq, irqfd->gsi, ret); 6145 else 6146 irqfd->producer = prod; 6147 6148 return ret; 6149 } 6150 6151 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 6152 struct irq_bypass_producer *prod) 6153 { 6154 int ret; 6155 struct kvm_kernel_irqfd *irqfd = 6156 container_of(cons, struct kvm_kernel_irqfd, consumer); 6157 6158 irqfd->producer = NULL; 6159 6160 /* 6161 * When producer of consumer is unregistered, we change back to 6162 * default external interrupt handling mode - KVM real mode 6163 * will switch back to host. 6164 */ 6165 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 6166 if (ret) 6167 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 6168 prod->irq, irqfd->gsi, ret); 6169 } 6170 #endif 6171 6172 static int kvm_arch_vm_ioctl_hv(struct file *filp, 6173 unsigned int ioctl, unsigned long arg) 6174 { 6175 struct kvm *kvm __maybe_unused = filp->private_data; 6176 void __user *argp = (void __user *)arg; 6177 int r; 6178 6179 switch (ioctl) { 6180 6181 case KVM_PPC_ALLOCATE_HTAB: { 6182 u32 htab_order; 6183 6184 /* If we're a nested hypervisor, we currently only support radix */ 6185 if (kvmhv_on_pseries()) { 6186 r = -EOPNOTSUPP; 6187 break; 6188 } 6189 6190 r = -EFAULT; 6191 if (get_user(htab_order, (u32 __user *)argp)) 6192 break; 6193 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 6194 if (r) 6195 break; 6196 r = 0; 6197 break; 6198 } 6199 6200 case KVM_PPC_GET_HTAB_FD: { 6201 struct kvm_get_htab_fd ghf; 6202 6203 r = -EFAULT; 6204 if (copy_from_user(&ghf, argp, sizeof(ghf))) 6205 break; 6206 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 6207 break; 6208 } 6209 6210 case KVM_PPC_RESIZE_HPT_PREPARE: { 6211 struct kvm_ppc_resize_hpt rhpt; 6212 6213 r = -EFAULT; 6214 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 6215 break; 6216 6217 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 6218 break; 6219 } 6220 6221 case KVM_PPC_RESIZE_HPT_COMMIT: { 6222 struct kvm_ppc_resize_hpt rhpt; 6223 6224 r = -EFAULT; 6225 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 6226 break; 6227 6228 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 6229 break; 6230 } 6231 6232 default: 6233 r = -ENOTTY; 6234 } 6235 6236 return r; 6237 } 6238 6239 /* 6240 * List of hcall numbers to enable by default. 6241 * For compatibility with old userspace, we enable by default 6242 * all hcalls that were implemented before the hcall-enabling 6243 * facility was added. Note this list should not include H_RTAS. 6244 */ 6245 static unsigned int default_hcall_list[] = { 6246 H_REMOVE, 6247 H_ENTER, 6248 H_READ, 6249 H_PROTECT, 6250 H_BULK_REMOVE, 6251 #ifdef CONFIG_SPAPR_TCE_IOMMU 6252 H_GET_TCE, 6253 H_PUT_TCE, 6254 #endif 6255 H_SET_DABR, 6256 H_SET_XDABR, 6257 H_CEDE, 6258 H_PROD, 6259 H_CONFER, 6260 H_REGISTER_VPA, 6261 #ifdef CONFIG_KVM_XICS 6262 H_EOI, 6263 H_CPPR, 6264 H_IPI, 6265 H_IPOLL, 6266 H_XIRR, 6267 H_XIRR_X, 6268 #endif 6269 0 6270 }; 6271 6272 static void init_default_hcalls(void) 6273 { 6274 int i; 6275 unsigned int hcall; 6276 6277 for (i = 0; default_hcall_list[i]; ++i) { 6278 hcall = default_hcall_list[i]; 6279 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 6280 __set_bit(hcall / 4, default_enabled_hcalls); 6281 } 6282 } 6283 6284 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 6285 { 6286 unsigned long lpcr; 6287 int radix; 6288 int err; 6289 6290 /* If not on a POWER9, reject it */ 6291 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 6292 return -ENODEV; 6293 6294 /* If any unknown flags set, reject it */ 6295 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 6296 return -EINVAL; 6297 6298 /* GR (guest radix) bit in process_table field must match */ 6299 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 6300 if (!!(cfg->process_table & PATB_GR) != radix) 6301 return -EINVAL; 6302 6303 /* Process table size field must be reasonable, i.e. <= 24 */ 6304 if ((cfg->process_table & PRTS_MASK) > 24) 6305 return -EINVAL; 6306 6307 /* We can change a guest to/from radix now, if the host is radix */ 6308 if (radix && !radix_enabled()) 6309 return -EINVAL; 6310 6311 /* If we're a nested hypervisor, we currently only support radix */ 6312 if (kvmhv_on_pseries() && !radix) 6313 return -EINVAL; 6314 6315 mutex_lock(&kvm->arch.mmu_setup_lock); 6316 if (radix != kvm_is_radix(kvm)) { 6317 if (kvm->arch.mmu_ready) { 6318 kvm->arch.mmu_ready = 0; 6319 /* order mmu_ready vs. vcpus_running */ 6320 smp_mb(); 6321 if (atomic_read(&kvm->arch.vcpus_running)) { 6322 kvm->arch.mmu_ready = 1; 6323 err = -EBUSY; 6324 goto out_unlock; 6325 } 6326 } 6327 if (radix) 6328 err = kvmppc_switch_mmu_to_radix(kvm); 6329 else 6330 err = kvmppc_switch_mmu_to_hpt(kvm); 6331 if (err) 6332 goto out_unlock; 6333 } 6334 6335 kvm->arch.process_table = cfg->process_table; 6336 kvmppc_setup_partition_table(kvm); 6337 6338 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 6339 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 6340 err = 0; 6341 6342 out_unlock: 6343 mutex_unlock(&kvm->arch.mmu_setup_lock); 6344 return err; 6345 } 6346 6347 static int kvmhv_enable_nested(struct kvm *kvm) 6348 { 6349 if (!nested) 6350 return -EPERM; 6351 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 6352 return -ENODEV; 6353 if (!radix_enabled()) 6354 return -ENODEV; 6355 if (kvmhv_is_nestedv2()) 6356 return -ENODEV; 6357 6358 /* kvm == NULL means the caller is testing if the capability exists */ 6359 if (kvm) 6360 kvm->arch.nested_enable = true; 6361 return 0; 6362 } 6363 6364 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 6365 int size) 6366 { 6367 int rc = -EINVAL; 6368 6369 if (kvmhv_vcpu_is_radix(vcpu)) { 6370 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 6371 6372 if (rc > 0) 6373 rc = -EINVAL; 6374 } 6375 6376 /* For now quadrants are the only way to access nested guest memory */ 6377 if (rc && vcpu->arch.nested) 6378 rc = -EAGAIN; 6379 6380 return rc; 6381 } 6382 6383 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 6384 int size) 6385 { 6386 int rc = -EINVAL; 6387 6388 if (kvmhv_vcpu_is_radix(vcpu)) { 6389 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 6390 6391 if (rc > 0) 6392 rc = -EINVAL; 6393 } 6394 6395 /* For now quadrants are the only way to access nested guest memory */ 6396 if (rc && vcpu->arch.nested) 6397 rc = -EAGAIN; 6398 6399 return rc; 6400 } 6401 6402 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 6403 { 6404 unpin_vpa(kvm, vpa); 6405 vpa->gpa = 0; 6406 vpa->pinned_addr = NULL; 6407 vpa->dirty = false; 6408 vpa->update_pending = 0; 6409 } 6410 6411 /* 6412 * Enable a guest to become a secure VM, or test whether 6413 * that could be enabled. 6414 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 6415 * tested (kvm == NULL) or enabled (kvm != NULL). 6416 */ 6417 static int kvmhv_enable_svm(struct kvm *kvm) 6418 { 6419 if (!kvmppc_uvmem_available()) 6420 return -EINVAL; 6421 if (kvm) 6422 kvm->arch.svm_enabled = 1; 6423 return 0; 6424 } 6425 6426 /* 6427 * IOCTL handler to turn off secure mode of guest 6428 * 6429 * - Release all device pages 6430 * - Issue ucall to terminate the guest on the UV side 6431 * - Unpin the VPA pages. 6432 * - Reinit the partition scoped page tables 6433 */ 6434 static int kvmhv_svm_off(struct kvm *kvm) 6435 { 6436 struct kvm_vcpu *vcpu; 6437 int mmu_was_ready; 6438 int srcu_idx; 6439 int ret = 0; 6440 unsigned long i; 6441 6442 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 6443 return ret; 6444 6445 mutex_lock(&kvm->arch.mmu_setup_lock); 6446 mmu_was_ready = kvm->arch.mmu_ready; 6447 if (kvm->arch.mmu_ready) { 6448 kvm->arch.mmu_ready = 0; 6449 /* order mmu_ready vs. vcpus_running */ 6450 smp_mb(); 6451 if (atomic_read(&kvm->arch.vcpus_running)) { 6452 kvm->arch.mmu_ready = 1; 6453 ret = -EBUSY; 6454 goto out; 6455 } 6456 } 6457 6458 srcu_idx = srcu_read_lock(&kvm->srcu); 6459 for (i = 0; i < kvm_arch_nr_memslot_as_ids(kvm); i++) { 6460 struct kvm_memory_slot *memslot; 6461 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 6462 int bkt; 6463 6464 if (!slots) 6465 continue; 6466 6467 kvm_for_each_memslot(memslot, bkt, slots) { 6468 kvmppc_uvmem_drop_pages(memslot, kvm, true); 6469 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 6470 } 6471 } 6472 srcu_read_unlock(&kvm->srcu, srcu_idx); 6473 6474 ret = uv_svm_terminate(kvm->arch.lpid); 6475 if (ret != U_SUCCESS) { 6476 ret = -EINVAL; 6477 goto out; 6478 } 6479 6480 /* 6481 * When secure guest is reset, all the guest pages are sent 6482 * to UV via UV_PAGE_IN before the non-boot vcpus get a 6483 * chance to run and unpin their VPA pages. Unpinning of all 6484 * VPA pages is done here explicitly so that VPA pages 6485 * can be migrated to the secure side. 6486 * 6487 * This is required to for the secure SMP guest to reboot 6488 * correctly. 6489 */ 6490 kvm_for_each_vcpu(i, vcpu, kvm) { 6491 spin_lock(&vcpu->arch.vpa_update_lock); 6492 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 6493 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 6494 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 6495 spin_unlock(&vcpu->arch.vpa_update_lock); 6496 } 6497 6498 kvmppc_setup_partition_table(kvm); 6499 kvm->arch.secure_guest = 0; 6500 kvm->arch.mmu_ready = mmu_was_ready; 6501 out: 6502 mutex_unlock(&kvm->arch.mmu_setup_lock); 6503 return ret; 6504 } 6505 6506 static int kvmhv_enable_dawr1(struct kvm *kvm) 6507 { 6508 if (!cpu_has_feature(CPU_FTR_DAWR1)) 6509 return -ENODEV; 6510 6511 /* kvm == NULL means the caller is testing if the capability exists */ 6512 if (kvm) 6513 kvm->arch.dawr1_enabled = true; 6514 return 0; 6515 } 6516 6517 static bool kvmppc_hash_v3_possible(void) 6518 { 6519 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 6520 return false; 6521 6522 if (!cpu_has_feature(CPU_FTR_HVMODE)) 6523 return false; 6524 6525 /* 6526 * POWER9 chips before version 2.02 can't have some threads in 6527 * HPT mode and some in radix mode on the same core. 6528 */ 6529 if (radix_enabled()) { 6530 unsigned int pvr = mfspr(SPRN_PVR); 6531 if ((pvr >> 16) == PVR_POWER9 && 6532 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 6533 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 6534 return false; 6535 } 6536 6537 return true; 6538 } 6539 6540 static int kvmppc_map_compat_capabilities(u32 cpu_version, 6541 unsigned long *capabilities) 6542 { 6543 switch (cpu_version) { 6544 case PVR_ARCH_31_P11: 6545 *capabilities |= KVM_PPC_COMPAT_CAP_POWER11; 6546 fallthrough; 6547 case PVR_ARCH_31: 6548 *capabilities |= KVM_PPC_COMPAT_CAP_POWER10; 6549 fallthrough; 6550 case PVR_ARCH_300: 6551 *capabilities |= KVM_PPC_COMPAT_CAP_POWER9; 6552 break; 6553 default: 6554 return -EINVAL; 6555 } 6556 6557 return 0; 6558 } 6559 6560 static int kvmppc_get_compat_caps(struct kvm_ppc_compat_caps *host_caps) 6561 { 6562 struct device_node *np; 6563 unsigned long capabilities = 0; 6564 long rc = -EINVAL; 6565 u32 cpu_version = 0; 6566 6567 if (kvmhv_on_pseries()) { 6568 if (kvmhv_is_nestedv2()) { 6569 WARN_ON_ONCE(!nested_capabilities); 6570 capabilities = nested_capabilities; 6571 rc = 0; 6572 } else { 6573 for_each_node_by_type(np, "cpu") { 6574 if (!of_property_read_u32(np, "cpu-version", 6575 &cpu_version)) { 6576 of_node_put(np); 6577 break; 6578 } 6579 } 6580 if (!cpu_version) 6581 return -EINVAL; 6582 rc = kvmppc_map_compat_capabilities(cpu_version, 6583 &capabilities); 6584 } 6585 } 6586 6587 if (rc < 0) 6588 return rc; 6589 6590 host_caps->compat_capabilities = capabilities & KVM_PPC_COMPAT_BITMASK; 6591 6592 return rc; 6593 } 6594 6595 static struct kvmppc_ops kvm_ops_hv = { 6596 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 6597 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 6598 .get_one_reg = kvmppc_get_one_reg_hv, 6599 .set_one_reg = kvmppc_set_one_reg_hv, 6600 .vcpu_load = kvmppc_core_vcpu_load_hv, 6601 .vcpu_put = kvmppc_core_vcpu_put_hv, 6602 .inject_interrupt = kvmppc_inject_interrupt_hv, 6603 .set_msr = kvmppc_set_msr_hv, 6604 .vcpu_run = kvmppc_vcpu_run_hv, 6605 .vcpu_create = kvmppc_core_vcpu_create_hv, 6606 .vcpu_free = kvmppc_core_vcpu_free_hv, 6607 .check_requests = kvmppc_core_check_requests_hv, 6608 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 6609 .flush_memslot = kvmppc_core_flush_memslot_hv, 6610 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 6611 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 6612 .unmap_gfn_range = kvm_unmap_gfn_range_hv, 6613 .age_gfn = kvm_age_gfn_hv, 6614 .test_age_gfn = kvm_test_age_gfn_hv, 6615 .free_memslot = kvmppc_core_free_memslot_hv, 6616 .init_vm = kvmppc_core_init_vm_hv, 6617 .destroy_vm = kvmppc_core_destroy_vm_hv, 6618 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 6619 .emulate_op = kvmppc_core_emulate_op_hv, 6620 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 6621 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 6622 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 6623 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 6624 .hcall_implemented = kvmppc_hcall_impl_hv, 6625 .configure_mmu = kvmhv_configure_mmu, 6626 .get_rmmu_info = kvmhv_get_rmmu_info, 6627 .set_smt_mode = kvmhv_set_smt_mode, 6628 .enable_nested = kvmhv_enable_nested, 6629 .load_from_eaddr = kvmhv_load_from_eaddr, 6630 .store_to_eaddr = kvmhv_store_to_eaddr, 6631 .enable_svm = kvmhv_enable_svm, 6632 .svm_off = kvmhv_svm_off, 6633 .enable_dawr1 = kvmhv_enable_dawr1, 6634 .hash_v3_possible = kvmppc_hash_v3_possible, 6635 .create_vcpu_debugfs = kvmppc_arch_create_vcpu_debugfs_hv, 6636 .create_vm_debugfs = kvmppc_arch_create_vm_debugfs_hv, 6637 .get_compat_caps = kvmppc_get_compat_caps, 6638 }; 6639 6640 static int kvm_init_subcore_bitmap(void) 6641 { 6642 int i, j; 6643 int nr_cores = cpu_nr_cores(); 6644 struct sibling_subcore_state *sibling_subcore_state; 6645 6646 for (i = 0; i < nr_cores; i++) { 6647 int first_cpu = i * threads_per_core; 6648 int node = cpu_to_node(first_cpu); 6649 6650 /* Ignore if it is already allocated. */ 6651 if (paca_ptrs[first_cpu]->sibling_subcore_state) 6652 continue; 6653 6654 sibling_subcore_state = 6655 kzalloc_node(sizeof(struct sibling_subcore_state), 6656 GFP_KERNEL, node); 6657 if (!sibling_subcore_state) 6658 return -ENOMEM; 6659 6660 6661 for (j = 0; j < threads_per_core; j++) { 6662 int cpu = first_cpu + j; 6663 6664 paca_ptrs[cpu]->sibling_subcore_state = 6665 sibling_subcore_state; 6666 } 6667 } 6668 return 0; 6669 } 6670 6671 static int kvmppc_radix_possible(void) 6672 { 6673 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 6674 } 6675 6676 static int kvmppc_book3s_init_hv(void) 6677 { 6678 int r; 6679 6680 if (!tlbie_capable) { 6681 pr_err("KVM-HV: Host does not support TLBIE\n"); 6682 return -ENODEV; 6683 } 6684 6685 /* 6686 * FIXME!! Do we need to check on all cpus ? 6687 */ 6688 r = kvmppc_core_check_processor_compat_hv(); 6689 if (r < 0) 6690 return -ENODEV; 6691 6692 r = kvmhv_nested_init(); 6693 if (r) 6694 return r; 6695 6696 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 6697 r = kvm_init_subcore_bitmap(); 6698 if (r) 6699 goto err; 6700 } 6701 6702 /* 6703 * We need a way of accessing the XICS interrupt controller, 6704 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 6705 * indirectly, via OPAL. 6706 */ 6707 #ifdef CONFIG_SMP 6708 if (!xics_on_xive() && !kvmhv_on_pseries() && 6709 !local_paca->kvm_hstate.xics_phys) { 6710 struct device_node *np; 6711 6712 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 6713 if (!np) { 6714 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 6715 r = -ENODEV; 6716 goto err; 6717 } 6718 /* presence of intc confirmed - node can be dropped again */ 6719 of_node_put(np); 6720 } 6721 #endif 6722 6723 init_default_hcalls(); 6724 6725 init_vcore_lists(); 6726 6727 r = kvmppc_mmu_hv_init(); 6728 if (r) 6729 goto err; 6730 6731 if (kvmppc_radix_possible()) { 6732 r = kvmppc_radix_init(); 6733 if (r) 6734 goto err; 6735 } 6736 6737 r = kvmppc_uvmem_init(); 6738 if (r < 0) { 6739 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 6740 return r; 6741 } 6742 6743 #if defined(CONFIG_KVM_XICS) 6744 /* 6745 * IRQ bypass is supported only for interrupts whose EOI operations are 6746 * handled via OPAL calls. Therefore, register IRQ bypass handlers 6747 * exclusively for PowerNV KVM when booted with 'xive=off', indicating 6748 * the use of the emulated XICS interrupt controller. 6749 */ 6750 if (!kvmhv_on_pseries()) { 6751 pr_info("KVM-HV: Enabling IRQ bypass\n"); 6752 kvm_ops_hv.irq_bypass_add_producer = 6753 kvmppc_irq_bypass_add_producer_hv; 6754 kvm_ops_hv.irq_bypass_del_producer = 6755 kvmppc_irq_bypass_del_producer_hv; 6756 } 6757 #endif 6758 6759 kvm_ops_hv.owner = THIS_MODULE; 6760 kvmppc_hv_ops = &kvm_ops_hv; 6761 6762 return 0; 6763 6764 err: 6765 kvmhv_nested_exit(); 6766 kvmppc_radix_exit(); 6767 6768 return r; 6769 } 6770 6771 static void kvmppc_book3s_exit_hv(void) 6772 { 6773 kvmppc_uvmem_free(); 6774 kvmppc_free_host_rm_ops(); 6775 if (kvmppc_radix_possible()) 6776 kvmppc_radix_exit(); 6777 kvmppc_hv_ops = NULL; 6778 kvmhv_nested_exit(); 6779 } 6780 6781 module_init(kvmppc_book3s_init_hv); 6782 module_exit(kvmppc_book3s_exit_hv); 6783 MODULE_DESCRIPTION("KVM on Book3S (POWER8 and later) in hypervisor mode"); 6784 MODULE_LICENSE("GPL"); 6785 MODULE_ALIAS_MISCDEV(KVM_MINOR); 6786 MODULE_ALIAS("devname:kvm"); 6787