1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Texas Instruments ADS7950 SPI ADC driver
4 *
5 * Copyright 2016 David Lechner <david@lechnology.com>
6 *
7 * Based on iio/ad7923.c:
8 * Copyright 2011 Analog Devices Inc
9 * Copyright 2012 CS Systemes d'Information
10 *
11 * And also on hwmon/ads79xx.c
12 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
13 * Nishanth Menon
14 */
15
16 #include <linux/acpi.h>
17 #include <linux/bitops.h>
18 #include <linux/device.h>
19 #include <linux/err.h>
20 #include <linux/gpio/driver.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/slab.h>
26 #include <linux/spi/spi.h>
27
28 #include <linux/iio/buffer.h>
29 #include <linux/iio/iio.h>
30 #include <linux/iio/sysfs.h>
31 #include <linux/iio/trigger_consumer.h>
32 #include <linux/iio/triggered_buffer.h>
33
34 /*
35 * In case of ACPI, we use the 5000 mV as default for the reference pin.
36 * Device tree users encode that via the vref-supply regulator.
37 */
38 #define TI_ADS7950_VA_MV_ACPI_DEFAULT 5000
39
40 #define TI_ADS7950_CR_GPIO BIT(14)
41 #define TI_ADS7950_CR_MANUAL BIT(12)
42 #define TI_ADS7950_CR_WRITE BIT(11)
43 #define TI_ADS7950_CR_CHAN(ch) ((ch) << 7)
44 #define TI_ADS7950_CR_RANGE_5V BIT(6)
45 #define TI_ADS7950_CR_GPIO_DATA BIT(4)
46
47 #define TI_ADS7950_MAX_CHAN 16
48 #define TI_ADS7950_NUM_GPIOS 4
49
50 /* val = value, dec = left shift, bits = number of bits of the mask */
51 #define TI_ADS7950_EXTRACT(val, dec, bits) \
52 (((val) >> (dec)) & ((1 << (bits)) - 1))
53
54 #define TI_ADS7950_MAN_CMD(cmd) (TI_ADS7950_CR_MANUAL | (cmd))
55 #define TI_ADS7950_GPIO_CMD(cmd) (TI_ADS7950_CR_GPIO | (cmd))
56
57 /* Manual mode configuration */
58 #define TI_ADS7950_MAN_CMD_SETTINGS(st) \
59 (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
60 /* GPIO mode configuration */
61 #define TI_ADS7950_GPIO_CMD_SETTINGS(st) \
62 (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
63
64 struct ti_ads7950_state {
65 struct spi_device *spi;
66 struct spi_transfer ring_xfer;
67 struct spi_transfer scan_single_xfer[3];
68 struct spi_message ring_msg;
69 struct spi_message scan_single_msg;
70
71 /* Lock to protect the spi xfer buffers */
72 struct mutex slock;
73 struct gpio_chip chip;
74
75 struct regulator *reg;
76 unsigned int vref_mv;
77
78 /*
79 * Bitmask of lower 7 bits used for configuration
80 * These bits only can be written when TI_ADS7950_CR_WRITE
81 * is set, otherwise it retains its original state.
82 * [0-3] GPIO signal
83 * [4] Set following frame to return GPIO signal values
84 * [5] Powers down device
85 * [6] Sets Vref range1(2.5v) or range2(5v)
86 *
87 * Bits present on Manual/Auto1/Auto2 commands
88 */
89 unsigned int cmd_settings_bitmask;
90
91 /*
92 * Bitmask of GPIO command
93 * [0-3] GPIO direction
94 * [4-6] Different GPIO alarm mode configurations
95 * [7] GPIO 2 as device range input
96 * [8] GPIO 3 as device power down input
97 * [9] Reset all registers
98 * [10-11] N/A
99 */
100 unsigned int gpio_cmd_settings_bitmask;
101
102 /*
103 * DMA (thus cache coherency maintenance) may require the
104 * transfer buffers to live in their own cache lines.
105 */
106 u16 rx_buf[TI_ADS7950_MAX_CHAN + 2] __aligned(IIO_DMA_MINALIGN);
107 u16 tx_buf[TI_ADS7950_MAX_CHAN + 2];
108 u16 single_tx;
109 u16 single_rx;
110
111 };
112
113 struct ti_ads7950_chip_info {
114 const struct iio_chan_spec *channels;
115 unsigned int num_channels;
116 };
117
118 #define TI_ADS7950_V_CHAN(index, bits) \
119 { \
120 .type = IIO_VOLTAGE, \
121 .indexed = 1, \
122 .channel = index, \
123 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
124 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
125 .address = index, \
126 .datasheet_name = "CH##index", \
127 .scan_index = index, \
128 .scan_type = { \
129 .sign = 'u', \
130 .realbits = bits, \
131 .storagebits = 16, \
132 .shift = 12 - (bits), \
133 .endianness = IIO_CPU, \
134 }, \
135 }
136
137 #define DECLARE_TI_ADS7950_4_CHANNELS(name, bits) \
138 const struct iio_chan_spec name ## _channels[] = { \
139 TI_ADS7950_V_CHAN(0, bits), \
140 TI_ADS7950_V_CHAN(1, bits), \
141 TI_ADS7950_V_CHAN(2, bits), \
142 TI_ADS7950_V_CHAN(3, bits), \
143 IIO_CHAN_SOFT_TIMESTAMP(4), \
144 }
145
146 #define DECLARE_TI_ADS7950_8_CHANNELS(name, bits) \
147 const struct iio_chan_spec name ## _channels[] = { \
148 TI_ADS7950_V_CHAN(0, bits), \
149 TI_ADS7950_V_CHAN(1, bits), \
150 TI_ADS7950_V_CHAN(2, bits), \
151 TI_ADS7950_V_CHAN(3, bits), \
152 TI_ADS7950_V_CHAN(4, bits), \
153 TI_ADS7950_V_CHAN(5, bits), \
154 TI_ADS7950_V_CHAN(6, bits), \
155 TI_ADS7950_V_CHAN(7, bits), \
156 IIO_CHAN_SOFT_TIMESTAMP(8), \
157 }
158
159 #define DECLARE_TI_ADS7950_12_CHANNELS(name, bits) \
160 const struct iio_chan_spec name ## _channels[] = { \
161 TI_ADS7950_V_CHAN(0, bits), \
162 TI_ADS7950_V_CHAN(1, bits), \
163 TI_ADS7950_V_CHAN(2, bits), \
164 TI_ADS7950_V_CHAN(3, bits), \
165 TI_ADS7950_V_CHAN(4, bits), \
166 TI_ADS7950_V_CHAN(5, bits), \
167 TI_ADS7950_V_CHAN(6, bits), \
168 TI_ADS7950_V_CHAN(7, bits), \
169 TI_ADS7950_V_CHAN(8, bits), \
170 TI_ADS7950_V_CHAN(9, bits), \
171 TI_ADS7950_V_CHAN(10, bits), \
172 TI_ADS7950_V_CHAN(11, bits), \
173 IIO_CHAN_SOFT_TIMESTAMP(12), \
174 }
175
176 #define DECLARE_TI_ADS7950_16_CHANNELS(name, bits) \
177 const struct iio_chan_spec name ## _channels[] = { \
178 TI_ADS7950_V_CHAN(0, bits), \
179 TI_ADS7950_V_CHAN(1, bits), \
180 TI_ADS7950_V_CHAN(2, bits), \
181 TI_ADS7950_V_CHAN(3, bits), \
182 TI_ADS7950_V_CHAN(4, bits), \
183 TI_ADS7950_V_CHAN(5, bits), \
184 TI_ADS7950_V_CHAN(6, bits), \
185 TI_ADS7950_V_CHAN(7, bits), \
186 TI_ADS7950_V_CHAN(8, bits), \
187 TI_ADS7950_V_CHAN(9, bits), \
188 TI_ADS7950_V_CHAN(10, bits), \
189 TI_ADS7950_V_CHAN(11, bits), \
190 TI_ADS7950_V_CHAN(12, bits), \
191 TI_ADS7950_V_CHAN(13, bits), \
192 TI_ADS7950_V_CHAN(14, bits), \
193 TI_ADS7950_V_CHAN(15, bits), \
194 IIO_CHAN_SOFT_TIMESTAMP(16), \
195 }
196
197 static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7950, 12);
198 static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7951, 12);
199 static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7952, 12);
200 static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7953, 12);
201 static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7954, 10);
202 static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7955, 10);
203 static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7956, 10);
204 static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7957, 10);
205 static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7958, 8);
206 static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7959, 8);
207 static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7960, 8);
208 static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7961, 8);
209
210 static const struct ti_ads7950_chip_info ti_ads7950_chip_info = {
211 .channels = ti_ads7950_channels,
212 .num_channels = ARRAY_SIZE(ti_ads7950_channels),
213 };
214
215 static const struct ti_ads7950_chip_info ti_ads7951_chip_info = {
216 .channels = ti_ads7951_channels,
217 .num_channels = ARRAY_SIZE(ti_ads7951_channels),
218 };
219
220 static const struct ti_ads7950_chip_info ti_ads7952_chip_info = {
221 .channels = ti_ads7952_channels,
222 .num_channels = ARRAY_SIZE(ti_ads7952_channels),
223 };
224
225 static const struct ti_ads7950_chip_info ti_ads7953_chip_info = {
226 .channels = ti_ads7953_channels,
227 .num_channels = ARRAY_SIZE(ti_ads7953_channels),
228 };
229
230 static const struct ti_ads7950_chip_info ti_ads7954_chip_info = {
231 .channels = ti_ads7954_channels,
232 .num_channels = ARRAY_SIZE(ti_ads7954_channels),
233 };
234
235 static const struct ti_ads7950_chip_info ti_ads7955_chip_info = {
236 .channels = ti_ads7955_channels,
237 .num_channels = ARRAY_SIZE(ti_ads7955_channels),
238 };
239
240 static const struct ti_ads7950_chip_info ti_ads7956_chip_info = {
241 .channels = ti_ads7956_channels,
242 .num_channels = ARRAY_SIZE(ti_ads7956_channels),
243 };
244
245 static const struct ti_ads7950_chip_info ti_ads7957_chip_info = {
246 .channels = ti_ads7957_channels,
247 .num_channels = ARRAY_SIZE(ti_ads7957_channels),
248 };
249
250 static const struct ti_ads7950_chip_info ti_ads7958_chip_info = {
251 .channels = ti_ads7958_channels,
252 .num_channels = ARRAY_SIZE(ti_ads7958_channels),
253 };
254
255 static const struct ti_ads7950_chip_info ti_ads7959_chip_info = {
256 .channels = ti_ads7959_channels,
257 .num_channels = ARRAY_SIZE(ti_ads7959_channels),
258 };
259
260 static const struct ti_ads7950_chip_info ti_ads7960_chip_info = {
261 .channels = ti_ads7960_channels,
262 .num_channels = ARRAY_SIZE(ti_ads7960_channels),
263 };
264
265 static const struct ti_ads7950_chip_info ti_ads7961_chip_info = {
266 .channels = ti_ads7961_channels,
267 .num_channels = ARRAY_SIZE(ti_ads7961_channels),
268 };
269
270 /*
271 * ti_ads7950_update_scan_mode() setup the spi transfer buffer for the new
272 * scan mask
273 */
ti_ads7950_update_scan_mode(struct iio_dev * indio_dev,const unsigned long * active_scan_mask)274 static int ti_ads7950_update_scan_mode(struct iio_dev *indio_dev,
275 const unsigned long *active_scan_mask)
276 {
277 struct ti_ads7950_state *st = iio_priv(indio_dev);
278 int i, cmd, len;
279
280 len = 0;
281 for_each_set_bit(i, active_scan_mask, indio_dev->num_channels) {
282 cmd = TI_ADS7950_MAN_CMD(TI_ADS7950_CR_CHAN(i));
283 st->tx_buf[len++] = cmd;
284 }
285
286 /* Data for the 1st channel is not returned until the 3rd transfer */
287 st->tx_buf[len++] = 0;
288 st->tx_buf[len++] = 0;
289
290 st->ring_xfer.len = len * 2;
291
292 return 0;
293 }
294
ti_ads7950_trigger_handler(int irq,void * p)295 static irqreturn_t ti_ads7950_trigger_handler(int irq, void *p)
296 {
297 struct iio_poll_func *pf = p;
298 struct iio_dev *indio_dev = pf->indio_dev;
299 struct ti_ads7950_state *st = iio_priv(indio_dev);
300 int ret;
301
302 mutex_lock(&st->slock);
303 ret = spi_sync(st->spi, &st->ring_msg);
304 if (ret < 0)
305 goto out;
306
307 iio_push_to_buffers_with_ts_unaligned(indio_dev, &st->rx_buf[2],
308 sizeof(*st->rx_buf) *
309 TI_ADS7950_MAX_CHAN,
310 iio_get_time_ns(indio_dev));
311
312 out:
313 mutex_unlock(&st->slock);
314 iio_trigger_notify_done(indio_dev->trig);
315
316 return IRQ_HANDLED;
317 }
318
ti_ads7950_scan_direct(struct iio_dev * indio_dev,unsigned int ch)319 static int ti_ads7950_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
320 {
321 struct ti_ads7950_state *st = iio_priv(indio_dev);
322 int ret, cmd;
323
324 mutex_lock(&st->slock);
325 cmd = TI_ADS7950_MAN_CMD(TI_ADS7950_CR_CHAN(ch));
326 st->single_tx = cmd;
327
328 ret = spi_sync(st->spi, &st->scan_single_msg);
329 if (ret)
330 goto out;
331
332 ret = st->single_rx;
333
334 out:
335 mutex_unlock(&st->slock);
336
337 return ret;
338 }
339
ti_ads7950_get_range(struct ti_ads7950_state * st)340 static int ti_ads7950_get_range(struct ti_ads7950_state *st)
341 {
342 int vref;
343
344 if (st->vref_mv) {
345 vref = st->vref_mv;
346 } else {
347 vref = regulator_get_voltage(st->reg);
348 if (vref < 0)
349 return vref;
350
351 vref /= 1000;
352 }
353
354 if (st->cmd_settings_bitmask & TI_ADS7950_CR_RANGE_5V)
355 vref *= 2;
356
357 return vref;
358 }
359
ti_ads7950_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)360 static int ti_ads7950_read_raw(struct iio_dev *indio_dev,
361 struct iio_chan_spec const *chan,
362 int *val, int *val2, long m)
363 {
364 struct ti_ads7950_state *st = iio_priv(indio_dev);
365 int ret;
366
367 switch (m) {
368 case IIO_CHAN_INFO_RAW:
369 ret = ti_ads7950_scan_direct(indio_dev, chan->address);
370 if (ret < 0)
371 return ret;
372
373 if (chan->address != TI_ADS7950_EXTRACT(ret, 12, 4))
374 return -EIO;
375
376 *val = TI_ADS7950_EXTRACT(ret, chan->scan_type.shift,
377 chan->scan_type.realbits);
378
379 return IIO_VAL_INT;
380 case IIO_CHAN_INFO_SCALE:
381 ret = ti_ads7950_get_range(st);
382 if (ret < 0)
383 return ret;
384
385 *val = ret;
386 *val2 = (1 << chan->scan_type.realbits) - 1;
387
388 return IIO_VAL_FRACTIONAL;
389 }
390
391 return -EINVAL;
392 }
393
394 static const struct iio_info ti_ads7950_info = {
395 .read_raw = &ti_ads7950_read_raw,
396 .update_scan_mode = ti_ads7950_update_scan_mode,
397 };
398
ti_ads7950_set(struct gpio_chip * chip,unsigned int offset,int value)399 static int ti_ads7950_set(struct gpio_chip *chip, unsigned int offset,
400 int value)
401 {
402 struct ti_ads7950_state *st = gpiochip_get_data(chip);
403 int ret;
404
405 mutex_lock(&st->slock);
406
407 if (value)
408 st->cmd_settings_bitmask |= BIT(offset);
409 else
410 st->cmd_settings_bitmask &= ~BIT(offset);
411
412 st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
413 ret = spi_sync(st->spi, &st->scan_single_msg);
414
415 mutex_unlock(&st->slock);
416
417 return ret;
418 }
419
ti_ads7950_get(struct gpio_chip * chip,unsigned int offset)420 static int ti_ads7950_get(struct gpio_chip *chip, unsigned int offset)
421 {
422 struct ti_ads7950_state *st = gpiochip_get_data(chip);
423 bool state;
424 int ret;
425
426 mutex_lock(&st->slock);
427
428 /* If set as output, return the output */
429 if (st->gpio_cmd_settings_bitmask & BIT(offset)) {
430 state = st->cmd_settings_bitmask & BIT(offset);
431 ret = 0;
432 goto out;
433 }
434
435 /* GPIO data bit sets SDO bits 12-15 to GPIO input */
436 st->cmd_settings_bitmask |= TI_ADS7950_CR_GPIO_DATA;
437 st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
438 ret = spi_sync(st->spi, &st->scan_single_msg);
439 if (ret)
440 goto out;
441
442 state = (st->single_rx >> 12) & BIT(offset);
443
444 /* Revert back to original settings */
445 st->cmd_settings_bitmask &= ~TI_ADS7950_CR_GPIO_DATA;
446 st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
447 ret = spi_sync(st->spi, &st->scan_single_msg);
448 if (ret)
449 goto out;
450
451 out:
452 mutex_unlock(&st->slock);
453
454 return ret ?: state;
455 }
456
ti_ads7950_get_direction(struct gpio_chip * chip,unsigned int offset)457 static int ti_ads7950_get_direction(struct gpio_chip *chip,
458 unsigned int offset)
459 {
460 struct ti_ads7950_state *st = gpiochip_get_data(chip);
461
462 /* Bitmask is inverted from GPIO framework 0=input/1=output */
463 return !(st->gpio_cmd_settings_bitmask & BIT(offset));
464 }
465
_ti_ads7950_set_direction(struct gpio_chip * chip,int offset,int input)466 static int _ti_ads7950_set_direction(struct gpio_chip *chip, int offset,
467 int input)
468 {
469 struct ti_ads7950_state *st = gpiochip_get_data(chip);
470 int ret = 0;
471
472 mutex_lock(&st->slock);
473
474 /* Only change direction if needed */
475 if (input && (st->gpio_cmd_settings_bitmask & BIT(offset)))
476 st->gpio_cmd_settings_bitmask &= ~BIT(offset);
477 else if (!input && !(st->gpio_cmd_settings_bitmask & BIT(offset)))
478 st->gpio_cmd_settings_bitmask |= BIT(offset);
479 else
480 goto out;
481
482 st->single_tx = TI_ADS7950_GPIO_CMD_SETTINGS(st);
483 ret = spi_sync(st->spi, &st->scan_single_msg);
484
485 out:
486 mutex_unlock(&st->slock);
487
488 return ret;
489 }
490
ti_ads7950_direction_input(struct gpio_chip * chip,unsigned int offset)491 static int ti_ads7950_direction_input(struct gpio_chip *chip,
492 unsigned int offset)
493 {
494 return _ti_ads7950_set_direction(chip, offset, 1);
495 }
496
ti_ads7950_direction_output(struct gpio_chip * chip,unsigned int offset,int value)497 static int ti_ads7950_direction_output(struct gpio_chip *chip,
498 unsigned int offset, int value)
499 {
500 int ret;
501
502 ret = ti_ads7950_set(chip, offset, value);
503 if (ret)
504 return ret;
505
506 return _ti_ads7950_set_direction(chip, offset, 0);
507 }
508
ti_ads7950_init_hw(struct ti_ads7950_state * st)509 static int ti_ads7950_init_hw(struct ti_ads7950_state *st)
510 {
511 int ret = 0;
512
513 mutex_lock(&st->slock);
514
515 /* Settings for Manual/Auto1/Auto2 commands */
516 /* Default to 5v ref */
517 st->cmd_settings_bitmask = TI_ADS7950_CR_RANGE_5V;
518 st->single_tx = TI_ADS7950_MAN_CMD_SETTINGS(st);
519 ret = spi_sync(st->spi, &st->scan_single_msg);
520 if (ret)
521 goto out;
522
523 /* Settings for GPIO command */
524 st->gpio_cmd_settings_bitmask = 0x0;
525 st->single_tx = TI_ADS7950_GPIO_CMD_SETTINGS(st);
526 ret = spi_sync(st->spi, &st->scan_single_msg);
527
528 out:
529 mutex_unlock(&st->slock);
530
531 return ret;
532 }
533
ti_ads7950_probe(struct spi_device * spi)534 static int ti_ads7950_probe(struct spi_device *spi)
535 {
536 struct ti_ads7950_state *st;
537 struct iio_dev *indio_dev;
538 const struct ti_ads7950_chip_info *info;
539 int ret;
540
541 spi->bits_per_word = 16;
542 spi->mode |= SPI_CS_WORD;
543 ret = spi_setup(spi);
544 if (ret < 0) {
545 dev_err(&spi->dev, "Error in spi setup\n");
546 return ret;
547 }
548
549 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
550 if (!indio_dev)
551 return -ENOMEM;
552
553 st = iio_priv(indio_dev);
554
555 spi_set_drvdata(spi, indio_dev);
556
557 st->spi = spi;
558
559 info = spi_get_device_match_data(spi);
560
561 indio_dev->name = spi_get_device_id(spi)->name;
562 indio_dev->modes = INDIO_DIRECT_MODE;
563 indio_dev->channels = info->channels;
564 indio_dev->num_channels = info->num_channels;
565 indio_dev->info = &ti_ads7950_info;
566
567 /* build spi ring message */
568 spi_message_init(&st->ring_msg);
569
570 st->ring_xfer.tx_buf = &st->tx_buf[0];
571 st->ring_xfer.rx_buf = &st->rx_buf[0];
572 /* len will be set later */
573
574 spi_message_add_tail(&st->ring_xfer, &st->ring_msg);
575
576 /*
577 * Setup default message. The sample is read at the end of the first
578 * transfer, then it takes one full cycle to convert the sample and one
579 * more cycle to send the value. The conversion process is driven by
580 * the SPI clock, which is why we have 3 transfers. The middle one is
581 * just dummy data sent while the chip is converting the sample that
582 * was read at the end of the first transfer.
583 */
584
585 st->scan_single_xfer[0].tx_buf = &st->single_tx;
586 st->scan_single_xfer[0].len = 2;
587 st->scan_single_xfer[0].cs_change = 1;
588 st->scan_single_xfer[1].tx_buf = &st->single_tx;
589 st->scan_single_xfer[1].len = 2;
590 st->scan_single_xfer[1].cs_change = 1;
591 st->scan_single_xfer[2].rx_buf = &st->single_rx;
592 st->scan_single_xfer[2].len = 2;
593
594 spi_message_init_with_transfers(&st->scan_single_msg,
595 st->scan_single_xfer, 3);
596
597 /* Use hard coded value for reference voltage in ACPI case */
598 if (ACPI_COMPANION(&spi->dev))
599 st->vref_mv = TI_ADS7950_VA_MV_ACPI_DEFAULT;
600
601 mutex_init(&st->slock);
602
603 st->reg = devm_regulator_get(&spi->dev, "vref");
604 if (IS_ERR(st->reg)) {
605 ret = dev_err_probe(&spi->dev, PTR_ERR(st->reg),
606 "Failed to get regulator \"vref\"\n");
607 goto error_destroy_mutex;
608 }
609
610 ret = regulator_enable(st->reg);
611 if (ret) {
612 dev_err(&spi->dev, "Failed to enable regulator \"vref\"\n");
613 goto error_destroy_mutex;
614 }
615
616 ret = iio_triggered_buffer_setup(indio_dev, NULL,
617 &ti_ads7950_trigger_handler, NULL);
618 if (ret) {
619 dev_err(&spi->dev, "Failed to setup triggered buffer\n");
620 goto error_disable_reg;
621 }
622
623 ret = ti_ads7950_init_hw(st);
624 if (ret) {
625 dev_err(&spi->dev, "Failed to init adc chip\n");
626 goto error_cleanup_ring;
627 }
628
629 ret = iio_device_register(indio_dev);
630 if (ret) {
631 dev_err(&spi->dev, "Failed to register iio device\n");
632 goto error_cleanup_ring;
633 }
634
635 /* Add GPIO chip */
636 st->chip.label = dev_name(&st->spi->dev);
637 st->chip.parent = &st->spi->dev;
638 st->chip.owner = THIS_MODULE;
639 st->chip.can_sleep = true;
640 st->chip.base = -1;
641 st->chip.ngpio = TI_ADS7950_NUM_GPIOS;
642 st->chip.get_direction = ti_ads7950_get_direction;
643 st->chip.direction_input = ti_ads7950_direction_input;
644 st->chip.direction_output = ti_ads7950_direction_output;
645 st->chip.get = ti_ads7950_get;
646 st->chip.set = ti_ads7950_set;
647
648 ret = gpiochip_add_data(&st->chip, st);
649 if (ret) {
650 dev_err(&spi->dev, "Failed to init GPIOs\n");
651 goto error_iio_device;
652 }
653
654 return 0;
655
656 error_iio_device:
657 iio_device_unregister(indio_dev);
658 error_cleanup_ring:
659 iio_triggered_buffer_cleanup(indio_dev);
660 error_disable_reg:
661 regulator_disable(st->reg);
662 error_destroy_mutex:
663 mutex_destroy(&st->slock);
664
665 return ret;
666 }
667
ti_ads7950_remove(struct spi_device * spi)668 static void ti_ads7950_remove(struct spi_device *spi)
669 {
670 struct iio_dev *indio_dev = spi_get_drvdata(spi);
671 struct ti_ads7950_state *st = iio_priv(indio_dev);
672
673 gpiochip_remove(&st->chip);
674 iio_device_unregister(indio_dev);
675 iio_triggered_buffer_cleanup(indio_dev);
676 regulator_disable(st->reg);
677 mutex_destroy(&st->slock);
678 }
679
680 static const struct spi_device_id ti_ads7950_id[] = {
681 { "ads7950", (kernel_ulong_t)&ti_ads7950_chip_info },
682 { "ads7951", (kernel_ulong_t)&ti_ads7951_chip_info },
683 { "ads7952", (kernel_ulong_t)&ti_ads7952_chip_info },
684 { "ads7953", (kernel_ulong_t)&ti_ads7953_chip_info },
685 { "ads7954", (kernel_ulong_t)&ti_ads7954_chip_info },
686 { "ads7955", (kernel_ulong_t)&ti_ads7955_chip_info },
687 { "ads7956", (kernel_ulong_t)&ti_ads7956_chip_info },
688 { "ads7957", (kernel_ulong_t)&ti_ads7957_chip_info },
689 { "ads7958", (kernel_ulong_t)&ti_ads7958_chip_info },
690 { "ads7959", (kernel_ulong_t)&ti_ads7959_chip_info },
691 { "ads7960", (kernel_ulong_t)&ti_ads7960_chip_info },
692 { "ads7961", (kernel_ulong_t)&ti_ads7961_chip_info },
693 { }
694 };
695 MODULE_DEVICE_TABLE(spi, ti_ads7950_id);
696
697 static const struct of_device_id ads7950_of_table[] = {
698 { .compatible = "ti,ads7950", .data = &ti_ads7950_chip_info },
699 { .compatible = "ti,ads7951", .data = &ti_ads7951_chip_info },
700 { .compatible = "ti,ads7952", .data = &ti_ads7952_chip_info },
701 { .compatible = "ti,ads7953", .data = &ti_ads7953_chip_info },
702 { .compatible = "ti,ads7954", .data = &ti_ads7954_chip_info },
703 { .compatible = "ti,ads7955", .data = &ti_ads7955_chip_info },
704 { .compatible = "ti,ads7956", .data = &ti_ads7956_chip_info },
705 { .compatible = "ti,ads7957", .data = &ti_ads7957_chip_info },
706 { .compatible = "ti,ads7958", .data = &ti_ads7958_chip_info },
707 { .compatible = "ti,ads7959", .data = &ti_ads7959_chip_info },
708 { .compatible = "ti,ads7960", .data = &ti_ads7960_chip_info },
709 { .compatible = "ti,ads7961", .data = &ti_ads7961_chip_info },
710 { }
711 };
712 MODULE_DEVICE_TABLE(of, ads7950_of_table);
713
714 static struct spi_driver ti_ads7950_driver = {
715 .driver = {
716 .name = "ads7950",
717 .of_match_table = ads7950_of_table,
718 },
719 .probe = ti_ads7950_probe,
720 .remove = ti_ads7950_remove,
721 .id_table = ti_ads7950_id,
722 };
723 module_spi_driver(ti_ads7950_driver);
724
725 MODULE_AUTHOR("David Lechner <david@lechnology.com>");
726 MODULE_DESCRIPTION("TI TI_ADS7950 ADC");
727 MODULE_LICENSE("GPL v2");
728