1 /*
2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include "mlx5_ib.h"
34
35 struct mlx5_ib_gsi_wr {
36 struct ib_cqe cqe;
37 struct ib_wc wc;
38 bool completed:1;
39 };
40
mlx5_ib_deth_sqpn_cap(struct mlx5_ib_dev * dev)41 static bool mlx5_ib_deth_sqpn_cap(struct mlx5_ib_dev *dev)
42 {
43 return MLX5_CAP_GEN(dev->mdev, set_deth_sqpn);
44 }
45
46 /* Call with gsi->lock locked */
generate_completions(struct mlx5_ib_qp * mqp)47 static void generate_completions(struct mlx5_ib_qp *mqp)
48 {
49 struct mlx5_ib_gsi_qp *gsi = &mqp->gsi;
50 struct ib_cq *gsi_cq = mqp->ibqp.send_cq;
51 struct mlx5_ib_gsi_wr *wr;
52 u32 index;
53
54 for (index = gsi->outstanding_ci; index != gsi->outstanding_pi;
55 index++) {
56 wr = &gsi->outstanding_wrs[index % gsi->cap.max_send_wr];
57
58 if (!wr->completed)
59 break;
60
61 WARN_ON_ONCE(mlx5_ib_generate_wc(gsi_cq, &wr->wc));
62 wr->completed = false;
63 }
64
65 gsi->outstanding_ci = index;
66 }
67
handle_single_completion(struct ib_cq * cq,struct ib_wc * wc)68 static void handle_single_completion(struct ib_cq *cq, struct ib_wc *wc)
69 {
70 struct mlx5_ib_gsi_qp *gsi = cq->cq_context;
71 struct mlx5_ib_gsi_wr *wr =
72 container_of(wc->wr_cqe, struct mlx5_ib_gsi_wr, cqe);
73 struct mlx5_ib_qp *mqp = container_of(gsi, struct mlx5_ib_qp, gsi);
74 u64 wr_id;
75 unsigned long flags;
76
77 spin_lock_irqsave(&gsi->lock, flags);
78 wr->completed = true;
79 wr_id = wr->wc.wr_id;
80 wr->wc = *wc;
81 wr->wc.wr_id = wr_id;
82 wr->wc.qp = &mqp->ibqp;
83
84 generate_completions(mqp);
85 spin_unlock_irqrestore(&gsi->lock, flags);
86 }
87
mlx5_ib_create_gsi(struct ib_pd * pd,struct mlx5_ib_qp * mqp,struct ib_qp_init_attr * attr)88 int mlx5_ib_create_gsi(struct ib_pd *pd, struct mlx5_ib_qp *mqp,
89 struct ib_qp_init_attr *attr)
90 {
91 struct mlx5_ib_dev *dev = to_mdev(pd->device);
92 struct mlx5_ib_gsi_qp *gsi;
93 struct ib_qp_init_attr hw_init_attr = *attr;
94 const u8 port_num = attr->port_num;
95 int num_qps = 0;
96 int ret;
97
98 if (mlx5_ib_deth_sqpn_cap(dev)) {
99 if (MLX5_CAP_GEN(dev->mdev,
100 port_type) == MLX5_CAP_PORT_TYPE_IB)
101 num_qps = pd->device->attrs.max_pkeys;
102 else if (dev->lag_active)
103 num_qps = dev->lag_ports;
104 }
105
106 gsi = &mqp->gsi;
107 gsi->tx_qps = kzalloc_objs(*gsi->tx_qps, num_qps);
108 if (!gsi->tx_qps)
109 return -ENOMEM;
110
111 gsi->outstanding_wrs =
112 kzalloc_objs(*gsi->outstanding_wrs, attr->cap.max_send_wr);
113 if (!gsi->outstanding_wrs) {
114 ret = -ENOMEM;
115 goto err_free_tx;
116 }
117
118 if (dev->devr.ports[port_num - 1].gsi) {
119 mlx5_ib_warn(dev, "GSI QP already exists on port %d\n",
120 port_num);
121 ret = -EBUSY;
122 goto err_free_wrs;
123 }
124 gsi->num_qps = num_qps;
125 spin_lock_init(&gsi->lock);
126
127 gsi->cap = attr->cap;
128 gsi->port_num = port_num;
129
130 gsi->cq = ib_alloc_cq(pd->device, gsi, attr->cap.max_send_wr, 0,
131 IB_POLL_SOFTIRQ);
132 if (IS_ERR(gsi->cq)) {
133 mlx5_ib_warn(dev,
134 "unable to create send CQ for GSI QP. error %pe\n",
135 gsi->cq);
136 ret = PTR_ERR(gsi->cq);
137 goto err_free_wrs;
138 }
139
140 hw_init_attr.qp_type = MLX5_IB_QPT_HW_GSI;
141 hw_init_attr.send_cq = gsi->cq;
142 if (num_qps) {
143 hw_init_attr.cap.max_send_wr = 0;
144 hw_init_attr.cap.max_send_sge = 0;
145 hw_init_attr.cap.max_inline_data = 0;
146 }
147
148 gsi->rx_qp = ib_create_qp(pd, &hw_init_attr);
149 if (IS_ERR(gsi->rx_qp)) {
150 mlx5_ib_warn(dev,
151 "unable to create hardware GSI QP. error %pe\n",
152 gsi->rx_qp);
153 ret = PTR_ERR(gsi->rx_qp);
154 goto err_destroy_cq;
155 }
156
157 dev->devr.ports[attr->port_num - 1].gsi = gsi;
158 return 0;
159
160 err_destroy_cq:
161 ib_free_cq(gsi->cq);
162 err_free_wrs:
163 kfree(gsi->outstanding_wrs);
164 err_free_tx:
165 kfree(gsi->tx_qps);
166 return ret;
167 }
168
mlx5_ib_destroy_gsi(struct mlx5_ib_qp * mqp)169 int mlx5_ib_destroy_gsi(struct mlx5_ib_qp *mqp)
170 {
171 struct mlx5_ib_dev *dev = to_mdev(mqp->ibqp.device);
172 struct mlx5_ib_gsi_qp *gsi = &mqp->gsi;
173 const int port_num = gsi->port_num;
174 int qp_index;
175 int ret;
176
177 ret = ib_destroy_qp(gsi->rx_qp);
178 if (ret) {
179 mlx5_ib_warn(dev, "unable to destroy hardware GSI QP. error %d\n",
180 ret);
181 return ret;
182 }
183 dev->devr.ports[port_num - 1].gsi = NULL;
184 gsi->rx_qp = NULL;
185
186 for (qp_index = 0; qp_index < gsi->num_qps; ++qp_index) {
187 if (!gsi->tx_qps[qp_index])
188 continue;
189 WARN_ON_ONCE(ib_destroy_qp(gsi->tx_qps[qp_index]));
190 gsi->tx_qps[qp_index] = NULL;
191 }
192
193 ib_free_cq(gsi->cq);
194
195 kfree(gsi->outstanding_wrs);
196 kfree(gsi->tx_qps);
197 return 0;
198 }
199
create_gsi_ud_qp(struct mlx5_ib_gsi_qp * gsi)200 static struct ib_qp *create_gsi_ud_qp(struct mlx5_ib_gsi_qp *gsi)
201 {
202 struct ib_pd *pd = gsi->rx_qp->pd;
203 struct ib_qp_init_attr init_attr = {
204 .event_handler = gsi->rx_qp->event_handler,
205 .qp_context = gsi->rx_qp->qp_context,
206 .send_cq = gsi->cq,
207 .recv_cq = gsi->rx_qp->recv_cq,
208 .cap = {
209 .max_send_wr = gsi->cap.max_send_wr,
210 .max_send_sge = gsi->cap.max_send_sge,
211 .max_inline_data = gsi->cap.max_inline_data,
212 },
213 .qp_type = IB_QPT_UD,
214 .create_flags = MLX5_IB_QP_CREATE_SQPN_QP1,
215 };
216
217 return ib_create_qp(pd, &init_attr);
218 }
219
modify_to_rts(struct mlx5_ib_gsi_qp * gsi,struct ib_qp * qp,u16 pkey_index)220 static int modify_to_rts(struct mlx5_ib_gsi_qp *gsi, struct ib_qp *qp,
221 u16 pkey_index)
222 {
223 struct mlx5_ib_dev *dev = to_mdev(qp->device);
224 struct ib_qp_attr attr;
225 int mask;
226 int ret;
227
228 mask = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY | IB_QP_PORT;
229 attr.qp_state = IB_QPS_INIT;
230 attr.pkey_index = pkey_index;
231 attr.qkey = IB_QP1_QKEY;
232 attr.port_num = gsi->port_num;
233 ret = ib_modify_qp(qp, &attr, mask);
234 if (ret) {
235 mlx5_ib_err(dev, "could not change QP%d state to INIT: %d\n",
236 qp->qp_num, ret);
237 return ret;
238 }
239
240 attr.qp_state = IB_QPS_RTR;
241 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
242 if (ret) {
243 mlx5_ib_err(dev, "could not change QP%d state to RTR: %d\n",
244 qp->qp_num, ret);
245 return ret;
246 }
247
248 attr.qp_state = IB_QPS_RTS;
249 attr.sq_psn = 0;
250 ret = ib_modify_qp(qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
251 if (ret) {
252 mlx5_ib_err(dev, "could not change QP%d state to RTS: %d\n",
253 qp->qp_num, ret);
254 return ret;
255 }
256
257 return 0;
258 }
259
setup_qp(struct mlx5_ib_gsi_qp * gsi,u16 qp_index)260 static void setup_qp(struct mlx5_ib_gsi_qp *gsi, u16 qp_index)
261 {
262 struct ib_device *device = gsi->rx_qp->device;
263 struct mlx5_ib_dev *dev = to_mdev(device);
264 int pkey_index = qp_index;
265 struct mlx5_ib_qp *mqp;
266 struct ib_qp *qp;
267 unsigned long flags;
268 u16 pkey;
269 int ret;
270
271 if (MLX5_CAP_GEN(dev->mdev, port_type) != MLX5_CAP_PORT_TYPE_IB)
272 pkey_index = 0;
273
274 ret = ib_query_pkey(device, gsi->port_num, pkey_index, &pkey);
275 if (ret) {
276 mlx5_ib_warn(dev, "unable to read P_Key at port %d, index %d\n",
277 gsi->port_num, qp_index);
278 return;
279 }
280
281 if (!pkey) {
282 mlx5_ib_dbg(dev, "invalid P_Key at port %d, index %d. Skipping.\n",
283 gsi->port_num, qp_index);
284 return;
285 }
286
287 spin_lock_irqsave(&gsi->lock, flags);
288 qp = gsi->tx_qps[qp_index];
289 spin_unlock_irqrestore(&gsi->lock, flags);
290 if (qp) {
291 mlx5_ib_dbg(dev, "already existing GSI TX QP at port %d, index %d. Skipping\n",
292 gsi->port_num, qp_index);
293 return;
294 }
295
296 qp = create_gsi_ud_qp(gsi);
297 if (IS_ERR(qp)) {
298 mlx5_ib_warn(dev,
299 "unable to create hardware UD QP for GSI: %pe\n",
300 qp);
301 return;
302 }
303
304 mqp = to_mqp(qp);
305 if (dev->lag_active)
306 mqp->gsi_lag_port = qp_index + 1;
307 ret = modify_to_rts(gsi, qp, pkey_index);
308 if (ret)
309 goto err_destroy_qp;
310
311 spin_lock_irqsave(&gsi->lock, flags);
312 WARN_ON_ONCE(gsi->tx_qps[qp_index]);
313 gsi->tx_qps[qp_index] = qp;
314 spin_unlock_irqrestore(&gsi->lock, flags);
315
316 return;
317
318 err_destroy_qp:
319 WARN_ON_ONCE(qp);
320 }
321
mlx5_ib_gsi_modify_qp(struct ib_qp * qp,struct ib_qp_attr * attr,int attr_mask)322 int mlx5_ib_gsi_modify_qp(struct ib_qp *qp, struct ib_qp_attr *attr,
323 int attr_mask)
324 {
325 struct mlx5_ib_dev *dev = to_mdev(qp->device);
326 struct mlx5_ib_qp *mqp = to_mqp(qp);
327 struct mlx5_ib_gsi_qp *gsi = &mqp->gsi;
328 u16 qp_index;
329 int ret;
330
331 mlx5_ib_dbg(dev, "modifying GSI QP to state %d\n", attr->qp_state);
332
333 ret = ib_modify_qp(gsi->rx_qp, attr, attr_mask);
334 if (ret) {
335 mlx5_ib_warn(dev, "unable to modify GSI rx QP: %d\n", ret);
336 return ret;
337 }
338
339 if (to_mqp(gsi->rx_qp)->state != IB_QPS_RTS)
340 return 0;
341
342 for (qp_index = 0; qp_index < gsi->num_qps; ++qp_index)
343 setup_qp(gsi, qp_index);
344 return 0;
345 }
346
mlx5_ib_gsi_query_qp(struct ib_qp * qp,struct ib_qp_attr * qp_attr,int qp_attr_mask,struct ib_qp_init_attr * qp_init_attr)347 int mlx5_ib_gsi_query_qp(struct ib_qp *qp, struct ib_qp_attr *qp_attr,
348 int qp_attr_mask,
349 struct ib_qp_init_attr *qp_init_attr)
350 {
351 struct mlx5_ib_qp *mqp = to_mqp(qp);
352 struct mlx5_ib_gsi_qp *gsi = &mqp->gsi;
353 int ret;
354
355 ret = ib_query_qp(gsi->rx_qp, qp_attr, qp_attr_mask, qp_init_attr);
356 qp_init_attr->cap = gsi->cap;
357 return ret;
358 }
359
360 /* Call with gsi->lock locked */
mlx5_ib_add_outstanding_wr(struct mlx5_ib_qp * mqp,struct ib_ud_wr * wr,struct ib_wc * wc)361 static int mlx5_ib_add_outstanding_wr(struct mlx5_ib_qp *mqp,
362 struct ib_ud_wr *wr, struct ib_wc *wc)
363 {
364 struct mlx5_ib_gsi_qp *gsi = &mqp->gsi;
365 struct mlx5_ib_dev *dev = to_mdev(gsi->rx_qp->device);
366 struct mlx5_ib_gsi_wr *gsi_wr;
367
368 if (gsi->outstanding_pi == gsi->outstanding_ci + gsi->cap.max_send_wr) {
369 mlx5_ib_warn(dev, "no available GSI work request.\n");
370 return -ENOMEM;
371 }
372
373 gsi_wr = &gsi->outstanding_wrs[gsi->outstanding_pi %
374 gsi->cap.max_send_wr];
375 gsi->outstanding_pi++;
376
377 if (!wc) {
378 memset(&gsi_wr->wc, 0, sizeof(gsi_wr->wc));
379 gsi_wr->wc.pkey_index = wr->pkey_index;
380 gsi_wr->wc.wr_id = wr->wr.wr_id;
381 } else {
382 gsi_wr->wc = *wc;
383 gsi_wr->completed = true;
384 }
385
386 gsi_wr->cqe.done = &handle_single_completion;
387 wr->wr.wr_cqe = &gsi_wr->cqe;
388
389 return 0;
390 }
391
392 /* Call with gsi->lock locked */
mlx5_ib_gsi_silent_drop(struct mlx5_ib_qp * mqp,struct ib_ud_wr * wr)393 static int mlx5_ib_gsi_silent_drop(struct mlx5_ib_qp *mqp, struct ib_ud_wr *wr)
394 {
395 struct ib_wc wc = {
396 { .wr_id = wr->wr.wr_id },
397 .status = IB_WC_SUCCESS,
398 .opcode = IB_WC_SEND,
399 .qp = &mqp->ibqp,
400 };
401 int ret;
402
403 ret = mlx5_ib_add_outstanding_wr(mqp, wr, &wc);
404 if (ret)
405 return ret;
406
407 generate_completions(mqp);
408
409 return 0;
410 }
411
412 /* Call with gsi->lock locked */
get_tx_qp(struct mlx5_ib_gsi_qp * gsi,struct ib_ud_wr * wr)413 static struct ib_qp *get_tx_qp(struct mlx5_ib_gsi_qp *gsi, struct ib_ud_wr *wr)
414 {
415 struct mlx5_ib_dev *dev = to_mdev(gsi->rx_qp->device);
416 struct mlx5_ib_ah *ah = to_mah(wr->ah);
417 int qp_index = wr->pkey_index;
418
419 if (!gsi->num_qps)
420 return gsi->rx_qp;
421
422 if (dev->lag_active && ah->xmit_port)
423 qp_index = ah->xmit_port - 1;
424
425 if (qp_index >= gsi->num_qps)
426 return NULL;
427
428 return gsi->tx_qps[qp_index];
429 }
430
mlx5_ib_gsi_post_send(struct ib_qp * qp,const struct ib_send_wr * wr,const struct ib_send_wr ** bad_wr)431 int mlx5_ib_gsi_post_send(struct ib_qp *qp, const struct ib_send_wr *wr,
432 const struct ib_send_wr **bad_wr)
433 {
434 struct mlx5_ib_qp *mqp = to_mqp(qp);
435 struct mlx5_ib_gsi_qp *gsi = &mqp->gsi;
436 struct ib_qp *tx_qp;
437 unsigned long flags;
438 int ret;
439
440 for (; wr; wr = wr->next) {
441 struct ib_ud_wr cur_wr = *ud_wr(wr);
442
443 cur_wr.wr.next = NULL;
444
445 spin_lock_irqsave(&gsi->lock, flags);
446 tx_qp = get_tx_qp(gsi, &cur_wr);
447 if (!tx_qp) {
448 ret = mlx5_ib_gsi_silent_drop(mqp, &cur_wr);
449 if (ret)
450 goto err;
451 spin_unlock_irqrestore(&gsi->lock, flags);
452 continue;
453 }
454
455 ret = mlx5_ib_add_outstanding_wr(mqp, &cur_wr, NULL);
456 if (ret)
457 goto err;
458
459 ret = ib_post_send(tx_qp, &cur_wr.wr, bad_wr);
460 if (ret) {
461 /* Undo the effect of adding the outstanding wr */
462 gsi->outstanding_pi--;
463 goto err;
464 }
465 spin_unlock_irqrestore(&gsi->lock, flags);
466 }
467
468 return 0;
469
470 err:
471 spin_unlock_irqrestore(&gsi->lock, flags);
472 *bad_wr = wr;
473 return ret;
474 }
475
mlx5_ib_gsi_post_recv(struct ib_qp * qp,const struct ib_recv_wr * wr,const struct ib_recv_wr ** bad_wr)476 int mlx5_ib_gsi_post_recv(struct ib_qp *qp, const struct ib_recv_wr *wr,
477 const struct ib_recv_wr **bad_wr)
478 {
479 struct mlx5_ib_qp *mqp = to_mqp(qp);
480 struct mlx5_ib_gsi_qp *gsi = &mqp->gsi;
481
482 return ib_post_recv(gsi->rx_qp, wr, bad_wr);
483 }
484
mlx5_ib_gsi_pkey_change(struct mlx5_ib_gsi_qp * gsi)485 void mlx5_ib_gsi_pkey_change(struct mlx5_ib_gsi_qp *gsi)
486 {
487 u16 qp_index;
488
489 for (qp_index = 0; qp_index < gsi->num_qps; ++qp_index)
490 setup_qp(gsi, qp_index);
491 }
492