1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2021-2023 Digiteq Automotive
4 * author: Martin Tuma <martin.tuma@digiteqautomotive.com>
5 *
6 * This is the v4l2 output device module. It initializes the signal serializers
7 * and creates the v4l2 video devices.
8 *
9 * When the device is in loopback mode (a direct, in HW, in->out frame passing
10 * mode) we disable the v4l2 output by returning EBUSY in the open() syscall.
11 */
12
13 #include <linux/pci.h>
14 #include <linux/align.h>
15 #include <linux/dma/amd_xdma.h>
16 #include <media/v4l2-ioctl.h>
17 #include <media/videobuf2-v4l2.h>
18 #include <media/videobuf2-dma-sg.h>
19 #include <media/v4l2-dv-timings.h>
20 #include "mgb4_core.h"
21 #include "mgb4_dma.h"
22 #include "mgb4_sysfs.h"
23 #include "mgb4_io.h"
24 #include "mgb4_cmt.h"
25 #include "mgb4_vout.h"
26
27 ATTRIBUTE_GROUPS(mgb4_fpdl3_out);
28 ATTRIBUTE_GROUPS(mgb4_gmsl3_out);
29 ATTRIBUTE_GROUPS(mgb4_gmsl1_out);
30
31 static const struct mgb4_vout_config vout_cfg[] = {
32 {0, 0, 8, {0x78, 0x60, 0x64, 0x68, 0x74, 0x6C, 0x70, 0x7C, 0xE0}},
33 {1, 1, 9, {0x98, 0x80, 0x84, 0x88, 0x94, 0x8C, 0x90, 0x9C, 0xE4}}
34 };
35
36 static const struct i2c_board_info fpdl3_ser_info[] = {
37 {I2C_BOARD_INFO("serializer1", 0x14)},
38 {I2C_BOARD_INFO("serializer2", 0x16)},
39 };
40
41 static const struct i2c_board_info gmsl1_ser_info[] = {
42 {I2C_BOARD_INFO("serializer1", 0x24)},
43 {I2C_BOARD_INFO("serializer2", 0x22)},
44 };
45
46 static const struct mgb4_i2c_kv fpdl3_i2c[] = {
47 {0x05, 0xFF, 0x04}, {0x06, 0xFF, 0x01}, {0xC2, 0xFF, 0x80}
48 };
49
50 static const struct mgb4_i2c_kv gmsl1_i2c[] = {
51 };
52
53 static const struct v4l2_dv_timings_cap video_timings_cap = {
54 .type = V4L2_DV_BT_656_1120,
55 .bt = {
56 .min_width = 240,
57 .max_width = 4096,
58 .min_height = 240,
59 .max_height = 4096,
60 .min_pixelclock = 1843200, /* 320 x 240 x 24Hz */
61 .max_pixelclock = 530841600, /* 4096 x 2160 x 60Hz */
62 .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
63 V4L2_DV_BT_STD_CVT | V4L2_DV_BT_STD_GTF,
64 .capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
65 V4L2_DV_BT_CAP_CUSTOM,
66 },
67 };
68
get_timings(struct mgb4_vout_dev * voutdev,struct v4l2_dv_timings * timings)69 static void get_timings(struct mgb4_vout_dev *voutdev,
70 struct v4l2_dv_timings *timings)
71 {
72 struct mgb4_regs *video = &voutdev->mgbdev->video;
73 const struct mgb4_vout_regs *regs = &voutdev->config->regs;
74
75 u32 hsync = mgb4_read_reg(video, regs->hsync);
76 u32 vsync = mgb4_read_reg(video, regs->vsync);
77 u32 resolution = mgb4_read_reg(video, regs->resolution);
78
79 memset(timings, 0, sizeof(*timings));
80 timings->type = V4L2_DV_BT_656_1120;
81 timings->bt.width = resolution >> 16;
82 timings->bt.height = resolution & 0xFFFF;
83 if (hsync & (1U << 31))
84 timings->bt.polarities |= V4L2_DV_HSYNC_POS_POL;
85 if (vsync & (1U << 31))
86 timings->bt.polarities |= V4L2_DV_VSYNC_POS_POL;
87 timings->bt.pixelclock = voutdev->freq * 1000;
88 timings->bt.hsync = (hsync & 0x00FF0000) >> 16;
89 timings->bt.vsync = (vsync & 0x00FF0000) >> 16;
90 timings->bt.hbackporch = (hsync & 0x0000FF00) >> 8;
91 timings->bt.hfrontporch = hsync & 0x000000FF;
92 timings->bt.vbackporch = (vsync & 0x0000FF00) >> 8;
93 timings->bt.vfrontporch = vsync & 0x000000FF;
94 }
95
return_all_buffers(struct mgb4_vout_dev * voutdev,enum vb2_buffer_state state)96 static void return_all_buffers(struct mgb4_vout_dev *voutdev,
97 enum vb2_buffer_state state)
98 {
99 struct mgb4_frame_buffer *buf, *node;
100 unsigned long flags;
101
102 spin_lock_irqsave(&voutdev->qlock, flags);
103 list_for_each_entry_safe(buf, node, &voutdev->buf_list, list) {
104 vb2_buffer_done(&buf->vb.vb2_buf, state);
105 list_del(&buf->list);
106 }
107 spin_unlock_irqrestore(&voutdev->qlock, flags);
108 }
109
queue_setup(struct vb2_queue * q,unsigned int * nbuffers,unsigned int * nplanes,unsigned int sizes[],struct device * alloc_devs[])110 static int queue_setup(struct vb2_queue *q, unsigned int *nbuffers,
111 unsigned int *nplanes, unsigned int sizes[],
112 struct device *alloc_devs[])
113 {
114 struct mgb4_vout_dev *voutdev = vb2_get_drv_priv(q);
115 struct mgb4_regs *video = &voutdev->mgbdev->video;
116 u32 config = mgb4_read_reg(video, voutdev->config->regs.config);
117 u32 pixelsize = (config & (1U << 16)) ? 2 : 4;
118 unsigned int size = (voutdev->width + voutdev->padding) * voutdev->height
119 * pixelsize;
120
121 /*
122 * If I/O reconfiguration is in process, do not allow to start
123 * the queue. See video_source_store() in mgb4_sysfs_out.c for
124 * details.
125 */
126 if (test_bit(0, &voutdev->mgbdev->io_reconfig))
127 return -EBUSY;
128
129 if (*nplanes)
130 return sizes[0] < size ? -EINVAL : 0;
131 *nplanes = 1;
132 sizes[0] = size;
133
134 return 0;
135 }
136
buffer_init(struct vb2_buffer * vb)137 static int buffer_init(struct vb2_buffer *vb)
138 {
139 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
140 struct mgb4_frame_buffer *buf = to_frame_buffer(vbuf);
141
142 INIT_LIST_HEAD(&buf->list);
143
144 return 0;
145 }
146
buffer_prepare(struct vb2_buffer * vb)147 static int buffer_prepare(struct vb2_buffer *vb)
148 {
149 struct mgb4_vout_dev *voutdev = vb2_get_drv_priv(vb->vb2_queue);
150 struct device *dev = &voutdev->mgbdev->pdev->dev;
151 struct mgb4_regs *video = &voutdev->mgbdev->video;
152 u32 config = mgb4_read_reg(video, voutdev->config->regs.config);
153 u32 pixelsize = (config & (1U << 16)) ? 2 : 4;
154 unsigned int size = (voutdev->width + voutdev->padding) * voutdev->height
155 * pixelsize;
156
157 if (vb2_plane_size(vb, 0) < size) {
158 dev_err(dev, "buffer too small (%lu < %u)\n",
159 vb2_plane_size(vb, 0), size);
160 return -EINVAL;
161 }
162
163 vb2_set_plane_payload(vb, 0, size);
164
165 return 0;
166 }
167
buffer_queue(struct vb2_buffer * vb)168 static void buffer_queue(struct vb2_buffer *vb)
169 {
170 struct mgb4_vout_dev *vindev = vb2_get_drv_priv(vb->vb2_queue);
171 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
172 struct mgb4_frame_buffer *buf = to_frame_buffer(vbuf);
173 unsigned long flags;
174
175 spin_lock_irqsave(&vindev->qlock, flags);
176 list_add_tail(&buf->list, &vindev->buf_list);
177 spin_unlock_irqrestore(&vindev->qlock, flags);
178 }
179
stop_streaming(struct vb2_queue * vq)180 static void stop_streaming(struct vb2_queue *vq)
181 {
182 struct mgb4_vout_dev *voutdev = vb2_get_drv_priv(vq);
183 struct mgb4_dev *mgbdev = voutdev->mgbdev;
184 int irq = xdma_get_user_irq(mgbdev->xdev, voutdev->config->irq);
185
186 xdma_disable_user_irq(mgbdev->xdev, irq);
187 cancel_work_sync(&voutdev->dma_work);
188
189 mgb4_mask_reg(&mgbdev->video, voutdev->config->regs.config, 0x2, 0x0);
190 mgb4_write_reg(&mgbdev->video, voutdev->config->regs.padding, 0);
191
192 return_all_buffers(voutdev, VB2_BUF_STATE_ERROR);
193 }
194
start_streaming(struct vb2_queue * vq,unsigned int count)195 static int start_streaming(struct vb2_queue *vq, unsigned int count)
196 {
197 struct mgb4_vout_dev *voutdev = vb2_get_drv_priv(vq);
198 struct mgb4_dev *mgbdev = voutdev->mgbdev;
199 struct device *dev = &mgbdev->pdev->dev;
200 struct mgb4_frame_buffer *buf;
201 struct mgb4_regs *video = &mgbdev->video;
202 const struct mgb4_vout_config *config = voutdev->config;
203 int irq = xdma_get_user_irq(mgbdev->xdev, config->irq);
204 int rv;
205 u32 addr;
206
207 mgb4_write_reg(video, config->regs.padding, voutdev->padding);
208 mgb4_mask_reg(video, config->regs.config, 0x2, 0x2);
209
210 addr = mgb4_read_reg(video, config->regs.address);
211 if (addr >= MGB4_ERR_QUEUE_FULL) {
212 dev_dbg(dev, "frame queue error (%d)\n", (int)addr);
213 return_all_buffers(voutdev, VB2_BUF_STATE_QUEUED);
214 return -EBUSY;
215 }
216
217 buf = list_first_entry(&voutdev->buf_list, struct mgb4_frame_buffer,
218 list);
219 list_del_init(voutdev->buf_list.next);
220
221 rv = mgb4_dma_transfer(mgbdev, config->dma_channel, true, addr,
222 vb2_dma_sg_plane_desc(&buf->vb.vb2_buf, 0));
223 if (rv < 0) {
224 dev_warn(dev, "DMA transfer error\n");
225 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
226 } else {
227 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
228 }
229
230 xdma_enable_user_irq(mgbdev->xdev, irq);
231
232 return 0;
233 }
234
235 static const struct vb2_ops queue_ops = {
236 .queue_setup = queue_setup,
237 .buf_init = buffer_init,
238 .buf_prepare = buffer_prepare,
239 .buf_queue = buffer_queue,
240 .start_streaming = start_streaming,
241 .stop_streaming = stop_streaming,
242 };
243
vidioc_querycap(struct file * file,void * priv,struct v4l2_capability * cap)244 static int vidioc_querycap(struct file *file, void *priv,
245 struct v4l2_capability *cap)
246 {
247 strscpy(cap->driver, KBUILD_MODNAME, sizeof(cap->driver));
248 strscpy(cap->card, "MGB4 PCIe Card", sizeof(cap->card));
249
250 return 0;
251 }
252
vidioc_enum_fmt(struct file * file,void * priv,struct v4l2_fmtdesc * f)253 static int vidioc_enum_fmt(struct file *file, void *priv,
254 struct v4l2_fmtdesc *f)
255 {
256 struct mgb4_vin_dev *voutdev = video_drvdata(file);
257 struct mgb4_regs *video = &voutdev->mgbdev->video;
258
259 if (f->index == 0) {
260 f->pixelformat = V4L2_PIX_FMT_ABGR32;
261 return 0;
262 } else if (f->index == 1 && has_yuv(video)) {
263 f->pixelformat = V4L2_PIX_FMT_YUYV;
264 return 0;
265 } else {
266 return -EINVAL;
267 }
268 }
269
vidioc_g_fmt(struct file * file,void * priv,struct v4l2_format * f)270 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
271 {
272 struct mgb4_vout_dev *voutdev = video_drvdata(file);
273 struct mgb4_regs *video = &voutdev->mgbdev->video;
274 u32 config = mgb4_read_reg(video, voutdev->config->regs.config);
275
276 f->fmt.pix.width = voutdev->width;
277 f->fmt.pix.height = voutdev->height;
278 f->fmt.pix.field = V4L2_FIELD_NONE;
279
280 if (config & (1U << 16)) {
281 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUYV;
282 if (config & (1U << 20)) {
283 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
284 } else {
285 if (config & (1U << 19))
286 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
287 else
288 f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
289 }
290 f->fmt.pix.bytesperline = (f->fmt.pix.width + voutdev->padding) * 2;
291 } else {
292 f->fmt.pix.pixelformat = V4L2_PIX_FMT_ABGR32;
293 f->fmt.pix.colorspace = V4L2_COLORSPACE_RAW;
294 f->fmt.pix.bytesperline = (f->fmt.pix.width + voutdev->padding) * 4;
295 }
296
297 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * f->fmt.pix.height;
298
299 return 0;
300 }
301
vidioc_try_fmt(struct file * file,void * priv,struct v4l2_format * f)302 static int vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
303 {
304 struct mgb4_vout_dev *voutdev = video_drvdata(file);
305 struct mgb4_regs *video = &voutdev->mgbdev->video;
306 u32 pixelsize;
307
308 f->fmt.pix.width = voutdev->width;
309 f->fmt.pix.height = voutdev->height;
310 f->fmt.pix.field = V4L2_FIELD_NONE;
311
312 if (has_yuv(video) && f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUYV) {
313 pixelsize = 2;
314 if (!(f->fmt.pix.colorspace == V4L2_COLORSPACE_REC709 ||
315 f->fmt.pix.colorspace == V4L2_COLORSPACE_SMPTE170M))
316 f->fmt.pix.colorspace = V4L2_COLORSPACE_SRGB;
317 } else {
318 pixelsize = 4;
319 f->fmt.pix.pixelformat = V4L2_PIX_FMT_ABGR32;
320 f->fmt.pix.colorspace = V4L2_COLORSPACE_RAW;
321 }
322
323 if (f->fmt.pix.bytesperline > f->fmt.pix.width * pixelsize &&
324 f->fmt.pix.bytesperline < f->fmt.pix.width * pixelsize * 2)
325 f->fmt.pix.bytesperline = ALIGN(f->fmt.pix.bytesperline,
326 pixelsize);
327 else
328 f->fmt.pix.bytesperline = f->fmt.pix.width * pixelsize;
329 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline * f->fmt.pix.height;
330
331 return 0;
332 }
333
vidioc_s_fmt(struct file * file,void * priv,struct v4l2_format * f)334 static int vidioc_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
335 {
336 struct mgb4_vout_dev *voutdev = video_drvdata(file);
337 struct mgb4_regs *video = &voutdev->mgbdev->video;
338 u32 config, pixelsize;
339 int ret;
340
341 if (vb2_is_busy(&voutdev->queue))
342 return -EBUSY;
343
344 ret = vidioc_try_fmt(file, priv, f);
345 if (ret < 0)
346 return ret;
347
348 config = mgb4_read_reg(video, voutdev->config->regs.config);
349 if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUYV) {
350 pixelsize = 2;
351 config |= 1U << 16;
352
353 if (f->fmt.pix.colorspace == V4L2_COLORSPACE_REC709) {
354 config |= 1U << 20;
355 config |= 1U << 19;
356 } else if (f->fmt.pix.colorspace == V4L2_COLORSPACE_SMPTE170M) {
357 config &= ~(1U << 20);
358 config |= 1U << 19;
359 } else {
360 config &= ~(1U << 20);
361 config &= ~(1U << 19);
362 }
363 } else {
364 pixelsize = 4;
365 config &= ~(1U << 16);
366 }
367 mgb4_write_reg(video, voutdev->config->regs.config, config);
368
369 voutdev->padding = (f->fmt.pix.bytesperline - (f->fmt.pix.width
370 * pixelsize)) / pixelsize;
371
372 return 0;
373 }
374
vidioc_g_output(struct file * file,void * priv,unsigned int * i)375 static int vidioc_g_output(struct file *file, void *priv, unsigned int *i)
376 {
377 *i = 0;
378 return 0;
379 }
380
vidioc_s_output(struct file * file,void * priv,unsigned int i)381 static int vidioc_s_output(struct file *file, void *priv, unsigned int i)
382 {
383 return i ? -EINVAL : 0;
384 }
385
vidioc_enum_output(struct file * file,void * priv,struct v4l2_output * out)386 static int vidioc_enum_output(struct file *file, void *priv,
387 struct v4l2_output *out)
388 {
389 if (out->index != 0)
390 return -EINVAL;
391
392 out->type = V4L2_OUTPUT_TYPE_ANALOG;
393 out->capabilities = V4L2_OUT_CAP_DV_TIMINGS;
394 strscpy(out->name, "MGB4", sizeof(out->name));
395
396 return 0;
397 }
398
vidioc_enum_frameintervals(struct file * file,void * priv,struct v4l2_frmivalenum * ival)399 static int vidioc_enum_frameintervals(struct file *file, void *priv,
400 struct v4l2_frmivalenum *ival)
401 {
402 struct mgb4_vout_dev *voutdev = video_drvdata(file);
403 struct mgb4_regs *video = &voutdev->mgbdev->video;
404 struct v4l2_dv_timings timings;
405
406 if (ival->index != 0)
407 return -EINVAL;
408 if (!(ival->pixel_format == V4L2_PIX_FMT_ABGR32 ||
409 ((has_yuv(video) && ival->pixel_format == V4L2_PIX_FMT_YUYV))))
410 return -EINVAL;
411 if (ival->width != voutdev->width || ival->height != voutdev->height)
412 return -EINVAL;
413
414 get_timings(voutdev, &timings);
415
416 ival->type = V4L2_FRMIVAL_TYPE_STEPWISE;
417 ival->stepwise.max.denominator = MGB4_HW_FREQ;
418 ival->stepwise.max.numerator = 0xFFFFFFFF;
419 ival->stepwise.min.denominator = timings.bt.pixelclock;
420 ival->stepwise.min.numerator = pixel_size(&timings);
421 ival->stepwise.step.denominator = MGB4_HW_FREQ;
422 ival->stepwise.step.numerator = 1;
423
424 return 0;
425 }
426
vidioc_g_parm(struct file * file,void * priv,struct v4l2_streamparm * parm)427 static int vidioc_g_parm(struct file *file, void *priv,
428 struct v4l2_streamparm *parm)
429 {
430 struct mgb4_vout_dev *voutdev = video_drvdata(file);
431 struct mgb4_regs *video = &voutdev->mgbdev->video;
432 struct v4l2_fract *tpf = &parm->parm.output.timeperframe;
433 struct v4l2_dv_timings timings;
434 u32 timer;
435
436 parm->parm.output.writebuffers = 2;
437
438 if (has_timeperframe(video)) {
439 timer = mgb4_read_reg(video, voutdev->config->regs.timer);
440 if (timer < 0xFFFF) {
441 get_timings(voutdev, &timings);
442 tpf->numerator = pixel_size(&timings);
443 tpf->denominator = timings.bt.pixelclock;
444 } else {
445 tpf->numerator = timer;
446 tpf->denominator = MGB4_HW_FREQ;
447 }
448
449 parm->parm.output.capability = V4L2_CAP_TIMEPERFRAME;
450 }
451
452 return 0;
453 }
454
vidioc_s_parm(struct file * file,void * priv,struct v4l2_streamparm * parm)455 static int vidioc_s_parm(struct file *file, void *priv,
456 struct v4l2_streamparm *parm)
457 {
458 struct mgb4_vout_dev *voutdev = video_drvdata(file);
459 struct mgb4_regs *video = &voutdev->mgbdev->video;
460 struct v4l2_fract *tpf = &parm->parm.output.timeperframe;
461 struct v4l2_dv_timings timings;
462 u32 timer, period;
463
464 if (has_timeperframe(video)) {
465 timer = tpf->denominator ?
466 MGB4_PERIOD(tpf->numerator, tpf->denominator) : 0;
467 if (timer) {
468 get_timings(voutdev, &timings);
469 period = MGB4_PERIOD(pixel_size(&timings),
470 timings.bt.pixelclock);
471 if (timer < period)
472 timer = 0;
473 }
474
475 mgb4_write_reg(video, voutdev->config->regs.timer, timer);
476 }
477
478 return vidioc_g_parm(file, priv, parm);
479 }
480
vidioc_g_dv_timings(struct file * file,void * fh,struct v4l2_dv_timings * timings)481 static int vidioc_g_dv_timings(struct file *file, void *fh,
482 struct v4l2_dv_timings *timings)
483 {
484 struct mgb4_vout_dev *voutdev = video_drvdata(file);
485
486 get_timings(voutdev, timings);
487
488 return 0;
489 }
490
vidioc_s_dv_timings(struct file * file,void * fh,struct v4l2_dv_timings * timings)491 static int vidioc_s_dv_timings(struct file *file, void *fh,
492 struct v4l2_dv_timings *timings)
493 {
494 struct mgb4_vout_dev *voutdev = video_drvdata(file);
495
496 get_timings(voutdev, timings);
497
498 return 0;
499 }
500
vidioc_enum_dv_timings(struct file * file,void * fh,struct v4l2_enum_dv_timings * timings)501 static int vidioc_enum_dv_timings(struct file *file, void *fh,
502 struct v4l2_enum_dv_timings *timings)
503 {
504 struct mgb4_vout_dev *voutdev = video_drvdata(file);
505
506 if (timings->index != 0)
507 return -EINVAL;
508
509 get_timings(voutdev, &timings->timings);
510
511 return 0;
512 }
513
vidioc_dv_timings_cap(struct file * file,void * fh,struct v4l2_dv_timings_cap * cap)514 static int vidioc_dv_timings_cap(struct file *file, void *fh,
515 struct v4l2_dv_timings_cap *cap)
516 {
517 *cap = video_timings_cap;
518
519 return 0;
520 }
521
522 static const struct v4l2_ioctl_ops video_ioctl_ops = {
523 .vidioc_querycap = vidioc_querycap,
524 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt,
525 .vidioc_try_fmt_vid_out = vidioc_try_fmt,
526 .vidioc_s_fmt_vid_out = vidioc_s_fmt,
527 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
528 .vidioc_enum_output = vidioc_enum_output,
529 .vidioc_enum_frameintervals = vidioc_enum_frameintervals,
530 .vidioc_g_output = vidioc_g_output,
531 .vidioc_s_output = vidioc_s_output,
532 .vidioc_g_parm = vidioc_g_parm,
533 .vidioc_s_parm = vidioc_s_parm,
534 .vidioc_dv_timings_cap = vidioc_dv_timings_cap,
535 .vidioc_enum_dv_timings = vidioc_enum_dv_timings,
536 .vidioc_g_dv_timings = vidioc_g_dv_timings,
537 .vidioc_s_dv_timings = vidioc_s_dv_timings,
538 .vidioc_reqbufs = vb2_ioctl_reqbufs,
539 .vidioc_create_bufs = vb2_ioctl_create_bufs,
540 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
541 .vidioc_querybuf = vb2_ioctl_querybuf,
542 .vidioc_qbuf = vb2_ioctl_qbuf,
543 .vidioc_dqbuf = vb2_ioctl_dqbuf,
544 .vidioc_expbuf = vb2_ioctl_expbuf,
545 .vidioc_streamon = vb2_ioctl_streamon,
546 .vidioc_streamoff = vb2_ioctl_streamoff,
547 };
548
fh_open(struct file * file)549 static int fh_open(struct file *file)
550 {
551 struct mgb4_vout_dev *voutdev = video_drvdata(file);
552 struct mgb4_regs *video = &voutdev->mgbdev->video;
553 struct device *dev = &voutdev->mgbdev->pdev->dev;
554 u32 config, resolution;
555 int rv;
556
557 /* Return EBUSY when the device is in loopback mode */
558 config = mgb4_read_reg(video, voutdev->config->regs.config);
559 if ((config & 0xc) >> 2 != voutdev->config->id + MGB4_VIN_DEVICES) {
560 dev_dbg(dev, "can not open - device in loopback mode");
561 return -EBUSY;
562 }
563
564 mutex_lock(&voutdev->lock);
565
566 rv = v4l2_fh_open(file);
567 if (rv)
568 goto out;
569
570 if (!v4l2_fh_is_singular_file(file))
571 goto out;
572
573 resolution = mgb4_read_reg(video, voutdev->config->regs.resolution);
574 voutdev->width = resolution >> 16;
575 voutdev->height = resolution & 0xFFFF;
576
577 out:
578 mutex_unlock(&voutdev->lock);
579 return rv;
580 }
581
582 static const struct v4l2_file_operations video_fops = {
583 .owner = THIS_MODULE,
584 .open = fh_open,
585 .release = vb2_fop_release,
586 .unlocked_ioctl = video_ioctl2,
587 .write = vb2_fop_write,
588 .mmap = vb2_fop_mmap,
589 .poll = vb2_fop_poll,
590 };
591
dma_transfer(struct work_struct * work)592 static void dma_transfer(struct work_struct *work)
593 {
594 struct mgb4_vout_dev *voutdev = container_of(work, struct mgb4_vout_dev,
595 dma_work);
596 struct device *dev = &voutdev->mgbdev->pdev->dev;
597 struct mgb4_regs *video = &voutdev->mgbdev->video;
598 struct mgb4_frame_buffer *buf = NULL;
599 unsigned long flags;
600 u32 addr;
601 int rv;
602
603 spin_lock_irqsave(&voutdev->qlock, flags);
604 if (!list_empty(&voutdev->buf_list)) {
605 buf = list_first_entry(&voutdev->buf_list,
606 struct mgb4_frame_buffer, list);
607 list_del_init(voutdev->buf_list.next);
608 }
609 spin_unlock_irqrestore(&voutdev->qlock, flags);
610
611 if (!buf)
612 return;
613
614 addr = mgb4_read_reg(video, voutdev->config->regs.address);
615 if (addr >= MGB4_ERR_QUEUE_FULL) {
616 dev_dbg(dev, "frame queue error (%d)\n", (int)addr);
617 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
618 return;
619 }
620
621 rv = mgb4_dma_transfer(voutdev->mgbdev, voutdev->config->dma_channel,
622 true, addr,
623 vb2_dma_sg_plane_desc(&buf->vb.vb2_buf, 0));
624 if (rv < 0) {
625 dev_warn(dev, "DMA transfer error\n");
626 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
627 } else {
628 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
629 }
630 }
631
handler(int irq,void * ctx)632 static irqreturn_t handler(int irq, void *ctx)
633 {
634 struct mgb4_vout_dev *voutdev = (struct mgb4_vout_dev *)ctx;
635 struct mgb4_regs *video = &voutdev->mgbdev->video;
636
637 schedule_work(&voutdev->dma_work);
638
639 mgb4_write_reg(video, 0xB4, 1U << voutdev->config->irq);
640
641 return IRQ_HANDLED;
642 }
643
ser_init(struct mgb4_vout_dev * voutdev,int id)644 static int ser_init(struct mgb4_vout_dev *voutdev, int id)
645 {
646 struct mgb4_i2c_client *ser = &voutdev->ser;
647 struct device *dev = &voutdev->mgbdev->pdev->dev;
648 const struct i2c_board_info *info = NULL;
649 const struct mgb4_i2c_kv *values = NULL;
650 size_t count = 0;
651 int rv;
652
653 if (MGB4_IS_FPDL3(voutdev->mgbdev)) {
654 info = &fpdl3_ser_info[id];
655 values = fpdl3_i2c;
656 count = ARRAY_SIZE(fpdl3_i2c);
657 } else if (MGB4_IS_GMSL1(voutdev->mgbdev)) {
658 info = &gmsl1_ser_info[id];
659 values = gmsl1_i2c;
660 count = ARRAY_SIZE(gmsl1_i2c);
661 }
662
663 if (!info)
664 return 0;
665
666 rv = mgb4_i2c_init(ser, voutdev->mgbdev->i2c_adap, info, 8);
667 if (rv < 0) {
668 dev_err(dev, "failed to create serializer\n");
669 return rv;
670 }
671 rv = mgb4_i2c_configure(ser, values, count);
672 if (rv < 0) {
673 dev_err(dev, "failed to configure serializer\n");
674 goto err_i2c_dev;
675 }
676
677 return 0;
678
679 err_i2c_dev:
680 mgb4_i2c_free(ser);
681
682 return rv;
683 }
684
fpga_init(struct mgb4_vout_dev * voutdev)685 static void fpga_init(struct mgb4_vout_dev *voutdev)
686 {
687 struct mgb4_regs *video = &voutdev->mgbdev->video;
688 const struct mgb4_vout_regs *regs = &voutdev->config->regs;
689 int dp = MGB4_IS_GMSL1(voutdev->mgbdev) ? 0 : 1;
690 u32 source = (voutdev->config->id + MGB4_VIN_DEVICES) << 2;
691
692 mgb4_write_reg(video, regs->config, 0x00000001);
693 mgb4_write_reg(video, regs->resolution, (1280 << 16) | 640);
694 mgb4_write_reg(video, regs->hsync, 0x00283232);
695 mgb4_write_reg(video, regs->vsync, 0x40141F1E);
696 mgb4_write_reg(video, regs->frame_limit, MGB4_HW_FREQ / 60);
697 mgb4_write_reg(video, regs->padding, 0x00000000);
698
699 voutdev->freq = mgb4_cmt_set_vout_freq(voutdev, 61150 >> dp) << dp;
700
701 mgb4_write_reg(video, regs->config, source | dp << 4);
702 }
703
create_debugfs(struct mgb4_vout_dev * voutdev)704 static void create_debugfs(struct mgb4_vout_dev *voutdev)
705 {
706 #ifdef CONFIG_DEBUG_FS
707 struct mgb4_regs *video = &voutdev->mgbdev->video;
708 struct dentry *entry;
709
710 if (IS_ERR_OR_NULL(voutdev->mgbdev->debugfs))
711 return;
712 entry = debugfs_create_dir(voutdev->vdev.name, voutdev->mgbdev->debugfs);
713 if (IS_ERR(entry))
714 return;
715
716 voutdev->regs[0].name = "CONFIG";
717 voutdev->regs[0].offset = voutdev->config->regs.config;
718 voutdev->regs[1].name = "STATUS";
719 voutdev->regs[1].offset = voutdev->config->regs.status;
720 voutdev->regs[2].name = "RESOLUTION";
721 voutdev->regs[2].offset = voutdev->config->regs.resolution;
722 voutdev->regs[3].name = "VIDEO_PARAMS_1";
723 voutdev->regs[3].offset = voutdev->config->regs.hsync;
724 voutdev->regs[4].name = "VIDEO_PARAMS_2";
725 voutdev->regs[4].offset = voutdev->config->regs.vsync;
726 voutdev->regs[5].name = "FRAME_LIMIT";
727 voutdev->regs[5].offset = voutdev->config->regs.frame_limit;
728 voutdev->regs[6].name = "PADDING_PIXELS";
729 voutdev->regs[6].offset = voutdev->config->regs.padding;
730 if (has_timeperframe(video)) {
731 voutdev->regs[7].name = "TIMER";
732 voutdev->regs[7].offset = voutdev->config->regs.timer;
733 voutdev->regset.nregs = 8;
734 } else {
735 voutdev->regset.nregs = 7;
736 }
737
738 voutdev->regset.base = video->membase;
739 voutdev->regset.regs = voutdev->regs;
740
741 debugfs_create_regset32("registers", 0444, entry, &voutdev->regset);
742 #endif
743 }
744
module_groups(struct mgb4_dev * mgbdev)745 static const struct attribute_group **module_groups(struct mgb4_dev *mgbdev)
746 {
747 if (MGB4_IS_FPDL3(mgbdev))
748 return mgb4_fpdl3_out_groups;
749 else if (MGB4_IS_GMSL3(mgbdev))
750 return mgb4_gmsl3_out_groups;
751 else if (MGB4_IS_GMSL1(mgbdev))
752 return mgb4_gmsl1_out_groups;
753 else
754 return NULL;
755 }
756
mgb4_vout_create(struct mgb4_dev * mgbdev,int id)757 struct mgb4_vout_dev *mgb4_vout_create(struct mgb4_dev *mgbdev, int id)
758 {
759 int rv, irq;
760 struct mgb4_vout_dev *voutdev;
761 struct pci_dev *pdev = mgbdev->pdev;
762 struct device *dev = &pdev->dev;
763
764 voutdev = kzalloc_obj(*voutdev);
765 if (!voutdev)
766 return NULL;
767
768 voutdev->mgbdev = mgbdev;
769 voutdev->config = &vout_cfg[id];
770
771 /* Frame queue */
772 INIT_LIST_HEAD(&voutdev->buf_list);
773 spin_lock_init(&voutdev->qlock);
774
775 /* DMA transfer stuff */
776 INIT_WORK(&voutdev->dma_work, dma_transfer);
777
778 /* IRQ callback */
779 irq = xdma_get_user_irq(mgbdev->xdev, voutdev->config->irq);
780 rv = request_irq(irq, handler, 0, "mgb4-vout", voutdev);
781 if (rv) {
782 dev_err(dev, "failed to register irq handler\n");
783 goto err_alloc;
784 }
785
786 /* Set the FPGA registers default values */
787 fpga_init(voutdev);
788
789 /* Set the serializer default values */
790 rv = ser_init(voutdev, id);
791 if (rv)
792 goto err_irq;
793
794 /* V4L2 stuff init */
795 rv = v4l2_device_register(dev, &voutdev->v4l2dev);
796 if (rv) {
797 dev_err(dev, "failed to register v4l2 device\n");
798 goto err_irq;
799 }
800
801 mutex_init(&voutdev->lock);
802
803 voutdev->queue.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
804 voutdev->queue.io_modes = VB2_MMAP | VB2_DMABUF | VB2_WRITE;
805 voutdev->queue.buf_struct_size = sizeof(struct mgb4_frame_buffer);
806 voutdev->queue.ops = &queue_ops;
807 voutdev->queue.mem_ops = &vb2_dma_sg_memops;
808 voutdev->queue.gfp_flags = GFP_DMA32;
809 voutdev->queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
810 voutdev->queue.min_queued_buffers = 2;
811 voutdev->queue.drv_priv = voutdev;
812 voutdev->queue.lock = &voutdev->lock;
813 voutdev->queue.dev = dev;
814 rv = vb2_queue_init(&voutdev->queue);
815 if (rv) {
816 dev_err(dev, "failed to initialize vb2 queue\n");
817 goto err_v4l2_dev;
818 }
819
820 snprintf(voutdev->vdev.name, sizeof(voutdev->vdev.name), "mgb4-out%d",
821 id + 1);
822 voutdev->vdev.device_caps = V4L2_CAP_VIDEO_OUTPUT | V4L2_CAP_READWRITE
823 | V4L2_CAP_STREAMING;
824 voutdev->vdev.vfl_dir = VFL_DIR_TX;
825 voutdev->vdev.fops = &video_fops;
826 voutdev->vdev.ioctl_ops = &video_ioctl_ops;
827 voutdev->vdev.release = video_device_release_empty;
828 voutdev->vdev.v4l2_dev = &voutdev->v4l2dev;
829 voutdev->vdev.lock = &voutdev->lock;
830 voutdev->vdev.queue = &voutdev->queue;
831 video_set_drvdata(&voutdev->vdev, voutdev);
832
833 rv = video_register_device(&voutdev->vdev, VFL_TYPE_VIDEO, -1);
834 if (rv) {
835 dev_err(dev, "failed to register video device\n");
836 goto err_v4l2_dev;
837 }
838
839 /* Module sysfs attributes */
840 rv = device_add_groups(&voutdev->vdev.dev, module_groups(mgbdev));
841 if (rv) {
842 dev_err(dev, "failed to create sysfs attributes\n");
843 goto err_video_dev;
844 }
845
846 create_debugfs(voutdev);
847
848 return voutdev;
849
850 err_video_dev:
851 video_unregister_device(&voutdev->vdev);
852 err_v4l2_dev:
853 v4l2_device_unregister(&voutdev->v4l2dev);
854 err_irq:
855 free_irq(irq, voutdev);
856 err_alloc:
857 kfree(voutdev);
858
859 return NULL;
860 }
861
mgb4_vout_free(struct mgb4_vout_dev * voutdev)862 void mgb4_vout_free(struct mgb4_vout_dev *voutdev)
863 {
864 int irq = xdma_get_user_irq(voutdev->mgbdev->xdev, voutdev->config->irq);
865
866 free_irq(irq, voutdev);
867 device_remove_groups(&voutdev->vdev.dev, module_groups(voutdev->mgbdev));
868 mgb4_i2c_free(&voutdev->ser);
869 video_unregister_device(&voutdev->vdev);
870 v4l2_device_unregister(&voutdev->v4l2dev);
871
872 kfree(voutdev);
873 }
874