1 // SPDX-License-Identifier: GPL-2.0
2
3 /* Texas Instruments ICSSG Ethernet Driver
4 *
5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
6 *
7 */
8
9 #include <linux/bitops.h>
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/dma/ti-cppi5.h>
14 #include <linux/etherdevice.h>
15 #include <linux/genalloc.h>
16 #include <linux/if_hsr.h>
17 #include <linux/if_vlan.h>
18 #include <linux/interrupt.h>
19 #include <linux/io-64-nonatomic-hi-lo.h>
20 #include <linux/kernel.h>
21 #include <linux/mfd/syscon.h>
22 #include <linux/module.h>
23 #include <linux/of.h>
24 #include <linux/of_mdio.h>
25 #include <linux/of_net.h>
26 #include <linux/platform_device.h>
27 #include <linux/phy.h>
28 #include <linux/property.h>
29 #include <linux/remoteproc/pruss.h>
30 #include <linux/regmap.h>
31 #include <linux/remoteproc.h>
32 #include <net/switchdev.h>
33
34 #include "icssg_prueth.h"
35 #include "icssg_mii_rt.h"
36 #include "icssg_switchdev.h"
37 #include "../k3-cppi-desc-pool.h"
38
39 #define PRUETH_MODULE_DESCRIPTION "PRUSS ICSSG Ethernet driver"
40
41 #define DEFAULT_VID 1
42 #define DEFAULT_PORT_MASK 1
43 #define DEFAULT_UNTAG_MASK 1
44
45 #define NETIF_PRUETH_HSR_OFFLOAD_FEATURES (NETIF_F_HW_HSR_FWD | \
46 NETIF_F_HW_HSR_DUP | \
47 NETIF_F_HW_HSR_TAG_INS | \
48 NETIF_F_HW_HSR_TAG_RM)
49
50 #define PRUETH_RX_DMA_ATTR (DMA_ATTR_SKIP_CPU_SYNC |\
51 DMA_ATTR_WEAK_ORDERING)
52
53 /* CTRLMMR_ICSSG_RGMII_CTRL register bits */
54 #define ICSSG_CTRL_RGMII_ID_MODE BIT(24)
55
56 static void emac_adjust_link(struct net_device *ndev);
57
emac_get_tx_ts(struct prueth_emac * emac,struct emac_tx_ts_response * rsp)58 static int emac_get_tx_ts(struct prueth_emac *emac,
59 struct emac_tx_ts_response *rsp)
60 {
61 struct prueth *prueth = emac->prueth;
62 int slice = prueth_emac_slice(emac);
63 int addr;
64
65 addr = icssg_queue_pop(prueth, slice == 0 ?
66 ICSSG_TS_POP_SLICE0 : ICSSG_TS_POP_SLICE1);
67 if (addr < 0)
68 return addr;
69
70 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp));
71 /* return buffer back for to pool */
72 icssg_queue_push(prueth, slice == 0 ?
73 ICSSG_TS_PUSH_SLICE0 : ICSSG_TS_PUSH_SLICE1, addr);
74
75 return 0;
76 }
77
tx_ts_work(struct prueth_emac * emac)78 static void tx_ts_work(struct prueth_emac *emac)
79 {
80 struct skb_shared_hwtstamps ssh;
81 struct emac_tx_ts_response tsr;
82 struct sk_buff *skb;
83 int ret = 0;
84 u32 hi_sw;
85 u64 ns;
86
87 /* There may be more than one pending requests */
88 while (1) {
89 ret = emac_get_tx_ts(emac, &tsr);
90 if (ret) /* nothing more */
91 break;
92
93 if (tsr.cookie >= PRUETH_MAX_TX_TS_REQUESTS ||
94 !emac->tx_ts_skb[tsr.cookie]) {
95 netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n",
96 tsr.cookie);
97 break;
98 }
99
100 skb = emac->tx_ts_skb[tsr.cookie];
101 emac->tx_ts_skb[tsr.cookie] = NULL; /* free slot */
102 if (!skb) {
103 netdev_err(emac->ndev, "Driver Bug! got NULL skb\n");
104 break;
105 }
106
107 hi_sw = readl(emac->prueth->shram.va +
108 TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET);
109 ns = icssg_ts_to_ns(hi_sw, tsr.hi_ts, tsr.lo_ts,
110 IEP_DEFAULT_CYCLE_TIME_NS);
111
112 memset(&ssh, 0, sizeof(ssh));
113 ssh.hwtstamp = ns_to_ktime(ns);
114
115 skb_tstamp_tx(skb, &ssh);
116 dev_consume_skb_any(skb);
117
118 if (atomic_dec_and_test(&emac->tx_ts_pending)) /* no more? */
119 break;
120 }
121 }
122
prueth_tx_ts_irq(int irq,void * dev_id)123 static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id)
124 {
125 struct prueth_emac *emac = dev_id;
126
127 /* currently only TX timestamp is being returned */
128 tx_ts_work(emac);
129
130 return IRQ_HANDLED;
131 }
132
prueth_start(struct rproc * rproc,const char * fw_name)133 static int prueth_start(struct rproc *rproc, const char *fw_name)
134 {
135 int ret;
136
137 ret = rproc_set_firmware(rproc, fw_name);
138 if (ret)
139 return ret;
140 return rproc_boot(rproc);
141 }
142
prueth_shutdown(struct rproc * rproc)143 static void prueth_shutdown(struct rproc *rproc)
144 {
145 rproc_shutdown(rproc);
146 }
147
prueth_emac_start(struct prueth * prueth)148 static int prueth_emac_start(struct prueth *prueth)
149 {
150 struct icssg_firmwares *firmwares;
151 struct device *dev = prueth->dev;
152 int ret, slice;
153
154 if (prueth->is_switch_mode)
155 firmwares = prueth->icssg_switch_firmwares;
156 else if (prueth->is_hsr_offload_mode && HSR_V1 == prueth->hsr_prp_version)
157 firmwares = prueth->icssg_hsr_firmwares;
158 else if (prueth->is_hsr_offload_mode && PRP_V1 == prueth->hsr_prp_version)
159 firmwares = prueth->icssg_prp_firmwares;
160 else
161 firmwares = prueth->icssg_emac_firmwares;
162
163 for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {
164 ret = prueth_start(prueth->pru[slice], firmwares[slice].pru);
165 if (ret) {
166 dev_err(dev, "failed to boot PRU%d: %d\n", slice, ret);
167 goto unwind_slices;
168 }
169
170 ret = prueth_start(prueth->rtu[slice], firmwares[slice].rtu);
171 if (ret) {
172 dev_err(dev, "failed to boot RTU%d: %d\n", slice, ret);
173 rproc_shutdown(prueth->pru[slice]);
174 goto unwind_slices;
175 }
176
177 ret = prueth_start(prueth->txpru[slice], firmwares[slice].txpru);
178 if (ret) {
179 dev_err(dev, "failed to boot TX_PRU%d: %d\n", slice, ret);
180 rproc_shutdown(prueth->rtu[slice]);
181 rproc_shutdown(prueth->pru[slice]);
182 goto unwind_slices;
183 }
184 }
185
186 return 0;
187
188 unwind_slices:
189 while (--slice >= 0) {
190 prueth_shutdown(prueth->txpru[slice]);
191 prueth_shutdown(prueth->rtu[slice]);
192 prueth_shutdown(prueth->pru[slice]);
193 }
194
195 return ret;
196 }
197
prueth_emac_stop(struct prueth * prueth)198 static void prueth_emac_stop(struct prueth *prueth)
199 {
200 int slice;
201
202 for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {
203 prueth_shutdown(prueth->txpru[slice]);
204 prueth_shutdown(prueth->rtu[slice]);
205 prueth_shutdown(prueth->pru[slice]);
206 }
207 }
208
icssg_enable_fw_offload(struct prueth * prueth)209 static void icssg_enable_fw_offload(struct prueth *prueth)
210 {
211 struct prueth_emac *emac;
212 int mac;
213
214 for (mac = PRUETH_MAC0; mac < PRUETH_NUM_MACS; mac++) {
215 emac = prueth->emac[mac];
216 if (prueth->is_hsr_offload_mode) {
217 if (emac->ndev->features & NETIF_F_HW_HSR_TAG_RM)
218 icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_ENABLE);
219 else
220 icssg_set_port_state(emac, ICSSG_EMAC_HSR_RX_OFFLOAD_DISABLE);
221 }
222
223 if (prueth->is_switch_mode || prueth->is_hsr_offload_mode) {
224 if (netif_running(emac->ndev)) {
225 icssg_fdb_add_del(emac, eth_stp_addr, prueth->default_vlan,
226 ICSSG_FDB_ENTRY_P0_MEMBERSHIP |
227 ICSSG_FDB_ENTRY_P1_MEMBERSHIP |
228 ICSSG_FDB_ENTRY_P2_MEMBERSHIP |
229 ICSSG_FDB_ENTRY_BLOCK,
230 true);
231 icssg_vtbl_modify(emac, emac->port_vlan | DEFAULT_VID,
232 BIT(emac->port_id) | DEFAULT_PORT_MASK,
233 BIT(emac->port_id) | DEFAULT_UNTAG_MASK,
234 true);
235 if (prueth->is_hsr_offload_mode)
236 icssg_vtbl_modify(emac, DEFAULT_VID,
237 DEFAULT_PORT_MASK,
238 DEFAULT_UNTAG_MASK, true);
239 icssg_set_pvid(prueth, emac->port_vlan, emac->port_id);
240 if (prueth->is_switch_mode)
241 icssg_set_port_state(emac, ICSSG_EMAC_PORT_VLAN_AWARE_ENABLE);
242 }
243 }
244 }
245 }
246
prueth_emac_common_start(struct prueth * prueth)247 static int prueth_emac_common_start(struct prueth *prueth)
248 {
249 struct prueth_emac *emac;
250 int ret = 0;
251 int slice;
252
253 if (!prueth->emac[ICSS_SLICE0] && !prueth->emac[ICSS_SLICE1])
254 return -EINVAL;
255
256 /* clear SMEM and MSMC settings for all slices */
257 memset_io(prueth->msmcram.va, 0, prueth->msmcram.size);
258 memset_io(prueth->shram.va, 0, ICSSG_CONFIG_OFFSET_SLICE1 * PRUETH_NUM_MACS);
259
260 icssg_class_default(prueth->miig_rt, ICSS_SLICE0, 0, false);
261 icssg_class_default(prueth->miig_rt, ICSS_SLICE1, 0, false);
262
263 /* Configure HSR/PRP protocol filtering if in HSR offload mode */
264 if (prueth->is_hsr_offload_mode) {
265 icssg_ft3_hsr_configurations(prueth->miig_rt, ICSS_SLICE0, prueth);
266 icssg_ft3_hsr_configurations(prueth->miig_rt, ICSS_SLICE1, prueth);
267 }
268
269 if (prueth->is_switch_mode || prueth->is_hsr_offload_mode)
270 icssg_init_fw_offload_mode(prueth);
271 else
272 icssg_init_emac_mode(prueth);
273
274 for (slice = 0; slice < PRUETH_NUM_MACS; slice++) {
275 emac = prueth->emac[slice];
276 if (!emac)
277 continue;
278 ret = icssg_config(prueth, emac, slice);
279 if (ret)
280 goto disable_class;
281
282 /* Reset link state to force reconfiguration in
283 * emac_adjust_link(). Without this, if the link was already up
284 * before restart, emac_adjust_link() won't detect any state
285 * change and will skip critical configuration like writing
286 * speed to firmware.
287 */
288 emac->link = 0;
289
290 mutex_lock(&emac->ndev->phydev->lock);
291 emac_adjust_link(emac->ndev);
292 mutex_unlock(&emac->ndev->phydev->lock);
293 }
294
295 ret = prueth_emac_start(prueth);
296 if (ret)
297 goto disable_class;
298
299 emac = prueth->emac[ICSS_SLICE0] ? prueth->emac[ICSS_SLICE0] :
300 prueth->emac[ICSS_SLICE1];
301 ret = icss_iep_init(emac->iep, &prueth_iep_clockops,
302 emac, IEP_DEFAULT_CYCLE_TIME_NS);
303 if (ret) {
304 dev_err(prueth->dev, "Failed to initialize IEP module\n");
305 goto stop_pruss;
306 }
307
308 return 0;
309
310 stop_pruss:
311 prueth_emac_stop(prueth);
312
313 disable_class:
314 icssg_class_disable(prueth->miig_rt, ICSS_SLICE0);
315 icssg_class_disable(prueth->miig_rt, ICSS_SLICE1);
316
317 return ret;
318 }
319
prueth_emac_common_stop(struct prueth * prueth)320 static int prueth_emac_common_stop(struct prueth *prueth)
321 {
322 struct prueth_emac *emac;
323
324 if (!prueth->emac[ICSS_SLICE0] && !prueth->emac[ICSS_SLICE1])
325 return -EINVAL;
326
327 icssg_class_disable(prueth->miig_rt, ICSS_SLICE0);
328 icssg_class_disable(prueth->miig_rt, ICSS_SLICE1);
329
330 prueth_emac_stop(prueth);
331
332 emac = prueth->emac[ICSS_SLICE0] ? prueth->emac[ICSS_SLICE0] :
333 prueth->emac[ICSS_SLICE1];
334 icss_iep_exit(emac->iep);
335
336 return 0;
337 }
338
339 /* called back by PHY layer if there is change in link state of hw port*/
emac_adjust_link(struct net_device * ndev)340 static void emac_adjust_link(struct net_device *ndev)
341 {
342 struct prueth_emac *emac = netdev_priv(ndev);
343 struct phy_device *phydev = ndev->phydev;
344 struct prueth *prueth = emac->prueth;
345 bool new_state = false;
346 unsigned long flags;
347
348 if (phydev->link) {
349 /* check the mode of operation - full/half duplex */
350 if (phydev->duplex != emac->duplex) {
351 new_state = true;
352 emac->duplex = phydev->duplex;
353 }
354 if (phydev->speed != emac->speed) {
355 new_state = true;
356 emac->speed = phydev->speed;
357 }
358 if (!emac->link) {
359 new_state = true;
360 emac->link = 1;
361 }
362 } else if (emac->link) {
363 new_state = true;
364 emac->link = 0;
365
366 /* f/w should support 100 & 1000 */
367 emac->speed = SPEED_1000;
368
369 /* half duplex may not be supported by f/w */
370 emac->duplex = DUPLEX_FULL;
371 }
372
373 if (new_state) {
374 phy_print_status(phydev);
375
376 /* update RGMII and MII configuration based on PHY negotiated
377 * values
378 */
379 if (emac->link) {
380 if (emac->duplex == DUPLEX_HALF)
381 icssg_config_half_duplex(emac);
382 /* Set the RGMII cfg for gig en and full duplex */
383 icssg_update_rgmii_cfg(prueth->miig_rt, emac);
384
385 /* update the Tx IPG based on 100M/1G speed */
386 spin_lock_irqsave(&emac->lock, flags);
387 icssg_config_ipg(emac);
388 spin_unlock_irqrestore(&emac->lock, flags);
389 icssg_config_set_speed(emac);
390 icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);
391
392 } else {
393 icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);
394 }
395 }
396
397 if (emac->link) {
398 /* reactivate the transmit queue */
399 netif_tx_wake_all_queues(ndev);
400 } else {
401 netif_tx_stop_all_queues(ndev);
402 prueth_cleanup_tx_ts(emac);
403 }
404 }
405
emac_rx_timer_callback(struct hrtimer * timer)406 static enum hrtimer_restart emac_rx_timer_callback(struct hrtimer *timer)
407 {
408 struct prueth_emac *emac =
409 container_of(timer, struct prueth_emac, rx_hrtimer);
410 int rx_flow = PRUETH_RX_FLOW_DATA;
411
412 if (emac->rx_chns.irq_disabled) {
413 /* re-enable the RX IRQ */
414 emac->rx_chns.irq_disabled = false;
415 enable_irq(emac->rx_chns.irq[rx_flow]);
416 }
417 return HRTIMER_NORESTART;
418 }
419
emac_phy_connect(struct prueth_emac * emac)420 static int emac_phy_connect(struct prueth_emac *emac)
421 {
422 struct prueth *prueth = emac->prueth;
423 struct net_device *ndev = emac->ndev;
424 /* connect PHY */
425 ndev->phydev = of_phy_connect(emac->ndev, emac->phy_node,
426 &emac_adjust_link, 0,
427 emac->phy_if);
428 if (!ndev->phydev) {
429 dev_err(prueth->dev, "couldn't connect to phy %s\n",
430 emac->phy_node->full_name);
431 return -ENODEV;
432 }
433
434 if (!emac->half_duplex) {
435 dev_dbg(prueth->dev, "half duplex mode is not supported\n");
436 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_10baseT_Half_BIT);
437 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_100baseT_Half_BIT);
438 }
439
440 /* remove unsupported modes */
441 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
442 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Pause_BIT);
443 phy_remove_link_mode(ndev->phydev, ETHTOOL_LINK_MODE_Asym_Pause_BIT);
444
445 if (emac->phy_if == PHY_INTERFACE_MODE_MII)
446 phy_set_max_speed(ndev->phydev, SPEED_100);
447
448 return 0;
449 }
450
prueth_iep_gettime(void * clockops_data,struct ptp_system_timestamp * sts)451 static u64 prueth_iep_gettime(void *clockops_data, struct ptp_system_timestamp *sts)
452 {
453 u32 hi_rollover_count, hi_rollover_count_r;
454 struct prueth_emac *emac = clockops_data;
455 struct prueth *prueth = emac->prueth;
456 void __iomem *fw_hi_r_count_addr;
457 void __iomem *fw_count_hi_addr;
458 u32 iepcount_hi, iepcount_hi_r;
459 unsigned long flags;
460 u32 iepcount_lo;
461 u64 ts = 0;
462
463 fw_count_hi_addr = prueth->shram.va + TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET;
464 fw_hi_r_count_addr = prueth->shram.va + TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET;
465
466 local_irq_save(flags);
467 do {
468 iepcount_hi = icss_iep_get_count_hi(emac->iep);
469 iepcount_hi += readl(fw_count_hi_addr);
470 hi_rollover_count = readl(fw_hi_r_count_addr);
471 ptp_read_system_prets(sts);
472 iepcount_lo = icss_iep_get_count_low(emac->iep);
473 ptp_read_system_postts(sts);
474
475 iepcount_hi_r = icss_iep_get_count_hi(emac->iep);
476 iepcount_hi_r += readl(fw_count_hi_addr);
477 hi_rollover_count_r = readl(fw_hi_r_count_addr);
478 } while ((iepcount_hi_r != iepcount_hi) ||
479 (hi_rollover_count != hi_rollover_count_r));
480 local_irq_restore(flags);
481
482 ts = ((u64)hi_rollover_count) << 23 | iepcount_hi;
483 ts = ts * (u64)IEP_DEFAULT_CYCLE_TIME_NS + iepcount_lo;
484
485 return ts;
486 }
487
prueth_iep_settime(void * clockops_data,u64 ns)488 static void prueth_iep_settime(void *clockops_data, u64 ns)
489 {
490 struct icssg_setclock_desc __iomem *sc_descp;
491 struct prueth_emac *emac = clockops_data;
492 struct icssg_setclock_desc sc_desc;
493 u64 cyclecount;
494 u32 cycletime;
495 int timeout;
496
497 sc_descp = emac->prueth->shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET;
498
499 cycletime = IEP_DEFAULT_CYCLE_TIME_NS;
500 cyclecount = ns / cycletime;
501
502 memset(&sc_desc, 0, sizeof(sc_desc));
503 sc_desc.margin = cycletime - 1000;
504 sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0);
505 sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32;
506 sc_desc.iepcount_set = ns % cycletime;
507 /* Count from 0 to (cycle time) - emac->iep->def_inc */
508 sc_desc.CMP0_current = cycletime - emac->iep->def_inc;
509
510 memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc));
511
512 writeb(1, &sc_descp->request);
513
514 timeout = 5; /* fw should take 2-3 ms */
515 while (timeout--) {
516 if (readb(&sc_descp->acknowledgment))
517 return;
518
519 usleep_range(500, 1000);
520 }
521
522 dev_err(emac->prueth->dev, "settime timeout\n");
523 }
524
prueth_perout_enable(void * clockops_data,struct ptp_perout_request * req,int on,u64 * cmp)525 static int prueth_perout_enable(void *clockops_data,
526 struct ptp_perout_request *req, int on,
527 u64 *cmp)
528 {
529 struct prueth_emac *emac = clockops_data;
530 u32 reduction_factor = 0, offset = 0;
531 struct timespec64 ts;
532 u64 current_cycle;
533 u64 start_offset;
534 u64 ns_period;
535
536 if (!on)
537 return 0;
538
539 /* Any firmware specific stuff for PPS/PEROUT handling */
540 ts.tv_sec = req->period.sec;
541 ts.tv_nsec = req->period.nsec;
542 ns_period = timespec64_to_ns(&ts);
543
544 /* f/w doesn't support period less than cycle time */
545 if (ns_period < IEP_DEFAULT_CYCLE_TIME_NS)
546 return -ENXIO;
547
548 reduction_factor = ns_period / IEP_DEFAULT_CYCLE_TIME_NS;
549 offset = ns_period % IEP_DEFAULT_CYCLE_TIME_NS;
550
551 /* f/w requires at least 1uS within a cycle so CMP
552 * can trigger after SYNC is enabled
553 */
554 if (offset < 5 * NSEC_PER_USEC)
555 offset = 5 * NSEC_PER_USEC;
556
557 /* if offset is close to cycle time then we will miss
558 * the CMP event for last tick when IEP rolls over.
559 * In normal mode, IEP tick is 4ns.
560 * In slow compensation it could be 0ns or 8ns at
561 * every slow compensation cycle.
562 */
563 if (offset > IEP_DEFAULT_CYCLE_TIME_NS - 8)
564 offset = IEP_DEFAULT_CYCLE_TIME_NS - 8;
565
566 /* we're in shadow mode so need to set upper 32-bits */
567 *cmp = (u64)offset << 32;
568
569 writel(reduction_factor, emac->prueth->shram.va +
570 TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET);
571
572 current_cycle = icssg_read_time(emac->prueth->shram.va +
573 TIMESYNC_FW_WC_CYCLECOUNT_OFFSET);
574
575 /* Rounding of current_cycle count to next second */
576 start_offset = roundup(current_cycle, MSEC_PER_SEC);
577
578 hi_lo_writeq(start_offset, emac->prueth->shram.va +
579 TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET);
580
581 return 0;
582 }
583
584 const struct icss_iep_clockops prueth_iep_clockops = {
585 .settime = prueth_iep_settime,
586 .gettime = prueth_iep_gettime,
587 .perout_enable = prueth_perout_enable,
588 };
589
prueth_destroy_xdp_rxqs(struct prueth_emac * emac)590 static void prueth_destroy_xdp_rxqs(struct prueth_emac *emac)
591 {
592 struct xdp_rxq_info *rxq = &emac->rx_chns.xdp_rxq;
593
594 if (xdp_rxq_info_is_reg(rxq))
595 xdp_rxq_info_unreg(rxq);
596 }
597
prueth_create_xdp_rxqs(struct prueth_emac * emac)598 static int prueth_create_xdp_rxqs(struct prueth_emac *emac)
599 {
600 struct xdp_rxq_info *rxq = &emac->rx_chns.xdp_rxq;
601 struct page_pool *pool = emac->rx_chns.pg_pool;
602 struct prueth_rx_chn *rx_chn = &emac->rx_chns;
603 int ret;
604
605 ret = xdp_rxq_info_reg(rxq, emac->ndev, 0, emac->napi_rx.napi_id);
606 if (ret)
607 return ret;
608
609 if (rx_chn->xsk_pool) {
610 ret = xdp_rxq_info_reg_mem_model(rxq, MEM_TYPE_XSK_BUFF_POOL, NULL);
611 if (ret)
612 goto xdp_unreg;
613 xsk_pool_set_rxq_info(rx_chn->xsk_pool, rxq);
614 } else {
615 ret = xdp_rxq_info_reg_mem_model(rxq, MEM_TYPE_PAGE_POOL, pool);
616 if (ret)
617 goto xdp_unreg;
618 }
619
620 return 0;
621
622 xdp_unreg:
623 prueth_destroy_xdp_rxqs(emac);
624 return ret;
625 }
626
icssg_prueth_add_mcast(struct net_device * ndev,const u8 * addr)627 static int icssg_prueth_add_mcast(struct net_device *ndev, const u8 *addr)
628 {
629 struct net_device *real_dev;
630 struct prueth_emac *emac;
631 int port_mask;
632 u8 vlan_id;
633
634 vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_MAC;
635 real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;
636 emac = netdev_priv(real_dev);
637
638 port_mask = BIT(emac->port_id) | icssg_fdb_lookup(emac, addr, vlan_id);
639 icssg_fdb_add_del(emac, addr, vlan_id, port_mask, true);
640 icssg_vtbl_modify(emac, vlan_id, port_mask, port_mask, true);
641
642 return 0;
643 }
644
icssg_prueth_del_mcast(struct net_device * ndev,const u8 * addr)645 static int icssg_prueth_del_mcast(struct net_device *ndev, const u8 *addr)
646 {
647 struct net_device *real_dev;
648 struct prueth_emac *emac;
649 int other_port_mask;
650 int port_mask;
651 u8 vlan_id;
652
653 vlan_id = is_vlan_dev(ndev) ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_MAC;
654 real_dev = is_vlan_dev(ndev) ? vlan_dev_real_dev(ndev) : ndev;
655 emac = netdev_priv(real_dev);
656
657 port_mask = BIT(emac->port_id);
658 other_port_mask = port_mask ^ icssg_fdb_lookup(emac, addr, vlan_id);
659
660 icssg_fdb_add_del(emac, addr, vlan_id, port_mask, false);
661 icssg_vtbl_modify(emac, vlan_id, port_mask, port_mask, false);
662
663 if (other_port_mask) {
664 icssg_fdb_add_del(emac, addr, vlan_id, other_port_mask, true);
665 icssg_vtbl_modify(emac, vlan_id, other_port_mask,
666 other_port_mask, true);
667 }
668
669 return 0;
670 }
671
672 /**
673 * icssg_is_addr_synced - Check if address is synced from HSR master
674 * @ndev: network device
675 * @addr: multicast MAC address
676 *
677 * Checks if the address is synced from HSR master (hsr0) via
678 * dev_mc_sync_multiple() or added directly to the slave port.
679 *
680 * Return: true if synced from HSR master, false if added directly
681 */
icssg_is_addr_synced(struct net_device * ndev,const u8 * addr)682 static bool icssg_is_addr_synced(struct net_device *ndev, const u8 *addr)
683 {
684 struct netdev_hw_addr *ha;
685 bool is_synced = false;
686
687 netif_addr_lock_bh(ndev);
688 netdev_for_each_mc_addr(ha, ndev) {
689 if (ether_addr_equal(ha->addr, addr)) {
690 is_synced = ha->synced;
691 break;
692 }
693 }
694 netif_addr_unlock_bh(ndev);
695
696 return is_synced;
697 }
698
699 /**
700 * icssg_hsr_fdb_update - Update FDB and VLAN table for HSR multicast
701 * @emac: PRUETH EMAC private data
702 * @addr: multicast MAC address
703 * @vid: VLAN ID
704 * @port_membership: port membership bitmap (P0=0x1, P1=0x2, P2=0x4)
705 * @add: true to add entry, false to delete
706 *
707 * Updates both FDB and VLAN table entries for the given address.
708 */
icssg_hsr_fdb_update(struct prueth_emac * emac,const u8 * addr,u8 vid,u8 port_membership,bool add)709 static void icssg_hsr_fdb_update(struct prueth_emac *emac, const u8 *addr,
710 u8 vid, u8 port_membership, bool add)
711 {
712 icssg_fdb_add_del(emac, addr, vid, port_membership, add);
713 icssg_vtbl_modify(emac, vid, BIT(emac->port_id),
714 BIT(emac->port_id), add);
715 }
716
717 /**
718 * icssg_prueth_hsr_fdb_add_del - Manage FDB port membership for HSR multicast
719 * @emac: PRUETH EMAC private data
720 * @addr: multicast MAC address
721 * @vid: VLAN ID
722 * @is_synced: true if synced from HSR master, false if added directly
723 * @is_vlan_path: true if called from VLAN interface path, false for direct path
724 * @add: true to add/update, false to remove
725 *
726 * Manages FDB port membership bits (P0/P1/P2) for multicast addresses.
727 * On add: accumulates membership with existing ports.
728 * On delete: removes only the specific port, cleans up orphaned P0 if needed.
729 */
icssg_prueth_hsr_fdb_add_del(struct prueth_emac * emac,const u8 * addr,u8 vid,bool is_synced,bool is_vlan_path,bool add)730 static void icssg_prueth_hsr_fdb_add_del(struct prueth_emac *emac,
731 const u8 *addr, u8 vid,
732 bool is_synced, bool is_vlan_path,
733 bool add)
734 {
735 int existing_membership, other_port_membership;
736 u8 port_membership;
737
738 /* Set P0 (HSR master) bit when:
739 * - Address is synced from HSR master (is_synced=true), OR
740 * - In HSR offload mode AND it's a VLAN interface (is_vlan_path=true)
741 * This ensures VLAN interfaces on HSR master (hsr0.X) also get P0 set.
742 */
743 if (is_synced || (emac->prueth->is_hsr_offload_mode && is_vlan_path))
744 port_membership = ICSSG_FDB_ENTRY_P0_MEMBERSHIP | BIT(emac->port_id);
745 else
746 port_membership = BIT(emac->port_id);
747 existing_membership = icssg_fdb_lookup(emac, addr, vid);
748 if (existing_membership < 0) {
749 netdev_dbg(emac->ndev,
750 "FDB lookup failed for %pM: %d, assuming no existing entry\n",
751 addr, existing_membership);
752 existing_membership = 0;
753 }
754
755 if (add) {
756 /* Accumulate with existing membership */
757 port_membership |= existing_membership;
758
759 netdev_dbg(emac->ndev,
760 "FDB add %pM: P%d%s -> membership 0x%x\n",
761 addr, emac->port_id, is_synced ? "+P0" : "",
762 port_membership);
763
764 icssg_hsr_fdb_update(emac, addr, vid, port_membership, true);
765 } else {
766 other_port_membership = existing_membership & ~port_membership;
767
768 /* Clean up orphaned P0 if neither HSR synced nor VLAN path */
769 if (!is_synced && !is_vlan_path &&
770 (existing_membership & ICSSG_FDB_ENTRY_P0_MEMBERSHIP))
771 other_port_membership &=
772 ~ICSSG_FDB_ENTRY_P0_MEMBERSHIP;
773
774 netdev_dbg(emac->ndev,
775 "FDB del %pM: 0x%x -> 0x%x\n",
776 addr, existing_membership, other_port_membership);
777
778 icssg_hsr_fdb_update(emac, addr, vid, port_membership, false);
779
780 if (other_port_membership)
781 icssg_hsr_fdb_update(emac, addr, vid,
782 other_port_membership, true);
783 }
784 }
785
icssg_prueth_hsr_add_mcast(struct net_device * ndev,const u8 * addr)786 static int icssg_prueth_hsr_add_mcast(struct net_device *ndev, const u8 *addr)
787 {
788 struct net_device *real_dev, *port_dev;
789 bool is_synced, is_vlan_path;
790 struct prueth_emac *emac;
791 u8 vlan_id, i;
792
793 is_vlan_path = is_vlan_dev(ndev);
794 vlan_id = is_vlan_path ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_HSR;
795 real_dev = is_vlan_path ? vlan_dev_real_dev(ndev) : ndev;
796
797 /* Check if this address is synced from HSR master */
798 is_synced = icssg_is_addr_synced(ndev, addr);
799
800 if (is_hsr_master(real_dev)) {
801 for (i = HSR_PT_SLAVE_A; i < HSR_PT_INTERLINK; i++) {
802 port_dev = hsr_get_port_ndev(real_dev, i);
803 emac = netdev_priv(port_dev);
804 if (!emac) {
805 dev_put(port_dev);
806 return -EINVAL;
807 }
808 icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
809 is_synced, is_vlan_path,
810 true);
811 dev_put(port_dev);
812 }
813 } else {
814 emac = netdev_priv(real_dev);
815 icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
816 is_synced, is_vlan_path, true);
817 }
818
819 return 0;
820 }
821
icssg_prueth_hsr_del_mcast(struct net_device * ndev,const u8 * addr)822 static int icssg_prueth_hsr_del_mcast(struct net_device *ndev, const u8 *addr)
823 {
824 struct net_device *real_dev, *port_dev;
825 bool is_synced, is_vlan_path;
826 struct prueth_emac *emac;
827 u8 vlan_id, i;
828
829 is_vlan_path = is_vlan_dev(ndev);
830 vlan_id = is_vlan_path ? vlan_dev_vlan_id(ndev) : PRUETH_DFLT_VLAN_HSR;
831 real_dev = is_vlan_path ? vlan_dev_real_dev(ndev) : ndev;
832
833 /* Check if this address was synced from HSR master */
834 is_synced = icssg_is_addr_synced(ndev, addr);
835
836 if (is_hsr_master(real_dev)) {
837 for (i = HSR_PT_SLAVE_A; i < HSR_PT_INTERLINK; i++) {
838 port_dev = hsr_get_port_ndev(real_dev, i);
839 emac = netdev_priv(port_dev);
840 if (!emac) {
841 dev_put(port_dev);
842 return -EINVAL;
843 }
844 icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
845 is_synced, is_vlan_path,
846 false);
847 dev_put(port_dev);
848 }
849 } else {
850 emac = netdev_priv(real_dev);
851 icssg_prueth_hsr_fdb_add_del(emac, addr, vlan_id,
852 is_synced, is_vlan_path, false);
853 }
854
855 return 0;
856 }
857
icssg_update_vlan_mcast(struct net_device * vdev,int vid,void * args)858 static int icssg_update_vlan_mcast(struct net_device *vdev, int vid,
859 void *args)
860 {
861 struct prueth_emac *emac = args;
862
863 if (!vdev || !vid)
864 return 0;
865
866 netif_addr_lock_bh(vdev);
867 __hw_addr_sync_multiple(&emac->vlan_mcast_list[vid], &vdev->mc,
868 vdev->addr_len);
869 netif_addr_unlock_bh(vdev);
870
871 if (emac->prueth->is_hsr_offload_mode)
872 __hw_addr_sync_dev(&emac->vlan_mcast_list[vid], vdev,
873 icssg_prueth_hsr_add_mcast,
874 icssg_prueth_hsr_del_mcast);
875 else
876 __hw_addr_sync_dev(&emac->vlan_mcast_list[vid], vdev,
877 icssg_prueth_add_mcast,
878 icssg_prueth_del_mcast);
879
880 return 0;
881 }
882
prueth_set_xsk_pool(struct prueth_emac * emac,u16 queue_id)883 static void prueth_set_xsk_pool(struct prueth_emac *emac, u16 queue_id)
884 {
885 struct prueth_tx_chn *tx_chn = &emac->tx_chns[queue_id];
886 struct prueth_rx_chn *rx_chn = &emac->rx_chns;
887
888 if (emac->xsk_qid != queue_id) {
889 rx_chn->xsk_pool = NULL;
890 tx_chn->xsk_pool = NULL;
891 } else {
892 rx_chn->xsk_pool = xsk_get_pool_from_qid(emac->ndev, queue_id);
893 tx_chn->xsk_pool = xsk_get_pool_from_qid(emac->ndev, queue_id);
894 }
895 }
896
prueth_destroy_txq(struct prueth_emac * emac)897 static void prueth_destroy_txq(struct prueth_emac *emac)
898 {
899 int ret, i;
900
901 atomic_set(&emac->tdown_cnt, emac->tx_ch_num);
902 /* ensure new tdown_cnt value is visible */
903 smp_mb__after_atomic();
904 /* tear down and disable UDMA channels */
905 reinit_completion(&emac->tdown_complete);
906 for (i = 0; i < emac->tx_ch_num; i++)
907 k3_udma_glue_tdown_tx_chn(emac->tx_chns[i].tx_chn, false);
908
909 ret = wait_for_completion_timeout(&emac->tdown_complete,
910 msecs_to_jiffies(1000));
911 if (!ret)
912 netdev_err(emac->ndev, "tx teardown timeout\n");
913
914 for (i = 0; i < emac->tx_ch_num; i++) {
915 napi_disable(&emac->tx_chns[i].napi_tx);
916 hrtimer_cancel(&emac->tx_chns[i].tx_hrtimer);
917 k3_udma_glue_reset_tx_chn(emac->tx_chns[i].tx_chn,
918 &emac->tx_chns[i],
919 prueth_tx_cleanup);
920 k3_udma_glue_disable_tx_chn(emac->tx_chns[i].tx_chn);
921 }
922 }
923
prueth_destroy_rxq(struct prueth_emac * emac)924 static void prueth_destroy_rxq(struct prueth_emac *emac)
925 {
926 int i, ret;
927
928 /* tear down and disable UDMA channels */
929 reinit_completion(&emac->tdown_complete);
930 k3_udma_glue_tdown_rx_chn(emac->rx_chns.rx_chn, true);
931
932 /* When RX DMA Channel Teardown is initiated, it will result in an
933 * interrupt and a Teardown Completion Marker (TDCM) is queued into
934 * the RX Completion queue. Acknowledging the interrupt involves
935 * popping the TDCM descriptor from the RX Completion queue via the
936 * RX NAPI Handler. To avoid timing out when waiting for the TDCM to
937 * be popped, schedule the RX NAPI handler to run immediately.
938 */
939 if (!napi_if_scheduled_mark_missed(&emac->napi_rx)) {
940 if (napi_schedule_prep(&emac->napi_rx))
941 __napi_schedule(&emac->napi_rx);
942 }
943
944 ret = wait_for_completion_timeout(&emac->tdown_complete,
945 msecs_to_jiffies(1000));
946 if (!ret)
947 netdev_err(emac->ndev, "rx teardown timeout\n");
948
949 for (i = 0; i < PRUETH_MAX_RX_FLOWS; i++) {
950 napi_disable(&emac->napi_rx);
951 hrtimer_cancel(&emac->rx_hrtimer);
952 k3_udma_glue_reset_rx_chn(emac->rx_chns.rx_chn, i,
953 &emac->rx_chns,
954 prueth_rx_cleanup);
955 }
956
957 prueth_destroy_xdp_rxqs(emac);
958 k3_udma_glue_disable_rx_chn(emac->rx_chns.rx_chn);
959 }
960
prueth_create_txq(struct prueth_emac * emac)961 static int prueth_create_txq(struct prueth_emac *emac)
962 {
963 int ret, i;
964
965 for (i = 0; i < emac->tx_ch_num; i++) {
966 ret = k3_udma_glue_enable_tx_chn(emac->tx_chns[i].tx_chn);
967 if (ret)
968 goto reset_tx_chan;
969 napi_enable(&emac->tx_chns[i].napi_tx);
970 }
971 return 0;
972
973 reset_tx_chan:
974 /* Since interface is not yet up, there is wouldn't be
975 * any SKB for completion. So set false to free_skb
976 */
977 prueth_reset_tx_chan(emac, i, false);
978 return ret;
979 }
980
prueth_create_rxq(struct prueth_emac * emac)981 static int prueth_create_rxq(struct prueth_emac *emac)
982 {
983 int ret;
984
985 ret = prueth_prepare_rx_chan(emac, &emac->rx_chns, PRUETH_MAX_PKT_SIZE);
986 if (ret)
987 return ret;
988
989 ret = k3_udma_glue_enable_rx_chn(emac->rx_chns.rx_chn);
990 if (ret)
991 goto reset_rx_chn;
992
993 ret = prueth_create_xdp_rxqs(emac);
994 if (ret)
995 goto reset_rx_chn;
996
997 napi_enable(&emac->napi_rx);
998 return 0;
999
1000 reset_rx_chn:
1001 prueth_reset_rx_chan(&emac->rx_chns, PRUETH_MAX_RX_FLOWS, false);
1002 return ret;
1003 }
1004
1005 /**
1006 * emac_ndo_open - EMAC device open
1007 * @ndev: network adapter device
1008 *
1009 * Called when system wants to start the interface.
1010 *
1011 * Return: 0 for a successful open, or appropriate error code
1012 */
emac_ndo_open(struct net_device * ndev)1013 static int emac_ndo_open(struct net_device *ndev)
1014 {
1015 struct prueth_emac *emac = netdev_priv(ndev);
1016 int ret, num_data_chn = emac->tx_ch_num;
1017 struct icssg_flow_cfg __iomem *flow_cfg;
1018 struct prueth *prueth = emac->prueth;
1019 int slice = prueth_emac_slice(emac);
1020 struct device *dev = prueth->dev;
1021 int max_rx_flows;
1022 int rx_flow;
1023
1024 /* set h/w MAC as user might have re-configured */
1025 ether_addr_copy(emac->mac_addr, ndev->dev_addr);
1026
1027 icssg_class_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);
1028 icssg_ft1_set_mac_addr(prueth->miig_rt, slice, emac->mac_addr);
1029
1030 /* Notify the stack of the actual queue counts. */
1031 ret = netif_set_real_num_tx_queues(ndev, num_data_chn);
1032 if (ret) {
1033 dev_err(dev, "cannot set real number of tx queues\n");
1034 return ret;
1035 }
1036
1037 emac->xsk_qid = -EINVAL;
1038 init_completion(&emac->cmd_complete);
1039 ret = prueth_init_tx_chns(emac);
1040 if (ret) {
1041 dev_err(dev, "failed to init tx channel: %d\n", ret);
1042 return ret;
1043 }
1044
1045 max_rx_flows = PRUETH_MAX_RX_FLOWS;
1046 ret = prueth_init_rx_chns(emac, &emac->rx_chns, "rx",
1047 max_rx_flows, PRUETH_MAX_RX_DESC);
1048 if (ret) {
1049 dev_err(dev, "failed to init rx channel: %d\n", ret);
1050 goto cleanup_tx;
1051 }
1052
1053 ret = prueth_ndev_add_tx_napi(emac);
1054 if (ret)
1055 goto cleanup_rx;
1056
1057 /* we use only the highest priority flow for now i.e. @irq[3] */
1058 rx_flow = PRUETH_RX_FLOW_DATA;
1059 ret = request_irq(emac->rx_chns.irq[rx_flow], prueth_rx_irq,
1060 IRQF_TRIGGER_HIGH, dev_name(dev), emac);
1061 if (ret) {
1062 dev_err(dev, "unable to request RX IRQ\n");
1063 goto cleanup_napi;
1064 }
1065
1066 if (!prueth->emacs_initialized) {
1067 ret = prueth_emac_common_start(prueth);
1068 if (ret)
1069 goto free_rx_irq;
1070 icssg_enable_fw_offload(prueth);
1071 }
1072
1073 flow_cfg = emac->dram.va + ICSSG_CONFIG_OFFSET + PSI_L_REGULAR_FLOW_ID_BASE_OFFSET;
1074 writew(emac->rx_flow_id_base, &flow_cfg->rx_base_flow);
1075 ret = emac_fdb_flow_id_updated(emac);
1076
1077 if (ret) {
1078 netdev_err(ndev, "Failed to update Rx Flow ID %d", ret);
1079 goto stop;
1080 }
1081
1082 icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu);
1083
1084 ret = request_threaded_irq(emac->tx_ts_irq, NULL, prueth_tx_ts_irq,
1085 IRQF_ONESHOT, dev_name(dev), emac);
1086 if (ret)
1087 goto stop;
1088
1089 /* Prepare RX */
1090 ret = prueth_create_rxq(emac);
1091 if (ret)
1092 goto free_tx_ts_irq;
1093
1094 ret = prueth_create_txq(emac);
1095 if (ret)
1096 goto destroy_rxq;
1097
1098 /* start PHY */
1099 phy_start(ndev->phydev);
1100
1101 prueth->emacs_initialized++;
1102
1103 queue_work(system_long_wq, &emac->stats_work.work);
1104
1105 return 0;
1106
1107 destroy_rxq:
1108 prueth_destroy_rxq(emac);
1109 free_tx_ts_irq:
1110 free_irq(emac->tx_ts_irq, emac);
1111 stop:
1112 if (!prueth->emacs_initialized)
1113 prueth_emac_common_stop(prueth);
1114 free_rx_irq:
1115 free_irq(emac->rx_chns.irq[rx_flow], emac);
1116 cleanup_napi:
1117 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num);
1118 cleanup_rx:
1119 prueth_cleanup_rx_chns(emac, &emac->rx_chns, max_rx_flows);
1120 cleanup_tx:
1121 prueth_cleanup_tx_chns(emac);
1122
1123 return ret;
1124 }
1125
1126 /**
1127 * emac_ndo_stop - EMAC device stop
1128 * @ndev: network adapter device
1129 *
1130 * Called when system wants to stop or down the interface.
1131 *
1132 * Return: Always 0 (Success)
1133 */
emac_ndo_stop(struct net_device * ndev)1134 static int emac_ndo_stop(struct net_device *ndev)
1135 {
1136 struct prueth_emac *emac = netdev_priv(ndev);
1137 struct prueth *prueth = emac->prueth;
1138
1139 /* inform the upper layers. */
1140 netif_tx_stop_all_queues(ndev);
1141
1142 /* block packets from wire */
1143 if (ndev->phydev)
1144 phy_stop(ndev->phydev);
1145
1146 if (emac->prueth->is_hsr_offload_mode)
1147 __dev_mc_unsync(ndev, icssg_prueth_hsr_del_mcast);
1148 else
1149 __dev_mc_unsync(ndev, icssg_prueth_del_mcast);
1150
1151 prueth_destroy_txq(emac);
1152 prueth_destroy_rxq(emac);
1153
1154 cancel_work_sync(&emac->rx_mode_work);
1155
1156 /* Destroying the queued work in ndo_stop() */
1157 cancel_delayed_work_sync(&emac->stats_work);
1158
1159 /* stop PRUs */
1160 if (prueth->emacs_initialized == 1)
1161 prueth_emac_common_stop(prueth);
1162
1163 free_irq(emac->tx_ts_irq, emac);
1164
1165 free_irq(emac->rx_chns.irq[PRUETH_RX_FLOW_DATA], emac);
1166 prueth_ndev_del_tx_napi(emac, emac->tx_ch_num);
1167
1168 prueth_cleanup_rx_chns(emac, &emac->rx_chns, PRUETH_MAX_RX_FLOWS);
1169 prueth_cleanup_tx_chns(emac);
1170
1171 prueth->emacs_initialized--;
1172
1173 return 0;
1174 }
1175
1176 /**
1177 * icssg_hsr_handle_multicast_sync() - Handle HSR multicast overlapping memberships
1178 * @emac: PRUETH EMAC private structure
1179 *
1180 * Post-process multicast addresses to handle overlapping memberships where
1181 * the same address is added from multiple paths (hsr0 + eth1). The kernel
1182 * increments refcount without triggering callbacks, so manually check refcount
1183 * to detect and update FDB port membership accordingly.
1184 */
icssg_hsr_handle_multicast_sync(struct prueth_emac * emac)1185 static void icssg_hsr_handle_multicast_sync(struct prueth_emac *emac)
1186 {
1187 struct hsr_mcast_update {
1188 struct list_head list;
1189 u8 addr[ETH_ALEN];
1190 int refcount;
1191 bool synced;
1192 };
1193 struct hsr_mcast_update *update, *tmp;
1194 struct net_device *ndev = emac->ndev;
1195 u8 vlan_id = PRUETH_DFLT_VLAN_HSR;
1196 struct netdev_hw_addr *ha;
1197 int existing_membership;
1198 LIST_HEAD(update_list);
1199 u8 port_membership;
1200
1201 /* Handle overlapping memberships: When the same address
1202 * is added from multiple paths (hsr0 + eth1), kernel
1203 * increments refcount without triggering callbacks.
1204 * Manually check refcount to detect:
1205 * - refcount=2 + synced: HSR only, membership = P0
1206 * - refcount>=3 + synced: HSR + direct, membership = P0|Px
1207 * - !synced but P0 set: HSR removed, clean up orphaned P0
1208 *
1209 * Collect addresses to update while holding the lock, then
1210 * process them after releasing the lock to avoid sleeping
1211 * while atomic (icssg_fdb_lookup/update can sleep).
1212 */
1213 netif_addr_lock_bh(ndev);
1214 netdev_for_each_mc_addr(ha, ndev) {
1215 /* Queue this address for processing.
1216 * We need to check existing_membership via FDB lookup
1217 * (which can sleep), so defer that until after unlock.
1218 * Save synced/refcount to reproduce original logic.
1219 */
1220 update = kmalloc_obj(*update, GFP_ATOMIC);
1221 if (!update)
1222 continue;
1223
1224 ether_addr_copy(update->addr, ha->addr);
1225 update->synced = ha->synced;
1226 update->refcount = ha->refcount;
1227 list_add_tail(&update->list, &update_list);
1228 }
1229 netif_addr_unlock_bh(ndev);
1230
1231 /* Process collected addresses outside spinlock */
1232 list_for_each_entry_safe(update, tmp, &update_list, list) {
1233 existing_membership = icssg_fdb_lookup(emac,
1234 update->addr,
1235 vlan_id);
1236 if (existing_membership < 0) {
1237 netdev_dbg(ndev,
1238 "FDB lookup failed for %pM: %d, skipping\n",
1239 update->addr, existing_membership);
1240 list_del(&update->list);
1241 kfree(update);
1242 continue;
1243 }
1244
1245 port_membership = existing_membership;
1246 if (update->synced) {
1247 port_membership |=
1248 ICSSG_FDB_ENTRY_P0_MEMBERSHIP;
1249 if (update->refcount >= 3)
1250 port_membership |= BIT(emac->port_id);
1251 else
1252 port_membership &= ~BIT(emac->port_id);
1253 } else if (existing_membership &
1254 ICSSG_FDB_ENTRY_P0_MEMBERSHIP) {
1255 port_membership &=
1256 ~ICSSG_FDB_ENTRY_P0_MEMBERSHIP;
1257 }
1258
1259 if (existing_membership != port_membership) {
1260 netdev_dbg(ndev, "Update %pM: 0x%x -> 0x%x\n",
1261 update->addr, existing_membership,
1262 port_membership);
1263
1264 icssg_hsr_fdb_update(emac, update->addr,
1265 vlan_id, port_membership,
1266 true);
1267 }
1268
1269 list_del(&update->list);
1270 kfree(update);
1271 }
1272 }
1273
emac_ndo_set_rx_mode_work(struct work_struct * work)1274 static void emac_ndo_set_rx_mode_work(struct work_struct *work)
1275 {
1276 struct prueth_emac *emac = container_of(work, struct prueth_emac, rx_mode_work);
1277 struct net_device *ndev = emac->ndev;
1278 bool promisc, allmulti;
1279
1280 if (!netif_running(ndev))
1281 return;
1282
1283 promisc = ndev->flags & IFF_PROMISC;
1284 allmulti = ndev->flags & IFF_ALLMULTI;
1285 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_DISABLE);
1286 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_DISABLE);
1287
1288 if (promisc) {
1289 icssg_set_port_state(emac, ICSSG_EMAC_PORT_UC_FLOODING_ENABLE);
1290 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE);
1291 return;
1292 }
1293
1294 if (allmulti) {
1295 icssg_set_port_state(emac, ICSSG_EMAC_PORT_MC_FLOODING_ENABLE);
1296 return;
1297 }
1298
1299 if (emac->prueth->is_hsr_offload_mode) {
1300 /* Track basic add/delete via callbacks */
1301 __dev_mc_sync(ndev, icssg_prueth_hsr_add_mcast,
1302 icssg_prueth_hsr_del_mcast);
1303
1304 /* Handle overlapping memberships */
1305 icssg_hsr_handle_multicast_sync(emac);
1306
1307 if (rtnl_trylock()) {
1308 vlan_for_each(emac->prueth->hsr_dev,
1309 icssg_update_vlan_mcast, emac);
1310 rtnl_unlock();
1311 }
1312 } else {
1313 __dev_mc_sync(ndev, icssg_prueth_add_mcast,
1314 icssg_prueth_del_mcast);
1315 if (rtnl_trylock()) {
1316 vlan_for_each(ndev, icssg_update_vlan_mcast, emac);
1317 rtnl_unlock();
1318 }
1319 }
1320 }
1321
1322 /**
1323 * emac_ndo_set_rx_mode - EMAC set receive mode function
1324 * @ndev: The EMAC network adapter
1325 *
1326 * Called when system wants to set the receive mode of the device.
1327 *
1328 */
emac_ndo_set_rx_mode(struct net_device * ndev)1329 static void emac_ndo_set_rx_mode(struct net_device *ndev)
1330 {
1331 struct prueth_emac *emac = netdev_priv(ndev);
1332
1333 schedule_work(&emac->rx_mode_work);
1334 }
1335
emac_ndo_fix_features(struct net_device * ndev,netdev_features_t features)1336 static netdev_features_t emac_ndo_fix_features(struct net_device *ndev,
1337 netdev_features_t features)
1338 {
1339 /* hsr tag insertion offload and hsr dup offload are tightly coupled in
1340 * firmware implementation. Both these features need to be enabled /
1341 * disabled together.
1342 */
1343 if (!(ndev->features & (NETIF_F_HW_HSR_DUP | NETIF_F_HW_HSR_TAG_INS)))
1344 if ((features & NETIF_F_HW_HSR_DUP) ||
1345 (features & NETIF_F_HW_HSR_TAG_INS))
1346 features |= NETIF_F_HW_HSR_DUP |
1347 NETIF_F_HW_HSR_TAG_INS;
1348
1349 if ((ndev->features & NETIF_F_HW_HSR_DUP) ||
1350 (ndev->features & NETIF_F_HW_HSR_TAG_INS))
1351 if (!(features & NETIF_F_HW_HSR_DUP) ||
1352 !(features & NETIF_F_HW_HSR_TAG_INS))
1353 features &= ~(NETIF_F_HW_HSR_DUP |
1354 NETIF_F_HW_HSR_TAG_INS);
1355
1356 return features;
1357 }
1358
emac_ndo_vlan_rx_add_vid(struct net_device * ndev,__be16 proto,u16 vid)1359 static int emac_ndo_vlan_rx_add_vid(struct net_device *ndev,
1360 __be16 proto, u16 vid)
1361 {
1362 struct prueth_emac *emac = netdev_priv(ndev);
1363 struct prueth *prueth = emac->prueth;
1364 int port_mask = BIT(emac->port_id);
1365 int untag_mask = 0;
1366
1367 if (prueth->is_hsr_offload_mode)
1368 port_mask |= BIT(PRUETH_PORT_HOST);
1369
1370 __hw_addr_init(&emac->vlan_mcast_list[vid]);
1371 netdev_dbg(emac->ndev, "VID add vid:%u port_mask:%X untag_mask %X\n",
1372 vid, port_mask, untag_mask);
1373
1374 icssg_vtbl_modify(emac, vid, port_mask, untag_mask, true);
1375 icssg_set_pvid(emac->prueth, vid, emac->port_id);
1376
1377 return 0;
1378 }
1379
emac_ndo_vlan_rx_del_vid(struct net_device * ndev,__be16 proto,u16 vid)1380 static int emac_ndo_vlan_rx_del_vid(struct net_device *ndev,
1381 __be16 proto, u16 vid)
1382 {
1383 struct prueth_emac *emac = netdev_priv(ndev);
1384 struct prueth *prueth = emac->prueth;
1385 int port_mask = BIT(emac->port_id);
1386 int untag_mask = 0;
1387
1388 if (prueth->is_hsr_offload_mode)
1389 port_mask = BIT(PRUETH_PORT_HOST);
1390
1391 netdev_dbg(emac->ndev, "VID del vid:%u port_mask:%X untag_mask %X\n",
1392 vid, port_mask, untag_mask);
1393 icssg_vtbl_modify(emac, vid, port_mask, untag_mask, false);
1394
1395 return 0;
1396 }
1397
1398 /**
1399 * emac_xdp_xmit - Implements ndo_xdp_xmit
1400 * @dev: netdev
1401 * @n: number of frames
1402 * @frames: array of XDP buffer pointers
1403 * @flags: XDP extra info
1404 *
1405 * Return: number of frames successfully sent. Failed frames
1406 * will be free'ed by XDP core.
1407 *
1408 * For error cases, a negative errno code is returned and no-frames
1409 * are transmitted (caller must handle freeing frames).
1410 **/
emac_xdp_xmit(struct net_device * dev,int n,struct xdp_frame ** frames,u32 flags)1411 static int emac_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
1412 u32 flags)
1413 {
1414 struct prueth_emac *emac = netdev_priv(dev);
1415 struct net_device *ndev = emac->ndev;
1416 struct netdev_queue *netif_txq;
1417 int cpu = smp_processor_id();
1418 struct xdp_frame *xdpf;
1419 unsigned int q_idx;
1420 int nxmit = 0;
1421 u32 err;
1422 int i;
1423
1424 q_idx = cpu % emac->tx_ch_num;
1425 netif_txq = netdev_get_tx_queue(ndev, q_idx);
1426
1427 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
1428 return -EINVAL;
1429
1430 __netif_tx_lock(netif_txq, cpu);
1431 for (i = 0; i < n; i++) {
1432 xdpf = frames[i];
1433 err = emac_xmit_xdp_frame(emac, xdpf, q_idx,
1434 PRUETH_TX_BUFF_TYPE_XDP_NDO);
1435 if (err != ICSSG_XDP_TX) {
1436 ndev->stats.tx_dropped++;
1437 break;
1438 }
1439 nxmit++;
1440 }
1441 __netif_tx_unlock(netif_txq);
1442
1443 return nxmit;
1444 }
1445
1446 /**
1447 * emac_xdp_setup - add/remove an XDP program
1448 * @emac: emac device
1449 * @bpf: XDP program
1450 *
1451 * Return: Always 0 (Success)
1452 **/
emac_xdp_setup(struct prueth_emac * emac,struct netdev_bpf * bpf)1453 static int emac_xdp_setup(struct prueth_emac *emac, struct netdev_bpf *bpf)
1454 {
1455 struct bpf_prog *prog = bpf->prog;
1456
1457 if (!emac->xdpi.prog && !prog)
1458 return 0;
1459
1460 WRITE_ONCE(emac->xdp_prog, prog);
1461
1462 xdp_attachment_setup(&emac->xdpi, bpf);
1463
1464 return 0;
1465 }
1466
prueth_xsk_pool_enable(struct prueth_emac * emac,struct xsk_buff_pool * pool,u16 queue_id)1467 static int prueth_xsk_pool_enable(struct prueth_emac *emac,
1468 struct xsk_buff_pool *pool, u16 queue_id)
1469 {
1470 struct prueth_rx_chn *rx_chn = &emac->rx_chns;
1471 u32 frame_size;
1472 int ret;
1473
1474 if (queue_id >= PRUETH_MAX_RX_FLOWS ||
1475 queue_id >= emac->tx_ch_num) {
1476 netdev_err(emac->ndev, "Invalid XSK queue ID %d\n", queue_id);
1477 return -EINVAL;
1478 }
1479
1480 frame_size = xsk_pool_get_rx_frame_size(pool);
1481 if (frame_size < PRUETH_MAX_PKT_SIZE)
1482 return -EOPNOTSUPP;
1483
1484 ret = xsk_pool_dma_map(pool, rx_chn->dma_dev, PRUETH_RX_DMA_ATTR);
1485 if (ret) {
1486 netdev_err(emac->ndev, "Failed to map XSK pool: %d\n", ret);
1487 return ret;
1488 }
1489
1490 if (netif_running(emac->ndev)) {
1491 /* stop packets from wire for graceful teardown */
1492 ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);
1493 if (ret)
1494 return ret;
1495 prueth_destroy_rxq(emac);
1496 }
1497
1498 emac->xsk_qid = queue_id;
1499 prueth_set_xsk_pool(emac, queue_id);
1500
1501 if (netif_running(emac->ndev)) {
1502 ret = prueth_create_rxq(emac);
1503 if (ret) {
1504 netdev_err(emac->ndev, "Failed to create RX queue: %d\n", ret);
1505 return ret;
1506 }
1507 ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);
1508 if (ret) {
1509 prueth_destroy_rxq(emac);
1510 return ret;
1511 }
1512 ret = prueth_xsk_wakeup(emac->ndev, queue_id, XDP_WAKEUP_RX);
1513 if (ret)
1514 return ret;
1515 }
1516
1517 return 0;
1518 }
1519
prueth_xsk_pool_disable(struct prueth_emac * emac,u16 queue_id)1520 static int prueth_xsk_pool_disable(struct prueth_emac *emac, u16 queue_id)
1521 {
1522 struct xsk_buff_pool *pool;
1523 int ret;
1524
1525 if (queue_id >= PRUETH_MAX_RX_FLOWS ||
1526 queue_id >= emac->tx_ch_num) {
1527 netdev_err(emac->ndev, "Invalid XSK queue ID %d\n", queue_id);
1528 return -EINVAL;
1529 }
1530
1531 if (emac->xsk_qid != queue_id) {
1532 netdev_err(emac->ndev, "XSK queue ID %d not registered\n", queue_id);
1533 return -EINVAL;
1534 }
1535
1536 pool = xsk_get_pool_from_qid(emac->ndev, queue_id);
1537 if (!pool) {
1538 netdev_err(emac->ndev, "No XSK pool registered for queue %d\n", queue_id);
1539 return -EINVAL;
1540 }
1541
1542 if (netif_running(emac->ndev)) {
1543 /* stop packets from wire for graceful teardown */
1544 ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_DISABLE);
1545 if (ret)
1546 return ret;
1547 prueth_destroy_rxq(emac);
1548 }
1549
1550 xsk_pool_dma_unmap(pool, PRUETH_RX_DMA_ATTR);
1551 emac->xsk_qid = -EINVAL;
1552 prueth_set_xsk_pool(emac, queue_id);
1553
1554 if (netif_running(emac->ndev)) {
1555 ret = prueth_create_rxq(emac);
1556 if (ret) {
1557 netdev_err(emac->ndev, "Failed to create RX queue: %d\n", ret);
1558 return ret;
1559 }
1560 ret = icssg_set_port_state(emac, ICSSG_EMAC_PORT_FORWARD);
1561 if (ret) {
1562 prueth_destroy_rxq(emac);
1563 return ret;
1564 }
1565 }
1566
1567 return 0;
1568 }
1569
1570 /**
1571 * emac_ndo_bpf - implements ndo_bpf for icssg_prueth
1572 * @ndev: network adapter device
1573 * @bpf: XDP program
1574 *
1575 * Return: 0 on success, error code on failure.
1576 **/
emac_ndo_bpf(struct net_device * ndev,struct netdev_bpf * bpf)1577 static int emac_ndo_bpf(struct net_device *ndev, struct netdev_bpf *bpf)
1578 {
1579 struct prueth_emac *emac = netdev_priv(ndev);
1580
1581 switch (bpf->command) {
1582 case XDP_SETUP_PROG:
1583 return emac_xdp_setup(emac, bpf);
1584 case XDP_SETUP_XSK_POOL:
1585 return bpf->xsk.pool ?
1586 prueth_xsk_pool_enable(emac, bpf->xsk.pool, bpf->xsk.queue_id) :
1587 prueth_xsk_pool_disable(emac, bpf->xsk.queue_id);
1588 default:
1589 return -EINVAL;
1590 }
1591 }
1592
prueth_xsk_wakeup(struct net_device * ndev,u32 qid,u32 flags)1593 int prueth_xsk_wakeup(struct net_device *ndev, u32 qid, u32 flags)
1594 {
1595 struct prueth_emac *emac = netdev_priv(ndev);
1596 struct prueth_tx_chn *tx_chn = &emac->tx_chns[qid];
1597 struct prueth_rx_chn *rx_chn = &emac->rx_chns;
1598
1599 if (emac->xsk_qid != qid) {
1600 netdev_err(ndev, "XSK queue %d not registered\n", qid);
1601 return -EINVAL;
1602 }
1603
1604 if (qid >= PRUETH_MAX_RX_FLOWS || qid >= emac->tx_ch_num) {
1605 netdev_err(ndev, "Invalid XSK queue ID %d\n", qid);
1606 return -EINVAL;
1607 }
1608
1609 if (!tx_chn->xsk_pool) {
1610 netdev_err(ndev, "XSK pool not registered for queue %d\n", qid);
1611 return -EINVAL;
1612 }
1613
1614 if (!rx_chn->xsk_pool) {
1615 netdev_err(ndev, "XSK pool not registered for RX queue %d\n", qid);
1616 return -EINVAL;
1617 }
1618
1619 if (flags & XDP_WAKEUP_TX) {
1620 if (!napi_if_scheduled_mark_missed(&tx_chn->napi_tx)) {
1621 if (likely(napi_schedule_prep(&tx_chn->napi_tx)))
1622 __napi_schedule(&tx_chn->napi_tx);
1623 }
1624 }
1625
1626 if (flags & XDP_WAKEUP_RX) {
1627 if (!napi_if_scheduled_mark_missed(&emac->napi_rx)) {
1628 if (likely(napi_schedule_prep(&emac->napi_rx)))
1629 __napi_schedule(&emac->napi_rx);
1630 }
1631 }
1632
1633 return 0;
1634 }
1635
1636 static const struct net_device_ops emac_netdev_ops = {
1637 .ndo_open = emac_ndo_open,
1638 .ndo_stop = emac_ndo_stop,
1639 .ndo_start_xmit = icssg_ndo_start_xmit,
1640 .ndo_set_mac_address = eth_mac_addr,
1641 .ndo_validate_addr = eth_validate_addr,
1642 .ndo_tx_timeout = icssg_ndo_tx_timeout,
1643 .ndo_set_rx_mode = emac_ndo_set_rx_mode,
1644 .ndo_eth_ioctl = phy_do_ioctl,
1645 .ndo_get_stats64 = icssg_ndo_get_stats64,
1646 .ndo_get_phys_port_name = icssg_ndo_get_phys_port_name,
1647 .ndo_fix_features = emac_ndo_fix_features,
1648 .ndo_vlan_rx_add_vid = emac_ndo_vlan_rx_add_vid,
1649 .ndo_vlan_rx_kill_vid = emac_ndo_vlan_rx_del_vid,
1650 .ndo_bpf = emac_ndo_bpf,
1651 .ndo_xdp_xmit = emac_xdp_xmit,
1652 .ndo_hwtstamp_get = icssg_ndo_get_ts_config,
1653 .ndo_hwtstamp_set = icssg_ndo_set_ts_config,
1654 .ndo_xsk_wakeup = prueth_xsk_wakeup,
1655 };
1656
prueth_netdev_init(struct prueth * prueth,struct device_node * eth_node)1657 static int prueth_netdev_init(struct prueth *prueth,
1658 struct device_node *eth_node)
1659 {
1660 int ret, num_tx_chn = PRUETH_MAX_TX_QUEUES;
1661 struct prueth_emac *emac;
1662 struct net_device *ndev;
1663 enum prueth_port port;
1664 const char *irq_name;
1665 enum prueth_mac mac;
1666
1667 port = prueth_node_port(eth_node);
1668 if (port == PRUETH_PORT_INVALID)
1669 return -EINVAL;
1670
1671 mac = prueth_node_mac(eth_node);
1672 if (mac == PRUETH_MAC_INVALID)
1673 return -EINVAL;
1674
1675 ndev = alloc_etherdev_mq(sizeof(*emac), num_tx_chn);
1676 if (!ndev)
1677 return -ENOMEM;
1678
1679 emac = netdev_priv(ndev);
1680 emac->prueth = prueth;
1681 emac->ndev = ndev;
1682 emac->port_id = port;
1683 emac->xdp_prog = NULL;
1684 emac->ndev->pcpu_stat_type = NETDEV_PCPU_STAT_TSTATS;
1685 INIT_WORK(&emac->rx_mode_work, emac_ndo_set_rx_mode_work);
1686
1687 INIT_DELAYED_WORK(&emac->stats_work, icssg_stats_work_handler);
1688
1689 ret = pruss_request_mem_region(prueth->pruss,
1690 port == PRUETH_PORT_MII0 ?
1691 PRUSS_MEM_DRAM0 : PRUSS_MEM_DRAM1,
1692 &emac->dram);
1693 if (ret) {
1694 dev_err(prueth->dev, "unable to get DRAM: %d\n", ret);
1695 ret = -ENOMEM;
1696 goto free_ndev;
1697 }
1698
1699 emac->tx_ch_num = 1;
1700
1701 irq_name = "tx_ts0";
1702 if (emac->port_id == PRUETH_PORT_MII1)
1703 irq_name = "tx_ts1";
1704 emac->tx_ts_irq = platform_get_irq_byname_optional(prueth->pdev, irq_name);
1705 if (emac->tx_ts_irq < 0) {
1706 ret = dev_err_probe(prueth->dev, emac->tx_ts_irq, "could not get tx_ts_irq\n");
1707 goto free;
1708 }
1709
1710 SET_NETDEV_DEV(ndev, prueth->dev);
1711 spin_lock_init(&emac->lock);
1712 mutex_init(&emac->cmd_lock);
1713
1714 emac->phy_node = of_parse_phandle(eth_node, "phy-handle", 0);
1715 if (!emac->phy_node && !of_phy_is_fixed_link(eth_node)) {
1716 dev_err(prueth->dev, "couldn't find phy-handle\n");
1717 ret = -ENODEV;
1718 goto free;
1719 } else if (of_phy_is_fixed_link(eth_node)) {
1720 ret = of_phy_register_fixed_link(eth_node);
1721 if (ret) {
1722 dev_err_probe(prueth->dev, ret, "failed to register fixed-link phy\n");
1723 goto free;
1724 }
1725
1726 emac->phy_node = eth_node;
1727 }
1728
1729 ret = of_get_phy_mode(eth_node, &emac->phy_if);
1730 if (ret) {
1731 dev_err(prueth->dev, "could not get phy-mode property\n");
1732 goto free;
1733 }
1734
1735 if (emac->phy_if != PHY_INTERFACE_MODE_MII &&
1736 !phy_interface_mode_is_rgmii(emac->phy_if)) {
1737 dev_err(prueth->dev, "PHY mode unsupported %s\n", phy_modes(emac->phy_if));
1738 ret = -EINVAL;
1739 goto free;
1740 }
1741
1742 /* AM65 SR2.0 has TX Internal delay always enabled by hardware
1743 * and it is not possible to disable TX Internal delay. The below
1744 * switch case block describes how we handle different phy modes
1745 * based on hardware restriction.
1746 */
1747 switch (emac->phy_if) {
1748 case PHY_INTERFACE_MODE_RGMII_ID:
1749 emac->phy_if = PHY_INTERFACE_MODE_RGMII_RXID;
1750 break;
1751 case PHY_INTERFACE_MODE_RGMII_TXID:
1752 emac->phy_if = PHY_INTERFACE_MODE_RGMII;
1753 break;
1754 case PHY_INTERFACE_MODE_RGMII:
1755 case PHY_INTERFACE_MODE_RGMII_RXID:
1756 dev_err(prueth->dev, "RGMII mode without TX delay is not supported");
1757 ret = -EINVAL;
1758 goto free;
1759 default:
1760 break;
1761 }
1762
1763 /* get mac address from DT and set private and netdev addr */
1764 ret = of_get_ethdev_address(eth_node, ndev);
1765 if (!is_valid_ether_addr(ndev->dev_addr)) {
1766 eth_hw_addr_random(ndev);
1767 dev_warn(prueth->dev, "port %d: using random MAC addr: %pM\n",
1768 port, ndev->dev_addr);
1769 }
1770 ether_addr_copy(emac->mac_addr, ndev->dev_addr);
1771
1772 ndev->dev.of_node = eth_node;
1773 ndev->min_mtu = PRUETH_MIN_PKT_SIZE;
1774 ndev->max_mtu = PRUETH_MAX_MTU;
1775 ndev->netdev_ops = &emac_netdev_ops;
1776 ndev->ethtool_ops = &icssg_ethtool_ops;
1777 ndev->hw_features = NETIF_F_SG;
1778 ndev->features = ndev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
1779 ndev->hw_features |= NETIF_PRUETH_HSR_OFFLOAD_FEATURES;
1780 xdp_set_features_flag(ndev,
1781 NETDEV_XDP_ACT_BASIC |
1782 NETDEV_XDP_ACT_REDIRECT |
1783 NETDEV_XDP_ACT_NDO_XMIT |
1784 NETDEV_XDP_ACT_XSK_ZEROCOPY);
1785
1786 netif_napi_add(ndev, &emac->napi_rx, icssg_napi_rx_poll);
1787 hrtimer_setup(&emac->rx_hrtimer, &emac_rx_timer_callback, CLOCK_MONOTONIC,
1788 HRTIMER_MODE_REL_PINNED);
1789 prueth->emac[mac] = emac;
1790
1791 return 0;
1792
1793 free:
1794 pruss_release_mem_region(prueth->pruss, &emac->dram);
1795 free_ndev:
1796 emac->ndev = NULL;
1797 prueth->emac[mac] = NULL;
1798 free_netdev(ndev);
1799
1800 return ret;
1801 }
1802
prueth_dev_check(const struct net_device * ndev)1803 bool prueth_dev_check(const struct net_device *ndev)
1804 {
1805 if (ndev->netdev_ops == &emac_netdev_ops && netif_running(ndev)) {
1806 struct prueth_emac *emac = netdev_priv(ndev);
1807
1808 return emac->prueth->is_switch_mode;
1809 }
1810
1811 return false;
1812 }
1813
prueth_offload_fwd_mark_update(struct prueth * prueth)1814 static void prueth_offload_fwd_mark_update(struct prueth *prueth)
1815 {
1816 int set_val = 0;
1817 int i;
1818
1819 if (prueth->br_members == (BIT(PRUETH_PORT_MII0) | BIT(PRUETH_PORT_MII1)))
1820 set_val = 1;
1821
1822 dev_dbg(prueth->dev, "set offload_fwd_mark %d\n", set_val);
1823
1824 for (i = PRUETH_MAC0; i < PRUETH_NUM_MACS; i++) {
1825 struct prueth_emac *emac = prueth->emac[i];
1826
1827 if (!emac || !emac->ndev)
1828 continue;
1829
1830 emac->offload_fwd_mark = set_val;
1831 }
1832 }
1833
prueth_emac_restart(struct prueth * prueth)1834 static int prueth_emac_restart(struct prueth *prueth)
1835 {
1836 struct prueth_emac *emac0 = prueth->emac[PRUETH_MAC0];
1837 struct prueth_emac *emac1 = prueth->emac[PRUETH_MAC1];
1838 int ret;
1839
1840 /* Detach the net_device for both PRUeth ports*/
1841 if (netif_running(emac0->ndev))
1842 netif_device_detach(emac0->ndev);
1843 if (netif_running(emac1->ndev))
1844 netif_device_detach(emac1->ndev);
1845
1846 /* Disable both PRUeth ports */
1847 ret = icssg_set_port_state(emac0, ICSSG_EMAC_PORT_DISABLE);
1848 ret |= icssg_set_port_state(emac1, ICSSG_EMAC_PORT_DISABLE);
1849 if (ret)
1850 return ret;
1851
1852 /* Stop both pru cores for both PRUeth ports*/
1853 ret = prueth_emac_common_stop(prueth);
1854 if (ret) {
1855 dev_err(prueth->dev, "Failed to stop the firmwares");
1856 return ret;
1857 }
1858
1859 /* Start both pru cores for both PRUeth ports */
1860 ret = prueth_emac_common_start(prueth);
1861 if (ret) {
1862 dev_err(prueth->dev, "Failed to start the firmwares");
1863 return ret;
1864 }
1865
1866 /* Enable forwarding for both PRUeth ports */
1867 ret = icssg_set_port_state(emac0, ICSSG_EMAC_PORT_FORWARD);
1868 ret |= icssg_set_port_state(emac1, ICSSG_EMAC_PORT_FORWARD);
1869
1870 /* Attache net_device for both PRUeth ports */
1871 netif_device_attach(emac0->ndev);
1872 netif_device_attach(emac1->ndev);
1873
1874 return ret;
1875 }
1876
icssg_change_mode(struct prueth * prueth)1877 static void icssg_change_mode(struct prueth *prueth)
1878 {
1879 int ret;
1880
1881 ret = prueth_emac_restart(prueth);
1882 if (ret) {
1883 dev_err(prueth->dev, "Failed to restart the firmwares, aborting the process");
1884 return;
1885 }
1886
1887 icssg_enable_fw_offload(prueth);
1888 }
1889
prueth_netdevice_port_link(struct net_device * ndev,struct net_device * br_ndev,struct netlink_ext_ack * extack)1890 static int prueth_netdevice_port_link(struct net_device *ndev,
1891 struct net_device *br_ndev,
1892 struct netlink_ext_ack *extack)
1893 {
1894 struct prueth_emac *emac = netdev_priv(ndev);
1895 struct prueth *prueth = emac->prueth;
1896 int err;
1897
1898 if (!prueth->br_members) {
1899 prueth->hw_bridge_dev = br_ndev;
1900 } else {
1901 /* This is adding the port to a second bridge, this is
1902 * unsupported
1903 */
1904 if (prueth->hw_bridge_dev != br_ndev)
1905 return -EOPNOTSUPP;
1906 }
1907
1908 err = switchdev_bridge_port_offload(br_ndev, ndev, emac,
1909 &prueth->prueth_switchdev_nb,
1910 &prueth->prueth_switchdev_bl_nb,
1911 false, extack);
1912 if (err)
1913 return err;
1914
1915 prueth->br_members |= BIT(emac->port_id);
1916
1917 if (!prueth->is_switch_mode) {
1918 if (prueth->br_members & BIT(PRUETH_PORT_MII0) &&
1919 prueth->br_members & BIT(PRUETH_PORT_MII1)) {
1920 prueth->is_switch_mode = true;
1921 prueth->default_vlan = PRUETH_DFLT_VLAN_SW;
1922 emac->port_vlan = prueth->default_vlan;
1923 icssg_change_mode(prueth);
1924 }
1925 }
1926
1927 prueth_offload_fwd_mark_update(prueth);
1928
1929 return NOTIFY_DONE;
1930 }
1931
prueth_netdevice_port_unlink(struct net_device * ndev)1932 static void prueth_netdevice_port_unlink(struct net_device *ndev)
1933 {
1934 struct prueth_emac *emac = netdev_priv(ndev);
1935 struct prueth *prueth = emac->prueth;
1936 int ret;
1937
1938 prueth->br_members &= ~BIT(emac->port_id);
1939
1940 if (prueth->is_switch_mode) {
1941 prueth->is_switch_mode = false;
1942 emac->port_vlan = 0;
1943 ret = prueth_emac_restart(prueth);
1944 if (ret) {
1945 dev_err(prueth->dev, "Failed to restart the firmwares, aborting the process");
1946 return;
1947 }
1948 }
1949
1950 prueth_offload_fwd_mark_update(prueth);
1951
1952 if (!prueth->br_members)
1953 prueth->hw_bridge_dev = NULL;
1954 }
1955
prueth_hsr_port_link(struct net_device * ndev)1956 static int prueth_hsr_port_link(struct net_device *ndev)
1957 {
1958 struct prueth_emac *emac = netdev_priv(ndev);
1959 struct prueth *prueth = emac->prueth;
1960 struct prueth_emac *emac0;
1961 struct prueth_emac *emac1;
1962
1963 emac0 = prueth->emac[PRUETH_MAC0];
1964 emac1 = prueth->emac[PRUETH_MAC1];
1965
1966 if (prueth->is_switch_mode)
1967 return -EOPNOTSUPP;
1968
1969 prueth->hsr_members |= BIT(emac->port_id);
1970 if (!prueth->is_hsr_offload_mode) {
1971 if (prueth->hsr_members & BIT(PRUETH_PORT_MII0) &&
1972 prueth->hsr_members & BIT(PRUETH_PORT_MII1)) {
1973 if (!(emac0->ndev->features &
1974 NETIF_PRUETH_HSR_OFFLOAD_FEATURES) &&
1975 !(emac1->ndev->features &
1976 NETIF_PRUETH_HSR_OFFLOAD_FEATURES))
1977 return -EOPNOTSUPP;
1978 prueth->is_hsr_offload_mode = true;
1979 prueth->default_vlan = PRUETH_DFLT_VLAN_HSR;
1980 emac0->port_vlan = prueth->default_vlan;
1981 emac1->port_vlan = prueth->default_vlan;
1982 icssg_change_mode(prueth);
1983 netdev_dbg(ndev, "Enabling HSR offload mode\n");
1984 }
1985 }
1986
1987 return 0;
1988 }
1989
prueth_hsr_port_unlink(struct net_device * ndev)1990 static void prueth_hsr_port_unlink(struct net_device *ndev)
1991 {
1992 struct prueth_emac *emac = netdev_priv(ndev);
1993 struct prueth *prueth = emac->prueth;
1994 struct prueth_emac *emac0;
1995 struct prueth_emac *emac1;
1996 int ret;
1997
1998 emac0 = prueth->emac[PRUETH_MAC0];
1999 emac1 = prueth->emac[PRUETH_MAC1];
2000
2001 prueth->hsr_members &= ~BIT(emac->port_id);
2002 if (prueth->is_hsr_offload_mode) {
2003 prueth->is_hsr_offload_mode = false;
2004 emac0->port_vlan = 0;
2005 emac1->port_vlan = 0;
2006 prueth->hsr_dev = NULL;
2007 ret = prueth_emac_restart(prueth);
2008 if (ret) {
2009 dev_err(prueth->dev, "Failed to restart the firmwares, aborting the process");
2010 return;
2011 }
2012 netdev_dbg(ndev, "Disabling HSR Offload mode\n");
2013 }
2014 }
2015
2016 /* netdev notifier */
prueth_netdevice_event(struct notifier_block * unused,unsigned long event,void * ptr)2017 static int prueth_netdevice_event(struct notifier_block *unused,
2018 unsigned long event, void *ptr)
2019 {
2020 struct netlink_ext_ack *extack = netdev_notifier_info_to_extack(ptr);
2021 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2022 struct netdev_notifier_changeupper_info *info;
2023 struct prueth_emac *emac = netdev_priv(ndev);
2024 struct prueth *prueth = emac->prueth;
2025 enum hsr_version hsr_ndev_version;
2026 int ret = NOTIFY_DONE;
2027
2028 if (ndev->netdev_ops != &emac_netdev_ops)
2029 return NOTIFY_DONE;
2030
2031 switch (event) {
2032 case NETDEV_CHANGEUPPER:
2033 info = ptr;
2034
2035 if ((ndev->features & NETIF_PRUETH_HSR_OFFLOAD_FEATURES) &&
2036 is_hsr_master(info->upper_dev)) {
2037 hsr_get_version(info->upper_dev, &hsr_ndev_version);
2038 if (hsr_ndev_version != HSR_V1 && hsr_ndev_version != PRP_V1)
2039 return -EOPNOTSUPP;
2040 prueth->hsr_prp_version = hsr_ndev_version;
2041
2042 if (info->linking) {
2043 if (!prueth->hsr_dev) {
2044 prueth->hsr_dev = info->upper_dev;
2045 icssg_class_set_host_mac_addr(prueth->miig_rt,
2046 prueth->hsr_dev->dev_addr);
2047 } else {
2048 if (prueth->hsr_dev != info->upper_dev) {
2049 netdev_dbg(ndev, "Both interfaces must be linked to same upper device\n");
2050 return -EOPNOTSUPP;
2051 }
2052 }
2053 prueth_hsr_port_link(ndev);
2054 } else {
2055 prueth_hsr_port_unlink(ndev);
2056 }
2057 }
2058
2059 if (netif_is_bridge_master(info->upper_dev)) {
2060 if (info->linking)
2061 ret = prueth_netdevice_port_link(ndev, info->upper_dev, extack);
2062 else
2063 prueth_netdevice_port_unlink(ndev);
2064 }
2065 break;
2066 default:
2067 return NOTIFY_DONE;
2068 }
2069
2070 return notifier_from_errno(ret);
2071 }
2072
prueth_register_notifiers(struct prueth * prueth)2073 static int prueth_register_notifiers(struct prueth *prueth)
2074 {
2075 int ret = 0;
2076
2077 prueth->prueth_netdevice_nb.notifier_call = &prueth_netdevice_event;
2078 ret = register_netdevice_notifier(&prueth->prueth_netdevice_nb);
2079 if (ret) {
2080 dev_err(prueth->dev, "can't register netdevice notifier\n");
2081 return ret;
2082 }
2083
2084 ret = prueth_switchdev_register_notifiers(prueth);
2085 if (ret)
2086 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb);
2087
2088 return ret;
2089 }
2090
prueth_unregister_notifiers(struct prueth * prueth)2091 static void prueth_unregister_notifiers(struct prueth *prueth)
2092 {
2093 prueth_switchdev_unregister_notifiers(prueth);
2094 unregister_netdevice_notifier(&prueth->prueth_netdevice_nb);
2095 }
2096
icssg_read_firmware_names(struct device_node * np,struct icssg_firmwares * fw)2097 static void icssg_read_firmware_names(struct device_node *np,
2098 struct icssg_firmwares *fw)
2099 {
2100 int i;
2101
2102 for (i = 0; i < PRUETH_NUM_MACS; i++) {
2103 of_property_read_string_index(np, "firmware-name", i * 3 + 0,
2104 &fw[i].pru);
2105 of_property_read_string_index(np, "firmware-name", i * 3 + 1,
2106 &fw[i].rtu);
2107 of_property_read_string_index(np, "firmware-name", i * 3 + 2,
2108 &fw[i].txpru);
2109 }
2110 }
2111
2112 /* icssg_firmware_name_replace - Replace a substring in firmware name
2113 * @dev: device pointer for memory allocation
2114 * @src: source firmware name string
2115 * @from: substring to replace
2116 * @to: replacement substring
2117 *
2118 * Return: a newly allocated string with the replacement, or the original
2119 * string if replacement is not possible.
2120 */
icssg_firmware_name_replace(struct device * dev,const char * src,const char * from,const char * to)2121 static const char *icssg_firmware_name_replace(struct device *dev,
2122 const char *src,
2123 const char *from,
2124 const char *to)
2125 {
2126 size_t prefix, from_len, to_len, total;
2127 const char *p = strstr(src, from);
2128 char *buf;
2129
2130 if (!p)
2131 return src; /* fallback: no replacement, use original */
2132
2133 prefix = p - src;
2134 from_len = strlen(from);
2135 to_len = strlen(to);
2136 total = strlen(src) - from_len + to_len + 1;
2137
2138 buf = devm_kzalloc(dev, total, GFP_KERNEL);
2139 if (!buf)
2140 return src; /* fallback: allocation failed, use original */
2141
2142 strscpy(buf, src, prefix + 1);
2143 strscpy(buf + prefix, to, to_len + 1);
2144 strscpy(buf + prefix + to_len, p + from_len, total - prefix - to_len);
2145
2146 return buf;
2147 }
2148
2149 /**
2150 * icssg_mode_firmware_names - Generate firmware names for a specific mode
2151 * @dev: device pointer for logging and context
2152 * @src: source array of firmware name structures
2153 * @dst: destination array to store updated firmware name structures
2154 * @from: substring in firmware names to be replaced
2155 * @to: substring to replace @from in firmware names
2156 *
2157 * Iterates over all MACs and replaces occurrences of the @from substring
2158 * with @to in the firmware names (pru, rtu, txpru) for each MAC. The
2159 * updated firmware names are stored in the @dst array.
2160 */
icssg_mode_firmware_names(struct device * dev,struct icssg_firmwares * src,struct icssg_firmwares * dst,const char * from,const char * to)2161 static void icssg_mode_firmware_names(struct device *dev,
2162 struct icssg_firmwares *src,
2163 struct icssg_firmwares *dst,
2164 const char *from, const char *to)
2165 {
2166 int i;
2167
2168 for (i = 0; i < PRUETH_NUM_MACS; i++) {
2169 dst[i].pru = icssg_firmware_name_replace(dev, src[i].pru,
2170 from, to);
2171 dst[i].rtu = icssg_firmware_name_replace(dev, src[i].rtu,
2172 from, to);
2173 dst[i].txpru = icssg_firmware_name_replace(dev, src[i].txpru,
2174 from, to);
2175 }
2176 }
2177
prueth_probe(struct platform_device * pdev)2178 static int prueth_probe(struct platform_device *pdev)
2179 {
2180 struct device_node *eth_node, *eth_ports_node;
2181 struct device_node *eth0_node = NULL;
2182 struct device_node *eth1_node = NULL;
2183 struct genpool_data_align gp_data = {
2184 .align = SZ_64K,
2185 };
2186 struct device *dev = &pdev->dev;
2187 struct device_node *np;
2188 struct prueth *prueth;
2189 struct pruss *pruss;
2190 u32 msmc_ram_size;
2191 int i, ret;
2192
2193 np = dev->of_node;
2194
2195 BUILD_BUG_ON_MSG((sizeof(struct prueth_swdata) > PRUETH_NAV_SW_DATA_SIZE),
2196 "insufficient SW_DATA size");
2197
2198 prueth = devm_kzalloc(dev, sizeof(*prueth), GFP_KERNEL);
2199 if (!prueth)
2200 return -ENOMEM;
2201
2202 dev_set_drvdata(dev, prueth);
2203 prueth->pdev = pdev;
2204 prueth->pdata = *(const struct prueth_pdata *)device_get_match_data(dev);
2205
2206 prueth->dev = dev;
2207 eth_ports_node = of_get_child_by_name(np, "ethernet-ports");
2208 if (!eth_ports_node)
2209 return -ENOENT;
2210
2211 for_each_child_of_node(eth_ports_node, eth_node) {
2212 u32 reg;
2213
2214 if (strcmp(eth_node->name, "port"))
2215 continue;
2216 ret = of_property_read_u32(eth_node, "reg", ®);
2217 if (ret < 0) {
2218 dev_err(dev, "%pOF error reading port_id %d\n",
2219 eth_node, ret);
2220 }
2221
2222 of_node_get(eth_node);
2223
2224 if (reg == 0) {
2225 eth0_node = eth_node;
2226 if (!of_device_is_available(eth0_node)) {
2227 of_node_put(eth0_node);
2228 eth0_node = NULL;
2229 }
2230 } else if (reg == 1) {
2231 eth1_node = eth_node;
2232 if (!of_device_is_available(eth1_node)) {
2233 of_node_put(eth1_node);
2234 eth1_node = NULL;
2235 }
2236 } else {
2237 dev_err(dev, "port reg should be 0 or 1\n");
2238 }
2239 }
2240
2241 of_node_put(eth_ports_node);
2242
2243 /* At least one node must be present and available else we fail */
2244 if (!eth0_node && !eth1_node) {
2245 dev_err(dev, "neither port0 nor port1 node available\n");
2246 return -ENODEV;
2247 }
2248
2249 if (eth0_node == eth1_node) {
2250 dev_err(dev, "port0 and port1 can't have same reg\n");
2251 of_node_put(eth0_node);
2252 return -ENODEV;
2253 }
2254
2255 prueth->eth_node[PRUETH_MAC0] = eth0_node;
2256 prueth->eth_node[PRUETH_MAC1] = eth1_node;
2257
2258 prueth->miig_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-g-rt");
2259 if (IS_ERR(prueth->miig_rt)) {
2260 dev_err(dev, "couldn't get ti,mii-g-rt syscon regmap\n");
2261 return -ENODEV;
2262 }
2263
2264 prueth->mii_rt = syscon_regmap_lookup_by_phandle(np, "ti,mii-rt");
2265 if (IS_ERR(prueth->mii_rt)) {
2266 dev_err(dev, "couldn't get ti,mii-rt syscon regmap\n");
2267 return -ENODEV;
2268 }
2269
2270 prueth->pa_stats = syscon_regmap_lookup_by_phandle(np, "ti,pa-stats");
2271 if (IS_ERR(prueth->pa_stats)) {
2272 dev_err(dev, "couldn't get ti,pa-stats syscon regmap\n");
2273 prueth->pa_stats = NULL;
2274 }
2275
2276 if (eth0_node || eth1_node) {
2277 ret = prueth_get_cores(prueth, ICSS_SLICE0, false);
2278 if (ret)
2279 goto put_cores;
2280 ret = prueth_get_cores(prueth, ICSS_SLICE1, false);
2281 if (ret)
2282 goto put_cores;
2283 }
2284
2285 pruss = pruss_get(eth0_node ?
2286 prueth->pru[ICSS_SLICE0] : prueth->pru[ICSS_SLICE1]);
2287 if (IS_ERR(pruss)) {
2288 ret = PTR_ERR(pruss);
2289 dev_err(dev, "unable to get pruss handle\n");
2290 goto put_cores;
2291 }
2292
2293 prueth->pruss = pruss;
2294
2295 ret = pruss_request_mem_region(pruss, PRUSS_MEM_SHRD_RAM2,
2296 &prueth->shram);
2297 if (ret) {
2298 dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret);
2299 goto put_pruss;
2300 }
2301
2302 prueth->sram_pool = of_gen_pool_get(np, "sram", 0);
2303 if (!prueth->sram_pool) {
2304 dev_err(dev, "unable to get SRAM pool\n");
2305 ret = -ENODEV;
2306
2307 goto put_mem;
2308 }
2309
2310 prueth->is_switchmode_supported = prueth->pdata.switch_mode;
2311 if (prueth->pdata.banked_ms_ram) {
2312 /* Reserve 2 MSMC RAM banks for buffers to avoid arbitration */
2313 msmc_ram_size = (2 * MSMC_RAM_BANK_SIZE);
2314 } else {
2315 msmc_ram_size = PRUETH_EMAC_TOTAL_BUF_SIZE;
2316 if (prueth->is_switchmode_supported)
2317 msmc_ram_size = PRUETH_SW_TOTAL_BUF_SIZE;
2318 }
2319
2320 /* NOTE: FW bug needs buffer base to be 64KB aligned */
2321 prueth->msmcram.va =
2322 (void __iomem *)gen_pool_alloc_algo(prueth->sram_pool,
2323 msmc_ram_size,
2324 gen_pool_first_fit_align,
2325 &gp_data);
2326
2327 if (!prueth->msmcram.va) {
2328 ret = -ENOMEM;
2329 dev_err(dev, "unable to allocate MSMC resource\n");
2330 goto put_mem;
2331 }
2332 prueth->msmcram.pa = gen_pool_virt_to_phys(prueth->sram_pool,
2333 (unsigned long)prueth->msmcram.va);
2334 prueth->msmcram.size = msmc_ram_size;
2335 memset_io(prueth->msmcram.va, 0, msmc_ram_size);
2336 dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth->msmcram.pa,
2337 prueth->msmcram.va, prueth->msmcram.size);
2338
2339 prueth->iep0 = icss_iep_get_idx(np, 0);
2340 if (IS_ERR(prueth->iep0)) {
2341 ret = dev_err_probe(dev, PTR_ERR(prueth->iep0), "iep0 get failed\n");
2342 prueth->iep0 = NULL;
2343 goto free_pool;
2344 }
2345
2346 prueth->iep1 = icss_iep_get_idx(np, 1);
2347 if (IS_ERR(prueth->iep1)) {
2348 ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n");
2349 goto put_iep0;
2350 }
2351
2352 if (prueth->pdata.quirk_10m_link_issue) {
2353 /* Enable IEP1 for FW in 64bit mode as W/A for 10M FD link detect issue under TX
2354 * traffic.
2355 */
2356 icss_iep_init_fw(prueth->iep1);
2357 }
2358
2359 /* Read EMAC firmware names from device tree */
2360 icssg_read_firmware_names(np, prueth->icssg_emac_firmwares);
2361
2362 /* Generate other mode firmware names based on EMAC firmware names */
2363 icssg_mode_firmware_names(dev, prueth->icssg_emac_firmwares,
2364 prueth->icssg_switch_firmwares, "eth", "sw");
2365 icssg_mode_firmware_names(dev, prueth->icssg_emac_firmwares,
2366 prueth->icssg_hsr_firmwares, "eth", "hsr");
2367 icssg_mode_firmware_names(dev, prueth->icssg_emac_firmwares,
2368 prueth->icssg_prp_firmwares, "eth", "prp");
2369
2370 spin_lock_init(&prueth->vtbl_lock);
2371 spin_lock_init(&prueth->stats_lock);
2372 /* setup netdev interfaces */
2373 if (eth0_node) {
2374 ret = prueth_netdev_init(prueth, eth0_node);
2375 if (ret) {
2376 dev_err_probe(dev, ret, "netdev init %s failed\n",
2377 eth0_node->name);
2378 goto exit_iep;
2379 }
2380
2381 prueth->emac[PRUETH_MAC0]->half_duplex =
2382 of_property_read_bool(eth0_node, "ti,half-duplex-capable");
2383
2384 prueth->emac[PRUETH_MAC0]->iep = prueth->iep0;
2385 }
2386
2387 if (eth1_node) {
2388 ret = prueth_netdev_init(prueth, eth1_node);
2389 if (ret) {
2390 dev_err_probe(dev, ret, "netdev init %s failed\n",
2391 eth1_node->name);
2392 goto netdev_exit;
2393 }
2394
2395 prueth->emac[PRUETH_MAC1]->half_duplex =
2396 of_property_read_bool(eth1_node, "ti,half-duplex-capable");
2397
2398 prueth->emac[PRUETH_MAC1]->iep = prueth->iep0;
2399 }
2400
2401 /* register the network devices */
2402 if (eth0_node) {
2403 ret = register_netdev(prueth->emac[PRUETH_MAC0]->ndev);
2404 if (ret) {
2405 dev_err(dev, "can't register netdev for port MII0");
2406 goto netdev_exit;
2407 }
2408
2409 prueth->registered_netdevs[PRUETH_MAC0] = prueth->emac[PRUETH_MAC0]->ndev;
2410
2411 ret = emac_phy_connect(prueth->emac[PRUETH_MAC0]);
2412 if (ret) {
2413 dev_err(dev,
2414 "can't connect to MII0 PHY, error -%d", ret);
2415 goto netdev_unregister;
2416 }
2417 phy_attached_info(prueth->emac[PRUETH_MAC0]->ndev->phydev);
2418 }
2419
2420 if (eth1_node) {
2421 ret = register_netdev(prueth->emac[PRUETH_MAC1]->ndev);
2422 if (ret) {
2423 dev_err(dev, "can't register netdev for port MII1");
2424 goto netdev_unregister;
2425 }
2426
2427 prueth->registered_netdevs[PRUETH_MAC1] = prueth->emac[PRUETH_MAC1]->ndev;
2428 ret = emac_phy_connect(prueth->emac[PRUETH_MAC1]);
2429 if (ret) {
2430 dev_err(dev,
2431 "can't connect to MII1 PHY, error %d", ret);
2432 goto netdev_unregister;
2433 }
2434 phy_attached_info(prueth->emac[PRUETH_MAC1]->ndev->phydev);
2435 }
2436
2437 if (prueth->is_switchmode_supported) {
2438 ret = prueth_register_notifiers(prueth);
2439 if (ret)
2440 goto netdev_unregister;
2441
2442 sprintf(prueth->switch_id, "%s", dev_name(dev));
2443 }
2444
2445 dev_info(dev, "TI PRU ethernet driver initialized: %s EMAC mode\n",
2446 (!eth0_node || !eth1_node) ? "single" : "dual");
2447
2448 if (eth1_node)
2449 of_node_put(eth1_node);
2450 if (eth0_node)
2451 of_node_put(eth0_node);
2452 return 0;
2453
2454 netdev_unregister:
2455 for (i = 0; i < PRUETH_NUM_MACS; i++) {
2456 if (!prueth->registered_netdevs[i])
2457 continue;
2458 if (prueth->emac[i]->ndev->phydev) {
2459 phy_disconnect(prueth->emac[i]->ndev->phydev);
2460 prueth->emac[i]->ndev->phydev = NULL;
2461 }
2462 unregister_netdev(prueth->registered_netdevs[i]);
2463 disable_work_sync(&prueth->emac[i]->rx_mode_work);
2464 }
2465
2466 netdev_exit:
2467 for (i = 0; i < PRUETH_NUM_MACS; i++) {
2468 eth_node = prueth->eth_node[i];
2469 if (!eth_node)
2470 continue;
2471
2472 prueth_netdev_exit(prueth, eth_node);
2473 }
2474
2475 exit_iep:
2476 if (prueth->pdata.quirk_10m_link_issue)
2477 icss_iep_exit_fw(prueth->iep1);
2478 icss_iep_put(prueth->iep1);
2479
2480 put_iep0:
2481 icss_iep_put(prueth->iep0);
2482 prueth->iep0 = NULL;
2483 prueth->iep1 = NULL;
2484
2485 free_pool:
2486 gen_pool_free(prueth->sram_pool,
2487 (unsigned long)prueth->msmcram.va,
2488 prueth->msmcram.size);
2489
2490 put_mem:
2491 pruss_release_mem_region(prueth->pruss, &prueth->shram);
2492
2493 put_pruss:
2494 pruss_put(prueth->pruss);
2495
2496 put_cores:
2497 if (eth0_node || eth1_node) {
2498 prueth_put_cores(prueth, ICSS_SLICE0);
2499 of_node_put(eth0_node);
2500
2501 prueth_put_cores(prueth, ICSS_SLICE1);
2502 of_node_put(eth1_node);
2503 }
2504
2505 return ret;
2506 }
2507
prueth_remove(struct platform_device * pdev)2508 static void prueth_remove(struct platform_device *pdev)
2509 {
2510 struct prueth *prueth = platform_get_drvdata(pdev);
2511 struct device_node *eth_node;
2512 int i;
2513
2514 prueth_unregister_notifiers(prueth);
2515
2516 for (i = 0; i < PRUETH_NUM_MACS; i++) {
2517 if (!prueth->registered_netdevs[i])
2518 continue;
2519 phy_stop(prueth->emac[i]->ndev->phydev);
2520 phy_disconnect(prueth->emac[i]->ndev->phydev);
2521 prueth->emac[i]->ndev->phydev = NULL;
2522 unregister_netdev(prueth->registered_netdevs[i]);
2523 disable_work_sync(&prueth->emac[i]->rx_mode_work);
2524 }
2525
2526 for (i = 0; i < PRUETH_NUM_MACS; i++) {
2527 eth_node = prueth->eth_node[i];
2528 if (!eth_node)
2529 continue;
2530
2531 prueth_netdev_exit(prueth, eth_node);
2532 }
2533
2534 if (prueth->pdata.quirk_10m_link_issue)
2535 icss_iep_exit_fw(prueth->iep1);
2536
2537 icss_iep_put(prueth->iep1);
2538 icss_iep_put(prueth->iep0);
2539
2540 gen_pool_free(prueth->sram_pool,
2541 (unsigned long)prueth->msmcram.va,
2542 prueth->msmcram.size);
2543
2544 pruss_release_mem_region(prueth->pruss, &prueth->shram);
2545
2546 pruss_put(prueth->pruss);
2547
2548 if (prueth->eth_node[PRUETH_MAC1])
2549 prueth_put_cores(prueth, ICSS_SLICE1);
2550
2551 if (prueth->eth_node[PRUETH_MAC0])
2552 prueth_put_cores(prueth, ICSS_SLICE0);
2553 }
2554
2555 static const struct prueth_pdata am654_icssg_pdata = {
2556 .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE,
2557 .quirk_10m_link_issue = 1,
2558 .switch_mode = 1,
2559 .banked_ms_ram = 0,
2560 };
2561
2562 static const struct prueth_pdata am64x_icssg_pdata = {
2563 .fdqring_mode = K3_RINGACC_RING_MODE_RING,
2564 .quirk_10m_link_issue = 1,
2565 .switch_mode = 1,
2566 .banked_ms_ram = 1,
2567 };
2568
2569 static const struct of_device_id prueth_dt_match[] = {
2570 { .compatible = "ti,am654-icssg-prueth", .data = &am654_icssg_pdata },
2571 { .compatible = "ti,am642-icssg-prueth", .data = &am64x_icssg_pdata },
2572 { /* sentinel */ }
2573 };
2574 MODULE_DEVICE_TABLE(of, prueth_dt_match);
2575
2576 static struct platform_driver prueth_driver = {
2577 .probe = prueth_probe,
2578 .remove = prueth_remove,
2579 .driver = {
2580 .name = "icssg-prueth",
2581 .of_match_table = prueth_dt_match,
2582 .pm = &prueth_dev_pm_ops,
2583 },
2584 };
2585 module_platform_driver(prueth_driver);
2586
2587 MODULE_AUTHOR("Roger Quadros <rogerq@ti.com>");
2588 MODULE_AUTHOR("Md Danish Anwar <danishanwar@ti.com>");
2589 MODULE_DESCRIPTION("PRUSS ICSSG Ethernet Driver");
2590 MODULE_LICENSE("GPL");
2591