1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _ASM_X86_PLATFORM_H 3 #define _ASM_X86_PLATFORM_H 4 5 struct ghcb; 6 struct mpc_bus; 7 struct mpc_cpu; 8 struct pt_regs; 9 struct mpc_table; 10 struct cpuinfo_x86; 11 struct irq_domain; 12 13 /** 14 * struct x86_init_mpparse - platform specific mpparse ops 15 * @setup_ioapic_ids: platform specific ioapic id override 16 * @find_mptable: Find MPTABLE early to reserve the memory region 17 * @early_parse_smp_cfg: Parse the SMP configuration data early before initmem_init() 18 * @parse_smp_cfg: Parse the SMP configuration data 19 */ 20 struct x86_init_mpparse { 21 void (*setup_ioapic_ids)(void); 22 void (*find_mptable)(void); 23 void (*early_parse_smp_cfg)(void); 24 void (*parse_smp_cfg)(void); 25 }; 26 27 /** 28 * struct x86_init_resources - platform specific resource related ops 29 * @probe_roms: probe BIOS roms 30 * @reserve_resources: reserve the standard resources for the 31 * platform 32 * @memory_setup: platform specific memory setup 33 * @dmi_setup: platform specific DMI setup 34 * @realmode_limit: platform specific address limit for the real mode trampoline 35 * (default 1M) 36 */ 37 struct x86_init_resources { 38 void (*probe_roms)(void); 39 void (*reserve_resources)(void); 40 char *(*memory_setup)(void); 41 void (*dmi_setup)(void); 42 unsigned long realmode_limit; 43 }; 44 45 /** 46 * struct x86_init_irqs - platform specific interrupt setup 47 * @pre_vector_init: init code to run before interrupt vectors 48 * are set up. 49 * @intr_init: interrupt init code 50 * @intr_mode_select: interrupt delivery mode selection 51 * @intr_mode_init: interrupt delivery mode setup 52 * @create_pci_msi_domain: Create the PCI/MSI interrupt domain 53 */ 54 struct x86_init_irqs { 55 void (*pre_vector_init)(void); 56 void (*intr_init)(void); 57 void (*intr_mode_select)(void); 58 void (*intr_mode_init)(void); 59 struct irq_domain *(*create_pci_msi_domain)(void); 60 }; 61 62 /** 63 * struct x86_init_oem - oem platform specific customizing functions 64 * @arch_setup: platform specific architecture setup 65 * @banner: print a platform specific banner 66 */ 67 struct x86_init_oem { 68 void (*arch_setup)(void); 69 void (*banner)(void); 70 }; 71 72 /** 73 * struct x86_init_paging - platform specific paging functions 74 * @pagetable_init: platform specific paging initialization call to setup 75 * the kernel pagetables and prepare accessors functions. 76 * Callback must call paging_init(). Called once after the 77 * direct mapping for phys memory is available. 78 */ 79 struct x86_init_paging { 80 void (*pagetable_init)(void); 81 }; 82 83 /** 84 * struct x86_init_timers - platform specific timer setup 85 * @setup_percpu_clockev: set up the per cpu clock event device for the 86 * boot cpu 87 * @timer_init: initialize the platform timer (default PIT/HPET) 88 * @wallclock_init: init the wallclock device 89 */ 90 struct x86_init_timers { 91 void (*setup_percpu_clockev)(void); 92 void (*timer_init)(void); 93 void (*wallclock_init)(void); 94 }; 95 96 /** 97 * struct x86_init_iommu - platform specific iommu setup 98 * @iommu_init: platform specific iommu setup 99 */ 100 struct x86_init_iommu { 101 int (*iommu_init)(void); 102 }; 103 104 /** 105 * struct x86_init_pci - platform specific pci init functions 106 * @arch_init: platform specific pci arch init call 107 * @init: platform specific pci subsystem init 108 * @init_irq: platform specific pci irq init 109 * @fixup_irqs: platform specific pci irq fixup 110 */ 111 struct x86_init_pci { 112 int (*arch_init)(void); 113 int (*init)(void); 114 void (*init_irq)(void); 115 void (*fixup_irqs)(void); 116 }; 117 118 /** 119 * struct x86_hyper_init - x86 hypervisor init functions 120 * @init_platform: platform setup 121 * @guest_late_init: guest late init 122 * @x2apic_available: X2APIC detection 123 * @msi_ext_dest_id: MSI supports 15-bit APIC IDs 124 * @init_mem_mapping: setup early mappings during init_mem_mapping() 125 * @init_after_bootmem: guest init after boot allocator is finished 126 */ 127 struct x86_hyper_init { 128 void (*init_platform)(void); 129 void (*guest_late_init)(void); 130 bool (*x2apic_available)(void); 131 bool (*msi_ext_dest_id)(void); 132 void (*init_mem_mapping)(void); 133 void (*init_after_bootmem)(void); 134 }; 135 136 /** 137 * struct x86_init_acpi - x86 ACPI init functions 138 * @set_root_pointer: set RSDP address 139 * @get_root_pointer: get RSDP address 140 * @reduced_hw_early_init: hardware reduced platform early init 141 */ 142 struct x86_init_acpi { 143 void (*set_root_pointer)(u64 addr); 144 u64 (*get_root_pointer)(void); 145 void (*reduced_hw_early_init)(void); 146 }; 147 148 /** 149 * struct x86_guest - Functions used by misc guest incarnations like SEV, TDX, etc. 150 * 151 * @enc_status_change_prepare: Notify HV before the encryption status of a range is changed 152 * @enc_status_change_finish: Notify HV after the encryption status of a range is changed 153 * @enc_tlb_flush_required: Returns true if a TLB flush is needed before changing page encryption status 154 * @enc_cache_flush_required: Returns true if a cache flush is needed before changing page encryption status 155 * @enc_kexec_begin: Begin the two-step process of converting shared memory back 156 * to private. It stops the new conversions from being started 157 * and waits in-flight conversions to finish, if possible. 158 * @enc_kexec_finish: Finish the two-step process of converting shared memory to 159 * private. All memory is private after the call when 160 * the function returns. 161 * It is called on only one CPU while the others are shut down 162 * and with interrupts disabled. 163 */ 164 struct x86_guest { 165 int (*enc_status_change_prepare)(unsigned long vaddr, int npages, bool enc); 166 int (*enc_status_change_finish)(unsigned long vaddr, int npages, bool enc); 167 bool (*enc_tlb_flush_required)(bool enc); 168 bool (*enc_cache_flush_required)(void); 169 void (*enc_kexec_begin)(void); 170 void (*enc_kexec_finish)(void); 171 }; 172 173 /** 174 * struct x86_init_ops - functions for platform specific setup 175 * 176 */ 177 struct x86_init_ops { 178 struct x86_init_resources resources; 179 struct x86_init_mpparse mpparse; 180 struct x86_init_irqs irqs; 181 struct x86_init_oem oem; 182 struct x86_init_paging paging; 183 struct x86_init_timers timers; 184 struct x86_init_iommu iommu; 185 struct x86_init_pci pci; 186 struct x86_hyper_init hyper; 187 struct x86_init_acpi acpi; 188 }; 189 190 /** 191 * struct x86_cpuinit_ops - platform specific cpu hotplug setups 192 * @setup_percpu_clockev: set up the per cpu clock event device 193 * @early_percpu_clock_init: early init of the per cpu clock event device 194 * @fixup_cpu_id: fixup function for cpuinfo_x86::topo.pkg_id 195 * @parallel_bringup: Parallel bringup control 196 */ 197 struct x86_cpuinit_ops { 198 void (*setup_percpu_clockev)(void); 199 void (*early_percpu_clock_init)(void); 200 void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node); 201 bool parallel_bringup; 202 }; 203 204 struct timespec64; 205 206 /** 207 * struct x86_legacy_devices - legacy x86 devices 208 * 209 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform 210 * is known to never have a PNPBIOS. 211 * 212 * These are devices known to require LPC or ISA bus. The definition of legacy 213 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag 214 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on 215 * the LPC or ISA bus. User visible devices are devices that have end-user 216 * accessible connectors (for example, LPT parallel port). Legacy devices on 217 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard 218 * / mouse, and the floppy disk controller. A system that lacks all known 219 * legacy devices can assume all devices can be detected exclusively via 220 * standard device enumeration mechanisms including the ACPI namespace. 221 * 222 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not 223 * have any of the legacy devices enumerated below present. 224 */ 225 struct x86_legacy_devices { 226 int pnpbios; 227 }; 228 229 /** 230 * enum x86_legacy_i8042_state - i8042 keyboard controller state 231 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on 232 * given platform/subarch. 233 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller 234 * is absent. 235 * @X86_LEGACY_I8042_EXPECTED_PRESENT: the controller is likely to be 236 * present, the i8042 driver should probe for controller existence. 237 */ 238 enum x86_legacy_i8042_state { 239 X86_LEGACY_I8042_PLATFORM_ABSENT, 240 X86_LEGACY_I8042_FIRMWARE_ABSENT, 241 X86_LEGACY_I8042_EXPECTED_PRESENT, 242 }; 243 244 /** 245 * struct x86_legacy_features - legacy x86 features 246 * 247 * @i8042: indicated if we expect the device to have i8042 controller 248 * present. 249 * @rtc: this device has a CMOS real-time clock present 250 * @warm_reset: 1 if platform allows warm reset, else 0 251 * @no_vga: 1 if (FADT.boot_flags & ACPI_FADT_NO_VGA) is set, else 0 252 * @reserve_bios_regions: boot code will search for the EBDA address and the 253 * start of the 640k - 1M BIOS region. If false, the platform must 254 * ensure that its memory map correctly reserves sub-1MB regions as needed. 255 * @devices: legacy x86 devices, refer to struct x86_legacy_devices 256 * documentation for further details. 257 */ 258 struct x86_legacy_features { 259 enum x86_legacy_i8042_state i8042; 260 int rtc; 261 int warm_reset; 262 int no_vga; 263 int reserve_bios_regions; 264 struct x86_legacy_devices devices; 265 }; 266 267 /** 268 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks 269 * 270 * @pin_vcpu: pin current vcpu to specified physical 271 * cpu (run rarely) 272 * @sev_es_hcall_prepare: Load additional hypervisor-specific 273 * state into the GHCB when doing a VMMCALL under 274 * SEV-ES. Called from the #VC exception handler. 275 * @sev_es_hcall_finish: Copies state from the GHCB back into the 276 * processor (or pt_regs). Also runs checks on the 277 * state returned from the hypervisor after a 278 * VMMCALL under SEV-ES. Needs to return 'false' 279 * if the checks fail. Called from the #VC 280 * exception handler. 281 * @is_private_mmio: For CoCo VMs, must map MMIO address as private. 282 * Used when device is emulated by a paravisor 283 * layer in the VM context. 284 */ 285 struct x86_hyper_runtime { 286 void (*pin_vcpu)(int cpu); 287 void (*sev_es_hcall_prepare)(struct ghcb *ghcb, struct pt_regs *regs); 288 bool (*sev_es_hcall_finish)(struct ghcb *ghcb, struct pt_regs *regs); 289 bool (*is_private_mmio)(u64 addr); 290 }; 291 292 /** 293 * struct x86_platform_ops - platform specific runtime functions 294 * @calibrate_cpu: calibrate CPU 295 * @calibrate_tsc: calibrate TSC, if different from CPU 296 * @get_wallclock: get time from HW clock like RTC etc. 297 * @set_wallclock: set time back to HW clock 298 * @iommu_shutdown: set by an IOMMU driver for shutdown if necessary 299 * @is_untracked_pat_range: exclude from PAT logic 300 * @nmi_init: enable NMI on cpus 301 * @get_nmi_reason: get the reason an NMI was received 302 * @save_sched_clock_state: save state for sched_clock() on suspend 303 * @restore_sched_clock_state: restore state for sched_clock() on resume 304 * @apic_post_init: adjust apic if needed 305 * @legacy: legacy features 306 * @set_legacy_features: override legacy features. Use of this callback 307 * is highly discouraged. You should only need 308 * this if your hardware platform requires further 309 * custom fine tuning far beyond what may be 310 * possible in x86_early_init_platform_quirks() by 311 * only using the current x86_hardware_subarch 312 * semantics. 313 * @realmode_reserve: reserve memory for realmode trampoline 314 * @realmode_init: initialize realmode trampoline 315 * @hyper: x86 hypervisor specific runtime callbacks 316 * @guest: guest incarnations callbacks 317 */ 318 struct x86_platform_ops { 319 unsigned long (*calibrate_cpu)(void); 320 unsigned long (*calibrate_tsc)(void); 321 void (*get_wallclock)(struct timespec64 *ts); 322 int (*set_wallclock)(const struct timespec64 *ts); 323 void (*iommu_shutdown)(void); 324 bool (*is_untracked_pat_range)(u64 start, u64 end); 325 void (*nmi_init)(void); 326 unsigned char (*get_nmi_reason)(void); 327 void (*save_sched_clock_state)(void); 328 void (*restore_sched_clock_state)(void); 329 void (*apic_post_init)(void); 330 struct x86_legacy_features legacy; 331 void (*set_legacy_features)(void); 332 void (*realmode_reserve)(void); 333 void (*realmode_init)(void); 334 struct x86_hyper_runtime hyper; 335 struct x86_guest guest; 336 }; 337 338 struct x86_apic_ops { 339 unsigned int (*io_apic_read) (unsigned int apic, unsigned int reg); 340 void (*restore)(void); 341 }; 342 343 extern struct x86_init_ops x86_init; 344 extern struct x86_cpuinit_ops x86_cpuinit; 345 extern struct x86_platform_ops x86_platform; 346 extern struct x86_msi_ops x86_msi; 347 extern struct x86_apic_ops x86_apic_ops; 348 349 extern void x86_early_init_platform_quirks(void); 350 extern void x86_init_noop(void); 351 extern void x86_init_uint_noop(unsigned int unused); 352 extern bool bool_x86_init_noop(void); 353 extern void x86_op_int_noop(int cpu); 354 extern bool x86_pnpbios_disabled(void); 355 extern int set_rtc_noop(const struct timespec64 *now); 356 extern void get_rtc_noop(struct timespec64 *now); 357 358 #endif 359