1 /* SPDX-License-Identifier: GPL-2.0 */
2 /**
3 * xhci-dbgcap.h - xHCI debug capability support
4 *
5 * Copyright (C) 2017 Intel Corporation
6 *
7 * Author: Lu Baolu <baolu.lu@linux.intel.com>
8 */
9 #ifndef __LINUX_XHCI_DBGCAP_H
10 #define __LINUX_XHCI_DBGCAP_H
11
12 #include <linux/tty.h>
13 #include <linux/kfifo.h>
14
15 struct dbc_regs {
16 __le32 capability;
17 __le32 doorbell;
18 __le32 ersts; /* Event Ring Segment Table Size*/
19 __le32 __reserved_0; /* 0c~0f reserved bits */
20 __le64 erstba; /* Event Ring Segment Table Base Address */
21 __le64 erdp; /* Event Ring Dequeue Pointer */
22 __le32 control;
23 __le32 status;
24 __le32 portsc; /* Port status and control */
25 __le32 __reserved_1; /* 2b~28 reserved bits */
26 __le64 dccp; /* Debug Capability Context Pointer */
27 __le32 devinfo1; /* Device Descriptor Info Register 1 */
28 __le32 devinfo2; /* Device Descriptor Info Register 2 */
29 };
30
31 struct dbc_info_context {
32 __le64 string0;
33 __le64 manufacturer;
34 __le64 product;
35 __le64 serial;
36 __le32 length;
37 __le32 __reserved_0[7];
38 };
39
40 #define DBC_CTRL_DBC_RUN BIT(0)
41 #define DBC_CTRL_PORT_ENABLE BIT(1)
42 #define DBC_CTRL_HALT_OUT_TR BIT(2)
43 #define DBC_CTRL_HALT_IN_TR BIT(3)
44 #define DBC_CTRL_DBC_RUN_CHANGE BIT(4)
45 #define DBC_CTRL_DBC_ENABLE BIT(31)
46 #define DBC_CTRL_MAXBURST(p) (((p) >> 16) & 0xff)
47 #define DBC_DOOR_BELL_TARGET(p) (((p) & 0xff) << 8)
48
49 #define DBC_MAX_PACKET 1024
50 #define DBC_CONTEXT_SIZE 64
51
52 /*
53 * Port status:
54 */
55 #define DBC_PORTSC_CONN_STATUS BIT(0)
56 #define DBC_PORTSC_PORT_ENABLED BIT(1)
57 #define DBC_PORTSC_CONN_CHANGE BIT(17)
58 #define DBC_PORTSC_RESET_CHANGE BIT(21)
59 #define DBC_PORTSC_LINK_CHANGE BIT(22)
60 #define DBC_PORTSC_CONFIG_CHANGE BIT(23)
61
62 /*
63 * The maximum length of a string descriptor is 255, because the bLength
64 * field in the usb_string_descriptor struct is __u8. In practice the
65 * maximum length is 254, because a string descriptor consists of a 2 byte
66 * header followed by UTF-16 characters (2 bytes each). This allows for
67 * only 126 characters (code points) in the string, which is where
68 * USB_MAX_STRING_LEN comes from.
69 */
70 #define USB_MAX_STRING_DESC_LEN 254
71
72 struct dbc_str_descs {
73 char string0[USB_MAX_STRING_DESC_LEN];
74 char manufacturer[USB_MAX_STRING_DESC_LEN];
75 char product[USB_MAX_STRING_DESC_LEN];
76 char serial[USB_MAX_STRING_DESC_LEN];
77 };
78
79 /*
80 * NULL terminated UTF-8 strings used to create UTF-16 strings
81 * (with maxiumum USB_MAX_STRING_LEN 2 byte characters).
82 */
83 struct dbc_str {
84 char manufacturer[USB_MAX_STRING_LEN+1];
85 char product[USB_MAX_STRING_LEN+1];
86 char serial[USB_MAX_STRING_LEN+1];
87 };
88
89 #define DBC_PROTOCOL 1 /* GNU Remote Debug Command */
90 #define DBC_VENDOR_ID 0x1d6b /* Linux Foundation 0x1d6b */
91 #define DBC_PRODUCT_ID 0x0010 /* device 0010 */
92 #define DBC_DEVICE_REV 0x0010 /* 0.10 */
93
94 enum dbc_state {
95 DS_DISABLED = 0,
96 DS_INITIALIZED,
97 DS_ENABLED,
98 DS_CONNECTED,
99 DS_CONFIGURED,
100 DS_MAX
101 };
102
103 struct dbc_ep {
104 struct xhci_dbc *dbc;
105 struct list_head list_pending;
106 struct xhci_ring *ring;
107 unsigned int direction:1;
108 unsigned int halted:1;
109 };
110
111 #define DBC_QUEUE_SIZE 16
112 #define DBC_WRITE_BUF_SIZE 8192
113 #define DBC_POLL_INTERVAL_DEFAULT 64 /* milliseconds */
114 #define DBC_POLL_INTERVAL_MAX 5000 /* milliseconds */
115 #define DBC_XFER_INACTIVITY_TIMEOUT 10 /* milliseconds */
116 #define DBC_ENUMERATION_TIMEOUT 2000 /* milliseconds */
117 #define DBC_AUTOSUSPEND_DELAY 15000 /* milliseconds */
118
119 /*
120 * Private structure for DbC hardware state:
121 */
122 struct dbc_port {
123 struct tty_port port;
124 spinlock_t port_lock; /* port access */
125 int minor;
126
127 struct list_head read_pool;
128 struct list_head read_queue;
129 unsigned int n_read;
130 struct tasklet_struct push;
131
132 struct list_head write_pool;
133 unsigned int tx_boundary;
134
135 bool registered;
136 bool tx_running;
137 };
138
139 struct dbc_driver {
140 int (*configure)(struct xhci_dbc *dbc);
141 void (*disconnect)(struct xhci_dbc *dbc);
142 };
143
144 struct xhci_dbc {
145 spinlock_t lock; /* device access */
146 struct mutex enable_mutex;
147 struct device *dev;
148 struct xhci_hcd *xhci;
149 struct dbc_regs __iomem *regs;
150 struct xhci_ring *ring_evt;
151 struct xhci_ring *ring_in;
152 struct xhci_ring *ring_out;
153 struct xhci_erst erst;
154 struct xhci_container_ctx *ctx;
155
156 struct dbc_str_descs *str_descs;
157 dma_addr_t str_descs_dma;
158 size_t str_descs_size;
159 struct dbc_str str;
160 u16 idVendor;
161 u16 idProduct;
162 u16 bcdDevice;
163 u8 bInterfaceProtocol;
164
165 enum dbc_state state;
166 struct delayed_work event_work;
167 unsigned int poll_interval; /* ms */
168 unsigned long xfer_timestamp;
169 unsigned long state_timestamp;
170 unsigned resume_required:1;
171 unsigned pending_rpm_put:1;
172 struct dbc_ep eps[2];
173
174 const struct dbc_driver *driver;
175 void *priv;
176 };
177
178 struct dbc_request {
179 void *buf;
180 unsigned int length;
181 dma_addr_t dma;
182 void (*complete)(struct xhci_dbc *dbc,
183 struct dbc_request *req);
184 struct list_head list_pool;
185 int status;
186 unsigned int actual;
187
188 struct xhci_dbc *dbc;
189 struct list_head list_pending;
190 dma_addr_t trb_dma;
191 union xhci_trb *trb;
192 unsigned direction:1;
193 };
194
195 #define dbc_bulkout_ctx(d) \
196 ((struct xhci_ep_ctx *)((d)->ctx->bytes + DBC_CONTEXT_SIZE))
197 #define dbc_bulkin_ctx(d) \
198 ((struct xhci_ep_ctx *)((d)->ctx->bytes + DBC_CONTEXT_SIZE * 2))
199 #define dbc_bulkout_enq(d) \
200 xhci_trb_virt_to_dma((d)->ring_out->enq_seg, (d)->ring_out->enqueue)
201 #define dbc_bulkin_enq(d) \
202 xhci_trb_virt_to_dma((d)->ring_in->enq_seg, (d)->ring_in->enqueue)
203 #define dbc_epctx_info2(t, p, b) \
204 cpu_to_le32(EP_TYPE(t) | MAX_PACKET(p) | MAX_BURST(b))
205 #define dbc_ep_dma_direction(d) \
206 ((d)->direction ? DMA_FROM_DEVICE : DMA_TO_DEVICE)
207
208 #define BULK_OUT 0
209 #define BULK_IN 1
210 #define EPID_OUT 2
211 #define EPID_IN 3
212
213 enum evtreturn {
214 EVT_ERR = -1,
215 EVT_DONE,
216 EVT_XFER_DONE,
217 EVT_GSER,
218 EVT_DISC,
219 };
220
get_in_ep(struct xhci_dbc * dbc)221 static inline struct dbc_ep *get_in_ep(struct xhci_dbc *dbc)
222 {
223 return &dbc->eps[BULK_IN];
224 }
225
get_out_ep(struct xhci_dbc * dbc)226 static inline struct dbc_ep *get_out_ep(struct xhci_dbc *dbc)
227 {
228 return &dbc->eps[BULK_OUT];
229 }
230
231 #ifdef CONFIG_USB_XHCI_DBGCAP
232 int xhci_create_dbc_dev(struct xhci_hcd *xhci);
233 void xhci_remove_dbc_dev(struct xhci_hcd *xhci);
234 int xhci_dbc_init(void);
235 void xhci_dbc_exit(void);
236 int dbc_tty_init(void);
237 void dbc_tty_exit(void);
238 int xhci_dbc_tty_probe(struct device *dev, void __iomem *res, struct xhci_hcd *xhci);
239 void xhci_dbc_tty_remove(struct xhci_dbc *dbc);
240 struct xhci_dbc *xhci_alloc_dbc(struct device *dev, void __iomem *res,
241 const struct dbc_driver *driver);
242 void xhci_dbc_remove(struct xhci_dbc *dbc);
243 struct dbc_request *dbc_alloc_request(struct xhci_dbc *dbc,
244 unsigned int direction,
245 gfp_t flags);
246 void dbc_free_request(struct dbc_request *req);
247 int dbc_ep_queue(struct dbc_request *req);
248 #ifdef CONFIG_PM
249 int xhci_dbc_suspend(struct xhci_hcd *xhci);
250 int xhci_dbc_resume(struct xhci_hcd *xhci);
251 #endif /* CONFIG_PM */
252 #else
xhci_create_dbc_dev(struct xhci_hcd * xhci)253 static inline int xhci_create_dbc_dev(struct xhci_hcd *xhci)
254 {
255 return 0;
256 }
257
xhci_remove_dbc_dev(struct xhci_hcd * xhci)258 static inline void xhci_remove_dbc_dev(struct xhci_hcd *xhci)
259 {
260 }
xhci_dbc_init(void)261 static inline int xhci_dbc_init(void)
262 {
263 return 0;
264 }
xhci_dbc_exit(void)265 static inline void xhci_dbc_exit(void)
266 {
267 }
xhci_dbc_suspend(struct xhci_hcd * xhci)268 static inline int xhci_dbc_suspend(struct xhci_hcd *xhci)
269 {
270 return 0;
271 }
272
xhci_dbc_resume(struct xhci_hcd * xhci)273 static inline int xhci_dbc_resume(struct xhci_hcd *xhci)
274 {
275 return 0;
276 }
277 #endif /* CONFIG_USB_XHCI_DBGCAP */
278 #endif /* __LINUX_XHCI_DBGCAP_H */
279