1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Bosch BMC150 three-axis magnetic field sensor driver
4 *
5 * Copyright (c) 2015, Intel Corporation.
6 *
7 * This code is based on bmm050_api.c authored by contact@bosch.sensortec.com:
8 *
9 * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
10 */
11
12 #include <linux/module.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/cleanup.h>
16 #include <linux/delay.h>
17 #include <linux/slab.h>
18 #include <linux/pm.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/events.h>
24 #include <linux/iio/trigger.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
27 #include <linux/regmap.h>
28 #include <linux/regulator/consumer.h>
29
30 #include "bmc150_magn.h"
31
32 #define BMC150_MAGN_REG_CHIP_ID 0x40
33 #define BMC150_MAGN_CHIP_ID_VAL 0x32
34
35 #define BMC150_MAGN_REG_X_L 0x42
36 #define BMC150_MAGN_REG_X_M 0x43
37 #define BMC150_MAGN_REG_Y_L 0x44
38 #define BMC150_MAGN_REG_Y_M 0x45
39 #define BMC150_MAGN_SHIFT_XY_L 3
40 #define BMC150_MAGN_REG_Z_L 0x46
41 #define BMC150_MAGN_REG_Z_M 0x47
42 #define BMC150_MAGN_SHIFT_Z_L 1
43 #define BMC150_MAGN_REG_RHALL_L 0x48
44 #define BMC150_MAGN_REG_RHALL_M 0x49
45 #define BMC150_MAGN_SHIFT_RHALL_L 2
46
47 #define BMC150_MAGN_REG_INT_STATUS 0x4A
48
49 #define BMC150_MAGN_REG_POWER 0x4B
50 #define BMC150_MAGN_MASK_POWER_CTL BIT(0)
51
52 #define BMC150_MAGN_REG_OPMODE_ODR 0x4C
53 #define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
54 #define BMC150_MAGN_SHIFT_OPMODE 1
55 #define BMC150_MAGN_MODE_NORMAL 0x00
56 #define BMC150_MAGN_MODE_FORCED 0x01
57 #define BMC150_MAGN_MODE_SLEEP 0x03
58 #define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
59 #define BMC150_MAGN_SHIFT_ODR 3
60
61 #define BMC150_MAGN_REG_INT 0x4D
62
63 #define BMC150_MAGN_REG_INT_DRDY 0x4E
64 #define BMC150_MAGN_MASK_DRDY_EN BIT(7)
65 #define BMC150_MAGN_SHIFT_DRDY_EN 7
66 #define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
67 #define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
68 #define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
69 #define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
70 #define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
71 #define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
72 #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
73
74 #define BMC150_MAGN_REG_LOW_THRESH 0x4F
75 #define BMC150_MAGN_REG_HIGH_THRESH 0x50
76 #define BMC150_MAGN_REG_REP_XY 0x51
77 #define BMC150_MAGN_REG_REP_Z 0x52
78 #define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
79
80 #define BMC150_MAGN_REG_TRIM_START 0x5D
81 #define BMC150_MAGN_REG_TRIM_END 0x71
82
83 #define BMC150_MAGN_XY_OVERFLOW_VAL -4096
84 #define BMC150_MAGN_Z_OVERFLOW_VAL -16384
85
86 /* Time from SUSPEND to SLEEP */
87 #define BMC150_MAGN_START_UP_TIME_MS 3
88
89 #define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
90
91 #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
92 #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
93 #define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
94 #define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
95
96 enum bmc150_magn_axis {
97 AXIS_X,
98 AXIS_Y,
99 AXIS_Z,
100 RHALL,
101 AXIS_XYZ_MAX = RHALL,
102 AXIS_XYZR_MAX,
103 };
104
105 enum bmc150_magn_power_modes {
106 BMC150_MAGN_POWER_MODE_SUSPEND,
107 BMC150_MAGN_POWER_MODE_SLEEP,
108 BMC150_MAGN_POWER_MODE_NORMAL,
109 };
110
111 struct bmc150_magn_trim_regs {
112 s8 x1;
113 s8 y1;
114 __le16 reserved1;
115 u8 reserved2;
116 __le16 z4;
117 s8 x2;
118 s8 y2;
119 __le16 reserved3;
120 __le16 z2;
121 __le16 z1;
122 __le16 xyz1;
123 __le16 z3;
124 s8 xy2;
125 u8 xy1;
126 } __packed;
127
128 struct bmc150_magn_data {
129 struct device *dev;
130 /*
131 * 1. Protect this structure.
132 * 2. Serialize sequences that power on/off the device and access HW.
133 */
134 struct mutex mutex;
135 struct regmap *regmap;
136 struct regulator_bulk_data regulators[2];
137 struct iio_mount_matrix orientation;
138 /* Ensure timestamp is naturally aligned */
139 struct {
140 s32 chans[3];
141 aligned_s64 timestamp;
142 } scan;
143 struct iio_trigger *dready_trig;
144 bool dready_trigger_on;
145 int max_odr;
146 int irq;
147 };
148
149 static const struct {
150 int freq;
151 u8 reg_val;
152 } bmc150_magn_samp_freq_table[] = {
153 { 2, 0x01 },
154 { 6, 0x02 },
155 { 8, 0x03 },
156 { 10, 0x00 },
157 { 15, 0x04 },
158 { 20, 0x05 },
159 { 25, 0x06 },
160 { 30, 0x07 },
161 };
162
163 enum bmc150_magn_presets {
164 LOW_POWER_PRESET,
165 REGULAR_PRESET,
166 ENHANCED_REGULAR_PRESET,
167 HIGH_ACCURACY_PRESET
168 };
169
170 static const struct bmc150_magn_preset {
171 u8 rep_xy;
172 u8 rep_z;
173 u8 odr;
174 } bmc150_magn_presets_table[] = {
175 [LOW_POWER_PRESET] = { 3, 3, 10 },
176 [REGULAR_PRESET] = { 9, 15, 10 },
177 [ENHANCED_REGULAR_PRESET] = { 15, 27, 10 },
178 [HIGH_ACCURACY_PRESET] = { 47, 83, 20 },
179 };
180
181 #define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
182
bmc150_magn_is_writeable_reg(struct device * dev,unsigned int reg)183 static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
184 {
185 switch (reg) {
186 case BMC150_MAGN_REG_POWER:
187 case BMC150_MAGN_REG_OPMODE_ODR:
188 case BMC150_MAGN_REG_INT:
189 case BMC150_MAGN_REG_INT_DRDY:
190 case BMC150_MAGN_REG_LOW_THRESH:
191 case BMC150_MAGN_REG_HIGH_THRESH:
192 case BMC150_MAGN_REG_REP_XY:
193 case BMC150_MAGN_REG_REP_Z:
194 return true;
195 default:
196 return false;
197 }
198 }
199
bmc150_magn_is_volatile_reg(struct device * dev,unsigned int reg)200 static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
201 {
202 switch (reg) {
203 case BMC150_MAGN_REG_X_L:
204 case BMC150_MAGN_REG_X_M:
205 case BMC150_MAGN_REG_Y_L:
206 case BMC150_MAGN_REG_Y_M:
207 case BMC150_MAGN_REG_Z_L:
208 case BMC150_MAGN_REG_Z_M:
209 case BMC150_MAGN_REG_RHALL_L:
210 case BMC150_MAGN_REG_RHALL_M:
211 case BMC150_MAGN_REG_INT_STATUS:
212 return true;
213 default:
214 return false;
215 }
216 }
217
218 const struct regmap_config bmc150_magn_regmap_config = {
219 .reg_bits = 8,
220 .val_bits = 8,
221
222 .max_register = BMC150_MAGN_REG_TRIM_END,
223 .cache_type = REGCACHE_RBTREE,
224
225 .writeable_reg = bmc150_magn_is_writeable_reg,
226 .volatile_reg = bmc150_magn_is_volatile_reg,
227 };
228 EXPORT_SYMBOL_NS(bmc150_magn_regmap_config, "IIO_BMC150_MAGN");
229
bmc150_magn_set_power_mode(struct bmc150_magn_data * data,enum bmc150_magn_power_modes mode,bool state)230 static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
231 enum bmc150_magn_power_modes mode,
232 bool state)
233 {
234 int ret;
235
236 switch (mode) {
237 case BMC150_MAGN_POWER_MODE_SUSPEND:
238 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
239 BMC150_MAGN_MASK_POWER_CTL, !state);
240 if (ret < 0)
241 return ret;
242 usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
243 return 0;
244 case BMC150_MAGN_POWER_MODE_SLEEP:
245 return regmap_update_bits(data->regmap,
246 BMC150_MAGN_REG_OPMODE_ODR,
247 BMC150_MAGN_MASK_OPMODE,
248 BMC150_MAGN_MODE_SLEEP <<
249 BMC150_MAGN_SHIFT_OPMODE);
250 case BMC150_MAGN_POWER_MODE_NORMAL:
251 return regmap_update_bits(data->regmap,
252 BMC150_MAGN_REG_OPMODE_ODR,
253 BMC150_MAGN_MASK_OPMODE,
254 BMC150_MAGN_MODE_NORMAL <<
255 BMC150_MAGN_SHIFT_OPMODE);
256 }
257
258 return -EINVAL;
259 }
260
bmc150_magn_set_power_mode_locked(struct bmc150_magn_data * data,enum bmc150_magn_power_modes mode)261 static int bmc150_magn_set_power_mode_locked(struct bmc150_magn_data *data,
262 enum bmc150_magn_power_modes mode)
263 {
264 guard(mutex)(&data->mutex);
265 return bmc150_magn_set_power_mode(data, mode, true);
266 }
267
bmc150_magn_set_power_state(struct bmc150_magn_data * data,bool on)268 static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
269 {
270 int ret = 0;
271
272 if (on)
273 ret = pm_runtime_resume_and_get(data->dev);
274 else
275 pm_runtime_put_autosuspend(data->dev);
276 if (ret < 0) {
277 dev_err(data->dev,
278 "failed to change power state to %d\n", on);
279 return ret;
280 }
281
282 return 0;
283 }
284
bmc150_magn_get_odr(struct bmc150_magn_data * data,int * val)285 static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
286 {
287 int ret, reg_val;
288 u8 i, odr_val;
289
290 ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, ®_val);
291 if (ret < 0)
292 return ret;
293 odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
294
295 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
296 if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
297 *val = bmc150_magn_samp_freq_table[i].freq;
298 return 0;
299 }
300
301 return -EINVAL;
302 }
303
bmc150_magn_set_odr(struct bmc150_magn_data * data,int val)304 static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
305 {
306 int ret;
307 u8 i;
308
309 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
310 if (bmc150_magn_samp_freq_table[i].freq == val) {
311 ret = regmap_update_bits(data->regmap,
312 BMC150_MAGN_REG_OPMODE_ODR,
313 BMC150_MAGN_MASK_ODR,
314 bmc150_magn_samp_freq_table[i].
315 reg_val <<
316 BMC150_MAGN_SHIFT_ODR);
317 if (ret < 0)
318 return ret;
319 return 0;
320 }
321 }
322
323 return -EINVAL;
324 }
325
bmc150_magn_set_max_odr(struct bmc150_magn_data * data,int rep_xy,int rep_z,int odr)326 static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
327 int rep_z, int odr)
328 {
329 int ret, reg_val, max_odr;
330
331 if (rep_xy <= 0) {
332 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
333 ®_val);
334 if (ret < 0)
335 return ret;
336 rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
337 }
338 if (rep_z <= 0) {
339 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
340 ®_val);
341 if (ret < 0)
342 return ret;
343 rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
344 }
345 if (odr <= 0) {
346 ret = bmc150_magn_get_odr(data, &odr);
347 if (ret < 0)
348 return ret;
349 }
350 /* the maximum selectable read-out frequency from datasheet */
351 max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
352 if (odr > max_odr) {
353 dev_err(data->dev,
354 "Can't set oversampling with sampling freq %d\n",
355 odr);
356 return -EINVAL;
357 }
358 data->max_odr = max_odr;
359
360 return 0;
361 }
362
bmc150_magn_compensate_x(struct bmc150_magn_trim_regs * tregs,s16 x,u16 rhall)363 static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
364 u16 rhall)
365 {
366 s16 val;
367 u16 xyz1 = le16_to_cpu(tregs->xyz1);
368
369 if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
370 return S32_MIN;
371
372 if (!rhall)
373 rhall = xyz1;
374
375 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
376 val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
377 ((s32)val)) >> 7)) + (((s32)val) *
378 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
379 ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
380 (((s16)tregs->x1) << 3);
381
382 return (s32)val;
383 }
384
bmc150_magn_compensate_y(struct bmc150_magn_trim_regs * tregs,s16 y,u16 rhall)385 static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
386 u16 rhall)
387 {
388 s16 val;
389 u16 xyz1 = le16_to_cpu(tregs->xyz1);
390
391 if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
392 return S32_MIN;
393
394 if (!rhall)
395 rhall = xyz1;
396
397 val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
398 val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
399 ((s32)val)) >> 7)) + (((s32)val) *
400 ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
401 ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
402 (((s16)tregs->y1) << 3);
403
404 return (s32)val;
405 }
406
bmc150_magn_compensate_z(struct bmc150_magn_trim_regs * tregs,s16 z,u16 rhall)407 static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
408 u16 rhall)
409 {
410 s32 val;
411 u16 xyz1 = le16_to_cpu(tregs->xyz1);
412 u16 z1 = le16_to_cpu(tregs->z1);
413 s16 z2 = le16_to_cpu(tregs->z2);
414 s16 z3 = le16_to_cpu(tregs->z3);
415 s16 z4 = le16_to_cpu(tregs->z4);
416
417 if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
418 return S32_MIN;
419
420 val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
421 ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
422 ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
423
424 return val;
425 }
426
bmc150_magn_read_xyz(struct bmc150_magn_data * data,s32 * buffer)427 static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
428 {
429 int ret;
430 __le16 values[AXIS_XYZR_MAX];
431 s16 raw_x, raw_y, raw_z;
432 u16 rhall;
433 struct bmc150_magn_trim_regs tregs;
434
435 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
436 values, sizeof(values));
437 if (ret < 0)
438 return ret;
439
440 raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
441 raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
442 raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
443 rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
444
445 ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
446 &tregs, sizeof(tregs));
447 if (ret < 0)
448 return ret;
449
450 buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
451 buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
452 buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
453
454 return 0;
455 }
456
bmc150_magn_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)457 static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
458 struct iio_chan_spec const *chan,
459 int *val, int *val2, long mask)
460 {
461 struct bmc150_magn_data *data = iio_priv(indio_dev);
462 int ret, tmp;
463 s32 values[AXIS_XYZ_MAX];
464
465 switch (mask) {
466 case IIO_CHAN_INFO_RAW: {
467 if (iio_buffer_enabled(indio_dev))
468 return -EBUSY;
469
470 guard(mutex)(&data->mutex);
471
472 ret = bmc150_magn_set_power_state(data, true);
473 if (ret < 0)
474 return ret;
475
476 ret = bmc150_magn_read_xyz(data, values);
477 if (ret < 0) {
478 bmc150_magn_set_power_state(data, false);
479 return ret;
480 }
481 *val = values[chan->scan_index];
482
483 ret = bmc150_magn_set_power_state(data, false);
484 if (ret < 0)
485 return ret;
486
487 return IIO_VAL_INT;
488 }
489 case IIO_CHAN_INFO_SCALE:
490 /*
491 * The API/driver performs an off-chip temperature
492 * compensation and outputs x/y/z magnetic field data in
493 * 16 LSB/uT to the upper application layer.
494 */
495 *val = 0;
496 *val2 = 625;
497 return IIO_VAL_INT_PLUS_MICRO;
498 case IIO_CHAN_INFO_SAMP_FREQ:
499 ret = bmc150_magn_get_odr(data, val);
500 if (ret < 0)
501 return ret;
502 return IIO_VAL_INT;
503 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
504 switch (chan->channel2) {
505 case IIO_MOD_X:
506 case IIO_MOD_Y:
507 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
508 &tmp);
509 if (ret < 0)
510 return ret;
511 *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
512 return IIO_VAL_INT;
513 case IIO_MOD_Z:
514 ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
515 &tmp);
516 if (ret < 0)
517 return ret;
518 *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
519 return IIO_VAL_INT;
520 default:
521 return -EINVAL;
522 }
523 default:
524 return -EINVAL;
525 }
526 }
527
bmc150_magn_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)528 static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
529 struct iio_chan_spec const *chan,
530 int val, int val2, long mask)
531 {
532 struct bmc150_magn_data *data = iio_priv(indio_dev);
533 int ret;
534
535 switch (mask) {
536 case IIO_CHAN_INFO_SAMP_FREQ: {
537 if (val > data->max_odr)
538 return -EINVAL;
539 guard(mutex)(&data->mutex);
540 return bmc150_magn_set_odr(data, val);
541 }
542 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
543 switch (chan->channel2) {
544 case IIO_MOD_X:
545 case IIO_MOD_Y: {
546 if (val < 1 || val > 511)
547 return -EINVAL;
548 guard(mutex)(&data->mutex);
549 ret = bmc150_magn_set_max_odr(data, val, 0, 0);
550 if (ret < 0)
551 return ret;
552 return regmap_update_bits(data->regmap,
553 BMC150_MAGN_REG_REP_XY,
554 BMC150_MAGN_REG_REP_DATAMASK,
555 BMC150_MAGN_REPXY_TO_REGVAL(val));
556 }
557 case IIO_MOD_Z: {
558 if (val < 1 || val > 256)
559 return -EINVAL;
560 guard(mutex)(&data->mutex);
561 ret = bmc150_magn_set_max_odr(data, 0, val, 0);
562 if (ret < 0)
563 return ret;
564 return regmap_update_bits(data->regmap,
565 BMC150_MAGN_REG_REP_Z,
566 BMC150_MAGN_REG_REP_DATAMASK,
567 BMC150_MAGN_REPZ_TO_REGVAL(val));
568 }
569 default:
570 return -EINVAL;
571 }
572 default:
573 return -EINVAL;
574 }
575 }
576
bmc150_magn_show_samp_freq_avail(struct device * dev,struct device_attribute * attr,char * buf)577 static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
578 struct device_attribute *attr,
579 char *buf)
580 {
581 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
582 struct bmc150_magn_data *data = iio_priv(indio_dev);
583 size_t len = 0;
584 u8 i;
585
586 for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
587 if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
588 break;
589 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
590 bmc150_magn_samp_freq_table[i].freq);
591 }
592 /* replace last space with a newline */
593 buf[len - 1] = '\n';
594
595 return len;
596 }
597
598 static const struct iio_mount_matrix *
bmc150_magn_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)599 bmc150_magn_get_mount_matrix(const struct iio_dev *indio_dev,
600 const struct iio_chan_spec *chan)
601 {
602 struct bmc150_magn_data *data = iio_priv(indio_dev);
603
604 return &data->orientation;
605 }
606
607 static const struct iio_chan_spec_ext_info bmc150_magn_ext_info[] = {
608 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmc150_magn_get_mount_matrix),
609 { }
610 };
611
612 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
613
614 static struct attribute *bmc150_magn_attributes[] = {
615 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
616 NULL,
617 };
618
619 static const struct attribute_group bmc150_magn_attrs_group = {
620 .attrs = bmc150_magn_attributes,
621 };
622
623 #define BMC150_MAGN_CHANNEL(_axis) { \
624 .type = IIO_MAGN, \
625 .modified = 1, \
626 .channel2 = IIO_MOD_##_axis, \
627 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
628 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
629 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
630 BIT(IIO_CHAN_INFO_SCALE), \
631 .scan_index = AXIS_##_axis, \
632 .scan_type = { \
633 .sign = 's', \
634 .realbits = 32, \
635 .storagebits = 32, \
636 .endianness = IIO_LE \
637 }, \
638 .ext_info = bmc150_magn_ext_info, \
639 }
640
641 static const struct iio_chan_spec bmc150_magn_channels[] = {
642 BMC150_MAGN_CHANNEL(X),
643 BMC150_MAGN_CHANNEL(Y),
644 BMC150_MAGN_CHANNEL(Z),
645 IIO_CHAN_SOFT_TIMESTAMP(3),
646 };
647
648 static const struct iio_info bmc150_magn_info = {
649 .attrs = &bmc150_magn_attrs_group,
650 .read_raw = bmc150_magn_read_raw,
651 .write_raw = bmc150_magn_write_raw,
652 };
653
654 static const unsigned long bmc150_magn_scan_masks[] = {
655 BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
656 0
657 };
658
bmc150_magn_trigger_handler(int irq,void * p)659 static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
660 {
661 struct iio_poll_func *pf = p;
662 struct iio_dev *indio_dev = pf->indio_dev;
663 struct bmc150_magn_data *data = iio_priv(indio_dev);
664 int ret;
665
666 mutex_lock(&data->mutex);
667 ret = bmc150_magn_read_xyz(data, data->scan.chans);
668 if (ret < 0)
669 goto err;
670
671 iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan),
672 pf->timestamp);
673
674 err:
675 mutex_unlock(&data->mutex);
676 iio_trigger_notify_done(indio_dev->trig);
677
678 return IRQ_HANDLED;
679 }
680
bmc150_magn_init(struct bmc150_magn_data * data)681 static int bmc150_magn_init(struct bmc150_magn_data *data)
682 {
683 int ret, chip_id;
684 struct bmc150_magn_preset preset;
685
686 ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
687 data->regulators);
688 if (ret < 0) {
689 dev_err(data->dev, "Failed to enable regulators: %d\n", ret);
690 return ret;
691 }
692 /*
693 * 3ms power-on time according to datasheet, let's better
694 * be safe than sorry and set this delay to 5ms.
695 */
696 fsleep(5 * USEC_PER_MSEC);
697
698 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
699 false);
700 if (ret < 0) {
701 dev_err(data->dev,
702 "Failed to bring up device from suspend mode\n");
703 goto err_regulator_disable;
704 }
705
706 ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
707 if (ret < 0) {
708 dev_err(data->dev, "Failed reading chip id\n");
709 goto err_poweroff;
710 }
711 if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
712 dev_err(data->dev, "Invalid chip id 0x%x\n", chip_id);
713 ret = -ENODEV;
714 goto err_poweroff;
715 }
716 dev_dbg(data->dev, "Chip id %x\n", chip_id);
717
718 preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
719 ret = bmc150_magn_set_odr(data, preset.odr);
720 if (ret < 0) {
721 dev_err(data->dev, "Failed to set ODR to %d\n",
722 preset.odr);
723 goto err_poweroff;
724 }
725
726 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
727 BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
728 if (ret < 0) {
729 dev_err(data->dev, "Failed to set REP XY to %d\n",
730 preset.rep_xy);
731 goto err_poweroff;
732 }
733
734 ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
735 BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
736 if (ret < 0) {
737 dev_err(data->dev, "Failed to set REP Z to %d\n",
738 preset.rep_z);
739 goto err_poweroff;
740 }
741
742 ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
743 preset.odr);
744 if (ret < 0)
745 goto err_poweroff;
746
747 ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
748 true);
749 if (ret < 0) {
750 dev_err(data->dev, "Failed to power on device\n");
751 goto err_poweroff;
752 }
753
754 return 0;
755
756 err_poweroff:
757 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
758 err_regulator_disable:
759 regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
760 return ret;
761 }
762
bmc150_magn_reset_intr(struct bmc150_magn_data * data)763 static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
764 {
765 int tmp;
766
767 /*
768 * Data Ready (DRDY) is always cleared after
769 * readout of data registers ends.
770 */
771 return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
772 }
773
bmc150_magn_trig_reen(struct iio_trigger * trig)774 static void bmc150_magn_trig_reen(struct iio_trigger *trig)
775 {
776 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
777 struct bmc150_magn_data *data = iio_priv(indio_dev);
778 int ret;
779
780 if (!data->dready_trigger_on)
781 return;
782
783 guard(mutex)(&data->mutex);
784 ret = bmc150_magn_reset_intr(data);
785 if (ret)
786 dev_err(data->dev, "Failed to reset interrupt\n");
787 }
788
bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)789 static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
790 bool state)
791 {
792 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
793 struct bmc150_magn_data *data = iio_priv(indio_dev);
794 int ret;
795
796 guard(mutex)(&data->mutex);
797
798 if (state == data->dready_trigger_on)
799 return 0;
800
801 ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
802 BMC150_MAGN_MASK_DRDY_EN,
803 state << BMC150_MAGN_SHIFT_DRDY_EN);
804 if (ret < 0)
805 return ret;
806
807 data->dready_trigger_on = state;
808
809 if (state) {
810 ret = bmc150_magn_reset_intr(data);
811 if (ret < 0)
812 return ret;
813 }
814
815 return 0;
816 }
817
818 static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
819 .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
820 .reenable = bmc150_magn_trig_reen,
821 };
822
bmc150_magn_buffer_preenable(struct iio_dev * indio_dev)823 static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
824 {
825 struct bmc150_magn_data *data = iio_priv(indio_dev);
826
827 return bmc150_magn_set_power_state(data, true);
828 }
829
bmc150_magn_buffer_postdisable(struct iio_dev * indio_dev)830 static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
831 {
832 struct bmc150_magn_data *data = iio_priv(indio_dev);
833
834 return bmc150_magn_set_power_state(data, false);
835 }
836
837 static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
838 .preenable = bmc150_magn_buffer_preenable,
839 .postdisable = bmc150_magn_buffer_postdisable,
840 };
841
bmc150_magn_probe(struct device * dev,struct regmap * regmap,int irq,const char * name)842 int bmc150_magn_probe(struct device *dev, struct regmap *regmap,
843 int irq, const char *name)
844 {
845 struct bmc150_magn_data *data;
846 struct iio_dev *indio_dev;
847 int ret;
848
849 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
850 if (!indio_dev)
851 return -ENOMEM;
852
853 data = iio_priv(indio_dev);
854 dev_set_drvdata(dev, indio_dev);
855 data->regmap = regmap;
856 data->irq = irq;
857 data->dev = dev;
858
859 data->regulators[0].supply = "vdd";
860 data->regulators[1].supply = "vddio";
861 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->regulators),
862 data->regulators);
863 if (ret)
864 return dev_err_probe(dev, ret, "failed to get regulators\n");
865
866 ret = iio_read_mount_matrix(dev, &data->orientation);
867 if (ret)
868 return ret;
869
870 mutex_init(&data->mutex);
871
872 ret = bmc150_magn_init(data);
873 if (ret < 0)
874 return ret;
875
876 indio_dev->channels = bmc150_magn_channels;
877 indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
878 indio_dev->available_scan_masks = bmc150_magn_scan_masks;
879 indio_dev->name = name;
880 indio_dev->modes = INDIO_DIRECT_MODE;
881 indio_dev->info = &bmc150_magn_info;
882
883 if (irq > 0) {
884 data->dready_trig = devm_iio_trigger_alloc(dev,
885 "%s-dev%d",
886 indio_dev->name,
887 iio_device_id(indio_dev));
888 if (!data->dready_trig) {
889 ret = -ENOMEM;
890 dev_err(dev, "iio trigger alloc failed\n");
891 goto err_poweroff;
892 }
893
894 data->dready_trig->ops = &bmc150_magn_trigger_ops;
895 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
896 ret = iio_trigger_register(data->dready_trig);
897 if (ret) {
898 dev_err(dev, "iio trigger register failed\n");
899 goto err_poweroff;
900 }
901
902 ret = request_irq(irq, iio_trigger_generic_data_rdy_poll,
903 IRQF_TRIGGER_RISING | IRQF_NO_THREAD,
904 "bmc150_magn_event", data->dready_trig);
905 if (ret < 0) {
906 dev_err(dev, "request irq %d failed\n", irq);
907 goto err_trigger_unregister;
908 }
909 }
910
911 ret = iio_triggered_buffer_setup(indio_dev,
912 iio_pollfunc_store_time,
913 bmc150_magn_trigger_handler,
914 &bmc150_magn_buffer_setup_ops);
915 if (ret < 0) {
916 dev_err(dev, "iio triggered buffer setup failed\n");
917 goto err_free_irq;
918 }
919
920 ret = pm_runtime_set_active(dev);
921 if (ret)
922 goto err_buffer_cleanup;
923
924 pm_runtime_enable(dev);
925 pm_runtime_set_autosuspend_delay(dev,
926 BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
927 pm_runtime_use_autosuspend(dev);
928
929 ret = iio_device_register(indio_dev);
930 if (ret < 0) {
931 dev_err(dev, "unable to register iio device\n");
932 goto err_pm_cleanup;
933 }
934
935 dev_dbg(dev, "Registered device %s\n", name);
936 return 0;
937
938 err_pm_cleanup:
939 pm_runtime_dont_use_autosuspend(dev);
940 pm_runtime_disable(dev);
941 err_buffer_cleanup:
942 iio_triggered_buffer_cleanup(indio_dev);
943 err_free_irq:
944 if (irq > 0)
945 free_irq(irq, data->dready_trig);
946 err_trigger_unregister:
947 if (data->dready_trig)
948 iio_trigger_unregister(data->dready_trig);
949 err_poweroff:
950 bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
951 return ret;
952 }
953 EXPORT_SYMBOL_NS(bmc150_magn_probe, "IIO_BMC150_MAGN");
954
bmc150_magn_remove(struct device * dev)955 void bmc150_magn_remove(struct device *dev)
956 {
957 struct iio_dev *indio_dev = dev_get_drvdata(dev);
958 struct bmc150_magn_data *data = iio_priv(indio_dev);
959
960 iio_device_unregister(indio_dev);
961
962 pm_runtime_disable(dev);
963 pm_runtime_set_suspended(dev);
964
965 iio_triggered_buffer_cleanup(indio_dev);
966
967 if (data->irq > 0)
968 free_irq(data->irq, data->dready_trig);
969
970 if (data->dready_trig)
971 iio_trigger_unregister(data->dready_trig);
972
973 bmc150_magn_set_power_mode_locked(data, BMC150_MAGN_POWER_MODE_SUSPEND);
974
975 regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
976 }
977 EXPORT_SYMBOL_NS(bmc150_magn_remove, "IIO_BMC150_MAGN");
978
979 #ifdef CONFIG_PM
bmc150_magn_runtime_suspend(struct device * dev)980 static int bmc150_magn_runtime_suspend(struct device *dev)
981 {
982 struct iio_dev *indio_dev = dev_get_drvdata(dev);
983 struct bmc150_magn_data *data = iio_priv(indio_dev);
984 int ret;
985
986 ret = bmc150_magn_set_power_mode_locked(data,
987 BMC150_MAGN_POWER_MODE_SLEEP);
988 if (ret < 0) {
989 dev_err(dev, "powering off device failed\n");
990 return ret;
991 }
992 return 0;
993 }
994
995 /*
996 * Should be called with data->mutex held.
997 */
bmc150_magn_runtime_resume(struct device * dev)998 static int bmc150_magn_runtime_resume(struct device *dev)
999 {
1000 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1001 struct bmc150_magn_data *data = iio_priv(indio_dev);
1002
1003 return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
1004 true);
1005 }
1006 #endif
1007
1008 #ifdef CONFIG_PM_SLEEP
bmc150_magn_suspend(struct device * dev)1009 static int bmc150_magn_suspend(struct device *dev)
1010 {
1011 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1012 struct bmc150_magn_data *data = iio_priv(indio_dev);
1013
1014 return bmc150_magn_set_power_mode_locked(data,
1015 BMC150_MAGN_POWER_MODE_SLEEP);
1016 }
1017
bmc150_magn_resume(struct device * dev)1018 static int bmc150_magn_resume(struct device *dev)
1019 {
1020 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1021 struct bmc150_magn_data *data = iio_priv(indio_dev);
1022
1023 return bmc150_magn_set_power_mode_locked(data,
1024 BMC150_MAGN_POWER_MODE_NORMAL);
1025 }
1026 #endif
1027
1028 const struct dev_pm_ops bmc150_magn_pm_ops = {
1029 SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
1030 SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
1031 bmc150_magn_runtime_resume, NULL)
1032 };
1033 EXPORT_SYMBOL_NS(bmc150_magn_pm_ops, "IIO_BMC150_MAGN");
1034
1035 MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
1036 MODULE_LICENSE("GPL v2");
1037 MODULE_DESCRIPTION("BMC150 magnetometer core driver");
1038