1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
5 */
6 #include <linux/skbuff.h>
7 #include <linux/ctype.h>
8 #include <net/mac80211.h>
9 #include <net/cfg80211.h>
10 #include <linux/completion.h>
11 #include <linux/if_ether.h>
12 #include <linux/types.h>
13 #include <linux/pci.h>
14 #include <linux/uuid.h>
15 #include <linux/time.h>
16 #include <linux/of.h>
17 #include <linux/cleanup.h>
18 #include <linux/percpu.h>
19 #include <linux/refcount.h>
20 #include "core.h"
21 #include "debugfs.h"
22 #include "debug.h"
23 #include "mac.h"
24 #include "hw.h"
25 #include "peer.h"
26 #include "p2p.h"
27 #include "testmode.h"
28
29 struct ath12k_wmi_svc_ready_parse {
30 bool wmi_svc_bitmap_done;
31 };
32
33 struct wmi_tlv_fw_stats_parse {
34 const struct wmi_stats_event *ev;
35 struct ath12k_fw_stats *stats;
36 const struct wmi_per_chain_rssi_stat_params *rssi;
37 int rssi_num;
38 bool chain_rssi_done;
39 };
40
41 struct ath12k_wmi_dma_ring_caps_parse {
42 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps;
43 u32 n_dma_ring_caps;
44 };
45
46 struct ath12k_wmi_service_ext_arg {
47 u32 default_conc_scan_config_bits;
48 u32 default_fw_config_bits;
49 struct ath12k_wmi_ppe_threshold_arg ppet;
50 u32 he_cap_info;
51 u32 mpdu_density;
52 u32 max_bssid_rx_filters;
53 u32 num_hw_modes;
54 u32 num_phy;
55 };
56
57 struct ath12k_wmi_svc_rdy_ext_parse {
58 struct ath12k_wmi_service_ext_arg arg;
59 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps;
60 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
61 u32 n_hw_mode_caps;
62 u32 tot_phy_id;
63 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps;
64 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps;
65 u32 n_mac_phy_caps;
66 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps;
67 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps;
68 u32 n_ext_hal_reg_caps;
69 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
70 bool hw_mode_done;
71 bool mac_phy_done;
72 bool ext_hal_reg_done;
73 bool mac_phy_chainmask_combo_done;
74 bool mac_phy_chainmask_cap_done;
75 bool oem_dma_ring_cap_done;
76 bool dma_ring_cap_done;
77 };
78
79 struct ath12k_wmi_svc_rdy_ext2_arg {
80 u32 reg_db_version;
81 u32 hw_min_max_tx_power_2ghz;
82 u32 hw_min_max_tx_power_5ghz;
83 u32 chwidth_num_peer_caps;
84 u32 preamble_puncture_bw;
85 u32 max_user_per_ppdu_ofdma;
86 u32 max_user_per_ppdu_mumimo;
87 u32 target_cap_flags;
88 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE];
89 u32 max_num_linkview_peers;
90 u32 max_num_msduq_supported_per_tid;
91 u32 default_num_msduq_supported_per_tid;
92 };
93
94 struct ath12k_wmi_svc_rdy_ext2_parse {
95 struct ath12k_wmi_svc_rdy_ext2_arg arg;
96 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse;
97 bool dma_ring_cap_done;
98 bool spectral_bin_scaling_done;
99 bool mac_phy_caps_ext_done;
100 bool hal_reg_caps_ext2_done;
101 bool scan_radio_caps_ext2_done;
102 bool twt_caps_done;
103 bool htt_msdu_idx_to_qtype_map_done;
104 bool dbs_or_sbs_cap_ext_done;
105 };
106
107 struct ath12k_wmi_rdy_parse {
108 u32 num_extra_mac_addr;
109 };
110
111 struct ath12k_wmi_dma_buf_release_arg {
112 struct ath12k_wmi_dma_buf_release_fixed_params fixed;
113 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry;
114 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data;
115 u32 num_buf_entry;
116 u32 num_meta;
117 bool buf_entry_done;
118 bool meta_data_done;
119 };
120
121 struct ath12k_wmi_tlv_policy {
122 size_t min_len;
123 };
124
125 struct wmi_tlv_mgmt_rx_parse {
126 const struct ath12k_wmi_mgmt_rx_params *fixed;
127 const u8 *frame_buf;
128 bool frame_buf_done;
129 };
130
131 struct wmi_pdev_set_obss_bitmap_arg {
132 u32 tlv_tag;
133 u32 pdev_id;
134 u32 cmd_id;
135 const u32 *bitmap;
136 const char *label;
137 };
138
139 static DEFINE_MUTEX(ath12k_wmi_mutex);
140 static refcount_t ath12k_wmi_refcount;
141 static void __percpu *ath12k_wmi_tb;
142
143 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = {
144 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 },
145 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 },
146 [WMI_TAG_SERVICE_READY_EVENT] = {
147 .min_len = sizeof(struct wmi_service_ready_event) },
148 [WMI_TAG_SERVICE_READY_EXT_EVENT] = {
149 .min_len = sizeof(struct wmi_service_ready_ext_event) },
150 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = {
151 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) },
152 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = {
153 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) },
154 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = {
155 .min_len = sizeof(struct wmi_vdev_start_resp_event) },
156 [WMI_TAG_PEER_DELETE_RESP_EVENT] = {
157 .min_len = sizeof(struct wmi_peer_delete_resp_event) },
158 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = {
159 .min_len = sizeof(struct wmi_bcn_tx_status_event) },
160 [WMI_TAG_VDEV_STOPPED_EVENT] = {
161 .min_len = sizeof(struct wmi_vdev_stopped_event) },
162 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = {
163 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) },
164 [WMI_TAG_MGMT_RX_HDR] = {
165 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) },
166 [WMI_TAG_MGMT_TX_COMPL_EVENT] = {
167 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) },
168 [WMI_TAG_SCAN_EVENT] = {
169 .min_len = sizeof(struct wmi_scan_event) },
170 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = {
171 .min_len = sizeof(struct wmi_peer_sta_kickout_event) },
172 [WMI_TAG_ROAM_EVENT] = {
173 .min_len = sizeof(struct wmi_roam_event) },
174 [WMI_TAG_CHAN_INFO_EVENT] = {
175 .min_len = sizeof(struct wmi_chan_info_event) },
176 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = {
177 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) },
178 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = {
179 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) },
180 [WMI_TAG_READY_EVENT] = {
181 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) },
182 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = {
183 .min_len = sizeof(struct wmi_service_available_event) },
184 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = {
185 .min_len = sizeof(struct wmi_peer_assoc_conf_event) },
186 [WMI_TAG_RFKILL_EVENT] = {
187 .min_len = sizeof(struct wmi_rfkill_state_change_event) },
188 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = {
189 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) },
190 [WMI_TAG_HOST_SWFDA_EVENT] = {
191 .min_len = sizeof(struct wmi_fils_discovery_event) },
192 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = {
193 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) },
194 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = {
195 .min_len = sizeof(struct wmi_vdev_delete_resp_event) },
196 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = {
197 .min_len = sizeof(struct wmi_twt_enable_event) },
198 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = {
199 .min_len = sizeof(struct wmi_twt_disable_event) },
200 [WMI_TAG_P2P_NOA_INFO] = {
201 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) },
202 [WMI_TAG_P2P_NOA_EVENT] = {
203 .min_len = sizeof(struct wmi_p2p_noa_event) },
204 [WMI_TAG_11D_NEW_COUNTRY_EVENT] = {
205 .min_len = sizeof(struct wmi_11d_new_cc_event) },
206 [WMI_TAG_PER_CHAIN_RSSI_STATS] = {
207 .min_len = sizeof(struct wmi_per_chain_rssi_stat_params) },
208 [WMI_TAG_OBSS_COLOR_COLLISION_EVT] = {
209 .min_len = sizeof(struct wmi_obss_color_collision_event) },
210 [WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT] = {
211 .min_len = sizeof(struct ath12k_wmi_pdev_csa_event) },
212 };
213
ath12k_wmi_tlv_hdr(u32 cmd,u32 len)214 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len)
215 {
216 return le32_encode_bits(cmd, WMI_TLV_TAG) |
217 le32_encode_bits(len, WMI_TLV_LEN);
218 }
219
ath12k_wmi_tlv_cmd_hdr(u32 cmd,u32 len)220 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
221 {
222 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE);
223 }
224
225 #define PRIMAP(_hw_mode_) \
226 [_hw_mode_] = _hw_mode_##_PRI
227
228 static const int ath12k_hw_mode_pri_map[] = {
229 PRIMAP(WMI_HOST_HW_MODE_SINGLE),
230 PRIMAP(WMI_HOST_HW_MODE_DBS),
231 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE),
232 PRIMAP(WMI_HOST_HW_MODE_SBS),
233 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS),
234 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS),
235 /* keep last */
236 PRIMAP(WMI_HOST_HW_MODE_MAX),
237 };
238
239 /*
240 * Interference bitmap transform maps used by
241 * ath12k_wmi_transform_interference_bitmap().
242 *
243 * Firmware reports bitmap bits in a primary-based order where:
244 * - bit 0 is always the primary 20 MHz segment,
245 * - bit 1 is the adjacent 20 MHz in the same 40 MHz block,
246 * - bit 2 is the lower 20 MHz segment of the adjacent 40 MHz segment
247 * - bit 3 is the higher 20 MHz segment of the adjacent 40 MHz segment
248 * - remaining bits continue outward in 80/160/320 MHz groups.
249 *
250 * cfg80211 userspace notification expects absolute frequency order where:
251 * - bit 0 is the lowest-frequency 20 MHz segment in the current chandef,
252 * - bit N increases monotonically toward higher frequency.
253 *
254 * For each bandwidth-specific map:
255 * - row index = primary 20 MHz index in absolute (low->high) order,
256 * - column index = source bit position from firmware bitmap,
257 * - value = destination bit position in absolute order bitmap.
258 *
259 * Example for 80 MHz: if primary index is 2 (third 20 MHz chunk from low
260 * frequency), row intf_map_80[2] = { 2, 3, 0, 1 } means firmware bits {0,1,2,3}
261 * are remapped to destination bits {2,3,0,1} before notifying cfg80211.
262 */
263
264 static const int intf_map_80[4][4] = {
265 { 0, 1, 2, 3 },
266 { 1, 0, 2, 3 },
267 { 2, 3, 0, 1 },
268 { 3, 2, 0, 1 }
269 };
270
271 static const int intf_map_160[8][8] = {
272 { 0, 1, 2, 3, 4, 5, 6, 7 },
273 { 1, 0, 2, 3, 4, 5, 6, 7 },
274 { 2, 3, 0, 1, 4, 5, 6, 7 },
275 { 3, 2, 0, 1, 4, 5, 6, 7 },
276 { 4, 5, 6, 7, 0, 1, 2, 3 },
277 { 5, 4, 6, 7, 0, 1, 2, 3 },
278 { 6, 7, 4, 5, 0, 1, 2, 3 },
279 { 7, 6, 4, 5, 0, 1, 2, 3 }
280 };
281
282 static const int intf_map_320[16][16] = {
283 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
284 { 1, 0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
285 { 2, 3, 0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
286 { 3, 2, 0, 1, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
287 { 4, 5, 6, 7, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 },
288 { 5, 4, 6, 7, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 },
289 { 6, 7, 4, 5, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 },
290 { 7, 6, 4, 5, 0, 1, 2, 3, 8, 9, 10, 11, 12, 13, 14, 15 },
291 { 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 },
292 { 9, 8, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 },
293 { 10, 11, 8, 9, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 },
294 { 11, 10, 8, 9, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 },
295 { 12, 13, 14, 15, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 },
296 { 13, 12, 14, 15, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 },
297 { 14, 15, 12, 13, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 },
298 { 15, 14, 12, 13, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7 }
299 };
300
301 static int
ath12k_wmi_tlv_iter(struct ath12k_base * ab,const void * ptr,size_t len,int (* iter)(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data),void * data)302 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len,
303 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len,
304 const void *ptr, void *data),
305 void *data)
306 {
307 const void *begin = ptr;
308 const struct wmi_tlv *tlv;
309 u16 tlv_tag, tlv_len;
310 int ret;
311
312 while (len > 0) {
313 if (len < sizeof(*tlv)) {
314 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n",
315 ptr - begin, len, sizeof(*tlv));
316 return -EINVAL;
317 }
318
319 tlv = ptr;
320 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
321 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
322 ptr += sizeof(*tlv);
323 len -= sizeof(*tlv);
324
325 if (tlv_len > len) {
326 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n",
327 tlv_tag, ptr - begin, len, tlv_len);
328 return -EINVAL;
329 }
330
331 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) &&
332 ath12k_wmi_tlv_policies[tlv_tag].min_len &&
333 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) {
334 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n",
335 tlv_tag, ptr - begin, tlv_len,
336 ath12k_wmi_tlv_policies[tlv_tag].min_len);
337 return -EINVAL;
338 }
339
340 ret = iter(ab, tlv_tag, tlv_len, ptr, data);
341 if (ret)
342 return ret;
343
344 ptr += tlv_len;
345 len -= tlv_len;
346 }
347
348 return 0;
349 }
350
ath12k_wmi_tlv_iter_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)351 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len,
352 const void *ptr, void *data)
353 {
354 const void **tb = data;
355
356 if (tag < WMI_TAG_MAX)
357 tb[tag] = ptr;
358
359 return 0;
360 }
361
362 static const void **
ath12k_wmi_tlv_parse(struct ath12k_base * ab,struct sk_buff * skb)363 ath12k_wmi_tlv_parse(struct ath12k_base *ab, struct sk_buff *skb)
364 {
365 const void **tb;
366 int ret;
367
368 tb = this_cpu_ptr(ath12k_wmi_tb);
369 memset(tb, 0, WMI_TAG_MAX * sizeof(*tb));
370
371 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
372 ath12k_wmi_tlv_iter_parse, (void *)tb);
373 if (ret)
374 return ERR_PTR(ret);
375
376 return tb;
377 }
378
ath12k_wmi_tlv_data_len(const void * data)379 static u32 ath12k_wmi_tlv_data_len(const void *data)
380 {
381 const struct wmi_tlv *tlv = (const struct wmi_tlv *)data - 1;
382
383 return le32_get_bits(tlv->header, WMI_TLV_LEN);
384 }
385
ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)386 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
387 u32 cmd_id)
388 {
389 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
390 struct ath12k_base *ab = wmi->wmi_ab->ab;
391 struct wmi_cmd_hdr *cmd_hdr;
392 int ret;
393
394 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr)))
395 return -ENOMEM;
396
397 cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
398 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID);
399
400 memset(skb_cb, 0, sizeof(*skb_cb));
401 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb);
402
403 if (ret)
404 goto err_pull;
405
406 return 0;
407
408 err_pull:
409 skb_pull(skb, sizeof(struct wmi_cmd_hdr));
410 return ret;
411 }
412
ath12k_wmi_cmd_send(struct ath12k_wmi_pdev * wmi,struct sk_buff * skb,u32 cmd_id)413 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
414 u32 cmd_id)
415 {
416 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab;
417 int ret = -EOPNOTSUPP;
418
419 might_sleep();
420
421 wait_event_timeout(wmi_ab->tx_credits_wq, ({
422 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id);
423
424 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags))
425 ret = -ESHUTDOWN;
426
427 (ret != -EAGAIN);
428 }), WMI_SEND_TIMEOUT_HZ);
429
430 if (ret == -EAGAIN)
431 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id);
432
433 return ret;
434 }
435
ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_service_ext_arg * arg)436 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
437 const void *ptr,
438 struct ath12k_wmi_service_ext_arg *arg)
439 {
440 const struct wmi_service_ready_ext_event *ev = ptr;
441 int i;
442
443 if (!ev)
444 return -EINVAL;
445
446 /* Move this to host based bitmap */
447 arg->default_conc_scan_config_bits =
448 le32_to_cpu(ev->default_conc_scan_config_bits);
449 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits);
450 arg->he_cap_info = le32_to_cpu(ev->he_cap_info);
451 arg->mpdu_density = le32_to_cpu(ev->mpdu_density);
452 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters);
453 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1);
454 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info);
455
456 for (i = 0; i < WMI_MAX_NUM_SS; i++)
457 arg->ppet.ppet16_ppet8_ru3_ru0[i] =
458 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]);
459
460 return 0;
461 }
462
463 static int
ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev * wmi_handle,struct ath12k_wmi_svc_rdy_ext_parse * svc,u8 hw_mode_id,u8 phy_id,struct ath12k_pdev * pdev)464 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
465 struct ath12k_wmi_svc_rdy_ext_parse *svc,
466 u8 hw_mode_id, u8 phy_id,
467 struct ath12k_pdev *pdev)
468 {
469 const struct ath12k_wmi_mac_phy_caps_params *mac_caps;
470 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps;
471 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps;
472 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps;
473 struct ath12k_base *ab = wmi_handle->wmi_ab->ab;
474 struct ath12k_band_cap *cap_band;
475 struct ath12k_pdev_cap *pdev_cap = &pdev->cap;
476 struct ath12k_fw_pdev *fw_pdev;
477 u32 supported_bands;
478 u32 phy_map;
479 u32 hw_idx, phy_idx = 0;
480 int i;
481
482 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps)
483 return -EINVAL;
484
485 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) {
486 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id))
487 break;
488
489 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map);
490 phy_idx = fls(phy_map);
491 }
492
493 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes))
494 return -EINVAL;
495
496 phy_idx += phy_id;
497 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy))
498 return -EINVAL;
499
500 mac_caps = wmi_mac_phy_caps + phy_idx;
501 supported_bands = le32_to_cpu(mac_caps->supported_bands);
502
503 if (!(supported_bands & WMI_HOST_WLAN_2GHZ_CAP) &&
504 !(supported_bands & WMI_HOST_WLAN_5GHZ_CAP))
505 return -EINVAL;
506
507 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
508 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps);
509 pdev_cap->supported_bands |= supported_bands;
510 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density);
511
512 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count];
513 fw_pdev->supported_bands = supported_bands;
514 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps);
515 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id);
516 ab->fw_pdev_count++;
517
518 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from
519 * band to band for a single radio, need to see how this should be
520 * handled.
521 */
522 if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
523 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g);
524 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g);
525 }
526
527 if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
528 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g);
529 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g);
530 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
531 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
532 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
533 pdev_cap->nss_ratio_enabled =
534 WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio);
535 pdev_cap->nss_ratio_info =
536 WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio);
537 }
538
539 /* tx/rx chainmask reported from fw depends on the actual hw chains used,
540 * For example, for 4x4 capable macphys, first 4 chains can be used for first
541 * mac and the remaining 4 chains can be used for the second mac or vice-versa.
542 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0
543 * will be advertised for second mac or vice-versa. Compute the shift value
544 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to
545 * mac80211.
546 */
547 pdev_cap->tx_chain_mask_shift =
548 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32);
549 pdev_cap->rx_chain_mask_shift =
550 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32);
551
552 if (supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
553 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ];
554 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
555 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g);
556 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g);
557 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g);
558 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext);
559 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g);
560 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
561 cap_band->he_cap_phy_info[i] =
562 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]);
563
564 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1);
565 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info);
566
567 for (i = 0; i < WMI_MAX_NUM_SS; i++)
568 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
569 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]);
570 }
571
572 if (supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
573 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ];
574 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id);
575 cap_band->max_bw_supported =
576 le32_to_cpu(mac_caps->max_bw_supported_5g);
577 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
578 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
579 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
580 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
581 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
582 cap_band->he_cap_phy_info[i] =
583 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
584
585 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
586 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
587
588 for (i = 0; i < WMI_MAX_NUM_SS; i++)
589 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
590 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
591
592 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ];
593 cap_band->max_bw_supported =
594 le32_to_cpu(mac_caps->max_bw_supported_5g);
595 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g);
596 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g);
597 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext);
598 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
599 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
600 cap_band->he_cap_phy_info[i] =
601 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]);
602
603 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1);
604 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info);
605
606 for (i = 0; i < WMI_MAX_NUM_SS; i++)
607 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] =
608 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]);
609 }
610
611 return 0;
612 }
613
614 static int
ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev * wmi_handle,const struct ath12k_wmi_soc_hal_reg_caps_params * reg_caps,const struct ath12k_wmi_hal_reg_caps_ext_params * ext_caps,u8 phy_idx,struct ath12k_wmi_hal_reg_capabilities_ext_arg * param)615 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle,
616 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps,
617 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps,
618 u8 phy_idx,
619 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param)
620 {
621 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap;
622
623 if (!reg_caps || !ext_caps)
624 return -EINVAL;
625
626 if (phy_idx >= le32_to_cpu(reg_caps->num_phy))
627 return -EINVAL;
628
629 ext_reg_cap = &ext_caps[phy_idx];
630
631 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id);
632 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain);
633 param->eeprom_reg_domain_ext =
634 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext);
635 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1);
636 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2);
637 /* check if param->wireless_mode is needed */
638 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan);
639 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan);
640 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan);
641 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan);
642
643 return 0;
644 }
645
ath12k_pull_service_ready_tlv(struct ath12k_base * ab,const void * evt_buf,struct ath12k_wmi_target_cap_arg * cap)646 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab,
647 const void *evt_buf,
648 struct ath12k_wmi_target_cap_arg *cap)
649 {
650 const struct wmi_service_ready_event *ev = evt_buf;
651
652 if (!ev) {
653 ath12k_err(ab, "%s: failed by NULL param\n",
654 __func__);
655 return -EINVAL;
656 }
657
658 cap->phy_capability = le32_to_cpu(ev->phy_capability);
659 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry);
660 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains);
661 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info);
662 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info);
663 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs);
664 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power);
665 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power);
666 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info);
667 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable);
668 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size);
669 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels);
670 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs);
671 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps);
672 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask);
673 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index);
674 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc);
675
676 return 0;
677 }
678
679 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in
680 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each
681 * 4-byte word.
682 */
ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev * wmi,const u32 * wmi_svc_bm)683 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi,
684 const u32 *wmi_svc_bm)
685 {
686 int i, j;
687
688 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) {
689 do {
690 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32))
691 set_bit(j, wmi->wmi_ab->svc_map);
692 } while (++j % WMI_SERVICE_BITS_IN_SIZE32);
693 }
694 }
695
ath12k_wmi_svc_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)696 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
697 const void *ptr, void *data)
698 {
699 struct ath12k_wmi_svc_ready_parse *svc_ready = data;
700 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
701 u16 expect_len;
702
703 switch (tag) {
704 case WMI_TAG_SERVICE_READY_EVENT:
705 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps))
706 return -EINVAL;
707 break;
708
709 case WMI_TAG_ARRAY_UINT32:
710 if (!svc_ready->wmi_svc_bitmap_done) {
711 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32);
712 if (len < expect_len) {
713 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n",
714 len, tag);
715 return -EINVAL;
716 }
717
718 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr);
719
720 svc_ready->wmi_svc_bitmap_done = true;
721 }
722 break;
723 default:
724 break;
725 }
726
727 return 0;
728 }
729
ath12k_service_ready_event(struct ath12k_base * ab,struct sk_buff * skb)730 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
731 {
732 struct ath12k_wmi_svc_ready_parse svc_ready = { };
733 int ret;
734
735 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
736 ath12k_wmi_svc_rdy_parse,
737 &svc_ready);
738 if (ret) {
739 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
740 return ret;
741 }
742
743 return 0;
744 }
745
ath12k_wmi_mgmt_get_freq(struct ath12k * ar,struct ieee80211_tx_info * info)746 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar,
747 struct ieee80211_tx_info *info)
748 {
749 struct ath12k_base *ab = ar->ab;
750 u32 freq = 0;
751
752 if (ab->hw_params->single_pdev_only &&
753 ar->scan.is_roc &&
754 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN))
755 freq = ar->scan.roc_freq;
756
757 return freq;
758 }
759
ath12k_wmi_alloc_skb(struct ath12k_wmi_base * wmi_ab,u32 len)760 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
761 {
762 struct sk_buff *skb;
763 struct ath12k_base *ab = wmi_ab->ab;
764 u32 round_len = roundup(len, 4);
765
766 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len);
767 if (!skb)
768 return NULL;
769
770 skb_reserve(skb, WMI_SKB_HEADROOM);
771 if (!IS_ALIGNED((unsigned long)skb->data, 4))
772 ath12k_warn(ab, "unaligned WMI skb data\n");
773
774 skb_put(skb, round_len);
775 memset(skb->data, 0, round_len);
776
777 return skb;
778 }
779
ath12k_wmi_mgmt_send(struct ath12k_link_vif * arvif,u32 buf_id,struct sk_buff * frame)780 int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id,
781 struct sk_buff *frame)
782 {
783 struct ath12k *ar = arvif->ar;
784 struct ath12k_wmi_pdev *wmi = ar->wmi;
785 struct wmi_mgmt_send_cmd *cmd;
786 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
787 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)frame->data;
788 struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif);
789 int cmd_len = sizeof(struct ath12k_wmi_mgmt_send_tx_params);
790 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)hdr;
791 struct ath12k_wmi_mlo_mgmt_send_params *ml_params;
792 struct ath12k_base *ab = ar->ab;
793 struct wmi_tlv *frame_tlv, *tlv;
794 struct ath12k_skb_cb *skb_cb;
795 u32 buf_len, buf_len_aligned;
796 u32 vdev_id = arvif->vdev_id;
797 bool link_agnostic = false;
798 struct sk_buff *skb;
799 int ret, len;
800 void *ptr;
801
802 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
803
804 buf_len_aligned = roundup(buf_len, sizeof(u32));
805
806 len = sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
807
808 if (ieee80211_vif_is_mld(vif)) {
809 skb_cb = ATH12K_SKB_CB(frame);
810 if ((skb_cb->flags & ATH12K_SKB_MLO_STA) &&
811 ab->hw_params->hw_ops->is_frame_link_agnostic &&
812 ab->hw_params->hw_ops->is_frame_link_agnostic(arvif, mgmt)) {
813 len += cmd_len + TLV_HDR_SIZE + sizeof(*ml_params);
814 ath12k_generic_dbg(ATH12K_DBG_MGMT,
815 "Sending Mgmt Frame fc 0x%0x as link agnostic",
816 mgmt->frame_control);
817 link_agnostic = true;
818 }
819 }
820
821 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
822 if (!skb)
823 return -ENOMEM;
824
825 cmd = (struct wmi_mgmt_send_cmd *)skb->data;
826 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD,
827 sizeof(*cmd));
828 cmd->vdev_id = cpu_to_le32(vdev_id);
829 cmd->desc_id = cpu_to_le32(buf_id);
830 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info));
831 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr));
832 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr));
833 cmd->frame_len = cpu_to_le32(frame->len);
834 cmd->buf_len = cpu_to_le32(buf_len);
835 cmd->tx_params_valid = 0;
836
837 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
838 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len_aligned);
839
840 memcpy(frame_tlv->value, frame->data, buf_len);
841
842 if (!link_agnostic)
843 goto send;
844
845 ptr = skb->data + sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
846
847 tlv = ptr;
848
849 /* Tx params not used currently */
850 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TX_SEND_PARAMS, cmd_len);
851 ptr += cmd_len;
852
853 tlv = ptr;
854 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*ml_params));
855 ptr += TLV_HDR_SIZE;
856
857 ml_params = ptr;
858 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TX_SEND_PARAMS,
859 sizeof(*ml_params));
860
861 ml_params->hw_link_id = cpu_to_le32(WMI_MGMT_LINK_AGNOSTIC_ID);
862
863 send:
864 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
865 if (ret) {
866 ath12k_warn(ar->ab,
867 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n");
868 dev_kfree_skb(skb);
869 }
870
871 return ret;
872 }
873
ath12k_wmi_send_stats_request_cmd(struct ath12k * ar,u32 stats_id,u32 vdev_id,u32 pdev_id)874 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id,
875 u32 vdev_id, u32 pdev_id)
876 {
877 struct ath12k_wmi_pdev *wmi = ar->wmi;
878 struct wmi_request_stats_cmd *cmd;
879 struct sk_buff *skb;
880 int ret;
881
882 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
883 if (!skb)
884 return -ENOMEM;
885
886 cmd = (struct wmi_request_stats_cmd *)skb->data;
887 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD,
888 sizeof(*cmd));
889
890 cmd->stats_id = cpu_to_le32(stats_id);
891 cmd->vdev_id = cpu_to_le32(vdev_id);
892 cmd->pdev_id = cpu_to_le32(pdev_id);
893
894 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID);
895 if (ret) {
896 ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n");
897 dev_kfree_skb(skb);
898 }
899
900 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
901 "WMI request stats 0x%x vdev id %d pdev id %d\n",
902 stats_id, vdev_id, pdev_id);
903
904 return ret;
905 }
906
ath12k_wmi_vdev_create(struct ath12k * ar,u8 * macaddr,struct ath12k_wmi_vdev_create_arg * args)907 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr,
908 struct ath12k_wmi_vdev_create_arg *args)
909 {
910 struct ath12k_wmi_pdev *wmi = ar->wmi;
911 struct wmi_vdev_create_cmd *cmd;
912 struct sk_buff *skb;
913 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams;
914 bool is_ml_vdev = is_valid_ether_addr(args->mld_addr);
915 struct wmi_vdev_create_mlo_params *ml_params;
916 struct wmi_tlv *tlv;
917 int ret, len;
918 void *ptr;
919
920 /* It can be optimized my sending tx/rx chain configuration
921 * only for supported bands instead of always sending it for
922 * both the bands.
923 */
924 len = sizeof(*cmd) + TLV_HDR_SIZE +
925 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) +
926 (is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0);
927
928 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
929 if (!skb)
930 return -ENOMEM;
931
932 cmd = (struct wmi_vdev_create_cmd *)skb->data;
933 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD,
934 sizeof(*cmd));
935
936 cmd->vdev_id = cpu_to_le32(args->if_id);
937 cmd->vdev_type = cpu_to_le32(args->type);
938 cmd->vdev_subtype = cpu_to_le32(args->subtype);
939 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX);
940 cmd->pdev_id = cpu_to_le32(args->pdev_id);
941 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags);
942 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id);
943 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id);
944 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
945
946 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID)
947 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0));
948
949 ptr = skb->data + sizeof(*cmd);
950 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
951
952 tlv = ptr;
953 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
954
955 ptr += TLV_HDR_SIZE;
956 txrx_streams = ptr;
957 len = sizeof(*txrx_streams);
958 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
959 len);
960 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G);
961 txrx_streams->supported_tx_streams =
962 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx);
963 txrx_streams->supported_rx_streams =
964 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx);
965
966 txrx_streams++;
967 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS,
968 len);
969 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G);
970 txrx_streams->supported_tx_streams =
971 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx);
972 txrx_streams->supported_rx_streams =
973 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx);
974
975 ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams);
976
977 if (is_ml_vdev) {
978 tlv = ptr;
979 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
980 sizeof(*ml_params));
981 ptr += TLV_HDR_SIZE;
982 ml_params = ptr;
983
984 ml_params->tlv_header =
985 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS,
986 sizeof(*ml_params));
987 ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr);
988 }
989
990 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
991 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n",
992 args->if_id, args->type, args->subtype,
993 macaddr, args->pdev_id);
994
995 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID);
996 if (ret) {
997 ath12k_warn(ar->ab,
998 "failed to submit WMI_VDEV_CREATE_CMDID\n");
999 dev_kfree_skb(skb);
1000 }
1001
1002 return ret;
1003 }
1004
ath12k_wmi_vdev_delete(struct ath12k * ar,u8 vdev_id)1005 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id)
1006 {
1007 struct ath12k_wmi_pdev *wmi = ar->wmi;
1008 struct wmi_vdev_delete_cmd *cmd;
1009 struct sk_buff *skb;
1010 int ret;
1011
1012 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1013 if (!skb)
1014 return -ENOMEM;
1015
1016 cmd = (struct wmi_vdev_delete_cmd *)skb->data;
1017 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD,
1018 sizeof(*cmd));
1019 cmd->vdev_id = cpu_to_le32(vdev_id);
1020
1021 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id);
1022
1023 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID);
1024 if (ret) {
1025 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n");
1026 dev_kfree_skb(skb);
1027 }
1028
1029 return ret;
1030 }
1031
ath12k_wmi_vdev_stop(struct ath12k * ar,u8 vdev_id)1032 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id)
1033 {
1034 struct ath12k_wmi_pdev *wmi = ar->wmi;
1035 struct wmi_vdev_stop_cmd *cmd;
1036 struct sk_buff *skb;
1037 int ret;
1038
1039 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1040 if (!skb)
1041 return -ENOMEM;
1042
1043 cmd = (struct wmi_vdev_stop_cmd *)skb->data;
1044
1045 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD,
1046 sizeof(*cmd));
1047 cmd->vdev_id = cpu_to_le32(vdev_id);
1048
1049 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id);
1050
1051 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID);
1052 if (ret) {
1053 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n");
1054 dev_kfree_skb(skb);
1055 }
1056
1057 return ret;
1058 }
1059
ath12k_wmi_vdev_down(struct ath12k * ar,u8 vdev_id)1060 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id)
1061 {
1062 struct ath12k_wmi_pdev *wmi = ar->wmi;
1063 struct wmi_vdev_down_cmd *cmd;
1064 struct sk_buff *skb;
1065 int ret;
1066
1067 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1068 if (!skb)
1069 return -ENOMEM;
1070
1071 cmd = (struct wmi_vdev_down_cmd *)skb->data;
1072
1073 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD,
1074 sizeof(*cmd));
1075 cmd->vdev_id = cpu_to_le32(vdev_id);
1076
1077 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id);
1078
1079 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID);
1080 if (ret) {
1081 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n");
1082 dev_kfree_skb(skb);
1083 }
1084
1085 return ret;
1086 }
1087
ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params * chan,struct wmi_vdev_start_req_arg * arg)1088 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
1089 struct wmi_vdev_start_req_arg *arg)
1090 {
1091 u32 center_freq1 = arg->band_center_freq1;
1092
1093 memset(chan, 0, sizeof(*chan));
1094
1095 chan->mhz = cpu_to_le32(arg->freq);
1096 chan->band_center_freq1 = cpu_to_le32(center_freq1);
1097 if (arg->mode == MODE_11BE_EHT320) {
1098 if (arg->freq > center_freq1)
1099 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80);
1100 else
1101 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80);
1102
1103 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1104
1105 } else if (arg->mode == MODE_11BE_EHT160 ||
1106 arg->mode == MODE_11AX_HE160) {
1107 if (arg->freq > center_freq1)
1108 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40);
1109 else
1110 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40);
1111
1112 chan->band_center_freq2 = cpu_to_le32(center_freq1);
1113 } else {
1114 chan->band_center_freq2 = 0;
1115 }
1116
1117 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE);
1118 if (arg->passive)
1119 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
1120 if (arg->allow_ibss)
1121 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED);
1122 if (arg->allow_ht)
1123 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
1124 if (arg->allow_vht)
1125 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
1126 if (arg->allow_he)
1127 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
1128 if (arg->ht40plus)
1129 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS);
1130 if (arg->chan_radar)
1131 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
1132 if (arg->freq2_radar)
1133 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2);
1134
1135 chan->reg_info_1 = le32_encode_bits(arg->max_power,
1136 WMI_CHAN_REG_INFO1_MAX_PWR) |
1137 le32_encode_bits(arg->max_reg_power,
1138 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
1139
1140 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain,
1141 WMI_CHAN_REG_INFO2_ANT_MAX) |
1142 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR);
1143 }
1144
ath12k_wmi_vdev_start(struct ath12k * ar,struct wmi_vdev_start_req_arg * arg,bool restart)1145 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg,
1146 bool restart)
1147 {
1148 struct wmi_vdev_start_mlo_params *ml_params;
1149 struct wmi_partner_link_info *partner_info;
1150 struct ath12k_wmi_pdev *wmi = ar->wmi;
1151 struct wmi_vdev_start_request_cmd *cmd;
1152 struct sk_buff *skb;
1153 struct ath12k_wmi_channel_params *chan;
1154 struct wmi_tlv *tlv;
1155 void *ptr;
1156 int ret, len, i, ml_arg_size = 0;
1157
1158 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
1159 return -EINVAL;
1160
1161 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE;
1162
1163 if (!restart && arg->ml.enabled) {
1164 ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) +
1165 TLV_HDR_SIZE + (arg->ml.num_partner_links *
1166 sizeof(*partner_info));
1167 len += ml_arg_size;
1168 }
1169 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1170 if (!skb)
1171 return -ENOMEM;
1172
1173 cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
1174 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD,
1175 sizeof(*cmd));
1176 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1177 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval);
1178 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate);
1179 cmd->dtim_period = cpu_to_le32(arg->dtim_period);
1180 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors);
1181 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams);
1182 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams);
1183 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms);
1184 cmd->regdomain = cpu_to_le32(arg->regdomain);
1185 cmd->he_ops = cpu_to_le32(arg->he_ops);
1186 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
1187 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags);
1188 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id);
1189
1190 if (!restart) {
1191 if (arg->ssid) {
1192 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len);
1193 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
1194 }
1195 if (arg->hidden_ssid)
1196 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID);
1197 if (arg->pmf_enabled)
1198 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED);
1199 }
1200
1201 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED);
1202
1203 ptr = skb->data + sizeof(*cmd);
1204 chan = ptr;
1205
1206 ath12k_wmi_put_wmi_channel(chan, arg);
1207
1208 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
1209 sizeof(*chan));
1210 ptr += sizeof(*chan);
1211
1212 tlv = ptr;
1213 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
1214
1215 /* Note: This is a nested TLV containing:
1216 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv]..
1217 */
1218
1219 ptr += sizeof(*tlv);
1220
1221 if (ml_arg_size) {
1222 tlv = ptr;
1223 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1224 sizeof(*ml_params));
1225 ptr += TLV_HDR_SIZE;
1226
1227 ml_params = ptr;
1228
1229 ml_params->tlv_header =
1230 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS,
1231 sizeof(*ml_params));
1232
1233 ml_params->flags = le32_encode_bits(arg->ml.enabled,
1234 ATH12K_WMI_FLAG_MLO_ENABLED) |
1235 le32_encode_bits(arg->ml.assoc_link,
1236 ATH12K_WMI_FLAG_MLO_ASSOC_LINK) |
1237 le32_encode_bits(arg->ml.mcast_link,
1238 ATH12K_WMI_FLAG_MLO_MCAST_VDEV) |
1239 le32_encode_bits(arg->ml.link_add,
1240 ATH12K_WMI_FLAG_MLO_LINK_ADD) |
1241 le32_encode_bits(arg->ml.assoc_link,
1242 ATH12K_WMI_FLAG_MLO_START_AS_ACTIVE) |
1243 cpu_to_le32(ATH12K_WMI_FLAG_MLO_IEEE_LINK_IDX_VALID);
1244
1245 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id);
1246
1247 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %u start link_id %u ml flags 0x%x\n",
1248 arg->vdev_id, arg->ml.ieee_link_id,
1249 le32_to_cpu(ml_params->flags));
1250
1251 ptr += sizeof(*ml_params);
1252
1253 tlv = ptr;
1254 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1255 arg->ml.num_partner_links *
1256 sizeof(*partner_info));
1257 ptr += TLV_HDR_SIZE;
1258
1259 partner_info = ptr;
1260
1261 for (i = 0; i < arg->ml.num_partner_links; i++) {
1262 struct wmi_ml_partner_info *pinfo = &arg->ml.partner_info[i];
1263
1264 partner_info->tlv_header =
1265 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS,
1266 sizeof(*partner_info));
1267 partner_info->vdev_id = cpu_to_le32(pinfo->vdev_id);
1268 partner_info->hw_link_id = cpu_to_le32(pinfo->hw_link_id);
1269 ether_addr_copy(partner_info->vdev_addr.addr,
1270 pinfo->addr);
1271 partner_info->flags =
1272 cpu_to_le32(ATH12K_WMI_FLAG_MLO_IEEE_LINK_IDX_VALID_PARTNER);
1273 partner_info->ieee_link_id = cpu_to_le32(pinfo->ieee_link_id);
1274
1275 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %u hw_link_id %u macaddr %pM link_id %u ml flags 0x%x\n",
1276 pinfo->vdev_id, pinfo->hw_link_id,
1277 pinfo->addr, pinfo->ieee_link_id,
1278 le32_to_cpu(partner_info->flags));
1279
1280 partner_info++;
1281 }
1282
1283 ptr = partner_info;
1284 }
1285
1286 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n",
1287 restart ? "restart" : "start", arg->vdev_id,
1288 arg->freq, arg->mode);
1289
1290 if (restart)
1291 ret = ath12k_wmi_cmd_send(wmi, skb,
1292 WMI_VDEV_RESTART_REQUEST_CMDID);
1293 else
1294 ret = ath12k_wmi_cmd_send(wmi, skb,
1295 WMI_VDEV_START_REQUEST_CMDID);
1296 if (ret) {
1297 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n",
1298 restart ? "restart" : "start");
1299 dev_kfree_skb(skb);
1300 }
1301
1302 return ret;
1303 }
1304
ath12k_wmi_vdev_up(struct ath12k * ar,struct ath12k_wmi_vdev_up_params * params)1305 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params)
1306 {
1307 struct ath12k_wmi_pdev *wmi = ar->wmi;
1308 struct wmi_vdev_up_cmd *cmd;
1309 struct sk_buff *skb;
1310 int ret;
1311
1312 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1313 if (!skb)
1314 return -ENOMEM;
1315
1316 cmd = (struct wmi_vdev_up_cmd *)skb->data;
1317
1318 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD,
1319 sizeof(*cmd));
1320 cmd->vdev_id = cpu_to_le32(params->vdev_id);
1321 cmd->vdev_assoc_id = cpu_to_le32(params->aid);
1322
1323 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid);
1324
1325 if (params->tx_bssid) {
1326 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid);
1327 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx);
1328 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt);
1329 }
1330
1331 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1332 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
1333 params->vdev_id, params->aid, params->bssid);
1334
1335 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID);
1336 if (ret) {
1337 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n");
1338 dev_kfree_skb(skb);
1339 }
1340
1341 return ret;
1342 }
1343
ath12k_wmi_send_peer_create_cmd(struct ath12k * ar,struct ath12k_wmi_peer_create_arg * arg)1344 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar,
1345 struct ath12k_wmi_peer_create_arg *arg)
1346 {
1347 struct ath12k_wmi_pdev *wmi = ar->wmi;
1348 struct wmi_peer_create_cmd *cmd;
1349 struct sk_buff *skb;
1350 int ret, len;
1351 struct wmi_peer_create_mlo_params *ml_param;
1352 void *ptr;
1353 struct wmi_tlv *tlv;
1354
1355 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param);
1356
1357 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1358 if (!skb)
1359 return -ENOMEM;
1360
1361 cmd = (struct wmi_peer_create_cmd *)skb->data;
1362 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD,
1363 sizeof(*cmd));
1364
1365 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr);
1366 cmd->peer_type = cpu_to_le32(arg->peer_type);
1367 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1368
1369 ptr = skb->data + sizeof(*cmd);
1370 tlv = ptr;
1371 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
1372 sizeof(*ml_param));
1373 ptr += TLV_HDR_SIZE;
1374 ml_param = ptr;
1375 ml_param->tlv_header =
1376 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS,
1377 sizeof(*ml_param));
1378 if (arg->ml_enabled)
1379 ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
1380
1381 ptr += sizeof(*ml_param);
1382
1383 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1384 "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n",
1385 arg->vdev_id, arg->peer_addr, ml_param->flags);
1386
1387 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID);
1388 if (ret) {
1389 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n");
1390 dev_kfree_skb(skb);
1391 }
1392
1393 return ret;
1394 }
1395
ath12k_wmi_send_peer_delete_cmd(struct ath12k * ar,const u8 * peer_addr,u8 vdev_id)1396 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar,
1397 const u8 *peer_addr, u8 vdev_id)
1398 {
1399 struct ath12k_wmi_pdev *wmi = ar->wmi;
1400 struct wmi_peer_delete_cmd *cmd;
1401 struct sk_buff *skb;
1402 int ret;
1403
1404 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1405 if (!skb)
1406 return -ENOMEM;
1407
1408 cmd = (struct wmi_peer_delete_cmd *)skb->data;
1409 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD,
1410 sizeof(*cmd));
1411
1412 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1413 cmd->vdev_id = cpu_to_le32(vdev_id);
1414
1415 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1416 "WMI peer delete vdev_id %d peer_addr %pM\n",
1417 vdev_id, peer_addr);
1418
1419 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID);
1420 if (ret) {
1421 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n");
1422 dev_kfree_skb(skb);
1423 }
1424
1425 return ret;
1426 }
1427
ath12k_wmi_send_pdev_set_regdomain(struct ath12k * ar,struct ath12k_wmi_pdev_set_regdomain_arg * arg)1428 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar,
1429 struct ath12k_wmi_pdev_set_regdomain_arg *arg)
1430 {
1431 struct ath12k_wmi_pdev *wmi = ar->wmi;
1432 struct wmi_pdev_set_regdomain_cmd *cmd;
1433 struct sk_buff *skb;
1434 int ret;
1435
1436 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1437 if (!skb)
1438 return -ENOMEM;
1439
1440 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
1441 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD,
1442 sizeof(*cmd));
1443
1444 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use);
1445 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g);
1446 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g);
1447 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g);
1448 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g);
1449 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain);
1450 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
1451
1452 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1453 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n",
1454 arg->current_rd_in_use, arg->current_rd_2g,
1455 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id);
1456
1457 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID);
1458 if (ret) {
1459 ath12k_warn(ar->ab,
1460 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n");
1461 dev_kfree_skb(skb);
1462 }
1463
1464 return ret;
1465 }
1466
ath12k_wmi_set_peer_param(struct ath12k * ar,const u8 * peer_addr,u32 vdev_id,u32 param_id,u32 param_val)1467 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr,
1468 u32 vdev_id, u32 param_id, u32 param_val)
1469 {
1470 struct ath12k_wmi_pdev *wmi = ar->wmi;
1471 struct wmi_peer_set_param_cmd *cmd;
1472 struct sk_buff *skb;
1473 int ret;
1474
1475 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1476 if (!skb)
1477 return -ENOMEM;
1478
1479 cmd = (struct wmi_peer_set_param_cmd *)skb->data;
1480 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD,
1481 sizeof(*cmd));
1482 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1483 cmd->vdev_id = cpu_to_le32(vdev_id);
1484 cmd->param_id = cpu_to_le32(param_id);
1485 cmd->param_value = cpu_to_le32(param_val);
1486
1487 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1488 "WMI vdev %d peer 0x%pM set param %d value %d\n",
1489 vdev_id, peer_addr, param_id, param_val);
1490
1491 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID);
1492 if (ret) {
1493 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n");
1494 dev_kfree_skb(skb);
1495 }
1496
1497 return ret;
1498 }
1499
ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k * ar,u8 peer_addr[ETH_ALEN],u32 peer_tid_bitmap,u8 vdev_id)1500 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar,
1501 u8 peer_addr[ETH_ALEN],
1502 u32 peer_tid_bitmap,
1503 u8 vdev_id)
1504 {
1505 struct ath12k_wmi_pdev *wmi = ar->wmi;
1506 struct wmi_peer_flush_tids_cmd *cmd;
1507 struct sk_buff *skb;
1508 int ret;
1509
1510 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1511 if (!skb)
1512 return -ENOMEM;
1513
1514 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
1515 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD,
1516 sizeof(*cmd));
1517
1518 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1519 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap);
1520 cmd->vdev_id = cpu_to_le32(vdev_id);
1521
1522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1523 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n",
1524 vdev_id, peer_addr, peer_tid_bitmap);
1525
1526 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID);
1527 if (ret) {
1528 ath12k_warn(ar->ab,
1529 "failed to send WMI_PEER_FLUSH_TIDS cmd\n");
1530 dev_kfree_skb(skb);
1531 }
1532
1533 return ret;
1534 }
1535
ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k * ar,int vdev_id,const u8 * addr,dma_addr_t paddr,u8 tid,u8 ba_window_size_valid,u32 ba_window_size)1536 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar,
1537 int vdev_id, const u8 *addr,
1538 dma_addr_t paddr, u8 tid,
1539 u8 ba_window_size_valid,
1540 u32 ba_window_size)
1541 {
1542 struct wmi_peer_reorder_queue_setup_cmd *cmd;
1543 struct sk_buff *skb;
1544 int ret;
1545
1546 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
1547 if (!skb)
1548 return -ENOMEM;
1549
1550 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data;
1551 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD,
1552 sizeof(*cmd));
1553
1554 ether_addr_copy(cmd->peer_macaddr.addr, addr);
1555 cmd->vdev_id = cpu_to_le32(vdev_id);
1556 cmd->tid = cpu_to_le32(tid);
1557 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr));
1558 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr));
1559 cmd->queue_no = cpu_to_le32(tid);
1560 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid);
1561 cmd->ba_window_size = cpu_to_le32(ba_window_size);
1562
1563 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1564 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n",
1565 addr, vdev_id, tid);
1566
1567 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
1568 WMI_PEER_REORDER_QUEUE_SETUP_CMDID);
1569 if (ret) {
1570 ath12k_warn(ar->ab,
1571 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n");
1572 dev_kfree_skb(skb);
1573 }
1574
1575 return ret;
1576 }
1577
1578 int
ath12k_wmi_rx_reord_queue_remove(struct ath12k * ar,struct ath12k_wmi_rx_reorder_queue_remove_arg * arg)1579 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar,
1580 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg)
1581 {
1582 struct ath12k_wmi_pdev *wmi = ar->wmi;
1583 struct wmi_peer_reorder_queue_remove_cmd *cmd;
1584 struct sk_buff *skb;
1585 int ret;
1586
1587 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1588 if (!skb)
1589 return -ENOMEM;
1590
1591 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data;
1592 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD,
1593 sizeof(*cmd));
1594
1595 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr);
1596 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1597 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap);
1598
1599 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1600 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__,
1601 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap);
1602
1603 ret = ath12k_wmi_cmd_send(wmi, skb,
1604 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID);
1605 if (ret) {
1606 ath12k_warn(ar->ab,
1607 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID");
1608 dev_kfree_skb(skb);
1609 }
1610
1611 return ret;
1612 }
1613
ath12k_wmi_pdev_set_param(struct ath12k * ar,u32 param_id,u32 param_value,u8 pdev_id)1614 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id,
1615 u32 param_value, u8 pdev_id)
1616 {
1617 struct ath12k_wmi_pdev *wmi = ar->wmi;
1618 struct wmi_pdev_set_param_cmd *cmd;
1619 struct sk_buff *skb;
1620 int ret;
1621
1622 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1623 if (!skb)
1624 return -ENOMEM;
1625
1626 cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
1627 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD,
1628 sizeof(*cmd));
1629 cmd->pdev_id = cpu_to_le32(pdev_id);
1630 cmd->param_id = cpu_to_le32(param_id);
1631 cmd->param_value = cpu_to_le32(param_value);
1632
1633 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1634 "WMI pdev set param %d pdev id %d value %d\n",
1635 param_id, pdev_id, param_value);
1636
1637 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID);
1638 if (ret) {
1639 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1640 dev_kfree_skb(skb);
1641 }
1642
1643 return ret;
1644 }
1645
ath12k_wmi_pdev_set_ps_mode(struct ath12k * ar,int vdev_id,u32 enable)1646 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable)
1647 {
1648 struct ath12k_wmi_pdev *wmi = ar->wmi;
1649 struct wmi_pdev_set_ps_mode_cmd *cmd;
1650 struct sk_buff *skb;
1651 int ret;
1652
1653 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1654 if (!skb)
1655 return -ENOMEM;
1656
1657 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data;
1658 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD,
1659 sizeof(*cmd));
1660 cmd->vdev_id = cpu_to_le32(vdev_id);
1661 cmd->sta_ps_mode = cpu_to_le32(enable);
1662
1663 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1664 "WMI vdev set psmode %d vdev id %d\n",
1665 enable, vdev_id);
1666
1667 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID);
1668 if (ret) {
1669 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n");
1670 dev_kfree_skb(skb);
1671 }
1672
1673 return ret;
1674 }
1675
ath12k_wmi_pdev_suspend(struct ath12k * ar,u32 suspend_opt,u32 pdev_id)1676 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt,
1677 u32 pdev_id)
1678 {
1679 struct ath12k_wmi_pdev *wmi = ar->wmi;
1680 struct wmi_pdev_suspend_cmd *cmd;
1681 struct sk_buff *skb;
1682 int ret;
1683
1684 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1685 if (!skb)
1686 return -ENOMEM;
1687
1688 cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
1689
1690 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD,
1691 sizeof(*cmd));
1692
1693 cmd->suspend_opt = cpu_to_le32(suspend_opt);
1694 cmd->pdev_id = cpu_to_le32(pdev_id);
1695
1696 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1697 "WMI pdev suspend pdev_id %d\n", pdev_id);
1698
1699 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID);
1700 if (ret) {
1701 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n");
1702 dev_kfree_skb(skb);
1703 }
1704
1705 return ret;
1706 }
1707
ath12k_wmi_pdev_resume(struct ath12k * ar,u32 pdev_id)1708 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id)
1709 {
1710 struct ath12k_wmi_pdev *wmi = ar->wmi;
1711 struct wmi_pdev_resume_cmd *cmd;
1712 struct sk_buff *skb;
1713 int ret;
1714
1715 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1716 if (!skb)
1717 return -ENOMEM;
1718
1719 cmd = (struct wmi_pdev_resume_cmd *)skb->data;
1720
1721 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD,
1722 sizeof(*cmd));
1723 cmd->pdev_id = cpu_to_le32(pdev_id);
1724
1725 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1726 "WMI pdev resume pdev id %d\n", pdev_id);
1727
1728 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID);
1729 if (ret) {
1730 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n");
1731 dev_kfree_skb(skb);
1732 }
1733
1734 return ret;
1735 }
1736
1737 /* TODO FW Support for the cmd is not available yet.
1738 * Can be tested once the command and corresponding
1739 * event is implemented in FW
1740 */
ath12k_wmi_pdev_bss_chan_info_request(struct ath12k * ar,enum wmi_bss_chan_info_req_type type)1741 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar,
1742 enum wmi_bss_chan_info_req_type type)
1743 {
1744 struct ath12k_wmi_pdev *wmi = ar->wmi;
1745 struct wmi_pdev_bss_chan_info_req_cmd *cmd;
1746 struct sk_buff *skb;
1747 int ret;
1748
1749 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1750 if (!skb)
1751 return -ENOMEM;
1752
1753 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data;
1754
1755 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST,
1756 sizeof(*cmd));
1757 cmd->req_type = cpu_to_le32(type);
1758 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1759
1760 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1761 "WMI bss chan info req type %d\n", type);
1762
1763 ret = ath12k_wmi_cmd_send(wmi, skb,
1764 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID);
1765 if (ret) {
1766 ath12k_warn(ar->ab,
1767 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n");
1768 dev_kfree_skb(skb);
1769 }
1770
1771 return ret;
1772 }
1773
ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k * ar,u8 * peer_addr,struct ath12k_wmi_ap_ps_arg * arg)1774 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr,
1775 struct ath12k_wmi_ap_ps_arg *arg)
1776 {
1777 struct ath12k_wmi_pdev *wmi = ar->wmi;
1778 struct wmi_ap_ps_peer_cmd *cmd;
1779 struct sk_buff *skb;
1780 int ret;
1781
1782 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1783 if (!skb)
1784 return -ENOMEM;
1785
1786 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
1787 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD,
1788 sizeof(*cmd));
1789
1790 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
1791 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
1792 cmd->param = cpu_to_le32(arg->param);
1793 cmd->value = cpu_to_le32(arg->value);
1794
1795 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1796 "WMI set ap ps vdev id %d peer %pM param %d value %d\n",
1797 arg->vdev_id, peer_addr, arg->param, arg->value);
1798
1799 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID);
1800 if (ret) {
1801 ath12k_warn(ar->ab,
1802 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n");
1803 dev_kfree_skb(skb);
1804 }
1805
1806 return ret;
1807 }
1808
ath12k_wmi_set_sta_ps_param(struct ath12k * ar,u32 vdev_id,u32 param,u32 param_value)1809 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id,
1810 u32 param, u32 param_value)
1811 {
1812 struct ath12k_wmi_pdev *wmi = ar->wmi;
1813 struct wmi_sta_powersave_param_cmd *cmd;
1814 struct sk_buff *skb;
1815 int ret;
1816
1817 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1818 if (!skb)
1819 return -ENOMEM;
1820
1821 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
1822 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD,
1823 sizeof(*cmd));
1824
1825 cmd->vdev_id = cpu_to_le32(vdev_id);
1826 cmd->param = cpu_to_le32(param);
1827 cmd->value = cpu_to_le32(param_value);
1828
1829 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1830 "WMI set sta ps vdev_id %d param %d value %d\n",
1831 vdev_id, param, param_value);
1832
1833 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID);
1834 if (ret) {
1835 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID");
1836 dev_kfree_skb(skb);
1837 }
1838
1839 return ret;
1840 }
1841
ath12k_wmi_force_fw_hang_cmd(struct ath12k * ar,u32 type,u32 delay_time_ms)1842 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms)
1843 {
1844 struct ath12k_wmi_pdev *wmi = ar->wmi;
1845 struct wmi_force_fw_hang_cmd *cmd;
1846 struct sk_buff *skb;
1847 int ret, len;
1848
1849 len = sizeof(*cmd);
1850
1851 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1852 if (!skb)
1853 return -ENOMEM;
1854
1855 cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
1856 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD,
1857 len);
1858
1859 cmd->type = cpu_to_le32(type);
1860 cmd->delay_time_ms = cpu_to_le32(delay_time_ms);
1861
1862 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID);
1863
1864 if (ret) {
1865 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID");
1866 dev_kfree_skb(skb);
1867 }
1868 return ret;
1869 }
1870
ath12k_wmi_vdev_set_param_cmd(struct ath12k * ar,u32 vdev_id,u32 param_id,u32 param_value)1871 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id,
1872 u32 param_id, u32 param_value)
1873 {
1874 struct ath12k_wmi_pdev *wmi = ar->wmi;
1875 struct wmi_vdev_set_param_cmd *cmd;
1876 struct sk_buff *skb;
1877 int ret;
1878
1879 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1880 if (!skb)
1881 return -ENOMEM;
1882
1883 cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
1884 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD,
1885 sizeof(*cmd));
1886
1887 cmd->vdev_id = cpu_to_le32(vdev_id);
1888 cmd->param_id = cpu_to_le32(param_id);
1889 cmd->param_value = cpu_to_le32(param_value);
1890
1891 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1892 "WMI vdev id 0x%x set param %d value %d\n",
1893 vdev_id, param_id, param_value);
1894
1895 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID);
1896 if (ret) {
1897 ath12k_warn(ar->ab,
1898 "failed to send WMI_VDEV_SET_PARAM_CMDID\n");
1899 dev_kfree_skb(skb);
1900 }
1901
1902 return ret;
1903 }
1904
ath12k_wmi_send_pdev_temperature_cmd(struct ath12k * ar)1905 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar)
1906 {
1907 struct ath12k_wmi_pdev *wmi = ar->wmi;
1908 struct wmi_get_pdev_temperature_cmd *cmd;
1909 struct sk_buff *skb;
1910 int ret;
1911
1912 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1913 if (!skb)
1914 return -ENOMEM;
1915
1916 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data;
1917 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD,
1918 sizeof(*cmd));
1919 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
1920
1921 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1922 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id);
1923
1924 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID);
1925 if (ret) {
1926 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n");
1927 dev_kfree_skb(skb);
1928 }
1929
1930 return ret;
1931 }
1932
ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k * ar,u32 vdev_id,u32 bcn_ctrl_op)1933 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar,
1934 u32 vdev_id, u32 bcn_ctrl_op)
1935 {
1936 struct ath12k_wmi_pdev *wmi = ar->wmi;
1937 struct wmi_bcn_offload_ctrl_cmd *cmd;
1938 struct sk_buff *skb;
1939 int ret;
1940
1941 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
1942 if (!skb)
1943 return -ENOMEM;
1944
1945 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data;
1946 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD,
1947 sizeof(*cmd));
1948
1949 cmd->vdev_id = cpu_to_le32(vdev_id);
1950 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op);
1951
1952 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
1953 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n",
1954 vdev_id, bcn_ctrl_op);
1955
1956 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID);
1957 if (ret) {
1958 ath12k_warn(ar->ab,
1959 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n");
1960 dev_kfree_skb(skb);
1961 }
1962
1963 return ret;
1964 }
1965
ath12k_wmi_p2p_go_bcn_ie(struct ath12k * ar,u32 vdev_id,const u8 * p2p_ie)1966 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
1967 const u8 *p2p_ie)
1968 {
1969 struct ath12k_wmi_pdev *wmi = ar->wmi;
1970 struct wmi_p2p_go_set_beacon_ie_cmd *cmd;
1971 size_t p2p_ie_len, aligned_len;
1972 struct wmi_tlv *tlv;
1973 struct sk_buff *skb;
1974 void *ptr;
1975 int ret, len;
1976
1977 p2p_ie_len = p2p_ie[1] + 2;
1978 aligned_len = roundup(p2p_ie_len, sizeof(u32));
1979
1980 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
1981
1982 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
1983 if (!skb)
1984 return -ENOMEM;
1985
1986 ptr = skb->data;
1987 cmd = ptr;
1988 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE,
1989 sizeof(*cmd));
1990 cmd->vdev_id = cpu_to_le32(vdev_id);
1991 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len);
1992
1993 ptr += sizeof(*cmd);
1994 tlv = ptr;
1995 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
1996 aligned_len);
1997 memcpy(tlv->value, p2p_ie, p2p_ie_len);
1998
1999 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE);
2000 if (ret) {
2001 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n");
2002 dev_kfree_skb(skb);
2003 }
2004
2005 return ret;
2006 }
2007
ath12k_wmi_bcn_tmpl(struct ath12k_link_vif * arvif,struct ieee80211_mutable_offsets * offs,struct sk_buff * bcn,struct ath12k_wmi_bcn_tmpl_ema_arg * ema_args)2008 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif,
2009 struct ieee80211_mutable_offsets *offs,
2010 struct sk_buff *bcn,
2011 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args)
2012 {
2013 struct ath12k *ar = arvif->ar;
2014 struct ath12k_wmi_pdev *wmi = ar->wmi;
2015 struct ath12k_base *ab = ar->ab;
2016 struct wmi_bcn_tmpl_cmd *cmd;
2017 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info;
2018 struct ath12k_vif *ahvif = arvif->ahvif;
2019 struct ieee80211_bss_conf *conf;
2020 u32 vdev_id = arvif->vdev_id;
2021 struct wmi_tlv *tlv;
2022 struct sk_buff *skb;
2023 u32 ema_params = 0;
2024 void *ptr;
2025 int ret, len;
2026 size_t aligned_len = roundup(bcn->len, 4);
2027
2028 conf = ath12k_mac_get_link_bss_conf(arvif);
2029 if (!conf) {
2030 ath12k_warn(ab,
2031 "unable to access bss link conf in beacon template command for vif %pM link %u\n",
2032 ahvif->vif->addr, arvif->link_id);
2033 return -EINVAL;
2034 }
2035
2036 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len;
2037
2038 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2039 if (!skb)
2040 return -ENOMEM;
2041
2042 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data;
2043 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD,
2044 sizeof(*cmd));
2045 cmd->vdev_id = cpu_to_le32(vdev_id);
2046 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset);
2047
2048 if (conf->csa_active) {
2049 cmd->csa_switch_count_offset =
2050 cpu_to_le32(offs->cntdwn_counter_offs[0]);
2051 cmd->ext_csa_switch_count_offset =
2052 cpu_to_le32(offs->cntdwn_counter_offs[1]);
2053 cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF);
2054 arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]];
2055 }
2056
2057 cmd->buf_len = cpu_to_le32(bcn->len);
2058 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off);
2059 if (ema_args) {
2060 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT);
2061 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX);
2062 if (ema_args->bcn_index == 0)
2063 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST);
2064 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt)
2065 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
2066 cmd->ema_params = cpu_to_le32(ema_params);
2067 }
2068 cmd->feature_enable_bitmap =
2069 cpu_to_le32(u32_encode_bits(arvif->beacon_prot,
2070 WMI_BEACON_PROTECTION_EN_BIT));
2071
2072 ptr = skb->data + sizeof(*cmd);
2073
2074 bcn_prb_info = ptr;
2075 len = sizeof(*bcn_prb_info);
2076 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
2077 len);
2078 bcn_prb_info->caps = 0;
2079 bcn_prb_info->erp = 0;
2080
2081 ptr += sizeof(*bcn_prb_info);
2082
2083 tlv = ptr;
2084 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
2085 memcpy(tlv->value, bcn->data, bcn->len);
2086
2087 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID);
2088 if (ret) {
2089 ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n");
2090 dev_kfree_skb(skb);
2091 }
2092
2093 return ret;
2094 }
2095
ath12k_wmi_vdev_install_key(struct ath12k * ar,struct wmi_vdev_install_key_arg * arg)2096 int ath12k_wmi_vdev_install_key(struct ath12k *ar,
2097 struct wmi_vdev_install_key_arg *arg)
2098 {
2099 struct ath12k_wmi_pdev *wmi = ar->wmi;
2100 struct wmi_vdev_install_key_cmd *cmd;
2101 struct wmi_tlv *tlv;
2102 struct sk_buff *skb;
2103 int ret, len, key_len_aligned;
2104
2105 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key
2106 * length is specified in cmd->key_len.
2107 */
2108 key_len_aligned = roundup(arg->key_len, 4);
2109
2110 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned;
2111
2112 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2113 if (!skb)
2114 return -ENOMEM;
2115
2116 cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
2117 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD,
2118 sizeof(*cmd));
2119 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2120 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
2121 cmd->key_idx = cpu_to_le32(arg->key_idx);
2122 cmd->key_flags = cpu_to_le32(arg->key_flags);
2123 cmd->key_cipher = cpu_to_le32(arg->key_cipher);
2124 cmd->key_len = cpu_to_le32(arg->key_len);
2125 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len);
2126 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len);
2127
2128 if (arg->key_rsc_counter)
2129 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter);
2130
2131 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
2132 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned);
2133 memcpy(tlv->value, arg->key_data, arg->key_len);
2134
2135 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2136 "WMI vdev install key idx %d cipher %d len %d\n",
2137 arg->key_idx, arg->key_cipher, arg->key_len);
2138
2139 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID);
2140 if (ret) {
2141 ath12k_warn(ar->ab,
2142 "failed to send WMI_VDEV_INSTALL_KEY cmd\n");
2143 dev_kfree_skb(skb);
2144 }
2145
2146 return ret;
2147 }
2148
ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd * cmd,struct ath12k_wmi_peer_assoc_arg * arg,bool hw_crypto_disabled)2149 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
2150 struct ath12k_wmi_peer_assoc_arg *arg,
2151 bool hw_crypto_disabled)
2152 {
2153 cmd->peer_flags = 0;
2154 cmd->peer_flags_ext = 0;
2155
2156 if (arg->is_wme_set) {
2157 if (arg->qos_flag)
2158 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS);
2159 if (arg->apsd_flag)
2160 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD);
2161 if (arg->ht_flag)
2162 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT);
2163 if (arg->bw_40)
2164 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ);
2165 if (arg->bw_80)
2166 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ);
2167 if (arg->bw_160)
2168 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ);
2169 if (arg->bw_320)
2170 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ);
2171
2172 /* Typically if STBC is enabled for VHT it should be enabled
2173 * for HT as well
2174 **/
2175 if (arg->stbc_flag)
2176 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC);
2177
2178 /* Typically if LDPC is enabled for VHT it should be enabled
2179 * for HT as well
2180 **/
2181 if (arg->ldpc_flag)
2182 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC);
2183
2184 if (arg->static_mimops_flag)
2185 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS);
2186 if (arg->dynamic_mimops_flag)
2187 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS);
2188 if (arg->spatial_mux_flag)
2189 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX);
2190 if (arg->vht_flag)
2191 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT);
2192 if (arg->he_flag)
2193 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE);
2194 if (arg->twt_requester)
2195 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ);
2196 if (arg->twt_responder)
2197 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP);
2198 if (arg->eht_flag)
2199 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT);
2200 }
2201
2202 /* Suppress authorization for all AUTH modes that need 4-way handshake
2203 * (during re-association).
2204 * Authorization will be done for these modes on key installation.
2205 */
2206 if (arg->auth_flag)
2207 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
2208 if (arg->need_ptk_4_way) {
2209 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
2210 if (!hw_crypto_disabled && arg->is_assoc)
2211 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
2212 }
2213 if (arg->need_gtk_2_way)
2214 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY);
2215 /* safe mode bypass the 4-way handshake */
2216 if (arg->safe_mode_enabled)
2217 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY |
2218 WMI_PEER_NEED_GTK_2_WAY));
2219
2220 if (arg->is_pmf_enabled)
2221 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF);
2222
2223 /* Disable AMSDU for station transmit, if user configures it */
2224 /* Disable AMSDU for AP transmit to 11n Stations, if user configures
2225 * it
2226 * if (arg->amsdu_disable) Add after FW support
2227 **/
2228
2229 /* Target asserts if node is marked HT and all MCS is set to 0.
2230 * Mark the node as non-HT if all the mcs rates are disabled through
2231 * iwpriv
2232 **/
2233 if (arg->peer_ht_rates.num_rates == 0)
2234 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT);
2235 }
2236
ath12k_wmi_send_peer_assoc_cmd(struct ath12k * ar,struct ath12k_wmi_peer_assoc_arg * arg)2237 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar,
2238 struct ath12k_wmi_peer_assoc_arg *arg)
2239 {
2240 struct ath12k_wmi_pdev *wmi = ar->wmi;
2241 struct wmi_peer_assoc_complete_cmd *cmd;
2242 struct ath12k_wmi_vht_rate_set_params *mcs;
2243 struct ath12k_wmi_he_rate_set_params *he_mcs;
2244 struct ath12k_wmi_eht_rate_set_params *eht_mcs;
2245 struct wmi_peer_assoc_mlo_params *ml_params;
2246 struct wmi_peer_assoc_mlo_partner_info_params *partner_info;
2247 struct sk_buff *skb;
2248 struct wmi_tlv *tlv;
2249 void *ptr;
2250 u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay;
2251 u32 peer_ht_rates_align, eml_trans_timeout;
2252 int i, ret, len;
2253 u16 eml_cap;
2254 __le32 v;
2255
2256 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates,
2257 sizeof(u32));
2258 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates,
2259 sizeof(u32));
2260
2261 len = sizeof(*cmd) +
2262 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) +
2263 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) +
2264 sizeof(*mcs) + TLV_HDR_SIZE +
2265 (sizeof(*he_mcs) * arg->peer_he_mcs_count) +
2266 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count);
2267
2268 if (arg->ml.enabled)
2269 len += TLV_HDR_SIZE + sizeof(*ml_params) +
2270 TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info));
2271 else
2272 len += (2 * TLV_HDR_SIZE);
2273
2274 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2275 if (!skb)
2276 return -ENOMEM;
2277
2278 ptr = skb->data;
2279
2280 cmd = ptr;
2281 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD,
2282 sizeof(*cmd));
2283
2284 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2285
2286 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc);
2287 cmd->peer_associd = cpu_to_le32(arg->peer_associd);
2288 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap);
2289
2290 ath12k_wmi_copy_peer_flags(cmd, arg,
2291 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED,
2292 &ar->ab->dev_flags));
2293
2294 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac);
2295
2296 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps);
2297 cmd->peer_caps = cpu_to_le32(arg->peer_caps);
2298 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval);
2299 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps);
2300 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu);
2301 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density);
2302 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps);
2303 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode);
2304
2305 /* Update 11ax capabilities */
2306 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]);
2307 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]);
2308 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal);
2309 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz);
2310 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops);
2311 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++)
2312 cmd->peer_he_cap_phy[i] =
2313 cpu_to_le32(arg->peer_he_cap_phyinfo[i]);
2314 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1);
2315 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask);
2316 for (i = 0; i < WMI_MAX_NUM_SS; i++)
2317 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] =
2318 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]);
2319
2320 /* Update 11be capabilities */
2321 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac),
2322 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac),
2323 0);
2324 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy),
2325 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy),
2326 0);
2327 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet),
2328 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0);
2329
2330 /* Update peer legacy rate information */
2331 ptr += sizeof(*cmd);
2332
2333 tlv = ptr;
2334 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align);
2335
2336 ptr += TLV_HDR_SIZE;
2337
2338 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates);
2339 memcpy(ptr, arg->peer_legacy_rates.rates,
2340 arg->peer_legacy_rates.num_rates);
2341
2342 /* Update peer HT rate information */
2343 ptr += peer_legacy_rates_align;
2344
2345 tlv = ptr;
2346 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align);
2347 ptr += TLV_HDR_SIZE;
2348 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates);
2349 memcpy(ptr, arg->peer_ht_rates.rates,
2350 arg->peer_ht_rates.num_rates);
2351
2352 /* VHT Rates */
2353 ptr += peer_ht_rates_align;
2354
2355 mcs = ptr;
2356
2357 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET,
2358 sizeof(*mcs));
2359
2360 cmd->peer_nss = cpu_to_le32(arg->peer_nss);
2361
2362 /* Update bandwidth-NSS mapping */
2363 cmd->peer_bw_rxnss_override = 0;
2364 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override);
2365
2366 if (arg->vht_capable) {
2367 /* Firmware interprets mcs->tx_mcs_set field as peer's
2368 * RX capability
2369 */
2370 mcs->rx_max_rate = cpu_to_le32(arg->tx_max_rate);
2371 mcs->rx_mcs_set = cpu_to_le32(arg->tx_mcs_set);
2372 mcs->tx_max_rate = cpu_to_le32(arg->rx_max_rate);
2373 mcs->tx_mcs_set = cpu_to_le32(arg->rx_mcs_set);
2374 }
2375
2376 /* HE Rates */
2377 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count);
2378 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate);
2379
2380 ptr += sizeof(*mcs);
2381
2382 len = arg->peer_he_mcs_count * sizeof(*he_mcs);
2383
2384 tlv = ptr;
2385 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2386 ptr += TLV_HDR_SIZE;
2387
2388 /* Loop through the HE rate set */
2389 for (i = 0; i < arg->peer_he_mcs_count; i++) {
2390 he_mcs = ptr;
2391 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET,
2392 sizeof(*he_mcs));
2393
2394 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]);
2395 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]);
2396 ptr += sizeof(*he_mcs);
2397 }
2398
2399 tlv = ptr;
2400 len = arg->ml.enabled ? sizeof(*ml_params) : 0;
2401 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2402 ptr += TLV_HDR_SIZE;
2403 if (!len)
2404 goto skip_ml_params;
2405
2406 ml_params = ptr;
2407 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS,
2408 len);
2409 ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2410
2411 if (arg->ml.assoc_link)
2412 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2413
2414 if (arg->ml.primary_umac)
2415 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2416
2417 if (arg->ml.logical_link_idx_valid)
2418 ml_params->flags |=
2419 cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID);
2420
2421 if (arg->ml.peer_id_valid)
2422 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID);
2423
2424 ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr);
2425 ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx);
2426 ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id);
2427 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id);
2428
2429 eml_cap = arg->ml.eml_cap;
2430 if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) {
2431 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT);
2432 /* Padding delay */
2433 eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap);
2434 ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay);
2435 /* Transition delay */
2436 eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap);
2437 ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay);
2438 /* Transition timeout */
2439 eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap);
2440 ml_params->emlsr_trans_timeout_us =
2441 cpu_to_le32(eml_trans_timeout);
2442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u",
2443 arg->peer_mac, eml_pad_delay, eml_trans_delay,
2444 eml_trans_timeout);
2445 }
2446
2447 ptr += sizeof(*ml_params);
2448
2449 skip_ml_params:
2450 /* Loop through the EHT rate set */
2451 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs);
2452 tlv = ptr;
2453 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2454 ptr += TLV_HDR_SIZE;
2455
2456 for (i = 0; i < arg->peer_eht_mcs_count; i++) {
2457 eht_mcs = ptr;
2458 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET,
2459 sizeof(*eht_mcs));
2460
2461 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]);
2462 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]);
2463 ptr += sizeof(*eht_mcs);
2464 }
2465
2466 /* Update MCS15 capability */
2467 if (arg->eht_disable_mcs15)
2468 cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE);
2469
2470 tlv = ptr;
2471 len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0;
2472 /* fill ML Partner links */
2473 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
2474 ptr += TLV_HDR_SIZE;
2475
2476 if (len == 0)
2477 goto send;
2478
2479 for (i = 0; i < arg->ml.num_partner_links; i++) {
2480 u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC;
2481
2482 partner_info = ptr;
2483 partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd,
2484 sizeof(*partner_info));
2485 partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id);
2486 partner_info->hw_link_id =
2487 cpu_to_le32(arg->ml.partner_info[i].hw_link_id);
2488 partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED);
2489
2490 if (arg->ml.partner_info[i].assoc_link)
2491 partner_info->flags |=
2492 cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK);
2493
2494 if (arg->ml.partner_info[i].primary_umac)
2495 partner_info->flags |=
2496 cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC);
2497
2498 if (arg->ml.partner_info[i].logical_link_idx_valid) {
2499 v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID);
2500 partner_info->flags |= v;
2501 }
2502
2503 partner_info->logical_link_idx =
2504 cpu_to_le32(arg->ml.partner_info[i].logical_link_idx);
2505 ptr += sizeof(*partner_info);
2506 }
2507
2508 send:
2509 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2510 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n",
2511 cmd->vdev_id, cmd->peer_associd, arg->peer_mac,
2512 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps,
2513 cmd->peer_listen_intval, cmd->peer_ht_caps,
2514 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode,
2515 cmd->peer_mpdu_density,
2516 cmd->peer_vht_caps, cmd->peer_he_cap_info,
2517 cmd->peer_he_ops, cmd->peer_he_cap_info_ext,
2518 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1],
2519 cmd->peer_he_cap_phy[2],
2520 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext,
2521 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1],
2522 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1],
2523 cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops);
2524
2525 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID);
2526 if (ret) {
2527 ath12k_warn(ar->ab,
2528 "failed to send WMI_PEER_ASSOC_CMDID\n");
2529 dev_kfree_skb(skb);
2530 }
2531
2532 return ret;
2533 }
2534
ath12k_wmi_start_scan_init(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2535 void ath12k_wmi_start_scan_init(struct ath12k *ar,
2536 struct ath12k_wmi_scan_req_arg *arg)
2537 {
2538 /* setup commonly used values */
2539 arg->scan_req_id = 1;
2540 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2541 arg->dwell_time_active = 50;
2542 arg->dwell_time_active_2g = 0;
2543 arg->dwell_time_passive = 150;
2544 arg->dwell_time_active_6g = 70;
2545 arg->dwell_time_passive_6g = 70;
2546 arg->min_rest_time = 50;
2547 arg->max_rest_time = 500;
2548 arg->repeat_probe_time = 0;
2549 arg->probe_spacing_time = 0;
2550 arg->idle_time = 0;
2551 arg->max_scan_time = 20000;
2552 arg->probe_delay = 5;
2553 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED |
2554 WMI_SCAN_EVENT_COMPLETED |
2555 WMI_SCAN_EVENT_BSS_CHANNEL |
2556 WMI_SCAN_EVENT_FOREIGN_CHAN |
2557 WMI_SCAN_EVENT_DEQUEUED;
2558 arg->scan_f_chan_stat_evnt = 1;
2559 arg->num_bssid = 1;
2560
2561 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be
2562 * ZEROs in probe request
2563 */
2564 eth_broadcast_addr(arg->bssid_list[0].addr);
2565 }
2566
ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd * cmd,struct ath12k_wmi_scan_req_arg * arg)2567 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd,
2568 struct ath12k_wmi_scan_req_arg *arg)
2569 {
2570 /* Scan events subscription */
2571 if (arg->scan_ev_started)
2572 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED);
2573 if (arg->scan_ev_completed)
2574 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED);
2575 if (arg->scan_ev_bss_chan)
2576 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL);
2577 if (arg->scan_ev_foreign_chan)
2578 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN);
2579 if (arg->scan_ev_dequeued)
2580 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED);
2581 if (arg->scan_ev_preempted)
2582 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED);
2583 if (arg->scan_ev_start_failed)
2584 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED);
2585 if (arg->scan_ev_restarted)
2586 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED);
2587 if (arg->scan_ev_foreign_chn_exit)
2588 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT);
2589 if (arg->scan_ev_suspended)
2590 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED);
2591 if (arg->scan_ev_resumed)
2592 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED);
2593
2594 /** Set scan control flags */
2595 cmd->scan_ctrl_flags = 0;
2596 if (arg->scan_f_passive)
2597 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE);
2598 if (arg->scan_f_strict_passive_pch)
2599 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN);
2600 if (arg->scan_f_promisc_mode)
2601 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS);
2602 if (arg->scan_f_capture_phy_err)
2603 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR);
2604 if (arg->scan_f_half_rate)
2605 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT);
2606 if (arg->scan_f_quarter_rate)
2607 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT);
2608 if (arg->scan_f_cck_rates)
2609 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES);
2610 if (arg->scan_f_ofdm_rates)
2611 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES);
2612 if (arg->scan_f_chan_stat_evnt)
2613 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT);
2614 if (arg->scan_f_filter_prb_req)
2615 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ);
2616 if (arg->scan_f_bcast_probe)
2617 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ);
2618 if (arg->scan_f_offchan_mgmt_tx)
2619 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX);
2620 if (arg->scan_f_offchan_data_tx)
2621 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX);
2622 if (arg->scan_f_force_active_dfs_chn)
2623 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS);
2624 if (arg->scan_f_add_tpc_ie_in_probe)
2625 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ);
2626 if (arg->scan_f_add_ds_ie_in_probe)
2627 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ);
2628 if (arg->scan_f_add_spoofed_mac_in_probe)
2629 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ);
2630 if (arg->scan_f_add_rand_seq_in_probe)
2631 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ);
2632 if (arg->scan_f_en_ie_whitelist_in_probe)
2633 cmd->scan_ctrl_flags |=
2634 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ);
2635
2636 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode,
2637 WMI_SCAN_DWELL_MODE_MASK);
2638 }
2639
ath12k_wmi_send_scan_start_cmd(struct ath12k * ar,struct ath12k_wmi_scan_req_arg * arg)2640 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar,
2641 struct ath12k_wmi_scan_req_arg *arg)
2642 {
2643 struct ath12k_wmi_pdev *wmi = ar->wmi;
2644 struct wmi_start_scan_cmd *cmd;
2645 struct ath12k_wmi_ssid_params *ssid = NULL;
2646 struct ath12k_wmi_mac_addr_params *bssid;
2647 struct sk_buff *skb;
2648 struct wmi_tlv *tlv;
2649 void *ptr;
2650 int i, ret, len;
2651 __le32 *tmp_ptr;
2652 u32 extraie_len_with_pad = 0;
2653 struct ath12k_wmi_hint_short_ssid_params *s_ssid = NULL;
2654 struct ath12k_wmi_hint_bssid_params *hint_bssid = NULL;
2655
2656 len = sizeof(*cmd);
2657
2658 len += TLV_HDR_SIZE;
2659 if (arg->num_chan)
2660 len += arg->num_chan * sizeof(u32);
2661
2662 len += TLV_HDR_SIZE;
2663 if (arg->num_ssids)
2664 len += arg->num_ssids * sizeof(*ssid);
2665
2666 len += TLV_HDR_SIZE;
2667 if (arg->num_bssid)
2668 len += sizeof(*bssid) * arg->num_bssid;
2669
2670 if (arg->num_hint_bssid)
2671 len += TLV_HDR_SIZE +
2672 arg->num_hint_bssid * sizeof(*hint_bssid);
2673
2674 if (arg->num_hint_s_ssid)
2675 len += TLV_HDR_SIZE +
2676 arg->num_hint_s_ssid * sizeof(*s_ssid);
2677
2678 len += TLV_HDR_SIZE;
2679 if (arg->extraie.len)
2680 extraie_len_with_pad =
2681 roundup(arg->extraie.len, sizeof(u32));
2682 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) {
2683 len += extraie_len_with_pad;
2684 } else {
2685 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n",
2686 arg->extraie.len);
2687 extraie_len_with_pad = 0;
2688 }
2689
2690 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2691 if (!skb)
2692 return -ENOMEM;
2693
2694 ptr = skb->data;
2695
2696 cmd = ptr;
2697 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD,
2698 sizeof(*cmd));
2699
2700 cmd->scan_id = cpu_to_le32(arg->scan_id);
2701 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id);
2702 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2703 if (ar->state_11d == ATH12K_11D_PREPARING)
2704 arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM;
2705 else
2706 arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
2707 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events);
2708
2709 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg);
2710
2711 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active);
2712 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g);
2713 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive);
2714 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g);
2715 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g);
2716 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time);
2717 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time);
2718 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time);
2719 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time);
2720 cmd->idle_time = cpu_to_le32(arg->idle_time);
2721 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time);
2722 cmd->probe_delay = cpu_to_le32(arg->probe_delay);
2723 cmd->burst_duration = cpu_to_le32(arg->burst_duration);
2724 cmd->num_chan = cpu_to_le32(arg->num_chan);
2725 cmd->num_bssid = cpu_to_le32(arg->num_bssid);
2726 cmd->num_ssids = cpu_to_le32(arg->num_ssids);
2727 cmd->ie_len = cpu_to_le32(arg->extraie.len);
2728 cmd->n_probes = cpu_to_le32(arg->n_probes);
2729
2730 ptr += sizeof(*cmd);
2731
2732 len = arg->num_chan * sizeof(u32);
2733
2734 tlv = ptr;
2735 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len);
2736 ptr += TLV_HDR_SIZE;
2737 tmp_ptr = (__le32 *)ptr;
2738
2739 for (i = 0; i < arg->num_chan; i++)
2740 tmp_ptr[i] = cpu_to_le32(arg->chan_list[i]);
2741
2742 ptr += len;
2743
2744 len = arg->num_ssids * sizeof(*ssid);
2745 tlv = ptr;
2746 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2747
2748 ptr += TLV_HDR_SIZE;
2749
2750 if (arg->num_ssids) {
2751 ssid = ptr;
2752 for (i = 0; i < arg->num_ssids; ++i) {
2753 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len);
2754 memcpy(ssid->ssid, arg->ssid[i].ssid,
2755 arg->ssid[i].ssid_len);
2756 ssid++;
2757 }
2758 }
2759
2760 ptr += (arg->num_ssids * sizeof(*ssid));
2761 len = arg->num_bssid * sizeof(*bssid);
2762 tlv = ptr;
2763 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2764
2765 ptr += TLV_HDR_SIZE;
2766 bssid = ptr;
2767
2768 if (arg->num_bssid) {
2769 for (i = 0; i < arg->num_bssid; ++i) {
2770 ether_addr_copy(bssid->addr,
2771 arg->bssid_list[i].addr);
2772 bssid++;
2773 }
2774 }
2775
2776 ptr += arg->num_bssid * sizeof(*bssid);
2777
2778 len = extraie_len_with_pad;
2779 tlv = ptr;
2780 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len);
2781 ptr += TLV_HDR_SIZE;
2782
2783 if (extraie_len_with_pad)
2784 memcpy(ptr, arg->extraie.ptr,
2785 arg->extraie.len);
2786
2787 ptr += extraie_len_with_pad;
2788
2789 if (arg->num_hint_s_ssid) {
2790 len = arg->num_hint_s_ssid * sizeof(*s_ssid);
2791 tlv = ptr;
2792 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2793 ptr += TLV_HDR_SIZE;
2794 s_ssid = ptr;
2795 for (i = 0; i < arg->num_hint_s_ssid; ++i) {
2796 s_ssid->freq_flags =
2797 cpu_to_le32(arg->hint_s_ssid[i].freq_flags);
2798 s_ssid->short_ssid =
2799 cpu_to_le32(arg->hint_s_ssid[i].short_ssid);
2800 s_ssid++;
2801 }
2802 ptr += len;
2803 }
2804
2805 if (arg->num_hint_bssid) {
2806 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg);
2807 tlv = ptr;
2808 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len);
2809 ptr += TLV_HDR_SIZE;
2810 hint_bssid = ptr;
2811 for (i = 0; i < arg->num_hint_bssid; ++i) {
2812 hint_bssid->freq_flags =
2813 cpu_to_le32(arg->hint_bssid[i].freq_flags);
2814 ether_addr_copy(&hint_bssid->bssid.addr[0],
2815 &arg->hint_bssid[i].bssid.addr[0]);
2816 hint_bssid++;
2817 }
2818 }
2819
2820 ret = ath12k_wmi_cmd_send(wmi, skb,
2821 WMI_START_SCAN_CMDID);
2822 if (ret) {
2823 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n");
2824 dev_kfree_skb(skb);
2825 }
2826
2827 return ret;
2828 }
2829
ath12k_wmi_send_scan_stop_cmd(struct ath12k * ar,struct ath12k_wmi_scan_cancel_arg * arg)2830 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar,
2831 struct ath12k_wmi_scan_cancel_arg *arg)
2832 {
2833 struct ath12k_wmi_pdev *wmi = ar->wmi;
2834 struct wmi_stop_scan_cmd *cmd;
2835 struct sk_buff *skb;
2836 int ret;
2837
2838 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
2839 if (!skb)
2840 return -ENOMEM;
2841
2842 cmd = (struct wmi_stop_scan_cmd *)skb->data;
2843
2844 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD,
2845 sizeof(*cmd));
2846
2847 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
2848 cmd->requestor = cpu_to_le32(arg->requester);
2849 cmd->scan_id = cpu_to_le32(arg->scan_id);
2850 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2851 /* stop the scan with the corresponding scan_id */
2852 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) {
2853 /* Cancelling all scans */
2854 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL);
2855 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) {
2856 /* Cancelling VAP scans */
2857 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL);
2858 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) {
2859 /* Cancelling specific scan */
2860 cmd->req_type = WMI_SCAN_STOP_ONE;
2861 } else {
2862 ath12k_warn(ar->ab, "invalid scan cancel req_type %d",
2863 arg->req_type);
2864 dev_kfree_skb(skb);
2865 return -EINVAL;
2866 }
2867
2868 ret = ath12k_wmi_cmd_send(wmi, skb,
2869 WMI_STOP_SCAN_CMDID);
2870 if (ret) {
2871 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n");
2872 dev_kfree_skb(skb);
2873 }
2874
2875 return ret;
2876 }
2877
ath12k_wmi_send_scan_chan_list_cmd(struct ath12k * ar,struct ath12k_wmi_scan_chan_list_arg * arg)2878 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar,
2879 struct ath12k_wmi_scan_chan_list_arg *arg)
2880 {
2881 struct ath12k_wmi_pdev *wmi = ar->wmi;
2882 struct wmi_scan_chan_list_cmd *cmd;
2883 struct sk_buff *skb;
2884 struct ath12k_wmi_channel_params *chan_info;
2885 struct ath12k_wmi_channel_arg *channel_arg;
2886 struct wmi_tlv *tlv;
2887 void *ptr;
2888 int i, ret, len;
2889 u16 num_send_chans, num_sends = 0, max_chan_limit = 0;
2890 __le32 *reg1, *reg2;
2891
2892 channel_arg = &arg->channel[0];
2893 while (arg->nallchans) {
2894 len = sizeof(*cmd) + TLV_HDR_SIZE;
2895 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) /
2896 sizeof(*chan_info);
2897
2898 num_send_chans = min3(arg->nallchans, max_chan_limit,
2899 ATH12K_WMI_MAX_NUM_CHAN_PER_CMD);
2900
2901 arg->nallchans -= num_send_chans;
2902 len += sizeof(*chan_info) * num_send_chans;
2903
2904 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
2905 if (!skb)
2906 return -ENOMEM;
2907
2908 cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
2909 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD,
2910 sizeof(*cmd));
2911 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
2912 cmd->num_scan_chans = cpu_to_le32(num_send_chans);
2913 if (num_sends)
2914 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG);
2915
2916 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2917 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n",
2918 num_send_chans, len, cmd->pdev_id, num_sends);
2919
2920 ptr = skb->data + sizeof(*cmd);
2921
2922 len = sizeof(*chan_info) * num_send_chans;
2923 tlv = ptr;
2924 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT,
2925 len);
2926 ptr += TLV_HDR_SIZE;
2927
2928 for (i = 0; i < num_send_chans; ++i) {
2929 chan_info = ptr;
2930 memset(chan_info, 0, sizeof(*chan_info));
2931 len = sizeof(*chan_info);
2932 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL,
2933 len);
2934
2935 reg1 = &chan_info->reg_info_1;
2936 reg2 = &chan_info->reg_info_2;
2937 chan_info->mhz = cpu_to_le32(channel_arg->mhz);
2938 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1);
2939 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2);
2940
2941 if (channel_arg->is_chan_passive)
2942 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE);
2943 if (channel_arg->allow_he)
2944 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE);
2945 else if (channel_arg->allow_vht)
2946 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT);
2947 else if (channel_arg->allow_ht)
2948 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT);
2949 if (channel_arg->half_rate)
2950 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE);
2951 if (channel_arg->quarter_rate)
2952 chan_info->info |=
2953 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE);
2954
2955 if (channel_arg->psc_channel)
2956 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC);
2957
2958 if (channel_arg->dfs_set)
2959 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS);
2960
2961 chan_info->info |= le32_encode_bits(channel_arg->phy_mode,
2962 WMI_CHAN_INFO_MODE);
2963 *reg1 |= le32_encode_bits(channel_arg->minpower,
2964 WMI_CHAN_REG_INFO1_MIN_PWR);
2965 *reg1 |= le32_encode_bits(channel_arg->maxpower,
2966 WMI_CHAN_REG_INFO1_MAX_PWR);
2967 *reg1 |= le32_encode_bits(channel_arg->maxregpower,
2968 WMI_CHAN_REG_INFO1_MAX_REG_PWR);
2969 *reg1 |= le32_encode_bits(channel_arg->reg_class_id,
2970 WMI_CHAN_REG_INFO1_REG_CLS);
2971 *reg2 |= le32_encode_bits(channel_arg->antennamax,
2972 WMI_CHAN_REG_INFO2_ANT_MAX);
2973 *reg2 |= le32_encode_bits(channel_arg->maxregpower,
2974 WMI_CHAN_REG_INFO2_MAX_TX_PWR);
2975
2976 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
2977 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n",
2978 i, chan_info->mhz, chan_info->info);
2979
2980 ptr += sizeof(*chan_info);
2981
2982 channel_arg++;
2983 }
2984
2985 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID);
2986 if (ret) {
2987 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n");
2988 dev_kfree_skb(skb);
2989 return ret;
2990 }
2991
2992 num_sends++;
2993 }
2994
2995 return 0;
2996 }
2997
ath12k_wmi_send_wmm_update_cmd(struct ath12k * ar,u32 vdev_id,struct wmi_wmm_params_all_arg * param)2998 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id,
2999 struct wmi_wmm_params_all_arg *param)
3000 {
3001 struct ath12k_wmi_pdev *wmi = ar->wmi;
3002 struct wmi_vdev_set_wmm_params_cmd *cmd;
3003 struct wmi_wmm_params *wmm_param;
3004 struct wmi_wmm_params_arg *wmi_wmm_arg;
3005 struct sk_buff *skb;
3006 int ret, ac;
3007
3008 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3009 if (!skb)
3010 return -ENOMEM;
3011
3012 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data;
3013 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3014 sizeof(*cmd));
3015
3016 cmd->vdev_id = cpu_to_le32(vdev_id);
3017 cmd->wmm_param_type = 0;
3018
3019 for (ac = 0; ac < WME_NUM_AC; ac++) {
3020 switch (ac) {
3021 case WME_AC_BE:
3022 wmi_wmm_arg = ¶m->ac_be;
3023 break;
3024 case WME_AC_BK:
3025 wmi_wmm_arg = ¶m->ac_bk;
3026 break;
3027 case WME_AC_VI:
3028 wmi_wmm_arg = ¶m->ac_vi;
3029 break;
3030 case WME_AC_VO:
3031 wmi_wmm_arg = ¶m->ac_vo;
3032 break;
3033 }
3034
3035 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac];
3036 wmm_param->tlv_header =
3037 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD,
3038 sizeof(*wmm_param));
3039
3040 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs);
3041 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin);
3042 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax);
3043 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop);
3044 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm);
3045 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack);
3046
3047 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3048 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n",
3049 ac, wmm_param->aifs, wmm_param->cwmin,
3050 wmm_param->cwmax, wmm_param->txoplimit,
3051 wmm_param->acm, wmm_param->no_ack);
3052 }
3053 ret = ath12k_wmi_cmd_send(wmi, skb,
3054 WMI_VDEV_SET_WMM_PARAMS_CMDID);
3055 if (ret) {
3056 ath12k_warn(ar->ab,
3057 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID");
3058 dev_kfree_skb(skb);
3059 }
3060
3061 return ret;
3062 }
3063
ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k * ar,u32 pdev_id)3064 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar,
3065 u32 pdev_id)
3066 {
3067 struct ath12k_wmi_pdev *wmi = ar->wmi;
3068 struct wmi_dfs_phyerr_offload_cmd *cmd;
3069 struct sk_buff *skb;
3070 int ret;
3071
3072 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3073 if (!skb)
3074 return -ENOMEM;
3075
3076 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data;
3077 cmd->tlv_header =
3078 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD,
3079 sizeof(*cmd));
3080
3081 cmd->pdev_id = cpu_to_le32(pdev_id);
3082
3083 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3084 "WMI dfs phy err offload enable pdev id %d\n", pdev_id);
3085
3086 ret = ath12k_wmi_cmd_send(wmi, skb,
3087 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID);
3088 if (ret) {
3089 ath12k_warn(ar->ab,
3090 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n");
3091 dev_kfree_skb(skb);
3092 }
3093
3094 return ret;
3095 }
3096
ath12k_wmi_set_bios_cmd(struct ath12k_base * ab,u32 param_id,const u8 * buf,size_t buf_len)3097 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id,
3098 const u8 *buf, size_t buf_len)
3099 {
3100 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3101 struct wmi_pdev_set_bios_interface_cmd *cmd;
3102 struct wmi_tlv *tlv;
3103 struct sk_buff *skb;
3104 u8 *ptr;
3105 u32 len, len_aligned;
3106 int ret;
3107
3108 len_aligned = roundup(buf_len, sizeof(u32));
3109 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned;
3110
3111 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3112 if (!skb)
3113 return -ENOMEM;
3114
3115 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data;
3116 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD,
3117 sizeof(*cmd));
3118 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3119 cmd->param_type_id = cpu_to_le32(param_id);
3120 cmd->length = cpu_to_le32(buf_len);
3121
3122 ptr = skb->data + sizeof(*cmd);
3123 tlv = (struct wmi_tlv *)ptr;
3124 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned);
3125 ptr += TLV_HDR_SIZE;
3126 memcpy(ptr, buf, buf_len);
3127
3128 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3129 skb,
3130 WMI_PDEV_SET_BIOS_INTERFACE_CMDID);
3131 if (ret) {
3132 ath12k_warn(ab,
3133 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n",
3134 param_id, ret);
3135 dev_kfree_skb(skb);
3136 }
3137
3138 return 0;
3139 }
3140
ath12k_wmi_set_bios_sar_cmd(struct ath12k_base * ab,const u8 * psar_table)3141 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table)
3142 {
3143 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3144 struct wmi_pdev_set_bios_sar_table_cmd *cmd;
3145 struct wmi_tlv *tlv;
3146 struct sk_buff *skb;
3147 int ret;
3148 u8 *buf_ptr;
3149 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned;
3150 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET;
3151 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET;
3152
3153 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32));
3154 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN,
3155 sizeof(u32));
3156 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned +
3157 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned;
3158
3159 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3160 if (!skb)
3161 return -ENOMEM;
3162
3163 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data;
3164 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD,
3165 sizeof(*cmd));
3166 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3167 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3168 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3169
3170 buf_ptr = skb->data + sizeof(*cmd);
3171 tlv = (struct wmi_tlv *)buf_ptr;
3172 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3173 sar_table_len_aligned);
3174 buf_ptr += TLV_HDR_SIZE;
3175 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN);
3176
3177 buf_ptr += sar_table_len_aligned;
3178 tlv = (struct wmi_tlv *)buf_ptr;
3179 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE,
3180 sar_dbs_backoff_len_aligned);
3181 buf_ptr += TLV_HDR_SIZE;
3182 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN);
3183
3184 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3185 skb,
3186 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID);
3187 if (ret) {
3188 ath12k_warn(ab,
3189 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n",
3190 ret);
3191 dev_kfree_skb(skb);
3192 }
3193
3194 return ret;
3195 }
3196
ath12k_wmi_set_bios_geo_cmd(struct ath12k_base * ab,const u8 * pgeo_table)3197 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table)
3198 {
3199 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
3200 struct wmi_pdev_set_bios_geo_table_cmd *cmd;
3201 struct wmi_tlv *tlv;
3202 struct sk_buff *skb;
3203 int ret;
3204 u8 *buf_ptr;
3205 u32 len, sar_geo_len_aligned;
3206 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET;
3207
3208 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32));
3209 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned;
3210
3211 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
3212 if (!skb)
3213 return -ENOMEM;
3214
3215 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data;
3216 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD,
3217 sizeof(*cmd));
3218 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC);
3219 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3220
3221 buf_ptr = skb->data + sizeof(*cmd);
3222 tlv = (struct wmi_tlv *)buf_ptr;
3223 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned);
3224 buf_ptr += TLV_HDR_SIZE;
3225 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN);
3226
3227 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0],
3228 skb,
3229 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID);
3230 if (ret) {
3231 ath12k_warn(ab,
3232 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n",
3233 ret);
3234 dev_kfree_skb(skb);
3235 }
3236
3237 return ret;
3238 }
3239
ath12k_wmi_delba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)3240 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3241 u32 tid, u32 initiator, u32 reason)
3242 {
3243 struct ath12k_wmi_pdev *wmi = ar->wmi;
3244 struct wmi_delba_send_cmd *cmd;
3245 struct sk_buff *skb;
3246 int ret;
3247
3248 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3249 if (!skb)
3250 return -ENOMEM;
3251
3252 cmd = (struct wmi_delba_send_cmd *)skb->data;
3253 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD,
3254 sizeof(*cmd));
3255 cmd->vdev_id = cpu_to_le32(vdev_id);
3256 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3257 cmd->tid = cpu_to_le32(tid);
3258 cmd->initiator = cpu_to_le32(initiator);
3259 cmd->reasoncode = cpu_to_le32(reason);
3260
3261 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3262 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
3263 vdev_id, mac, tid, initiator, reason);
3264
3265 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID);
3266
3267 if (ret) {
3268 ath12k_warn(ar->ab,
3269 "failed to send WMI_DELBA_SEND_CMDID cmd\n");
3270 dev_kfree_skb(skb);
3271 }
3272
3273 return ret;
3274 }
3275
ath12k_wmi_addba_set_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)3276 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3277 u32 tid, u32 status)
3278 {
3279 struct ath12k_wmi_pdev *wmi = ar->wmi;
3280 struct wmi_addba_setresponse_cmd *cmd;
3281 struct sk_buff *skb;
3282 int ret;
3283
3284 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3285 if (!skb)
3286 return -ENOMEM;
3287
3288 cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
3289 cmd->tlv_header =
3290 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD,
3291 sizeof(*cmd));
3292 cmd->vdev_id = cpu_to_le32(vdev_id);
3293 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3294 cmd->tid = cpu_to_le32(tid);
3295 cmd->statuscode = cpu_to_le32(status);
3296
3297 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3298 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
3299 vdev_id, mac, tid, status);
3300
3301 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID);
3302
3303 if (ret) {
3304 ath12k_warn(ar->ab,
3305 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n");
3306 dev_kfree_skb(skb);
3307 }
3308
3309 return ret;
3310 }
3311
ath12k_wmi_addba_send(struct ath12k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)3312 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac,
3313 u32 tid, u32 buf_size)
3314 {
3315 struct ath12k_wmi_pdev *wmi = ar->wmi;
3316 struct wmi_addba_send_cmd *cmd;
3317 struct sk_buff *skb;
3318 int ret;
3319
3320 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3321 if (!skb)
3322 return -ENOMEM;
3323
3324 cmd = (struct wmi_addba_send_cmd *)skb->data;
3325 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD,
3326 sizeof(*cmd));
3327 cmd->vdev_id = cpu_to_le32(vdev_id);
3328 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3329 cmd->tid = cpu_to_le32(tid);
3330 cmd->buffersize = cpu_to_le32(buf_size);
3331
3332 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3333 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
3334 vdev_id, mac, tid, buf_size);
3335
3336 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID);
3337
3338 if (ret) {
3339 ath12k_warn(ar->ab,
3340 "failed to send WMI_ADDBA_SEND_CMDID cmd\n");
3341 dev_kfree_skb(skb);
3342 }
3343
3344 return ret;
3345 }
3346
ath12k_wmi_addba_clear_resp(struct ath12k * ar,u32 vdev_id,const u8 * mac)3347 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac)
3348 {
3349 struct ath12k_wmi_pdev *wmi = ar->wmi;
3350 struct wmi_addba_clear_resp_cmd *cmd;
3351 struct sk_buff *skb;
3352 int ret;
3353
3354 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3355 if (!skb)
3356 return -ENOMEM;
3357
3358 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
3359 cmd->tlv_header =
3360 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD,
3361 sizeof(*cmd));
3362 cmd->vdev_id = cpu_to_le32(vdev_id);
3363 ether_addr_copy(cmd->peer_macaddr.addr, mac);
3364
3365 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3366 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
3367 vdev_id, mac);
3368
3369 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID);
3370
3371 if (ret) {
3372 ath12k_warn(ar->ab,
3373 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n");
3374 dev_kfree_skb(skb);
3375 }
3376
3377 return ret;
3378 }
3379
ath12k_wmi_send_init_country_cmd(struct ath12k * ar,struct ath12k_wmi_init_country_arg * arg)3380 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar,
3381 struct ath12k_wmi_init_country_arg *arg)
3382 {
3383 struct ath12k_wmi_pdev *wmi = ar->wmi;
3384 struct wmi_init_country_cmd *cmd;
3385 struct sk_buff *skb;
3386 int ret;
3387
3388 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3389 if (!skb)
3390 return -ENOMEM;
3391
3392 cmd = (struct wmi_init_country_cmd *)skb->data;
3393 cmd->tlv_header =
3394 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD,
3395 sizeof(*cmd));
3396
3397 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3398
3399 switch (arg->flags) {
3400 case ALPHA_IS_SET:
3401 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA;
3402 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3);
3403 break;
3404 case CC_IS_SET:
3405 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE);
3406 cmd->cc_info.country_code =
3407 cpu_to_le32(arg->cc_info.country_code);
3408 break;
3409 case REGDMN_IS_SET:
3410 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN);
3411 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id);
3412 break;
3413 default:
3414 ret = -EINVAL;
3415 goto out;
3416 }
3417
3418 ret = ath12k_wmi_cmd_send(wmi, skb,
3419 WMI_SET_INIT_COUNTRY_CMDID);
3420
3421 out:
3422 if (ret) {
3423 ath12k_warn(ar->ab,
3424 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n",
3425 ret);
3426 dev_kfree_skb(skb);
3427 }
3428
3429 return ret;
3430 }
3431
ath12k_wmi_send_set_current_country_cmd(struct ath12k * ar,struct wmi_set_current_country_arg * arg)3432 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar,
3433 struct wmi_set_current_country_arg *arg)
3434 {
3435 struct ath12k_wmi_pdev *wmi = ar->wmi;
3436 struct wmi_set_current_country_cmd *cmd;
3437 struct sk_buff *skb;
3438 int ret;
3439
3440 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3441 if (!skb)
3442 return -ENOMEM;
3443
3444 cmd = (struct wmi_set_current_country_cmd *)skb->data;
3445 cmd->tlv_header =
3446 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD,
3447 sizeof(*cmd));
3448
3449 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3450 memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2));
3451 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID);
3452
3453 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3454 "set current country pdev id %d alpha2 %c%c\n",
3455 ar->pdev->pdev_id,
3456 arg->alpha2[0],
3457 arg->alpha2[1]);
3458
3459 if (ret) {
3460 ath12k_warn(ar->ab,
3461 "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret);
3462 dev_kfree_skb(skb);
3463 }
3464
3465 return ret;
3466 }
3467
3468 int
ath12k_wmi_send_thermal_mitigation_cmd(struct ath12k * ar,struct ath12k_wmi_thermal_mitigation_arg * arg)3469 ath12k_wmi_send_thermal_mitigation_cmd(struct ath12k *ar,
3470 struct ath12k_wmi_thermal_mitigation_arg *arg)
3471 {
3472 struct ath12k_wmi_therm_throt_level_config_param *lvl_conf;
3473 struct ath12k_wmi_therm_throt_config_request_cmd *cmd;
3474 struct ath12k_wmi_pdev *wmi = ar->wmi;
3475 struct wmi_tlv *tlv;
3476 struct sk_buff *skb;
3477 int i, ret, len;
3478
3479 len = sizeof(*cmd) + TLV_HDR_SIZE + (arg->num_levels * sizeof(*lvl_conf));
3480
3481 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3482 if (!skb)
3483 return -ENOMEM;
3484
3485 cmd = (struct ath12k_wmi_therm_throt_config_request_cmd *)skb->data;
3486 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_THERM_THROT_CONFIG_REQUEST,
3487 sizeof(*cmd));
3488 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
3489 cmd->enable = cpu_to_le32(1);
3490 cmd->dc = cpu_to_le32(100);
3491 cmd->dc_per_event = cpu_to_le32(0xffffffff);
3492 cmd->therm_throt_levels = cpu_to_le32(arg->num_levels);
3493
3494 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd));
3495 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
3496 arg->num_levels * sizeof(*lvl_conf));
3497
3498 lvl_conf = (struct ath12k_wmi_therm_throt_level_config_param *)tlv->value;
3499
3500 for (i = 0; i < arg->num_levels; i++) {
3501 lvl_conf->tlv_header =
3502 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO,
3503 sizeof(*lvl_conf));
3504
3505 lvl_conf->temp_lwm = a_cpu_to_sle32(arg->levelconf[i].tmplwm);
3506 lvl_conf->temp_hwm = a_cpu_to_sle32(arg->levelconf[i].tmphwm);
3507 lvl_conf->dc_off_percent = cpu_to_le32(arg->levelconf[i].dcoffpercent);
3508
3509 if (test_bit(WMI_TLV_SERVICE_THERM_THROT_POUT_REDUCTION,
3510 ar->ab->wmi_ab.svc_map))
3511 lvl_conf->pout_reduction_25db =
3512 cpu_to_le32(arg->levelconf[i].pout_reduction_db);
3513
3514 if (test_bit(WMI_TLV_SERVICE_THERM_THROT_TX_CHAIN_MASK,
3515 ar->ab->wmi_ab.svc_map))
3516 lvl_conf->tx_chain_mask = cpu_to_le32(ar->cfg_tx_chainmask);
3517
3518 lvl_conf->duty_cycle = cpu_to_le32(ATH12K_THERMAL_DEFAULT_DUTY_CYCLE);
3519 lvl_conf++;
3520 }
3521
3522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3523 "WMI vdev set thermal throt pdev_id %u enable dc 100 dc_per_event 0xffffffff levels %d\n",
3524 ar->pdev->pdev_id, arg->num_levels);
3525
3526 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_THERM_THROT_SET_CONF_CMDID);
3527 if (ret) {
3528 ath12k_warn(ar->ab,
3529 "failed to send WMI_THERM_THROT_SET_CONF cmd: %d\n",
3530 ret);
3531 dev_kfree_skb(skb);
3532 }
3533
3534 return ret;
3535 }
3536
ath12k_wmi_send_11d_scan_start_cmd(struct ath12k * ar,struct wmi_11d_scan_start_arg * arg)3537 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar,
3538 struct wmi_11d_scan_start_arg *arg)
3539 {
3540 struct ath12k_wmi_pdev *wmi = ar->wmi;
3541 struct wmi_11d_scan_start_cmd *cmd;
3542 struct sk_buff *skb;
3543 int ret;
3544
3545 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3546 if (!skb)
3547 return -ENOMEM;
3548
3549 cmd = (struct wmi_11d_scan_start_cmd *)skb->data;
3550 cmd->tlv_header =
3551 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD,
3552 sizeof(*cmd));
3553
3554 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
3555 cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec);
3556 cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec);
3557 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID);
3558
3559 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3560 "send 11d scan start vdev id %d period %d ms internal %d ms\n",
3561 arg->vdev_id, arg->scan_period_msec,
3562 arg->start_interval_msec);
3563
3564 if (ret) {
3565 ath12k_warn(ar->ab,
3566 "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret);
3567 dev_kfree_skb(skb);
3568 }
3569
3570 return ret;
3571 }
3572
ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k * ar,u32 vdev_id)3573 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id)
3574 {
3575 struct ath12k_wmi_pdev *wmi = ar->wmi;
3576 struct wmi_11d_scan_stop_cmd *cmd;
3577 struct sk_buff *skb;
3578 int ret;
3579
3580 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd));
3581 if (!skb)
3582 return -ENOMEM;
3583
3584 cmd = (struct wmi_11d_scan_stop_cmd *)skb->data;
3585 cmd->tlv_header =
3586 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD,
3587 sizeof(*cmd));
3588
3589 cmd->vdev_id = cpu_to_le32(vdev_id);
3590 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID);
3591
3592 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3593 "send 11d scan stop vdev id %d\n",
3594 cmd->vdev_id);
3595
3596 if (ret) {
3597 ath12k_warn(ar->ab,
3598 "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret);
3599 dev_kfree_skb(skb);
3600 }
3601
3602 return ret;
3603 }
3604
3605 int
ath12k_wmi_send_twt_enable_cmd(struct ath12k * ar,u32 pdev_id)3606 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id)
3607 {
3608 struct ath12k_wmi_pdev *wmi = ar->wmi;
3609 struct ath12k_base *ab = wmi->wmi_ab->ab;
3610 struct wmi_twt_enable_params_cmd *cmd;
3611 struct sk_buff *skb;
3612 int ret, len;
3613
3614 len = sizeof(*cmd);
3615
3616 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3617 if (!skb)
3618 return -ENOMEM;
3619
3620 cmd = (struct wmi_twt_enable_params_cmd *)skb->data;
3621 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD,
3622 len);
3623 cmd->pdev_id = cpu_to_le32(pdev_id);
3624 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS);
3625 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE);
3626 cmd->congestion_thresh_setup =
3627 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP);
3628 cmd->congestion_thresh_teardown =
3629 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN);
3630 cmd->congestion_thresh_critical =
3631 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL);
3632 cmd->interference_thresh_teardown =
3633 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN);
3634 cmd->interference_thresh_setup =
3635 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP);
3636 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP);
3637 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN);
3638 cmd->no_of_bcast_mcast_slots =
3639 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS);
3640 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS);
3641 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT);
3642 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL);
3643 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL);
3644 cmd->remove_sta_slot_interval =
3645 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL);
3646 /* TODO add MBSSID support */
3647 cmd->mbss_support = 0;
3648
3649 ret = ath12k_wmi_cmd_send(wmi, skb,
3650 WMI_TWT_ENABLE_CMDID);
3651 if (ret) {
3652 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID");
3653 dev_kfree_skb(skb);
3654 }
3655 return ret;
3656 }
3657
3658 int
ath12k_wmi_send_twt_disable_cmd(struct ath12k * ar,u32 pdev_id)3659 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id)
3660 {
3661 struct ath12k_wmi_pdev *wmi = ar->wmi;
3662 struct ath12k_base *ab = wmi->wmi_ab->ab;
3663 struct wmi_twt_disable_params_cmd *cmd;
3664 struct sk_buff *skb;
3665 int ret, len;
3666
3667 len = sizeof(*cmd);
3668
3669 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3670 if (!skb)
3671 return -ENOMEM;
3672
3673 cmd = (struct wmi_twt_disable_params_cmd *)skb->data;
3674 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD,
3675 len);
3676 cmd->pdev_id = cpu_to_le32(pdev_id);
3677
3678 ret = ath12k_wmi_cmd_send(wmi, skb,
3679 WMI_TWT_DISABLE_CMDID);
3680 if (ret) {
3681 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID");
3682 dev_kfree_skb(skb);
3683 }
3684 return ret;
3685 }
3686
3687 int
ath12k_wmi_send_obss_spr_cmd(struct ath12k * ar,u32 vdev_id,struct ieee80211_he_obss_pd * he_obss_pd)3688 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id,
3689 struct ieee80211_he_obss_pd *he_obss_pd)
3690 {
3691 struct ath12k_wmi_pdev *wmi = ar->wmi;
3692 struct ath12k_base *ab = wmi->wmi_ab->ab;
3693 struct wmi_obss_spatial_reuse_params_cmd *cmd;
3694 struct sk_buff *skb;
3695 int ret, len;
3696
3697 len = sizeof(*cmd);
3698
3699 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3700 if (!skb)
3701 return -ENOMEM;
3702
3703 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data;
3704 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD,
3705 len);
3706 cmd->vdev_id = cpu_to_le32(vdev_id);
3707 cmd->enable = cpu_to_le32(he_obss_pd->enable);
3708 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset);
3709 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset);
3710
3711 ret = ath12k_wmi_cmd_send(wmi, skb,
3712 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID);
3713 if (ret) {
3714 ath12k_warn(ab,
3715 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID");
3716 dev_kfree_skb(skb);
3717 }
3718 return ret;
3719 }
3720
ath12k_wmi_build_obss_pd(const struct ath12k_wmi_obss_pd_arg * arg)3721 u32 ath12k_wmi_build_obss_pd(const struct ath12k_wmi_obss_pd_arg *arg)
3722 {
3723 u32 param_val = 0;
3724
3725 param_val |= u32_encode_bits((u8)arg->srg_th, GENMASK(15, 8));
3726 param_val |= u32_encode_bits((u8)arg->non_srg_th, GENMASK(7, 0));
3727
3728 if (arg->srp_support)
3729 param_val |= ATH12K_OBSS_PD_THRESHOLD_IN_DBM;
3730
3731 if (arg->srg_enabled && arg->srp_support)
3732 param_val |= ATH12K_OBSS_PD_SRG_EN;
3733
3734 if (arg->non_srg_enabled)
3735 param_val |= ATH12K_OBSS_PD_NON_SRG_EN;
3736
3737 return param_val;
3738 }
3739
ath12k_wmi_pdev_set_obss_bitmap(struct ath12k * ar,const struct wmi_pdev_set_obss_bitmap_arg * arg)3740 static int ath12k_wmi_pdev_set_obss_bitmap(struct ath12k *ar,
3741 const struct wmi_pdev_set_obss_bitmap_arg *arg)
3742 {
3743 struct wmi_pdev_obss_pd_bitmap_cmd *cmd;
3744 struct ath12k_wmi_pdev *wmi = ar->wmi;
3745 const int len = sizeof(*cmd);
3746 struct sk_buff *skb;
3747 int ret;
3748
3749 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3750 if (!skb)
3751 return -ENOMEM;
3752
3753 cmd = (struct wmi_pdev_obss_pd_bitmap_cmd *)skb->data;
3754 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(arg->tlv_tag, len);
3755 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
3756 memcpy(cmd->bitmap, arg->bitmap, sizeof(cmd->bitmap));
3757
3758 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3759 "wmi set pdev %u %s %08x %08x\n",
3760 arg->pdev_id, arg->label, arg->bitmap[0], arg->bitmap[1]);
3761
3762 ret = ath12k_wmi_cmd_send(wmi, skb, arg->cmd_id);
3763 if (ret) {
3764 ath12k_warn(ar->ab, "failed to send %s: %d\n", arg->label, ret);
3765 dev_kfree_skb(skb);
3766 }
3767
3768 return ret;
3769 }
3770
ath12k_wmi_pdev_set_srg_bss_color_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3771 int ath12k_wmi_pdev_set_srg_bss_color_bitmap(struct ath12k *ar,
3772 u32 pdev_id, const u32 *bitmap)
3773 {
3774 struct wmi_pdev_set_obss_bitmap_arg arg = {
3775 .tlv_tag = WMI_TAG_PDEV_SRG_BSS_COLOR_BITMAP_CMD,
3776 .pdev_id = pdev_id,
3777 .cmd_id = WMI_PDEV_SET_SRG_BSS_COLOR_BITMAP_CMDID,
3778 .bitmap = bitmap,
3779 .label = "SRG bss color bitmap",
3780 };
3781
3782 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3783 }
3784
ath12k_wmi_pdev_set_srg_partial_bssid_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3785 int ath12k_wmi_pdev_set_srg_partial_bssid_bitmap(struct ath12k *ar,
3786 u32 pdev_id, const u32 *bitmap)
3787 {
3788 struct wmi_pdev_set_obss_bitmap_arg arg = {
3789 .tlv_tag = WMI_TAG_PDEV_SRG_PARTIAL_BSSID_BITMAP_CMD,
3790 .pdev_id = pdev_id,
3791 .cmd_id = WMI_PDEV_SET_SRG_PARTIAL_BSSID_BITMAP_CMDID,
3792 .bitmap = bitmap,
3793 .label = "SRG partial bssid bitmap",
3794 };
3795
3796 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3797 }
3798
ath12k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3799 int ath12k_wmi_pdev_srg_obss_color_enable_bitmap(struct ath12k *ar,
3800 u32 pdev_id, const u32 *bitmap)
3801 {
3802 struct wmi_pdev_set_obss_bitmap_arg arg = {
3803 .tlv_tag = WMI_TAG_PDEV_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
3804 .pdev_id = pdev_id,
3805 .cmd_id = WMI_PDEV_SET_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
3806 .bitmap = bitmap,
3807 .label = "SRG obss color enable bitmap",
3808 };
3809
3810 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3811 }
3812
ath12k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3813 int ath12k_wmi_pdev_srg_obss_bssid_enable_bitmap(struct ath12k *ar,
3814 u32 pdev_id, const u32 *bitmap)
3815 {
3816 struct wmi_pdev_set_obss_bitmap_arg arg = {
3817 .tlv_tag = WMI_TAG_PDEV_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
3818 .pdev_id = pdev_id,
3819 .cmd_id = WMI_PDEV_SET_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
3820 .bitmap = bitmap,
3821 .label = "SRG obss bssid enable bitmap",
3822 };
3823
3824 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3825 }
3826
ath12k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3827 int ath12k_wmi_pdev_non_srg_obss_color_enable_bitmap(struct ath12k *ar,
3828 u32 pdev_id, const u32 *bitmap)
3829 {
3830 struct wmi_pdev_set_obss_bitmap_arg arg = {
3831 .tlv_tag = WMI_TAG_PDEV_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMD,
3832 .pdev_id = pdev_id,
3833 .cmd_id = WMI_PDEV_SET_NON_SRG_OBSS_COLOR_ENABLE_BITMAP_CMDID,
3834 .bitmap = bitmap,
3835 .label = "non SRG obss color enable bitmap",
3836 };
3837
3838 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3839 }
3840
ath12k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath12k * ar,u32 pdev_id,const u32 * bitmap)3841 int ath12k_wmi_pdev_non_srg_obss_bssid_enable_bitmap(struct ath12k *ar,
3842 u32 pdev_id, const u32 *bitmap)
3843 {
3844 struct wmi_pdev_set_obss_bitmap_arg arg = {
3845 .tlv_tag = WMI_TAG_PDEV_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMD,
3846 .pdev_id = pdev_id,
3847 .cmd_id = WMI_PDEV_SET_NON_SRG_OBSS_BSSID_ENABLE_BITMAP_CMDID,
3848 .bitmap = bitmap,
3849 .label = "non SRG obss bssid enable bitmap",
3850 };
3851
3852 return ath12k_wmi_pdev_set_obss_bitmap(ar, &arg);
3853 }
3854
ath12k_wmi_obss_color_cfg_cmd(struct ath12k * ar,u32 vdev_id,u8 bss_color,u32 period,bool enable)3855 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id,
3856 u8 bss_color, u32 period,
3857 bool enable)
3858 {
3859 struct ath12k_wmi_pdev *wmi = ar->wmi;
3860 struct ath12k_base *ab = wmi->wmi_ab->ab;
3861 struct wmi_obss_color_collision_cfg_params_cmd *cmd;
3862 struct sk_buff *skb;
3863 int ret, len;
3864
3865 len = sizeof(*cmd);
3866
3867 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3868 if (!skb)
3869 return -ENOMEM;
3870
3871 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data;
3872 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG,
3873 len);
3874 cmd->vdev_id = cpu_to_le32(vdev_id);
3875 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) :
3876 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE);
3877 cmd->current_bss_color = cpu_to_le32(bss_color);
3878 cmd->detection_period_ms = cpu_to_le32(period);
3879 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS);
3880 cmd->free_slot_expiry_time_ms = 0;
3881 cmd->flags = 0;
3882
3883 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3884 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n",
3885 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color,
3886 cmd->detection_period_ms, cmd->scan_period_ms);
3887
3888 ret = ath12k_wmi_cmd_send(wmi, skb,
3889 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID);
3890 if (ret) {
3891 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID");
3892 dev_kfree_skb(skb);
3893 }
3894 return ret;
3895 }
3896
ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k * ar,u32 vdev_id,bool enable)3897 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id,
3898 bool enable)
3899 {
3900 struct ath12k_wmi_pdev *wmi = ar->wmi;
3901 struct ath12k_base *ab = wmi->wmi_ab->ab;
3902 struct wmi_bss_color_change_enable_params_cmd *cmd;
3903 struct sk_buff *skb;
3904 int ret, len;
3905
3906 len = sizeof(*cmd);
3907
3908 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
3909 if (!skb)
3910 return -ENOMEM;
3911
3912 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data;
3913 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE,
3914 len);
3915 cmd->vdev_id = cpu_to_le32(vdev_id);
3916 cmd->enable = enable ? cpu_to_le32(1) : 0;
3917
3918 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3919 "wmi_send_bss_color_change_enable id %d enable %d\n",
3920 cmd->vdev_id, cmd->enable);
3921
3922 ret = ath12k_wmi_cmd_send(wmi, skb,
3923 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID);
3924 if (ret) {
3925 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID");
3926 dev_kfree_skb(skb);
3927 }
3928 return ret;
3929 }
3930
ath12k_wmi_fils_discovery_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3931 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id,
3932 struct sk_buff *tmpl)
3933 {
3934 struct wmi_tlv *tlv;
3935 struct sk_buff *skb;
3936 void *ptr;
3937 int ret, len;
3938 size_t aligned_len;
3939 struct wmi_fils_discovery_tmpl_cmd *cmd;
3940
3941 aligned_len = roundup(tmpl->len, 4);
3942 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len;
3943
3944 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3945 "WMI vdev %i set FILS discovery template\n", vdev_id);
3946
3947 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3948 if (!skb)
3949 return -ENOMEM;
3950
3951 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data;
3952 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD,
3953 sizeof(*cmd));
3954 cmd->vdev_id = cpu_to_le32(vdev_id);
3955 cmd->buf_len = cpu_to_le32(tmpl->len);
3956 ptr = skb->data + sizeof(*cmd);
3957
3958 tlv = ptr;
3959 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
3960 memcpy(tlv->value, tmpl->data, tmpl->len);
3961
3962 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID);
3963 if (ret) {
3964 ath12k_warn(ar->ab,
3965 "WMI vdev %i failed to send FILS discovery template command\n",
3966 vdev_id);
3967 dev_kfree_skb(skb);
3968 }
3969 return ret;
3970 }
3971
ath12k_wmi_probe_resp_tmpl(struct ath12k * ar,u32 vdev_id,struct sk_buff * tmpl)3972 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id,
3973 struct sk_buff *tmpl)
3974 {
3975 struct wmi_probe_tmpl_cmd *cmd;
3976 struct ath12k_wmi_bcn_prb_info_params *probe_info;
3977 struct wmi_tlv *tlv;
3978 struct sk_buff *skb;
3979 void *ptr;
3980 int ret, len;
3981 size_t aligned_len = roundup(tmpl->len, 4);
3982
3983 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
3984 "WMI vdev %i set probe response template\n", vdev_id);
3985
3986 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len;
3987
3988 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
3989 if (!skb)
3990 return -ENOMEM;
3991
3992 cmd = (struct wmi_probe_tmpl_cmd *)skb->data;
3993 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD,
3994 sizeof(*cmd));
3995 cmd->vdev_id = cpu_to_le32(vdev_id);
3996 cmd->buf_len = cpu_to_le32(tmpl->len);
3997
3998 ptr = skb->data + sizeof(*cmd);
3999
4000 probe_info = ptr;
4001 len = sizeof(*probe_info);
4002 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO,
4003 len);
4004 probe_info->caps = 0;
4005 probe_info->erp = 0;
4006
4007 ptr += sizeof(*probe_info);
4008
4009 tlv = ptr;
4010 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len);
4011 memcpy(tlv->value, tmpl->data, tmpl->len);
4012
4013 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID);
4014 if (ret) {
4015 ath12k_warn(ar->ab,
4016 "WMI vdev %i failed to send probe response template command\n",
4017 vdev_id);
4018 dev_kfree_skb(skb);
4019 }
4020 return ret;
4021 }
4022
ath12k_wmi_fils_discovery(struct ath12k * ar,u32 vdev_id,u32 interval,bool unsol_bcast_probe_resp_enabled)4023 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval,
4024 bool unsol_bcast_probe_resp_enabled)
4025 {
4026 struct sk_buff *skb;
4027 int ret, len;
4028 struct wmi_fils_discovery_cmd *cmd;
4029
4030 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4031 "WMI vdev %i set %s interval to %u TU\n",
4032 vdev_id, unsol_bcast_probe_resp_enabled ?
4033 "unsolicited broadcast probe response" : "FILS discovery",
4034 interval);
4035
4036 len = sizeof(*cmd);
4037 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
4038 if (!skb)
4039 return -ENOMEM;
4040
4041 cmd = (struct wmi_fils_discovery_cmd *)skb->data;
4042 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD,
4043 len);
4044 cmd->vdev_id = cpu_to_le32(vdev_id);
4045 cmd->interval = cpu_to_le32(interval);
4046 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled);
4047
4048 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID);
4049 if (ret) {
4050 ath12k_warn(ar->ab,
4051 "WMI vdev %i failed to send FILS discovery enable/disable command\n",
4052 vdev_id);
4053 dev_kfree_skb(skb);
4054 }
4055 return ret;
4056 }
4057
4058 static void
ath12k_wmi_obss_color_collision_event(struct ath12k_base * ab,struct sk_buff * skb)4059 ath12k_wmi_obss_color_collision_event(struct ath12k_base *ab, struct sk_buff *skb)
4060 {
4061 const struct wmi_obss_color_collision_event *ev;
4062 struct ath12k_link_vif *arvif;
4063 u32 vdev_id, evt_type;
4064 const void **tb;
4065 u64 bitmap;
4066
4067 tb = ath12k_wmi_tlv_parse(ab, skb);
4068 if (IS_ERR(tb)) {
4069 ath12k_warn(ab, "failed to parse OBSS color collision tlv %ld\n",
4070 PTR_ERR(tb));
4071 return;
4072 }
4073
4074 ev = tb[WMI_TAG_OBSS_COLOR_COLLISION_EVT];
4075 if (!ev) {
4076 ath12k_warn(ab, "failed to fetch OBSS color collision event\n");
4077 return;
4078 }
4079
4080 vdev_id = le32_to_cpu(ev->vdev_id);
4081 evt_type = le32_to_cpu(ev->evt_type);
4082 bitmap = le64_to_cpu(ev->obss_color_bitmap);
4083
4084 guard(rcu)();
4085
4086 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
4087 if (!arvif) {
4088 ath12k_warn(ab, "no arvif found for vdev %u in OBSS color collision event\n",
4089 vdev_id);
4090 return;
4091 }
4092
4093 switch (evt_type) {
4094 case WMI_BSS_COLOR_COLLISION_DETECTION:
4095 ieee80211_obss_color_collision_notify(arvif->ahvif->vif,
4096 bitmap,
4097 arvif->link_id);
4098 ath12k_dbg(ab, ATH12K_DBG_WMI,
4099 "obss color collision detected vdev %u event %d bitmap %016llx\n",
4100 vdev_id, evt_type, bitmap);
4101 break;
4102 case WMI_BSS_COLOR_COLLISION_DISABLE:
4103 case WMI_BSS_COLOR_FREE_SLOT_TIMER_EXPIRY:
4104 case WMI_BSS_COLOR_FREE_SLOT_AVAILABLE:
4105 break;
4106 default:
4107 ath12k_warn(ab, "unknown OBSS color collision event type %d\n", evt_type);
4108 }
4109 }
4110
4111 static void
ath12k_fill_band_to_mac_param(struct ath12k_base * soc,struct ath12k_wmi_pdev_band_arg * arg)4112 ath12k_fill_band_to_mac_param(struct ath12k_base *soc,
4113 struct ath12k_wmi_pdev_band_arg *arg)
4114 {
4115 u8 i;
4116 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap;
4117 struct ath12k_pdev *pdev;
4118
4119 for (i = 0; i < soc->num_radios; i++) {
4120 pdev = &soc->pdevs[i];
4121 hal_reg_cap = &soc->hal_reg_cap[i];
4122 arg[i].pdev_id = pdev->pdev_id;
4123
4124 switch (pdev->cap.supported_bands) {
4125 case WMI_HOST_WLAN_2GHZ_5GHZ_CAP:
4126 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
4127 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
4128 break;
4129 case WMI_HOST_WLAN_2GHZ_CAP:
4130 arg[i].start_freq = hal_reg_cap->low_2ghz_chan;
4131 arg[i].end_freq = hal_reg_cap->high_2ghz_chan;
4132 break;
4133 case WMI_HOST_WLAN_5GHZ_CAP:
4134 arg[i].start_freq = hal_reg_cap->low_5ghz_chan;
4135 arg[i].end_freq = hal_reg_cap->high_5ghz_chan;
4136 break;
4137 default:
4138 break;
4139 }
4140 }
4141 }
4142
4143 static void
ath12k_wmi_copy_resource_config(struct ath12k_base * ab,struct ath12k_wmi_resource_config_params * wmi_cfg,struct ath12k_wmi_resource_config_arg * tg_cfg)4144 ath12k_wmi_copy_resource_config(struct ath12k_base *ab,
4145 struct ath12k_wmi_resource_config_params *wmi_cfg,
4146 struct ath12k_wmi_resource_config_arg *tg_cfg)
4147 {
4148 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs);
4149 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers);
4150 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers);
4151 wmi_cfg->num_offload_reorder_buffs =
4152 cpu_to_le32(tg_cfg->num_offload_reorder_buffs);
4153 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys);
4154 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids);
4155 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit);
4156 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask);
4157 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask);
4158 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]);
4159 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]);
4160 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]);
4161 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]);
4162 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode);
4163 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req);
4164 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev);
4165 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev);
4166 wmi_cfg->roam_offload_max_ap_profiles =
4167 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles);
4168 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups);
4169 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems);
4170 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode);
4171 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size);
4172 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries);
4173 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size);
4174 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim);
4175 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check =
4176 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check);
4177 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config);
4178 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev);
4179 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc);
4180 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries);
4181 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs);
4182 wmi_cfg->num_tdls_conn_table_entries =
4183 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries);
4184 wmi_cfg->beacon_tx_offload_max_vdev =
4185 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev);
4186 wmi_cfg->num_multicast_filter_entries =
4187 cpu_to_le32(tg_cfg->num_multicast_filter_entries);
4188 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters);
4189 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern);
4190 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size);
4191 wmi_cfg->max_tdls_concurrent_sleep_sta =
4192 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta);
4193 wmi_cfg->max_tdls_concurrent_buffer_sta =
4194 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta);
4195 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate);
4196 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs);
4197 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels);
4198 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules);
4199 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size);
4200 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
4201 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
4202 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
4203 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 |
4204 WMI_RSRC_CFG_FLAG1_ACK_RSSI);
4205 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
4206 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
4207 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
4208 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count);
4209 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver,
4210 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION);
4211 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported <<
4212 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT);
4213 if (ab->hw_params->reoq_lut_support)
4214 wmi_cfg->host_service_flags |=
4215 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT);
4216 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt);
4217 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period);
4218 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET |
4219 WMI_RSRC_CFG_FLAGS2_FW_AST_INDICATION_DISABLE);
4220
4221 if (tg_cfg->is_wds_null_frame_supported)
4222 wmi_cfg->flags2 |=
4223 cpu_to_le32(WMI_RSRC_CFG_FLAGS2_WDS_NULL_FRAME_SUPPORT);
4224 }
4225
ath12k_init_cmd_send(struct ath12k_wmi_pdev * wmi,struct ath12k_wmi_init_cmd_arg * arg)4226 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi,
4227 struct ath12k_wmi_init_cmd_arg *arg)
4228 {
4229 struct ath12k_base *ab = wmi->wmi_ab->ab;
4230 struct sk_buff *skb;
4231 struct wmi_init_cmd *cmd;
4232 struct ath12k_wmi_resource_config_params *cfg;
4233 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode;
4234 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac;
4235 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks;
4236 struct wmi_tlv *tlv;
4237 size_t ret, len;
4238 void *ptr;
4239 u32 hw_mode_len = 0;
4240 u16 idx;
4241
4242 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX)
4243 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE +
4244 (arg->num_band_to_mac * sizeof(*band_to_mac));
4245
4246 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len +
4247 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0);
4248
4249 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
4250 if (!skb)
4251 return -ENOMEM;
4252
4253 cmd = (struct wmi_init_cmd *)skb->data;
4254
4255 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD,
4256 sizeof(*cmd));
4257
4258 ptr = skb->data + sizeof(*cmd);
4259 cfg = ptr;
4260
4261 ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg);
4262
4263 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG,
4264 sizeof(*cfg));
4265
4266 ptr += sizeof(*cfg);
4267 host_mem_chunks = ptr + TLV_HDR_SIZE;
4268 len = sizeof(struct ath12k_wmi_host_mem_chunk_params);
4269
4270 for (idx = 0; idx < arg->num_mem_chunks; ++idx) {
4271 host_mem_chunks[idx].tlv_header =
4272 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK,
4273 len);
4274
4275 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr);
4276 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len);
4277 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id);
4278
4279 ath12k_dbg(ab, ATH12K_DBG_WMI,
4280 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n",
4281 arg->mem_chunks[idx].req_id,
4282 (u64)arg->mem_chunks[idx].paddr,
4283 arg->mem_chunks[idx].len);
4284 }
4285 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks);
4286 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks;
4287
4288 /* num_mem_chunks is zero */
4289 tlv = ptr;
4290 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4291 ptr += TLV_HDR_SIZE + len;
4292
4293 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) {
4294 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr;
4295 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4296 sizeof(*hw_mode));
4297
4298 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id);
4299 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac);
4300
4301 ptr += sizeof(*hw_mode);
4302
4303 len = arg->num_band_to_mac * sizeof(*band_to_mac);
4304 tlv = ptr;
4305 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len);
4306
4307 ptr += TLV_HDR_SIZE;
4308 len = sizeof(*band_to_mac);
4309
4310 for (idx = 0; idx < arg->num_band_to_mac; idx++) {
4311 band_to_mac = (void *)ptr;
4312
4313 band_to_mac->tlv_header =
4314 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC,
4315 len);
4316 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id);
4317 band_to_mac->start_freq =
4318 cpu_to_le32(arg->band_to_mac[idx].start_freq);
4319 band_to_mac->end_freq =
4320 cpu_to_le32(arg->band_to_mac[idx].end_freq);
4321 ptr += sizeof(*band_to_mac);
4322 }
4323 }
4324
4325 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID);
4326 if (ret) {
4327 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n");
4328 dev_kfree_skb(skb);
4329 }
4330
4331 return ret;
4332 }
4333
ath12k_wmi_pdev_lro_cfg(struct ath12k * ar,int pdev_id)4334 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar,
4335 int pdev_id)
4336 {
4337 struct ath12k_wmi_pdev_lro_config_cmd *cmd;
4338 struct sk_buff *skb;
4339 int ret;
4340
4341 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4342 if (!skb)
4343 return -ENOMEM;
4344
4345 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data;
4346 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD,
4347 sizeof(*cmd));
4348
4349 get_random_bytes(cmd->th_4, sizeof(cmd->th_4));
4350 get_random_bytes(cmd->th_6, sizeof(cmd->th_6));
4351
4352 cmd->pdev_id = cpu_to_le32(pdev_id);
4353
4354 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4355 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id);
4356
4357 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID);
4358 if (ret) {
4359 ath12k_warn(ar->ab,
4360 "failed to send lro cfg req wmi cmd\n");
4361 dev_kfree_skb(skb);
4362 }
4363
4364 return ret;
4365 }
4366
ath12k_wmi_wait_for_service_ready(struct ath12k_base * ab)4367 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab)
4368 {
4369 unsigned long time_left;
4370
4371 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready,
4372 WMI_SERVICE_READY_TIMEOUT_HZ);
4373 if (!time_left)
4374 return -ETIMEDOUT;
4375
4376 return 0;
4377 }
4378
ath12k_wmi_wait_for_unified_ready(struct ath12k_base * ab)4379 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab)
4380 {
4381 unsigned long time_left;
4382
4383 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready,
4384 WMI_SERVICE_READY_TIMEOUT_HZ);
4385 if (!time_left)
4386 return -ETIMEDOUT;
4387
4388 return 0;
4389 }
4390
ath12k_wmi_set_hw_mode(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type mode)4391 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab,
4392 enum wmi_host_hw_mode_config_type mode)
4393 {
4394 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd;
4395 struct sk_buff *skb;
4396 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4397 int len;
4398 int ret;
4399
4400 len = sizeof(*cmd);
4401
4402 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
4403 if (!skb)
4404 return -ENOMEM;
4405
4406 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data;
4407
4408 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD,
4409 sizeof(*cmd));
4410
4411 cmd->pdev_id = WMI_PDEV_ID_SOC;
4412 cmd->hw_mode_index = cpu_to_le32(mode);
4413
4414 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID);
4415 if (ret) {
4416 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n");
4417 dev_kfree_skb(skb);
4418 }
4419
4420 return ret;
4421 }
4422
ath12k_wmi_cmd_init(struct ath12k_base * ab)4423 int ath12k_wmi_cmd_init(struct ath12k_base *ab)
4424 {
4425 struct ath12k_dp *dp = ath12k_ab_to_dp(ab);
4426 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
4427 struct ath12k_wmi_init_cmd_arg arg = {};
4428
4429 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
4430 ab->wmi_ab.svc_map))
4431 arg.res_cfg.is_reg_cc_ext_event_supported = true;
4432
4433 if (test_bit(WMI_TLV_SERVICE_WDS_NULL_FRAME_SUPPORT, ab->wmi_ab.svc_map))
4434 arg.res_cfg.is_wds_null_frame_supported = true;
4435
4436 ab->hw_params->wmi_init(ab, &arg.res_cfg);
4437 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode;
4438
4439 arg.num_mem_chunks = wmi_ab->num_mem_chunks;
4440 arg.hw_mode_id = wmi_ab->preferred_hw_mode;
4441 arg.mem_chunks = wmi_ab->mem_chunks;
4442
4443 if (ab->hw_params->single_pdev_only)
4444 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX;
4445
4446 arg.num_band_to_mac = ab->num_radios;
4447 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac);
4448
4449 dp->peer_metadata_ver = arg.res_cfg.peer_metadata_ver;
4450
4451 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg);
4452 }
4453
ath12k_wmi_vdev_spectral_conf(struct ath12k * ar,struct ath12k_wmi_vdev_spectral_conf_arg * arg)4454 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar,
4455 struct ath12k_wmi_vdev_spectral_conf_arg *arg)
4456 {
4457 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd;
4458 struct sk_buff *skb;
4459 int ret;
4460
4461 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4462 if (!skb)
4463 return -ENOMEM;
4464
4465 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data;
4466 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD,
4467 sizeof(*cmd));
4468 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
4469 cmd->scan_count = cpu_to_le32(arg->scan_count);
4470 cmd->scan_period = cpu_to_le32(arg->scan_period);
4471 cmd->scan_priority = cpu_to_le32(arg->scan_priority);
4472 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size);
4473 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena);
4474 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena);
4475 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref);
4476 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay);
4477 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr);
4478 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr);
4479 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode);
4480 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode);
4481 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr);
4482 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format);
4483 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode);
4484 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale);
4485 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj);
4486 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask);
4487
4488 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4489 "WMI spectral scan config cmd vdev_id 0x%x\n",
4490 arg->vdev_id);
4491
4492 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4493 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID);
4494 if (ret) {
4495 ath12k_warn(ar->ab,
4496 "failed to send spectral scan config wmi cmd\n");
4497 dev_kfree_skb(skb);
4498 }
4499
4500 return ret;
4501 }
4502
ath12k_wmi_vdev_spectral_enable(struct ath12k * ar,u32 vdev_id,u32 trigger,u32 enable)4503 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id,
4504 u32 trigger, u32 enable)
4505 {
4506 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd;
4507 struct sk_buff *skb;
4508 int ret;
4509
4510 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4511 if (!skb)
4512 return -ENOMEM;
4513
4514 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data;
4515 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD,
4516 sizeof(*cmd));
4517
4518 cmd->vdev_id = cpu_to_le32(vdev_id);
4519 cmd->trigger_cmd = cpu_to_le32(trigger);
4520 cmd->enable_cmd = cpu_to_le32(enable);
4521
4522 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4523 "WMI spectral enable cmd vdev id 0x%x\n",
4524 vdev_id);
4525
4526 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4527 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID);
4528 if (ret) {
4529 ath12k_warn(ar->ab,
4530 "failed to send spectral enable wmi cmd\n");
4531 dev_kfree_skb(skb);
4532 }
4533
4534 return ret;
4535 }
4536
ath12k_wmi_pdev_dma_ring_cfg(struct ath12k * ar,struct ath12k_wmi_pdev_dma_ring_cfg_arg * arg)4537 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar,
4538 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg)
4539 {
4540 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd;
4541 struct sk_buff *skb;
4542 int ret;
4543
4544 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd));
4545 if (!skb)
4546 return -ENOMEM;
4547
4548 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data;
4549 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ,
4550 sizeof(*cmd));
4551
4552 cmd->pdev_id = cpu_to_le32(arg->pdev_id);
4553 cmd->module_id = cpu_to_le32(arg->module_id);
4554 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo);
4555 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi);
4556 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo);
4557 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi);
4558 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo);
4559 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi);
4560 cmd->num_elems = cpu_to_le32(arg->num_elems);
4561 cmd->buf_size = cpu_to_le32(arg->buf_size);
4562 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event);
4563 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms);
4564
4565 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
4566 "WMI DMA ring cfg req cmd pdev_id 0x%x\n",
4567 arg->pdev_id);
4568
4569 ret = ath12k_wmi_cmd_send(ar->wmi, skb,
4570 WMI_PDEV_DMA_RING_CFG_REQ_CMDID);
4571 if (ret) {
4572 ath12k_warn(ar->ab,
4573 "failed to send dma ring cfg req wmi cmd\n");
4574 dev_kfree_skb(skb);
4575 }
4576
4577 return ret;
4578 }
4579
ath12k_wmi_dma_buf_entry_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4580 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc,
4581 u16 tag, u16 len,
4582 const void *ptr, void *data)
4583 {
4584 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4585
4586 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY)
4587 return -EPROTO;
4588
4589 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry))
4590 return -ENOBUFS;
4591
4592 arg->num_buf_entry++;
4593 return 0;
4594 }
4595
ath12k_wmi_dma_buf_meta_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4596 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc,
4597 u16 tag, u16 len,
4598 const void *ptr, void *data)
4599 {
4600 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4601
4602 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA)
4603 return -EPROTO;
4604
4605 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry))
4606 return -ENOBUFS;
4607
4608 arg->num_meta++;
4609
4610 return 0;
4611 }
4612
ath12k_wmi_dma_buf_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)4613 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab,
4614 u16 tag, u16 len,
4615 const void *ptr, void *data)
4616 {
4617 struct ath12k_wmi_dma_buf_release_arg *arg = data;
4618 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed;
4619 u32 pdev_id;
4620 int ret;
4621
4622 switch (tag) {
4623 case WMI_TAG_DMA_BUF_RELEASE:
4624 fixed = ptr;
4625 arg->fixed = *fixed;
4626 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id));
4627 arg->fixed.pdev_id = cpu_to_le32(pdev_id);
4628 break;
4629 case WMI_TAG_ARRAY_STRUCT:
4630 if (!arg->buf_entry_done) {
4631 arg->num_buf_entry = 0;
4632 arg->buf_entry = ptr;
4633
4634 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4635 ath12k_wmi_dma_buf_entry_parse,
4636 arg);
4637 if (ret) {
4638 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n",
4639 ret);
4640 return ret;
4641 }
4642
4643 arg->buf_entry_done = true;
4644 } else if (!arg->meta_data_done) {
4645 arg->num_meta = 0;
4646 arg->meta_data = ptr;
4647
4648 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4649 ath12k_wmi_dma_buf_meta_parse,
4650 arg);
4651 if (ret) {
4652 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n",
4653 ret);
4654 return ret;
4655 }
4656
4657 arg->meta_data_done = true;
4658 }
4659 break;
4660 default:
4661 break;
4662 }
4663 return 0;
4664 }
4665
ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base * ab,struct sk_buff * skb)4666 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab,
4667 struct sk_buff *skb)
4668 {
4669 struct ath12k_wmi_dma_buf_release_arg arg = {};
4670 struct ath12k_dbring_buf_release_event param;
4671 int ret;
4672
4673 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
4674 ath12k_wmi_dma_buf_parse,
4675 &arg);
4676 if (ret) {
4677 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret);
4678 return;
4679 }
4680
4681 param.fixed = arg.fixed;
4682 param.buf_entry = arg.buf_entry;
4683 param.num_buf_entry = arg.num_buf_entry;
4684 param.meta_data = arg.meta_data;
4685 param.num_meta = arg.num_meta;
4686
4687 ret = ath12k_dbring_buffer_release_event(ab, ¶m);
4688 if (ret) {
4689 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret);
4690 return;
4691 }
4692 }
4693
ath12k_wmi_hw_mode_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4694 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
4695 u16 tag, u16 len,
4696 const void *ptr, void *data)
4697 {
4698 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4699 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
4700 u32 phy_map = 0;
4701
4702 if (tag != WMI_TAG_HW_MODE_CAPABILITIES)
4703 return -EPROTO;
4704
4705 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes)
4706 return -ENOBUFS;
4707
4708 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params,
4709 hw_mode_id);
4710 svc_rdy_ext->n_hw_mode_caps++;
4711
4712 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map);
4713 svc_rdy_ext->tot_phy_id += fls(phy_map);
4714
4715 return 0;
4716 }
4717
ath12k_wmi_hw_mode_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4718 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
4719 u16 len, const void *ptr, void *data)
4720 {
4721 struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info;
4722 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4723 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
4724 enum wmi_host_hw_mode_config_type mode, pref;
4725 u32 i;
4726 int ret;
4727
4728 svc_rdy_ext->n_hw_mode_caps = 0;
4729 svc_rdy_ext->hw_mode_caps = ptr;
4730
4731 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4732 ath12k_wmi_hw_mode_caps_parse,
4733 svc_rdy_ext);
4734 if (ret) {
4735 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4736 return ret;
4737 }
4738
4739 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) {
4740 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i];
4741 mode = le32_to_cpu(hw_mode_caps->hw_mode_id);
4742
4743 if (mode >= WMI_HOST_HW_MODE_MAX)
4744 continue;
4745
4746 pref = soc->wmi_ab.preferred_hw_mode;
4747
4748 if (ath12k_hw_mode_pri_map[mode] <= ath12k_hw_mode_pri_map[pref]) {
4749 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps;
4750 soc->wmi_ab.preferred_hw_mode = mode;
4751 }
4752 }
4753
4754 svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps;
4755
4756 ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n",
4757 svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode);
4758
4759 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
4760 return -EINVAL;
4761
4762 return 0;
4763 }
4764
ath12k_wmi_mac_phy_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4765 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc,
4766 u16 tag, u16 len,
4767 const void *ptr, void *data)
4768 {
4769 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4770
4771 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES)
4772 return -EPROTO;
4773
4774 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id)
4775 return -ENOBUFS;
4776
4777 if (!svc_rdy_ext->n_mac_phy_caps) {
4778 svc_rdy_ext->mac_phy_caps =
4779 kzalloc_objs(*svc_rdy_ext->mac_phy_caps,
4780 svc_rdy_ext->tot_phy_id,
4781 GFP_ATOMIC);
4782 if (!svc_rdy_ext->mac_phy_caps)
4783 return -ENOMEM;
4784 }
4785
4786 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params));
4787 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len);
4788 svc_rdy_ext->n_mac_phy_caps++;
4789 return 0;
4790 }
4791
ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4792 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc,
4793 u16 tag, u16 len,
4794 const void *ptr, void *data)
4795 {
4796 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4797
4798 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT)
4799 return -EPROTO;
4800
4801 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy)
4802 return -ENOBUFS;
4803
4804 svc_rdy_ext->n_ext_hal_reg_caps++;
4805 return 0;
4806 }
4807
ath12k_wmi_ext_hal_reg_caps(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4808 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc,
4809 u16 len, const void *ptr, void *data)
4810 {
4811 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4812 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4813 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap;
4814 int ret;
4815 u32 i;
4816
4817 svc_rdy_ext->n_ext_hal_reg_caps = 0;
4818 svc_rdy_ext->ext_hal_reg_caps = ptr;
4819 ret = ath12k_wmi_tlv_iter(soc, ptr, len,
4820 ath12k_wmi_ext_hal_reg_caps_parse,
4821 svc_rdy_ext);
4822 if (ret) {
4823 ath12k_warn(soc, "failed to parse tlv %d\n", ret);
4824 return ret;
4825 }
4826
4827 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) {
4828 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle,
4829 svc_rdy_ext->soc_hal_reg_caps,
4830 svc_rdy_ext->ext_hal_reg_caps, i,
4831 ®_cap);
4832 if (ret) {
4833 ath12k_warn(soc, "failed to extract reg cap %d\n", i);
4834 return ret;
4835 }
4836
4837 if (reg_cap.phy_id >= MAX_RADIOS) {
4838 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id);
4839 return -EINVAL;
4840 }
4841
4842 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap;
4843 }
4844 return 0;
4845 }
4846
ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base * soc,u16 len,const void * ptr,void * data)4847 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc,
4848 u16 len, const void *ptr,
4849 void *data)
4850 {
4851 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0];
4852 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
4853 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id);
4854 u32 phy_id_map;
4855 int pdev_index = 0;
4856 int ret;
4857
4858 svc_rdy_ext->soc_hal_reg_caps = ptr;
4859 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy);
4860
4861 soc->num_radios = 0;
4862 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map);
4863 soc->fw_pdev_count = 0;
4864
4865 while (phy_id_map && soc->num_radios < MAX_RADIOS) {
4866 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle,
4867 svc_rdy_ext,
4868 hw_mode_id, soc->num_radios,
4869 &soc->pdevs[pdev_index]);
4870 if (ret) {
4871 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n",
4872 soc->num_radios);
4873 return ret;
4874 }
4875
4876 soc->num_radios++;
4877
4878 /* For single_pdev_only targets,
4879 * save mac_phy capability in the same pdev
4880 */
4881 if (soc->hw_params->single_pdev_only)
4882 pdev_index = 0;
4883 else
4884 pdev_index = soc->num_radios;
4885
4886 /* TODO: mac_phy_cap prints */
4887 phy_id_map >>= 1;
4888 }
4889
4890 if (soc->hw_params->single_pdev_only) {
4891 soc->num_radios = 1;
4892 soc->pdevs[0].pdev_id = 0;
4893 }
4894
4895 return 0;
4896 }
4897
ath12k_wmi_dma_ring_caps_parse(struct ath12k_base * soc,u16 tag,u16 len,const void * ptr,void * data)4898 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc,
4899 u16 tag, u16 len,
4900 const void *ptr, void *data)
4901 {
4902 struct ath12k_wmi_dma_ring_caps_parse *parse = data;
4903
4904 if (tag != WMI_TAG_DMA_RING_CAPABILITIES)
4905 return -EPROTO;
4906
4907 parse->n_dma_ring_caps++;
4908 return 0;
4909 }
4910
ath12k_wmi_alloc_dbring_caps(struct ath12k_base * ab,u32 num_cap)4911 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab,
4912 u32 num_cap)
4913 {
4914 size_t sz;
4915 void *ptr;
4916
4917 sz = num_cap * sizeof(struct ath12k_dbring_cap);
4918 ptr = kzalloc(sz, GFP_ATOMIC);
4919 if (!ptr)
4920 return -ENOMEM;
4921
4922 ab->db_caps = ptr;
4923 ab->num_db_cap = num_cap;
4924
4925 return 0;
4926 }
4927
ath12k_wmi_free_dbring_caps(struct ath12k_base * ab)4928 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab)
4929 {
4930 kfree(ab->db_caps);
4931 ab->db_caps = NULL;
4932 ab->num_db_cap = 0;
4933 }
4934
ath12k_wmi_dma_ring_caps(struct ath12k_base * ab,u16 len,const void * ptr,void * data)4935 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab,
4936 u16 len, const void *ptr, void *data)
4937 {
4938 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data;
4939 struct ath12k_wmi_dma_ring_caps_params *dma_caps;
4940 struct ath12k_dbring_cap *dir_buff_caps;
4941 int ret;
4942 u32 i;
4943
4944 dma_caps_parse->n_dma_ring_caps = 0;
4945 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr;
4946 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
4947 ath12k_wmi_dma_ring_caps_parse,
4948 dma_caps_parse);
4949 if (ret) {
4950 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret);
4951 return ret;
4952 }
4953
4954 if (!dma_caps_parse->n_dma_ring_caps)
4955 return 0;
4956
4957 if (ab->num_db_cap) {
4958 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n");
4959 return 0;
4960 }
4961
4962 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps);
4963 if (ret)
4964 return ret;
4965
4966 dir_buff_caps = ab->db_caps;
4967 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) {
4968 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) {
4969 ath12k_warn(ab, "Invalid module id %d\n",
4970 le32_to_cpu(dma_caps[i].module_id));
4971 ret = -EINVAL;
4972 goto free_dir_buff;
4973 }
4974
4975 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id);
4976 dir_buff_caps[i].pdev_id =
4977 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id));
4978 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem);
4979 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz);
4980 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align);
4981 }
4982
4983 return 0;
4984
4985 free_dir_buff:
4986 ath12k_wmi_free_dbring_caps(ab);
4987 return ret;
4988 }
4989
4990 static void
ath12k_wmi_save_mac_phy_info(struct ath12k_base * ab,const struct ath12k_wmi_mac_phy_caps_params * mac_phy_cap,struct ath12k_svc_ext_mac_phy_info * mac_phy_info)4991 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab,
4992 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap,
4993 struct ath12k_svc_ext_mac_phy_info *mac_phy_info)
4994 {
4995 mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id);
4996 mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands);
4997 mac_phy_info->hw_freq_range.low_2ghz_freq =
4998 __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq);
4999 mac_phy_info->hw_freq_range.high_2ghz_freq =
5000 __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq);
5001 mac_phy_info->hw_freq_range.low_5ghz_freq =
5002 __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq);
5003 mac_phy_info->hw_freq_range.high_5ghz_freq =
5004 __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq);
5005 }
5006
5007 static void
ath12k_wmi_save_all_mac_phy_info(struct ath12k_base * ab,struct ath12k_wmi_svc_rdy_ext_parse * svc_rdy_ext)5008 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab,
5009 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext)
5010 {
5011 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
5012 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap;
5013 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
5014 struct ath12k_svc_ext_mac_phy_info *mac_phy_info;
5015 u32 hw_mode_id, phy_bit_map;
5016 u8 hw_idx;
5017
5018 mac_phy_info = &svc_ext_info->mac_phy_info[0];
5019 mac_phy_cap = svc_rdy_ext->mac_phy_caps;
5020
5021 for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) {
5022 hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx];
5023 hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id);
5024 phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map);
5025
5026 while (phy_bit_map) {
5027 ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info);
5028 mac_phy_info->hw_mode_config_type =
5029 le32_get_bits(hw_mode_cap->hw_mode_config_type,
5030 WMI_HW_MODE_CAP_CFG_TYPE);
5031 ath12k_dbg(ab, ATH12K_DBG_WMI,
5032 "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n",
5033 hw_idx, hw_mode_id,
5034 mac_phy_info->hw_mode_config_type,
5035 mac_phy_info->supported_bands, mac_phy_info->phy_id,
5036 mac_phy_info->hw_freq_range.low_2ghz_freq,
5037 mac_phy_info->hw_freq_range.high_2ghz_freq,
5038 mac_phy_info->hw_freq_range.low_5ghz_freq,
5039 mac_phy_info->hw_freq_range.high_5ghz_freq);
5040
5041 mac_phy_cap++;
5042 mac_phy_info++;
5043
5044 phy_bit_map >>= 1;
5045 }
5046 }
5047 }
5048
ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5049 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
5050 u16 tag, u16 len,
5051 const void *ptr, void *data)
5052 {
5053 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
5054 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
5055 int ret;
5056
5057 switch (tag) {
5058 case WMI_TAG_SERVICE_READY_EXT_EVENT:
5059 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr,
5060 &svc_rdy_ext->arg);
5061 if (ret) {
5062 ath12k_warn(ab, "unable to extract ext params\n");
5063 return ret;
5064 }
5065 break;
5066
5067 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS:
5068 svc_rdy_ext->hw_caps = ptr;
5069 svc_rdy_ext->arg.num_hw_modes =
5070 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes);
5071 break;
5072
5073 case WMI_TAG_SOC_HAL_REG_CAPABILITIES:
5074 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr,
5075 svc_rdy_ext);
5076 if (ret)
5077 return ret;
5078 break;
5079
5080 case WMI_TAG_ARRAY_STRUCT:
5081 if (!svc_rdy_ext->hw_mode_done) {
5082 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext);
5083 if (ret)
5084 return ret;
5085
5086 svc_rdy_ext->hw_mode_done = true;
5087 } else if (!svc_rdy_ext->mac_phy_done) {
5088 svc_rdy_ext->n_mac_phy_caps = 0;
5089 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
5090 ath12k_wmi_mac_phy_caps_parse,
5091 svc_rdy_ext);
5092 if (ret) {
5093 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
5094 return ret;
5095 }
5096
5097 ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext);
5098
5099 svc_rdy_ext->mac_phy_done = true;
5100 } else if (!svc_rdy_ext->ext_hal_reg_done) {
5101 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);
5102 if (ret)
5103 return ret;
5104
5105 svc_rdy_ext->ext_hal_reg_done = true;
5106 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) {
5107 svc_rdy_ext->mac_phy_chainmask_combo_done = true;
5108 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) {
5109 svc_rdy_ext->mac_phy_chainmask_cap_done = true;
5110 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) {
5111 svc_rdy_ext->oem_dma_ring_cap_done = true;
5112 } else if (!svc_rdy_ext->dma_ring_cap_done) {
5113 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
5114 &svc_rdy_ext->dma_caps_parse);
5115 if (ret)
5116 return ret;
5117
5118 svc_rdy_ext->dma_ring_cap_done = true;
5119 }
5120 break;
5121
5122 default:
5123 break;
5124 }
5125 return 0;
5126 }
5127
ath12k_service_ready_ext_event(struct ath12k_base * ab,struct sk_buff * skb)5128 static int ath12k_service_ready_ext_event(struct ath12k_base *ab,
5129 struct sk_buff *skb)
5130 {
5131 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { };
5132 int ret;
5133
5134 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5135 ath12k_wmi_svc_rdy_ext_parse,
5136 &svc_rdy_ext);
5137 if (ret) {
5138 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
5139 goto err;
5140 }
5141
5142 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map))
5143 complete(&ab->wmi_ab.service_ready);
5144
5145 kfree(svc_rdy_ext.mac_phy_caps);
5146 return 0;
5147
5148 err:
5149 kfree(svc_rdy_ext.mac_phy_caps);
5150 ath12k_wmi_free_dbring_caps(ab);
5151 return ret;
5152 }
5153
ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev * wmi_handle,const void * ptr,struct ath12k_wmi_svc_rdy_ext2_arg * arg)5154 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle,
5155 const void *ptr,
5156 struct ath12k_wmi_svc_rdy_ext2_arg *arg)
5157 {
5158 const struct wmi_service_ready_ext2_event *ev = ptr;
5159
5160 if (!ev)
5161 return -EINVAL;
5162
5163 arg->reg_db_version = le32_to_cpu(ev->reg_db_version);
5164 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz);
5165 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz);
5166 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps);
5167 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw);
5168 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma);
5169 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo);
5170 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags);
5171 return 0;
5172 }
5173
ath12k_wmi_eht_caps_parse(struct ath12k_pdev * pdev,u32 band,const __le32 cap_mac_info[],const __le32 cap_phy_info[],const __le32 supp_mcs[],const struct ath12k_wmi_ppe_threshold_params * ppet,__le32 cap_info_internal)5174 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band,
5175 const __le32 cap_mac_info[],
5176 const __le32 cap_phy_info[],
5177 const __le32 supp_mcs[],
5178 const struct ath12k_wmi_ppe_threshold_params *ppet,
5179 __le32 cap_info_internal)
5180 {
5181 struct ath12k_band_cap *cap_band = &pdev->cap.band[band];
5182 u8 *phy_cap = (u8 *)&cap_band->eht_cap_phy_info[0];
5183 u32 support_320mhz;
5184 u8 i;
5185
5186 if (band == NL80211_BAND_6GHZ)
5187 support_320mhz = cap_band->eht_cap_phy_info[0] &
5188 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
5189
5190 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++)
5191 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]);
5192
5193 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++)
5194 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]);
5195
5196 if (band == NL80211_BAND_6GHZ) {
5197 cap_band->eht_cap_phy_info[0] |= support_320mhz;
5198 } else {
5199 /*
5200 * Firmware may report 6 GHz/320 MHz specific capabilities for
5201 * non-6 GHz bands, so explicitly clear them.
5202 */
5203 phy_cap[0] &= ~IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
5204 phy_cap[1] &= ~IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK;
5205 phy_cap[2] &= ~IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK;
5206 phy_cap[3] &= ~IEEE80211_EHT_PHY_CAP3_SOUNDING_DIM_320MHZ_MASK;
5207 phy_cap[6] &= ~IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_320MHZ;
5208 phy_cap[6] &= ~IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP;
5209 phy_cap[7] &= ~IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ;
5210 phy_cap[7] &= ~IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ;
5211 }
5212
5213 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]);
5214 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]);
5215 if (band != NL80211_BAND_2GHZ) {
5216 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]);
5217 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]);
5218 }
5219
5220 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1);
5221 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info);
5222 for (i = 0; i < WMI_MAX_NUM_SS; i++)
5223 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] =
5224 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]);
5225
5226 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal);
5227 }
5228
5229 static int
ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base * ab,const struct ath12k_wmi_caps_ext_params * caps,struct ath12k_pdev * pdev)5230 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab,
5231 const struct ath12k_wmi_caps_ext_params *caps,
5232 struct ath12k_pdev *pdev)
5233 {
5234 u32 bands;
5235 int i;
5236
5237 if (ab->hw_params->single_pdev_only) {
5238 for (i = 0; i < ab->fw_pdev_count; i++) {
5239 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i];
5240
5241 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) &&
5242 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) {
5243 bands = fw_pdev->supported_bands;
5244 break;
5245 }
5246 }
5247
5248 if (i == ab->fw_pdev_count)
5249 return -EINVAL;
5250 } else {
5251 bands = pdev->cap.supported_bands;
5252 }
5253
5254 if (bands & WMI_HOST_WLAN_2GHZ_CAP) {
5255 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ,
5256 caps->eht_cap_mac_info_2ghz,
5257 caps->eht_cap_phy_info_2ghz,
5258 caps->eht_supp_mcs_ext_2ghz,
5259 &caps->eht_ppet_2ghz,
5260 caps->eht_cap_info_internal);
5261 }
5262
5263 if (bands & WMI_HOST_WLAN_5GHZ_CAP) {
5264 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ,
5265 caps->eht_cap_mac_info_5ghz,
5266 caps->eht_cap_phy_info_5ghz,
5267 caps->eht_supp_mcs_ext_5ghz,
5268 &caps->eht_ppet_5ghz,
5269 caps->eht_cap_info_internal);
5270
5271 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ,
5272 caps->eht_cap_mac_info_5ghz,
5273 caps->eht_cap_phy_info_5ghz,
5274 caps->eht_supp_mcs_ext_5ghz,
5275 &caps->eht_ppet_5ghz,
5276 caps->eht_cap_info_internal);
5277 }
5278
5279 pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability);
5280 pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability);
5281
5282 return 0;
5283 }
5284
ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5285 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag,
5286 u16 len, const void *ptr,
5287 void *data)
5288 {
5289 const struct ath12k_wmi_caps_ext_params *caps = ptr;
5290 struct ath12k_band_cap *cap_band;
5291 u32 support_320mhz;
5292 int i = 0, ret;
5293
5294 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT)
5295 return -EPROTO;
5296
5297 if (ab->hw_params->single_pdev_only) {
5298 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) {
5299 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) &
5300 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ;
5301 cap_band = &ab->pdevs[0].cap.band[NL80211_BAND_6GHZ];
5302 cap_band->eht_cap_phy_info[0] |= support_320mhz;
5303 }
5304
5305 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id))
5306 return 0;
5307 } else {
5308 for (i = 0; i < ab->num_radios; i++) {
5309 if (ab->pdevs[i].pdev_id ==
5310 ath12k_wmi_caps_ext_get_pdev_id(caps))
5311 break;
5312 }
5313
5314 if (i == ab->num_radios)
5315 return -EINVAL;
5316 }
5317
5318 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]);
5319 if (ret) {
5320 ath12k_warn(ab,
5321 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n",
5322 ret, ab->pdevs[i].pdev_id);
5323 return ret;
5324 }
5325
5326 return 0;
5327 }
5328
5329 static void
ath12k_wmi_update_freq_info(struct ath12k_base * ab,struct ath12k_svc_ext_mac_phy_info * mac_cap,enum ath12k_hw_mode mode,u32 phy_id)5330 ath12k_wmi_update_freq_info(struct ath12k_base *ab,
5331 struct ath12k_svc_ext_mac_phy_info *mac_cap,
5332 enum ath12k_hw_mode mode,
5333 u32 phy_id)
5334 {
5335 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5336 struct ath12k_hw_mode_freq_range_arg *mac_range;
5337
5338 mac_range = &hw_mode_info->freq_range_caps[mode][phy_id];
5339
5340 if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) {
5341 mac_range->low_2ghz_freq = max_t(u32,
5342 mac_cap->hw_freq_range.low_2ghz_freq,
5343 ATH12K_MIN_2GHZ_FREQ);
5344 mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ?
5345 min_t(u32,
5346 mac_cap->hw_freq_range.high_2ghz_freq,
5347 ATH12K_MAX_2GHZ_FREQ) :
5348 ATH12K_MAX_2GHZ_FREQ;
5349 }
5350
5351 if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) {
5352 mac_range->low_5ghz_freq = max_t(u32,
5353 mac_cap->hw_freq_range.low_5ghz_freq,
5354 ATH12K_MIN_5GHZ_FREQ);
5355 mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ?
5356 min_t(u32,
5357 mac_cap->hw_freq_range.high_5ghz_freq,
5358 ATH12K_MAX_6GHZ_FREQ) :
5359 ATH12K_MAX_6GHZ_FREQ;
5360 }
5361 }
5362
5363 static bool
ath12k_wmi_all_phy_range_updated(struct ath12k_base * ab,enum ath12k_hw_mode hwmode)5364 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab,
5365 enum ath12k_hw_mode hwmode)
5366 {
5367 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5368 struct ath12k_hw_mode_freq_range_arg *mac_range;
5369 u8 phy_id;
5370
5371 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5372 mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id];
5373 /* modify SBS/DBS range only when both phy for DBS are filled */
5374 if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq)
5375 return false;
5376 }
5377
5378 return true;
5379 }
5380
ath12k_wmi_update_dbs_freq_info(struct ath12k_base * ab)5381 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab)
5382 {
5383 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5384 struct ath12k_hw_mode_freq_range_arg *mac_range;
5385 u8 phy_id;
5386
5387 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS];
5388 /* Reset 5 GHz range for shared mac for DBS */
5389 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5390 if (mac_range[phy_id].low_2ghz_freq &&
5391 mac_range[phy_id].low_5ghz_freq) {
5392 mac_range[phy_id].low_5ghz_freq = 0;
5393 mac_range[phy_id].high_5ghz_freq = 0;
5394 }
5395 }
5396 }
5397
5398 static u32
ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5399 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5400 {
5401 u32 highest_freq = 0;
5402 u8 phy_id;
5403
5404 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5405 if (range[phy_id].high_5ghz_freq > highest_freq)
5406 highest_freq = range[phy_id].high_5ghz_freq;
5407 }
5408
5409 return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ;
5410 }
5411
5412 static u32
ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg * range)5413 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range)
5414 {
5415 u32 lowest_freq = 0;
5416 u8 phy_id;
5417
5418 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5419 if ((!lowest_freq && range[phy_id].low_5ghz_freq) ||
5420 range[phy_id].low_5ghz_freq < lowest_freq)
5421 lowest_freq = range[phy_id].low_5ghz_freq;
5422 }
5423
5424 return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ;
5425 }
5426
5427 static void
ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5428 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab,
5429 u16 sbs_range_sep,
5430 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5431 {
5432 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5433 struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range;
5434 u8 phy_id;
5435
5436 upper_sbs_freq_range =
5437 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE];
5438
5439 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5440 upper_sbs_freq_range[phy_id].low_2ghz_freq =
5441 ref_freq[phy_id].low_2ghz_freq;
5442 upper_sbs_freq_range[phy_id].high_2ghz_freq =
5443 ref_freq[phy_id].high_2ghz_freq;
5444
5445 /* update for shared mac */
5446 if (upper_sbs_freq_range[phy_id].low_2ghz_freq) {
5447 upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5448 upper_sbs_freq_range[phy_id].high_5ghz_freq =
5449 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5450 } else {
5451 upper_sbs_freq_range[phy_id].low_5ghz_freq =
5452 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5453 upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5454 }
5455 }
5456 }
5457
5458 static void
ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base * ab,u16 sbs_range_sep,struct ath12k_hw_mode_freq_range_arg * ref_freq)5459 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab,
5460 u16 sbs_range_sep,
5461 struct ath12k_hw_mode_freq_range_arg *ref_freq)
5462 {
5463 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5464 struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range;
5465 u8 phy_id;
5466
5467 lower_sbs_freq_range =
5468 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE];
5469
5470 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5471 lower_sbs_freq_range[phy_id].low_2ghz_freq =
5472 ref_freq[phy_id].low_2ghz_freq;
5473 lower_sbs_freq_range[phy_id].high_2ghz_freq =
5474 ref_freq[phy_id].high_2ghz_freq;
5475
5476 /* update for shared mac */
5477 if (lower_sbs_freq_range[phy_id].low_2ghz_freq) {
5478 lower_sbs_freq_range[phy_id].low_5ghz_freq =
5479 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq);
5480 lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep;
5481 } else {
5482 lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10;
5483 lower_sbs_freq_range[phy_id].high_5ghz_freq =
5484 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq);
5485 }
5486 }
5487 }
5488
ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)5489 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode)
5490 {
5491 static const char * const mode_str[] = {
5492 [ATH12K_HW_MODE_SMM] = "SMM",
5493 [ATH12K_HW_MODE_DBS] = "DBS",
5494 [ATH12K_HW_MODE_SBS] = "SBS",
5495 [ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE",
5496 [ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE",
5497 };
5498
5499 if (hw_mode >= ARRAY_SIZE(mode_str))
5500 return "Unknown";
5501
5502 return mode_str[hw_mode];
5503 }
5504
5505 static void
ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base * ab,struct ath12k_hw_mode_freq_range_arg * freq_range,enum ath12k_hw_mode hw_mode)5506 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab,
5507 struct ath12k_hw_mode_freq_range_arg *freq_range,
5508 enum ath12k_hw_mode hw_mode)
5509 {
5510 u8 i;
5511
5512 for (i = 0; i < MAX_RADIOS; i++)
5513 if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq)
5514 ath12k_dbg(ab, ATH12K_DBG_WMI,
5515 "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5516 ath12k_wmi_hw_mode_to_str(hw_mode),
5517 hw_mode, i,
5518 freq_range[i].low_2ghz_freq,
5519 freq_range[i].high_2ghz_freq,
5520 freq_range[i].low_5ghz_freq,
5521 freq_range[i].high_5ghz_freq);
5522 }
5523
ath12k_wmi_dump_freq_range(struct ath12k_base * ab)5524 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab)
5525 {
5526 struct ath12k_hw_mode_freq_range_arg *freq_range;
5527 u8 i;
5528
5529 for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) {
5530 freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i];
5531 ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i);
5532 }
5533 }
5534
ath12k_wmi_modify_sbs_freq(struct ath12k_base * ab,u8 phy_id)5535 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id)
5536 {
5537 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5538 struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range;
5539 struct ath12k_hw_mode_freq_range_arg *non_shared_range;
5540 u8 shared_phy_id;
5541
5542 sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id];
5543
5544 /* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id
5545 * keep the range as it is in SBS
5546 */
5547 if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq)
5548 return 0;
5549
5550 if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) {
5551 ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz");
5552 ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS);
5553 return -EINVAL;
5554 }
5555
5556 non_shared_range = sbs_mac_range;
5557 /* if SBS mac range has only 5 GHz then it's the non-shared phy, so
5558 * modify the range as per the shared mac.
5559 */
5560 shared_phy_id = phy_id ? 0 : 1;
5561 shared_mac_range =
5562 &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id];
5563
5564 if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) {
5565 ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared");
5566 /* If the shared mac lower 5 GHz frequency is greater than
5567 * non-shared mac lower 5 GHz frequency then the shared mac has
5568 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high
5569 * freq should be less than the shared mac's low 5 GHz freq.
5570 */
5571 if (non_shared_range->high_5ghz_freq >=
5572 shared_mac_range->low_5ghz_freq)
5573 non_shared_range->high_5ghz_freq =
5574 max_t(u32, shared_mac_range->low_5ghz_freq - 10,
5575 non_shared_range->low_5ghz_freq);
5576 } else if (shared_mac_range->high_5ghz_freq <
5577 non_shared_range->high_5ghz_freq) {
5578 ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared");
5579 /* If the shared mac high 5 GHz frequency is less than
5580 * non-shared mac high 5 GHz frequency then the shared mac has
5581 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low
5582 * freq should be greater than the shared mac's high 5 GHz freq.
5583 */
5584 if (shared_mac_range->high_5ghz_freq >=
5585 non_shared_range->low_5ghz_freq)
5586 non_shared_range->low_5ghz_freq =
5587 min_t(u32, shared_mac_range->high_5ghz_freq + 10,
5588 non_shared_range->high_5ghz_freq);
5589 } else {
5590 ath12k_warn(ab, "invalid SBS range with all 5 GHz shared");
5591 return -EINVAL;
5592 }
5593
5594 return 0;
5595 }
5596
ath12k_wmi_update_sbs_freq_info(struct ath12k_base * ab)5597 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab)
5598 {
5599 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info;
5600 struct ath12k_hw_mode_freq_range_arg *mac_range;
5601 u16 sbs_range_sep;
5602 u8 phy_id;
5603 int ret;
5604
5605 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS];
5606
5607 /* If sbs_lower_band_end_freq has a value, then the frequency range
5608 * will be split using that value.
5609 */
5610 sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq;
5611 if (sbs_range_sep) {
5612 ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep,
5613 mac_range);
5614 ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep,
5615 mac_range);
5616 /* Hardware specifies the range boundary with sbs_range_sep,
5617 * (i.e. the boundary between 5 GHz high and 5 GHz low),
5618 * reset the original one to make sure it will not get used.
5619 */
5620 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5621 return;
5622 }
5623
5624 /* If sbs_lower_band_end_freq is not set that means firmware will send one
5625 * shared mac range and one non-shared mac range. so update that freq.
5626 */
5627 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) {
5628 ret = ath12k_wmi_modify_sbs_freq(ab, phy_id);
5629 if (ret) {
5630 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS);
5631 break;
5632 }
5633 }
5634 }
5635
5636 static void
ath12k_wmi_update_mac_freq_info(struct ath12k_base * ab,enum wmi_host_hw_mode_config_type hw_config_type,u32 phy_id,struct ath12k_svc_ext_mac_phy_info * mac_cap)5637 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab,
5638 enum wmi_host_hw_mode_config_type hw_config_type,
5639 u32 phy_id,
5640 struct ath12k_svc_ext_mac_phy_info *mac_cap)
5641 {
5642 if (phy_id >= MAX_RADIOS) {
5643 ath12k_err(ab, "mac more than two not supported: %d", phy_id);
5644 return;
5645 }
5646
5647 ath12k_dbg(ab, ATH12K_DBG_WMI,
5648 "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]",
5649 hw_config_type, phy_id, mac_cap->supported_bands,
5650 ab->wmi_ab.sbs_lower_band_end_freq,
5651 mac_cap->hw_freq_range.low_2ghz_freq,
5652 mac_cap->hw_freq_range.high_2ghz_freq,
5653 mac_cap->hw_freq_range.low_5ghz_freq,
5654 mac_cap->hw_freq_range.high_5ghz_freq);
5655
5656 switch (hw_config_type) {
5657 case WMI_HOST_HW_MODE_SINGLE:
5658 if (phy_id) {
5659 ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported");
5660 break;
5661 }
5662 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id);
5663 break;
5664
5665 case WMI_HOST_HW_MODE_DBS:
5666 if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5667 ath12k_wmi_update_freq_info(ab, mac_cap,
5668 ATH12K_HW_MODE_DBS, phy_id);
5669 break;
5670 case WMI_HOST_HW_MODE_DBS_SBS:
5671 case WMI_HOST_HW_MODE_DBS_OR_SBS:
5672 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id);
5673 if (ab->wmi_ab.sbs_lower_band_end_freq ||
5674 mac_cap->hw_freq_range.low_5ghz_freq ||
5675 mac_cap->hw_freq_range.low_2ghz_freq)
5676 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS,
5677 phy_id);
5678
5679 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS))
5680 ath12k_wmi_update_dbs_freq_info(ab);
5681 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5682 ath12k_wmi_update_sbs_freq_info(ab);
5683 break;
5684 case WMI_HOST_HW_MODE_SBS:
5685 case WMI_HOST_HW_MODE_SBS_PASSIVE:
5686 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id);
5687 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS))
5688 ath12k_wmi_update_sbs_freq_info(ab);
5689
5690 break;
5691 default:
5692 break;
5693 }
5694 }
5695
ath12k_wmi_sbs_range_present(struct ath12k_base * ab)5696 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab)
5697 {
5698 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) ||
5699 (ab->wmi_ab.sbs_lower_band_end_freq &&
5700 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) &&
5701 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE)))
5702 return true;
5703
5704 return false;
5705 }
5706
ath12k_wmi_update_hw_mode_list(struct ath12k_base * ab)5707 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab)
5708 {
5709 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
5710 struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info;
5711 enum wmi_host_hw_mode_config_type hw_config_type;
5712 struct ath12k_svc_ext_mac_phy_info *tmp;
5713 bool dbs_mode = false, sbs_mode = false;
5714 u32 i, j = 0;
5715
5716 if (!svc_ext_info->num_hw_modes) {
5717 ath12k_err(ab, "invalid number of hw modes");
5718 return -EINVAL;
5719 }
5720
5721 ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d",
5722 svc_ext_info->num_hw_modes);
5723
5724 memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps));
5725
5726 for (i = 0; i < svc_ext_info->num_hw_modes; i++) {
5727 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5728 return -EINVAL;
5729
5730 /* Update for MAC0 */
5731 tmp = &svc_ext_info->mac_phy_info[j++];
5732 hw_config_type = tmp->hw_mode_config_type;
5733 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp);
5734
5735 /* SBS and DBS have dual MAC. Up to 2 MACs are considered. */
5736 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5737 hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5738 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5739 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) {
5740 if (j >= ATH12K_MAX_MAC_PHY_CAP)
5741 return -EINVAL;
5742 /* Update for MAC1 */
5743 tmp = &svc_ext_info->mac_phy_info[j++];
5744 ath12k_wmi_update_mac_freq_info(ab, hw_config_type,
5745 tmp->phy_id, tmp);
5746
5747 if (hw_config_type == WMI_HOST_HW_MODE_DBS ||
5748 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)
5749 dbs_mode = true;
5750
5751 if (ath12k_wmi_sbs_range_present(ab) &&
5752 (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE ||
5753 hw_config_type == WMI_HOST_HW_MODE_SBS ||
5754 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS))
5755 sbs_mode = true;
5756 }
5757 }
5758
5759 info->support_dbs = dbs_mode;
5760 info->support_sbs = sbs_mode;
5761
5762 ath12k_wmi_dump_freq_range(ab);
5763
5764 return 0;
5765 }
5766
ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)5767 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab,
5768 u16 tag, u16 len,
5769 const void *ptr, void *data)
5770 {
5771 const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps;
5772 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0];
5773 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data;
5774 int ret;
5775
5776 switch (tag) {
5777 case WMI_TAG_SERVICE_READY_EXT2_EVENT:
5778 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr,
5779 &parse->arg);
5780 if (ret) {
5781 ath12k_warn(ab,
5782 "failed to extract wmi service ready ext2 parameters: %d\n",
5783 ret);
5784 return ret;
5785 }
5786
5787 ab->wmi_ab.dp_peer_meta_data_ver =
5788 u32_get_bits(parse->arg.target_cap_flags,
5789 WMI_TARGET_CAP_FLAGS_RX_PEER_METADATA_VERSION);
5790 break;
5791
5792 case WMI_TAG_ARRAY_STRUCT:
5793 if (!parse->dma_ring_cap_done) {
5794 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr,
5795 &parse->dma_caps_parse);
5796 if (ret)
5797 return ret;
5798
5799 parse->dma_ring_cap_done = true;
5800 } else if (!parse->spectral_bin_scaling_done) {
5801 /* TODO: This is a place-holder as WMI tag for
5802 * spectral scaling is before
5803 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT
5804 */
5805 parse->spectral_bin_scaling_done = true;
5806 } else if (!parse->mac_phy_caps_ext_done) {
5807 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
5808 ath12k_wmi_tlv_mac_phy_caps_ext,
5809 parse);
5810 if (ret) {
5811 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n",
5812 ret);
5813 return ret;
5814 }
5815
5816 parse->mac_phy_caps_ext_done = true;
5817 } else if (!parse->hal_reg_caps_ext2_done) {
5818 parse->hal_reg_caps_ext2_done = true;
5819 } else if (!parse->scan_radio_caps_ext2_done) {
5820 parse->scan_radio_caps_ext2_done = true;
5821 } else if (!parse->twt_caps_done) {
5822 parse->twt_caps_done = true;
5823 } else if (!parse->htt_msdu_idx_to_qtype_map_done) {
5824 parse->htt_msdu_idx_to_qtype_map_done = true;
5825 } else if (!parse->dbs_or_sbs_cap_ext_done) {
5826 dbs_or_sbs_caps = ptr;
5827 ab->wmi_ab.sbs_lower_band_end_freq =
5828 __le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq);
5829
5830 ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n",
5831 ab->wmi_ab.sbs_lower_band_end_freq);
5832
5833 ret = ath12k_wmi_update_hw_mode_list(ab);
5834 if (ret) {
5835 ath12k_warn(ab, "failed to update hw mode list: %d\n",
5836 ret);
5837 return ret;
5838 }
5839
5840 parse->dbs_or_sbs_cap_ext_done = true;
5841 }
5842
5843 break;
5844 default:
5845 break;
5846 }
5847
5848 return 0;
5849 }
5850
ath12k_service_ready_ext2_event(struct ath12k_base * ab,struct sk_buff * skb)5851 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab,
5852 struct sk_buff *skb)
5853 {
5854 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { };
5855 int ret;
5856
5857 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
5858 ath12k_wmi_svc_rdy_ext2_parse,
5859 &svc_rdy_ext2);
5860 if (ret) {
5861 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret);
5862 goto err;
5863 }
5864
5865 complete(&ab->wmi_ab.service_ready);
5866
5867 return 0;
5868
5869 err:
5870 ath12k_wmi_free_dbring_caps(ab);
5871 return ret;
5872 }
5873
ath12k_pull_vdev_start_resp_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_start_resp_event * vdev_rsp)5874 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb,
5875 struct wmi_vdev_start_resp_event *vdev_rsp)
5876 {
5877 const void **tb;
5878 const struct wmi_vdev_start_resp_event *ev;
5879 int ret;
5880
5881 tb = ath12k_wmi_tlv_parse(ab, skb);
5882 if (IS_ERR(tb)) {
5883 ret = PTR_ERR(tb);
5884 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5885 return ret;
5886 }
5887
5888 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT];
5889 if (!ev) {
5890 ath12k_warn(ab, "failed to fetch vdev start resp ev");
5891 return -EPROTO;
5892 }
5893
5894 *vdev_rsp = *ev;
5895
5896 return 0;
5897 }
5898
5899 static struct ath12k_reg_rule
create_ext_reg_rules_from_wmi(u32 num_reg_rules,struct ath12k_wmi_reg_rule_ext_params * wmi_reg_rule)5900 *create_ext_reg_rules_from_wmi(u32 num_reg_rules,
5901 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule)
5902 {
5903 struct ath12k_reg_rule *reg_rule_ptr;
5904 u32 count;
5905
5906 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)),
5907 GFP_ATOMIC);
5908
5909 if (!reg_rule_ptr)
5910 return NULL;
5911
5912 for (count = 0; count < num_reg_rules; count++) {
5913 reg_rule_ptr[count].start_freq =
5914 le32_get_bits(wmi_reg_rule[count].freq_info,
5915 REG_RULE_START_FREQ);
5916 reg_rule_ptr[count].end_freq =
5917 le32_get_bits(wmi_reg_rule[count].freq_info,
5918 REG_RULE_END_FREQ);
5919 reg_rule_ptr[count].max_bw =
5920 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5921 REG_RULE_MAX_BW);
5922 reg_rule_ptr[count].reg_power =
5923 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5924 REG_RULE_REG_PWR);
5925 reg_rule_ptr[count].ant_gain =
5926 le32_get_bits(wmi_reg_rule[count].bw_pwr_info,
5927 REG_RULE_ANT_GAIN);
5928 reg_rule_ptr[count].flags =
5929 le32_get_bits(wmi_reg_rule[count].flag_info,
5930 REG_RULE_FLAGS);
5931 reg_rule_ptr[count].psd_flag =
5932 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5933 REG_RULE_PSD_INFO);
5934 reg_rule_ptr[count].psd_eirp =
5935 le32_get_bits(wmi_reg_rule[count].psd_power_info,
5936 REG_RULE_PSD_EIRP);
5937 }
5938
5939 return reg_rule_ptr;
5940 }
5941
ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params * rule,u32 num_reg_rules)5942 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule,
5943 u32 num_reg_rules)
5944 {
5945 u8 num_invalid_5ghz_rules = 0;
5946 u32 count, start_freq;
5947
5948 for (count = 0; count < num_reg_rules; count++) {
5949 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ);
5950
5951 if (start_freq >= ATH12K_MIN_6GHZ_FREQ)
5952 num_invalid_5ghz_rules++;
5953 }
5954
5955 return num_invalid_5ghz_rules;
5956 }
5957
ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_reg_info * reg_info)5958 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab,
5959 struct sk_buff *skb,
5960 struct ath12k_reg_info *reg_info)
5961 {
5962 const void **tb;
5963 const struct wmi_reg_chan_list_cc_ext_event *ev;
5964 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule;
5965 u32 num_2g_reg_rules, num_5g_reg_rules;
5966 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE];
5967 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE];
5968 u8 num_invalid_5ghz_ext_rules;
5969 u32 total_reg_rules = 0;
5970 int ret, i, j;
5971
5972 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n");
5973
5974 tb = ath12k_wmi_tlv_parse(ab, skb);
5975 if (IS_ERR(tb)) {
5976 ret = PTR_ERR(tb);
5977 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
5978 return ret;
5979 }
5980
5981 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT];
5982 if (!ev) {
5983 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n");
5984 return -EPROTO;
5985 }
5986
5987 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules);
5988 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules);
5989 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] =
5990 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi);
5991 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] =
5992 le32_to_cpu(ev->num_6g_reg_rules_ap_sp);
5993 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] =
5994 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp);
5995
5996 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
5997 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
5998 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]);
5999 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
6000 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]);
6001 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
6002 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]);
6003 }
6004
6005 num_2g_reg_rules = reg_info->num_2g_reg_rules;
6006 total_reg_rules += num_2g_reg_rules;
6007 num_5g_reg_rules = reg_info->num_5g_reg_rules;
6008 total_reg_rules += num_5g_reg_rules;
6009
6010 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) {
6011 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n",
6012 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES);
6013 return -EINVAL;
6014 }
6015
6016 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
6017 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i];
6018
6019 if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) {
6020 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n",
6021 i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES);
6022 return -EINVAL;
6023 }
6024
6025 total_reg_rules += num_6g_reg_rules_ap[i];
6026 }
6027
6028 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6029 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] =
6030 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
6031 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i];
6032
6033 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] =
6034 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
6035 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i];
6036
6037 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] =
6038 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
6039 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i];
6040
6041 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES ||
6042 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES ||
6043 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) {
6044 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n",
6045 i);
6046 return -EINVAL;
6047 }
6048 }
6049
6050 if (!total_reg_rules) {
6051 ath12k_warn(ab, "No reg rules available\n");
6052 return -EINVAL;
6053 }
6054
6055 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN);
6056
6057 reg_info->dfs_region = le32_to_cpu(ev->dfs_region);
6058 reg_info->phybitmap = le32_to_cpu(ev->phybitmap);
6059 reg_info->num_phy = le32_to_cpu(ev->num_phy);
6060 reg_info->phy_id = le32_to_cpu(ev->phy_id);
6061 reg_info->ctry_code = le32_to_cpu(ev->country_id);
6062 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code);
6063
6064 switch (le32_to_cpu(ev->status_code)) {
6065 case WMI_REG_SET_CC_STATUS_PASS:
6066 reg_info->status_code = REG_SET_CC_STATUS_PASS;
6067 break;
6068 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND:
6069 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND;
6070 break;
6071 case WMI_REG_INIT_ALPHA2_NOT_FOUND:
6072 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND;
6073 break;
6074 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED:
6075 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED;
6076 break;
6077 case WMI_REG_SET_CC_STATUS_NO_MEMORY:
6078 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY;
6079 break;
6080 case WMI_REG_SET_CC_STATUS_FAIL:
6081 reg_info->status_code = REG_SET_CC_STATUS_FAIL;
6082 break;
6083 }
6084
6085 reg_info->is_ext_reg_event = true;
6086
6087 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g);
6088 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g);
6089 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g);
6090 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g);
6091 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi);
6092 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi);
6093 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp);
6094 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp);
6095 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp);
6096 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp);
6097
6098 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6099 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] =
6100 le32_to_cpu(ev->min_bw_6g_client_lpi[i]);
6101 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] =
6102 le32_to_cpu(ev->max_bw_6g_client_lpi[i]);
6103 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
6104 le32_to_cpu(ev->min_bw_6g_client_sp[i]);
6105 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] =
6106 le32_to_cpu(ev->max_bw_6g_client_sp[i]);
6107 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] =
6108 le32_to_cpu(ev->min_bw_6g_client_vlp[i]);
6109 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] =
6110 le32_to_cpu(ev->max_bw_6g_client_vlp[i]);
6111 }
6112
6113 ath12k_dbg(ab, ATH12K_DBG_WMI,
6114 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x",
6115 __func__, reg_info->alpha2, reg_info->dfs_region,
6116 reg_info->min_bw_2g, reg_info->max_bw_2g,
6117 reg_info->min_bw_5g, reg_info->max_bw_5g,
6118 reg_info->phybitmap);
6119
6120 ath12k_dbg(ab, ATH12K_DBG_WMI,
6121 "num_2g_reg_rules %d num_5g_reg_rules %d",
6122 num_2g_reg_rules, num_5g_reg_rules);
6123
6124 ath12k_dbg(ab, ATH12K_DBG_WMI,
6125 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d",
6126 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP],
6127 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP],
6128 num_6g_reg_rules_ap[WMI_REG_VLP_AP]);
6129
6130 ath12k_dbg(ab, ATH12K_DBG_WMI,
6131 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
6132 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT],
6133 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT],
6134 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]);
6135
6136 ath12k_dbg(ab, ATH12K_DBG_WMI,
6137 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d",
6138 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT],
6139 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT],
6140 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]);
6141
6142 ext_wmi_reg_rule =
6143 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev
6144 + sizeof(*ev)
6145 + sizeof(struct wmi_tlv));
6146
6147 if (num_2g_reg_rules) {
6148 reg_info->reg_rules_2g_ptr =
6149 create_ext_reg_rules_from_wmi(num_2g_reg_rules,
6150 ext_wmi_reg_rule);
6151
6152 if (!reg_info->reg_rules_2g_ptr) {
6153 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n");
6154 return -ENOMEM;
6155 }
6156 }
6157
6158 ext_wmi_reg_rule += num_2g_reg_rules;
6159
6160 /* Firmware might include 6 GHz reg rule in 5 GHz rule list
6161 * for few countries along with separate 6 GHz rule.
6162 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list
6163 * causes intersect check to be true, and same rules will be
6164 * shown multiple times in iw cmd.
6165 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list
6166 */
6167 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule,
6168 num_5g_reg_rules);
6169
6170 if (num_invalid_5ghz_ext_rules) {
6171 ath12k_dbg(ab, ATH12K_DBG_WMI,
6172 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules",
6173 reg_info->alpha2, reg_info->num_5g_reg_rules,
6174 num_invalid_5ghz_ext_rules);
6175
6176 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules;
6177 reg_info->num_5g_reg_rules = num_5g_reg_rules;
6178 }
6179
6180 if (num_5g_reg_rules) {
6181 reg_info->reg_rules_5g_ptr =
6182 create_ext_reg_rules_from_wmi(num_5g_reg_rules,
6183 ext_wmi_reg_rule);
6184
6185 if (!reg_info->reg_rules_5g_ptr) {
6186 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n");
6187 return -ENOMEM;
6188 }
6189 }
6190
6191 /* We have adjusted the number of 5 GHz reg rules above. But still those
6192 * many rules needs to be adjusted in ext_wmi_reg_rule.
6193 *
6194 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases.
6195 */
6196 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules);
6197
6198 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) {
6199 reg_info->reg_rules_6g_ap_ptr[i] =
6200 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i],
6201 ext_wmi_reg_rule);
6202
6203 if (!reg_info->reg_rules_6g_ap_ptr[i]) {
6204 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n");
6205 return -ENOMEM;
6206 }
6207
6208 ext_wmi_reg_rule += num_6g_reg_rules_ap[i];
6209 }
6210
6211 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) {
6212 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6213 reg_info->reg_rules_6g_client_ptr[j][i] =
6214 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i],
6215 ext_wmi_reg_rule);
6216
6217 if (!reg_info->reg_rules_6g_client_ptr[j][i]) {
6218 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n");
6219 return -ENOMEM;
6220 }
6221
6222 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i];
6223 }
6224 }
6225
6226 reg_info->client_type = le32_to_cpu(ev->client_type);
6227 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable;
6228 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable;
6229 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] =
6230 le32_to_cpu(ev->domain_code_6g_ap_lpi);
6231 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] =
6232 le32_to_cpu(ev->domain_code_6g_ap_sp);
6233 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] =
6234 le32_to_cpu(ev->domain_code_6g_ap_vlp);
6235
6236 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) {
6237 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] =
6238 le32_to_cpu(ev->domain_code_6g_client_lpi[i]);
6239 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] =
6240 le32_to_cpu(ev->domain_code_6g_client_sp[i]);
6241 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] =
6242 le32_to_cpu(ev->domain_code_6g_client_vlp[i]);
6243 }
6244
6245 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id);
6246
6247 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d",
6248 reg_info->client_type, reg_info->domain_code_6g_super_id);
6249
6250 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n");
6251
6252 return 0;
6253 }
6254
ath12k_pull_peer_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_delete_resp_event * peer_del_resp)6255 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb,
6256 struct wmi_peer_delete_resp_event *peer_del_resp)
6257 {
6258 const void **tb;
6259 const struct wmi_peer_delete_resp_event *ev;
6260 int ret;
6261
6262 tb = ath12k_wmi_tlv_parse(ab, skb);
6263 if (IS_ERR(tb)) {
6264 ret = PTR_ERR(tb);
6265 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6266 return ret;
6267 }
6268
6269 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT];
6270 if (!ev) {
6271 ath12k_warn(ab, "failed to fetch peer delete resp ev");
6272 return -EPROTO;
6273 }
6274
6275 memset(peer_del_resp, 0, sizeof(*peer_del_resp));
6276
6277 peer_del_resp->vdev_id = ev->vdev_id;
6278 ether_addr_copy(peer_del_resp->peer_macaddr.addr,
6279 ev->peer_macaddr.addr);
6280
6281 return 0;
6282 }
6283
ath12k_pull_vdev_del_resp_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6284 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab,
6285 struct sk_buff *skb,
6286 u32 *vdev_id)
6287 {
6288 const void **tb;
6289 const struct wmi_vdev_delete_resp_event *ev;
6290 int ret;
6291
6292 tb = ath12k_wmi_tlv_parse(ab, skb);
6293 if (IS_ERR(tb)) {
6294 ret = PTR_ERR(tb);
6295 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6296 return ret;
6297 }
6298
6299 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT];
6300 if (!ev) {
6301 ath12k_warn(ab, "failed to fetch vdev delete resp ev");
6302 return -EPROTO;
6303 }
6304
6305 *vdev_id = le32_to_cpu(ev->vdev_id);
6306
6307 return 0;
6308 }
6309
ath12k_pull_bcn_tx_status_ev(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id,u32 * tx_status)6310 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab,
6311 struct sk_buff *skb,
6312 u32 *vdev_id, u32 *tx_status)
6313 {
6314 const void **tb;
6315 const struct wmi_bcn_tx_status_event *ev;
6316 int ret;
6317
6318 tb = ath12k_wmi_tlv_parse(ab, skb);
6319 if (IS_ERR(tb)) {
6320 ret = PTR_ERR(tb);
6321 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6322 return ret;
6323 }
6324
6325 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT];
6326 if (!ev) {
6327 ath12k_warn(ab, "failed to fetch bcn tx status ev");
6328 return -EPROTO;
6329 }
6330
6331 *vdev_id = le32_to_cpu(ev->vdev_id);
6332 *tx_status = le32_to_cpu(ev->tx_status);
6333
6334 return 0;
6335 }
6336
ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,u32 * vdev_id)6337 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb,
6338 u32 *vdev_id)
6339 {
6340 const void **tb;
6341 const struct wmi_vdev_stopped_event *ev;
6342 int ret;
6343
6344 tb = ath12k_wmi_tlv_parse(ab, skb);
6345 if (IS_ERR(tb)) {
6346 ret = PTR_ERR(tb);
6347 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6348 return ret;
6349 }
6350
6351 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT];
6352 if (!ev) {
6353 ath12k_warn(ab, "failed to fetch vdev stop ev");
6354 return -EPROTO;
6355 }
6356
6357 *vdev_id = le32_to_cpu(ev->vdev_id);
6358
6359 return 0;
6360 }
6361
ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)6362 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab,
6363 u16 tag, u16 len,
6364 const void *ptr, void *data)
6365 {
6366 struct wmi_tlv_mgmt_rx_parse *parse = data;
6367
6368 switch (tag) {
6369 case WMI_TAG_MGMT_RX_HDR:
6370 parse->fixed = ptr;
6371 break;
6372 case WMI_TAG_ARRAY_BYTE:
6373 if (!parse->frame_buf_done) {
6374 parse->frame_buf = ptr;
6375 parse->frame_buf_done = true;
6376 }
6377 break;
6378 }
6379 return 0;
6380 }
6381
ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_wmi_mgmt_rx_arg * hdr)6382 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
6383 struct sk_buff *skb,
6384 struct ath12k_wmi_mgmt_rx_arg *hdr)
6385 {
6386 struct wmi_tlv_mgmt_rx_parse parse = { };
6387 const struct ath12k_wmi_mgmt_rx_params *ev;
6388 const u8 *frame;
6389 int i, ret;
6390
6391 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
6392 ath12k_wmi_tlv_mgmt_rx_parse,
6393 &parse);
6394 if (ret) {
6395 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret);
6396 return ret;
6397 }
6398
6399 ev = parse.fixed;
6400 frame = parse.frame_buf;
6401
6402 if (!ev || !frame) {
6403 ath12k_warn(ab, "failed to fetch mgmt rx hdr");
6404 return -EPROTO;
6405 }
6406
6407 hdr->pdev_id = le32_to_cpu(ev->pdev_id);
6408 hdr->chan_freq = le32_to_cpu(ev->chan_freq);
6409 hdr->channel = le32_to_cpu(ev->channel);
6410 hdr->snr = le32_to_cpu(ev->snr);
6411 hdr->rate = le32_to_cpu(ev->rate);
6412 hdr->phy_mode = le32_to_cpu(ev->phy_mode);
6413 hdr->buf_len = le32_to_cpu(ev->buf_len);
6414 hdr->status = le32_to_cpu(ev->status);
6415 hdr->flags = le32_to_cpu(ev->flags);
6416 hdr->rssi = a_sle32_to_cpu(ev->rssi);
6417 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta);
6418
6419 for (i = 0; i < ATH_MAX_ANTENNA; i++)
6420 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]);
6421
6422 if (skb->len < (frame - skb->data) + hdr->buf_len) {
6423 ath12k_warn(ab, "invalid length in mgmt rx hdr ev");
6424 return -EPROTO;
6425 }
6426
6427 /* shift the sk_buff to point to `frame` */
6428 skb_trim(skb, 0);
6429 skb_put(skb, frame - skb->data);
6430 skb_pull(skb, frame - skb->data);
6431 skb_put(skb, hdr->buf_len);
6432
6433 return 0;
6434 }
6435
wmi_process_mgmt_tx_comp(struct ath12k * ar,u32 desc_id,u32 status,u32 ack_rssi)6436 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
6437 u32 status, u32 ack_rssi)
6438 {
6439 struct sk_buff *msdu;
6440 struct ieee80211_tx_info *info;
6441 struct ath12k_skb_cb *skb_cb;
6442 int num_mgmt;
6443
6444 spin_lock_bh(&ar->txmgmt_idr_lock);
6445 msdu = idr_find(&ar->txmgmt_idr, desc_id);
6446
6447 if (!msdu) {
6448 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n",
6449 desc_id);
6450 spin_unlock_bh(&ar->txmgmt_idr_lock);
6451 return -ENOENT;
6452 }
6453
6454 idr_remove(&ar->txmgmt_idr, desc_id);
6455 spin_unlock_bh(&ar->txmgmt_idr_lock);
6456
6457 skb_cb = ATH12K_SKB_CB(msdu);
6458 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
6459
6460 info = IEEE80211_SKB_CB(msdu);
6461 memset(&info->status, 0, sizeof(info->status));
6462
6463 /* skip tx rate update from ieee80211_status*/
6464 info->status.rates[0].idx = -1;
6465
6466 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) {
6467 info->flags |= IEEE80211_TX_STAT_ACK;
6468 info->status.ack_signal = ack_rssi;
6469 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
6470 }
6471
6472 if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status)
6473 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
6474
6475 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu);
6476
6477 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx);
6478
6479 /* WARN when we received this event without doing any mgmt tx */
6480 if (num_mgmt < 0)
6481 WARN_ON_ONCE(1);
6482
6483 if (!num_mgmt)
6484 wake_up(&ar->txmgmt_empty_waitq);
6485
6486 return 0;
6487 }
6488
ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_mgmt_tx_compl_event * param)6489 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
6490 struct sk_buff *skb,
6491 struct wmi_mgmt_tx_compl_event *param)
6492 {
6493 const void **tb;
6494 const struct wmi_mgmt_tx_compl_event *ev;
6495 int ret;
6496
6497 tb = ath12k_wmi_tlv_parse(ab, skb);
6498 if (IS_ERR(tb)) {
6499 ret = PTR_ERR(tb);
6500 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6501 return ret;
6502 }
6503
6504 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT];
6505 if (!ev) {
6506 ath12k_warn(ab, "failed to fetch mgmt tx compl ev");
6507 return -EPROTO;
6508 }
6509
6510 param->pdev_id = ev->pdev_id;
6511 param->desc_id = ev->desc_id;
6512 param->status = ev->status;
6513 param->ppdu_id = ev->ppdu_id;
6514 param->ack_rssi = ev->ack_rssi;
6515
6516 return 0;
6517 }
6518
ath12k_wmi_event_scan_started(struct ath12k * ar)6519 static void ath12k_wmi_event_scan_started(struct ath12k *ar)
6520 {
6521 lockdep_assert_held(&ar->data_lock);
6522
6523 switch (ar->scan.state) {
6524 case ATH12K_SCAN_IDLE:
6525 case ATH12K_SCAN_RUNNING:
6526 case ATH12K_SCAN_ABORTING:
6527 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n",
6528 ath12k_scan_state_str(ar->scan.state),
6529 ar->scan.state);
6530 break;
6531 case ATH12K_SCAN_STARTING:
6532 ar->scan.state = ATH12K_SCAN_RUNNING;
6533
6534 if (ar->scan.is_roc)
6535 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar));
6536
6537 complete(&ar->scan.started);
6538 break;
6539 }
6540 }
6541
ath12k_wmi_event_scan_start_failed(struct ath12k * ar)6542 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar)
6543 {
6544 lockdep_assert_held(&ar->data_lock);
6545
6546 switch (ar->scan.state) {
6547 case ATH12K_SCAN_IDLE:
6548 case ATH12K_SCAN_RUNNING:
6549 case ATH12K_SCAN_ABORTING:
6550 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n",
6551 ath12k_scan_state_str(ar->scan.state),
6552 ar->scan.state);
6553 break;
6554 case ATH12K_SCAN_STARTING:
6555 complete(&ar->scan.started);
6556 __ath12k_mac_scan_finish(ar);
6557 break;
6558 }
6559 }
6560
ath12k_wmi_event_scan_completed(struct ath12k * ar)6561 static void ath12k_wmi_event_scan_completed(struct ath12k *ar)
6562 {
6563 lockdep_assert_held(&ar->data_lock);
6564
6565 switch (ar->scan.state) {
6566 case ATH12K_SCAN_IDLE:
6567 case ATH12K_SCAN_STARTING:
6568 /* One suspected reason scan can be completed while starting is
6569 * if firmware fails to deliver all scan events to the host,
6570 * e.g. when transport pipe is full. This has been observed
6571 * with spectral scan phyerr events starving wmi transport
6572 * pipe. In such case the "scan completed" event should be (and
6573 * is) ignored by the host as it may be just firmware's scan
6574 * state machine recovering.
6575 */
6576 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n",
6577 ath12k_scan_state_str(ar->scan.state),
6578 ar->scan.state);
6579 break;
6580 case ATH12K_SCAN_RUNNING:
6581 case ATH12K_SCAN_ABORTING:
6582 __ath12k_mac_scan_finish(ar);
6583 break;
6584 }
6585 }
6586
ath12k_wmi_event_scan_bss_chan(struct ath12k * ar)6587 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar)
6588 {
6589 lockdep_assert_held(&ar->data_lock);
6590
6591 switch (ar->scan.state) {
6592 case ATH12K_SCAN_IDLE:
6593 case ATH12K_SCAN_STARTING:
6594 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n",
6595 ath12k_scan_state_str(ar->scan.state),
6596 ar->scan.state);
6597 break;
6598 case ATH12K_SCAN_RUNNING:
6599 case ATH12K_SCAN_ABORTING:
6600 ar->scan_channel = NULL;
6601 break;
6602 }
6603 }
6604
ath12k_wmi_event_scan_foreign_chan(struct ath12k * ar,u32 freq)6605 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq)
6606 {
6607 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar);
6608
6609 lockdep_assert_held(&ar->data_lock);
6610
6611 switch (ar->scan.state) {
6612 case ATH12K_SCAN_IDLE:
6613 case ATH12K_SCAN_STARTING:
6614 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
6615 ath12k_scan_state_str(ar->scan.state),
6616 ar->scan.state);
6617 break;
6618 case ATH12K_SCAN_RUNNING:
6619 case ATH12K_SCAN_ABORTING:
6620 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq);
6621
6622 if (ar->scan.is_roc && ar->scan.roc_freq == freq)
6623 complete(&ar->scan.on_channel);
6624
6625 break;
6626 }
6627 }
6628
6629 static const char *
ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)6630 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
6631 enum wmi_scan_completion_reason reason)
6632 {
6633 switch (type) {
6634 case WMI_SCAN_EVENT_STARTED:
6635 return "started";
6636 case WMI_SCAN_EVENT_COMPLETED:
6637 switch (reason) {
6638 case WMI_SCAN_REASON_COMPLETED:
6639 return "completed";
6640 case WMI_SCAN_REASON_CANCELLED:
6641 return "completed [cancelled]";
6642 case WMI_SCAN_REASON_PREEMPTED:
6643 return "completed [preempted]";
6644 case WMI_SCAN_REASON_TIMEDOUT:
6645 return "completed [timedout]";
6646 case WMI_SCAN_REASON_INTERNAL_FAILURE:
6647 return "completed [internal err]";
6648 case WMI_SCAN_REASON_MAX:
6649 break;
6650 }
6651 return "completed [unknown]";
6652 case WMI_SCAN_EVENT_BSS_CHANNEL:
6653 return "bss channel";
6654 case WMI_SCAN_EVENT_FOREIGN_CHAN:
6655 return "foreign channel";
6656 case WMI_SCAN_EVENT_DEQUEUED:
6657 return "dequeued";
6658 case WMI_SCAN_EVENT_PREEMPTED:
6659 return "preempted";
6660 case WMI_SCAN_EVENT_START_FAILED:
6661 return "start failed";
6662 case WMI_SCAN_EVENT_RESTARTED:
6663 return "restarted";
6664 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
6665 return "foreign channel exit";
6666 default:
6667 return "unknown";
6668 }
6669 }
6670
ath12k_pull_scan_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_scan_event * scan_evt_param)6671 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb,
6672 struct wmi_scan_event *scan_evt_param)
6673 {
6674 const void **tb;
6675 const struct wmi_scan_event *ev;
6676 int ret;
6677
6678 tb = ath12k_wmi_tlv_parse(ab, skb);
6679 if (IS_ERR(tb)) {
6680 ret = PTR_ERR(tb);
6681 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6682 return ret;
6683 }
6684
6685 ev = tb[WMI_TAG_SCAN_EVENT];
6686 if (!ev) {
6687 ath12k_warn(ab, "failed to fetch scan ev");
6688 return -EPROTO;
6689 }
6690
6691 scan_evt_param->event_type = ev->event_type;
6692 scan_evt_param->reason = ev->reason;
6693 scan_evt_param->channel_freq = ev->channel_freq;
6694 scan_evt_param->scan_req_id = ev->scan_req_id;
6695 scan_evt_param->scan_id = ev->scan_id;
6696 scan_evt_param->vdev_id = ev->vdev_id;
6697 scan_evt_param->tsf_timestamp = ev->tsf_timestamp;
6698
6699 return 0;
6700 }
6701
ath12k_pull_peer_sta_kickout_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_sta_kickout_arg * arg)6702 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb,
6703 struct wmi_peer_sta_kickout_arg *arg)
6704 {
6705 const void **tb;
6706 const struct wmi_peer_sta_kickout_event *ev;
6707 int ret;
6708
6709 tb = ath12k_wmi_tlv_parse(ab, skb);
6710 if (IS_ERR(tb)) {
6711 ret = PTR_ERR(tb);
6712 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6713 return ret;
6714 }
6715
6716 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT];
6717 if (!ev) {
6718 ath12k_warn(ab, "failed to fetch peer sta kickout ev");
6719 return -EPROTO;
6720 }
6721
6722 arg->mac_addr = ev->peer_macaddr.addr;
6723 arg->reason = le32_to_cpu(ev->reason);
6724 arg->rssi = le32_to_cpu(ev->rssi);
6725
6726 return 0;
6727 }
6728
ath12k_pull_roam_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_roam_event * roam_ev)6729 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb,
6730 struct wmi_roam_event *roam_ev)
6731 {
6732 const void **tb;
6733 const struct wmi_roam_event *ev;
6734 int ret;
6735
6736 tb = ath12k_wmi_tlv_parse(ab, skb);
6737 if (IS_ERR(tb)) {
6738 ret = PTR_ERR(tb);
6739 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6740 return ret;
6741 }
6742
6743 ev = tb[WMI_TAG_ROAM_EVENT];
6744 if (!ev) {
6745 ath12k_warn(ab, "failed to fetch roam ev");
6746 return -EPROTO;
6747 }
6748
6749 roam_ev->vdev_id = ev->vdev_id;
6750 roam_ev->reason = ev->reason;
6751 roam_ev->rssi = ev->rssi;
6752
6753 return 0;
6754 }
6755
freq_to_idx(struct ieee80211_hw * hw,int freq)6756 static int freq_to_idx(struct ieee80211_hw *hw, int freq)
6757 {
6758 struct ieee80211_supported_band *sband;
6759 int band, ch, idx = 0;
6760
6761 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
6762 sband = hw->wiphy->bands[band];
6763 if (!sband)
6764 continue;
6765
6766 for (ch = 0; ch < sband->n_channels; ch++, idx++)
6767 if (sband->channels[ch].center_freq == freq)
6768 goto exit;
6769 }
6770
6771 exit:
6772 return idx;
6773 }
6774
ath12k_pull_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_chan_info_event * ch_info_ev)6775 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6776 struct wmi_chan_info_event *ch_info_ev)
6777 {
6778 const void **tb;
6779 const struct wmi_chan_info_event *ev;
6780 int ret;
6781
6782 tb = ath12k_wmi_tlv_parse(ab, skb);
6783 if (IS_ERR(tb)) {
6784 ret = PTR_ERR(tb);
6785 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6786 return ret;
6787 }
6788
6789 ev = tb[WMI_TAG_CHAN_INFO_EVENT];
6790 if (!ev) {
6791 ath12k_warn(ab, "failed to fetch chan info ev");
6792 return -EPROTO;
6793 }
6794
6795 ch_info_ev->err_code = ev->err_code;
6796 ch_info_ev->freq = ev->freq;
6797 ch_info_ev->cmd_flags = ev->cmd_flags;
6798 ch_info_ev->noise_floor = ev->noise_floor;
6799 ch_info_ev->rx_clear_count = ev->rx_clear_count;
6800 ch_info_ev->cycle_count = ev->cycle_count;
6801 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range;
6802 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
6803 ch_info_ev->rx_frame_count = ev->rx_frame_count;
6804 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt;
6805 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz;
6806 ch_info_ev->vdev_id = ev->vdev_id;
6807
6808 return 0;
6809 }
6810
6811 static int
ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_pdev_bss_chan_info_event * bss_ch_info_ev)6812 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb,
6813 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev)
6814 {
6815 const void **tb;
6816 const struct wmi_pdev_bss_chan_info_event *ev;
6817 int ret;
6818
6819 tb = ath12k_wmi_tlv_parse(ab, skb);
6820 if (IS_ERR(tb)) {
6821 ret = PTR_ERR(tb);
6822 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6823 return ret;
6824 }
6825
6826 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT];
6827 if (!ev) {
6828 ath12k_warn(ab, "failed to fetch pdev bss chan info ev");
6829 return -EPROTO;
6830 }
6831
6832 bss_ch_info_ev->pdev_id = ev->pdev_id;
6833 bss_ch_info_ev->freq = ev->freq;
6834 bss_ch_info_ev->noise_floor = ev->noise_floor;
6835 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low;
6836 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high;
6837 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low;
6838 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high;
6839 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low;
6840 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high;
6841 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low;
6842 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high;
6843 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low;
6844 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high;
6845
6846 return 0;
6847 }
6848
6849 static int
ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_vdev_install_key_complete_arg * arg)6850 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb,
6851 struct wmi_vdev_install_key_complete_arg *arg)
6852 {
6853 const void **tb;
6854 const struct wmi_vdev_install_key_compl_event *ev;
6855 int ret;
6856
6857 tb = ath12k_wmi_tlv_parse(ab, skb);
6858 if (IS_ERR(tb)) {
6859 ret = PTR_ERR(tb);
6860 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6861 return ret;
6862 }
6863
6864 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT];
6865 if (!ev) {
6866 ath12k_warn(ab, "failed to fetch vdev install key compl ev");
6867 return -EPROTO;
6868 }
6869
6870 arg->vdev_id = le32_to_cpu(ev->vdev_id);
6871 arg->macaddr = ev->peer_macaddr.addr;
6872 arg->key_idx = le32_to_cpu(ev->key_idx);
6873 arg->key_flags = le32_to_cpu(ev->key_flags);
6874 arg->status = le32_to_cpu(ev->status);
6875
6876 return 0;
6877 }
6878
ath12k_pull_peer_assoc_conf_ev(struct ath12k_base * ab,struct sk_buff * skb,struct wmi_peer_assoc_conf_arg * peer_assoc_conf)6879 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb,
6880 struct wmi_peer_assoc_conf_arg *peer_assoc_conf)
6881 {
6882 const void **tb;
6883 const struct wmi_peer_assoc_conf_event *ev;
6884 int ret;
6885
6886 tb = ath12k_wmi_tlv_parse(ab, skb);
6887 if (IS_ERR(tb)) {
6888 ret = PTR_ERR(tb);
6889 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6890 return ret;
6891 }
6892
6893 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT];
6894 if (!ev) {
6895 ath12k_warn(ab, "failed to fetch peer assoc conf ev");
6896 return -EPROTO;
6897 }
6898
6899 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id);
6900 peer_assoc_conf->macaddr = ev->peer_macaddr.addr;
6901
6902 return 0;
6903 }
6904
ath12k_wmi_op_ep_tx_credits(struct ath12k_base * ab)6905 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab)
6906 {
6907 /* try to send pending beacons first. they take priority */
6908 wake_up(&ab->wmi_ab.tx_credits_wq);
6909 }
6910
ath12k_reg_11d_new_cc_event(struct ath12k_base * ab,struct sk_buff * skb)6911 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb)
6912 {
6913 const struct wmi_11d_new_cc_event *ev;
6914 struct ath12k *ar;
6915 struct ath12k_pdev *pdev;
6916 const void **tb;
6917 int ret, i;
6918
6919 tb = ath12k_wmi_tlv_parse(ab, skb);
6920 if (IS_ERR(tb)) {
6921 ret = PTR_ERR(tb);
6922 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
6923 return ret;
6924 }
6925
6926 ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT];
6927 if (!ev) {
6928 ath12k_warn(ab, "failed to fetch 11d new cc ev");
6929 return -EPROTO;
6930 }
6931
6932 spin_lock_bh(&ab->base_lock);
6933 memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN);
6934 spin_unlock_bh(&ab->base_lock);
6935
6936 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n",
6937 ab->new_alpha2[0],
6938 ab->new_alpha2[1]);
6939
6940 for (i = 0; i < ab->num_radios; i++) {
6941 pdev = &ab->pdevs[i];
6942 ar = pdev->ar;
6943 ar->state_11d = ATH12K_11D_IDLE;
6944 ar->ah->regd_updated = false;
6945 complete(&ar->completed_11d_scan);
6946 }
6947
6948 queue_work(ab->workqueue, &ab->update_11d_work);
6949
6950 return 0;
6951 }
6952
ath12k_wmi_htc_tx_complete(struct ath12k_base * ab,struct sk_buff * skb)6953 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab,
6954 struct sk_buff *skb)
6955 {
6956 dev_kfree_skb(skb);
6957 }
6958
ath12k_reg_chan_list_event(struct ath12k_base * ab,struct sk_buff * skb)6959 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb)
6960 {
6961 struct ath12k_reg_info *reg_info;
6962 struct ath12k *ar = NULL;
6963 u8 pdev_idx = 255;
6964 int ret;
6965
6966 reg_info = kzalloc_obj(*reg_info, GFP_ATOMIC);
6967 if (!reg_info) {
6968 ret = -ENOMEM;
6969 goto fallback;
6970 }
6971
6972 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info);
6973 if (ret) {
6974 ath12k_warn(ab, "failed to extract regulatory info from received event\n");
6975 goto mem_free;
6976 }
6977
6978 ret = ath12k_reg_validate_reg_info(ab, reg_info);
6979 if (ret == ATH12K_REG_STATUS_FALLBACK) {
6980 ath12k_warn(ab, "failed to validate reg info %d\n", ret);
6981 /* firmware has successfully switches to new regd but host can not
6982 * continue, so free reginfo and fallback to old regd
6983 */
6984 goto mem_free;
6985 } else if (ret == ATH12K_REG_STATUS_DROP) {
6986 /* reg info is valid but we will not store it and
6987 * not going to create new regd for it
6988 */
6989 ret = ATH12K_REG_STATUS_VALID;
6990 goto mem_free;
6991 }
6992
6993 /* free old reg_info if it exist */
6994 pdev_idx = reg_info->phy_id;
6995 if (ab->reg_info[pdev_idx]) {
6996 ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]);
6997 kfree(ab->reg_info[pdev_idx]);
6998 }
6999 /* reg_info is valid, we store it for later use
7000 * even below regd build failed
7001 */
7002 ab->reg_info[pdev_idx] = reg_info;
7003
7004 ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC,
7005 IEEE80211_REG_UNSET_AP);
7006 if (ret) {
7007 ath12k_warn(ab, "failed to handle chan list %d\n", ret);
7008 goto fallback;
7009 }
7010
7011 goto out;
7012
7013 mem_free:
7014 ath12k_reg_reset_reg_info(reg_info);
7015 kfree(reg_info);
7016
7017 if (ret == ATH12K_REG_STATUS_VALID)
7018 goto out;
7019
7020 fallback:
7021 /* Fallback to older reg (by sending previous country setting
7022 * again if fw has succeeded and we failed to process here.
7023 * The Regdomain should be uniform across driver and fw. Since the
7024 * FW has processed the command and sent a success status, we expect
7025 * this function to succeed as well. If it doesn't, CTRY needs to be
7026 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent.
7027 */
7028 /* TODO: This is rare, but still should also be handled */
7029 WARN_ON(1);
7030
7031 out:
7032 /* In some error cases, even a valid pdev_idx might not be available */
7033 if (pdev_idx != 255)
7034 ar = ab->pdevs[pdev_idx].ar;
7035
7036 /* During the boot-time update, 'ar' might not be allocated,
7037 * so the completion cannot be marked at that point.
7038 * This boot-time update is handled in ath12k_mac_hw_register()
7039 * before registering the hardware.
7040 */
7041 if (ar)
7042 complete_all(&ar->regd_update_completed);
7043
7044 return ret;
7045 }
7046
ath12k_wmi_rdy_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7047 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len,
7048 const void *ptr, void *data)
7049 {
7050 struct ath12k_wmi_rdy_parse *rdy_parse = data;
7051 struct wmi_ready_event fixed_param;
7052 struct ath12k_wmi_mac_addr_params *addr_list;
7053 struct ath12k_pdev *pdev;
7054 u32 num_mac_addr;
7055 int i;
7056
7057 switch (tag) {
7058 case WMI_TAG_READY_EVENT:
7059 memset(&fixed_param, 0, sizeof(fixed_param));
7060 memcpy(&fixed_param, (struct wmi_ready_event *)ptr,
7061 min_t(u16, sizeof(fixed_param), len));
7062 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status);
7063 rdy_parse->num_extra_mac_addr =
7064 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr);
7065
7066 ether_addr_copy(ab->mac_addr,
7067 fixed_param.ready_event_min.mac_addr.addr);
7068 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum);
7069 ab->wmi_ready = true;
7070 break;
7071 case WMI_TAG_ARRAY_FIXED_STRUCT:
7072 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr;
7073 num_mac_addr = rdy_parse->num_extra_mac_addr;
7074
7075 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios))
7076 break;
7077
7078 for (i = 0; i < ab->num_radios; i++) {
7079 pdev = &ab->pdevs[i];
7080 ether_addr_copy(pdev->mac_addr, addr_list[i].addr);
7081 }
7082 ab->pdevs_macaddr_valid = true;
7083 break;
7084 default:
7085 break;
7086 }
7087
7088 return 0;
7089 }
7090
ath12k_ready_event(struct ath12k_base * ab,struct sk_buff * skb)7091 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb)
7092 {
7093 struct ath12k_wmi_rdy_parse rdy_parse = { };
7094 int ret;
7095
7096 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7097 ath12k_wmi_rdy_parse, &rdy_parse);
7098 if (ret) {
7099 ath12k_warn(ab, "failed to parse tlv %d\n", ret);
7100 return ret;
7101 }
7102
7103 complete(&ab->wmi_ab.unified_ready);
7104 return 0;
7105 }
7106
ath12k_peer_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)7107 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
7108 {
7109 struct wmi_peer_delete_resp_event peer_del_resp;
7110 struct ath12k *ar;
7111 u32 vdev_id;
7112
7113 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) {
7114 ath12k_warn(ab, "failed to extract peer delete resp\n");
7115 return;
7116 }
7117
7118 vdev_id = le32_to_cpu(peer_del_resp.vdev_id);
7119
7120 rcu_read_lock();
7121 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7122 if (!ar) {
7123 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d\n",
7124 vdev_id);
7125 rcu_read_unlock();
7126 return;
7127 }
7128
7129 ath12k_peer_delete_resp_signal(ar, vdev_id,
7130 peer_del_resp.peer_macaddr.addr);
7131 rcu_read_unlock();
7132 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n",
7133 vdev_id, peer_del_resp.peer_macaddr.addr);
7134 }
7135
ath12k_vdev_delete_resp_event(struct ath12k_base * ab,struct sk_buff * skb)7136 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab,
7137 struct sk_buff *skb)
7138 {
7139 struct ath12k *ar;
7140 u32 vdev_id = 0;
7141
7142 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) {
7143 ath12k_warn(ab, "failed to extract vdev delete resp");
7144 return;
7145 }
7146
7147 rcu_read_lock();
7148 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7149 if (!ar) {
7150 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d",
7151 vdev_id);
7152 rcu_read_unlock();
7153 return;
7154 }
7155
7156 complete(&ar->vdev_delete_done);
7157
7158 rcu_read_unlock();
7159
7160 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n",
7161 vdev_id);
7162 }
7163
ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)7164 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status)
7165 {
7166 switch (vdev_resp_status) {
7167 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID:
7168 return "invalid vdev id";
7169 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED:
7170 return "not supported";
7171 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION:
7172 return "dfs violation";
7173 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN:
7174 return "invalid regdomain";
7175 default:
7176 return "unknown";
7177 }
7178 }
7179
ath12k_vdev_start_resp_event(struct ath12k_base * ab,struct sk_buff * skb)7180 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb)
7181 {
7182 struct wmi_vdev_start_resp_event vdev_start_resp;
7183 struct ath12k *ar;
7184 u32 status;
7185
7186 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) {
7187 ath12k_warn(ab, "failed to extract vdev start resp");
7188 return;
7189 }
7190
7191 rcu_read_lock();
7192 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id));
7193 if (!ar) {
7194 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d",
7195 vdev_start_resp.vdev_id);
7196 rcu_read_unlock();
7197 return;
7198 }
7199
7200 ar->last_wmi_vdev_start_status = 0;
7201
7202 status = le32_to_cpu(vdev_start_resp.status);
7203 if (WARN_ON_ONCE(status)) {
7204 ath12k_warn(ab, "vdev start resp error status %d (%s)\n",
7205 status, ath12k_wmi_vdev_resp_print(status));
7206 ar->last_wmi_vdev_start_status = status;
7207 }
7208
7209 ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power);
7210
7211 complete(&ar->vdev_setup_done);
7212
7213 rcu_read_unlock();
7214
7215 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d",
7216 vdev_start_resp.vdev_id);
7217 }
7218
ath12k_bcn_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)7219 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb)
7220 {
7221 struct ath12k_link_vif *arvif;
7222 struct ath12k *ar;
7223 u32 vdev_id, tx_status;
7224
7225 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) {
7226 ath12k_warn(ab, "failed to extract bcn tx status");
7227 return;
7228 }
7229
7230 guard(rcu)();
7231
7232 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
7233 if (!arvif) {
7234 ath12k_warn(ab, "invalid vdev %u in bcn tx status\n",
7235 vdev_id);
7236 return;
7237 }
7238
7239 ar = arvif->ar;
7240 wiphy_work_queue(ath12k_ar_to_hw(ar)->wiphy, &arvif->bcn_tx_work);
7241 }
7242
ath12k_vdev_stopped_event(struct ath12k_base * ab,struct sk_buff * skb)7243 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb)
7244 {
7245 struct ath12k *ar;
7246 u32 vdev_id = 0;
7247
7248 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) {
7249 ath12k_warn(ab, "failed to extract vdev stopped event");
7250 return;
7251 }
7252
7253 rcu_read_lock();
7254 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
7255 if (!ar) {
7256 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d",
7257 vdev_id);
7258 rcu_read_unlock();
7259 return;
7260 }
7261
7262 complete(&ar->vdev_setup_done);
7263
7264 rcu_read_unlock();
7265
7266 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id);
7267 }
7268
ath12k_mgmt_rx_event(struct ath12k_base * ab,struct sk_buff * skb)7269 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
7270 {
7271 struct ath12k_wmi_mgmt_rx_arg rx_ev = {};
7272 struct ath12k *ar;
7273 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
7274 struct ieee80211_sta *pubsta = NULL;
7275 struct ath12k_dp_link_peer *peer;
7276 struct ieee80211_hdr *hdr;
7277 bool is_4addr_null_pkt;
7278 struct ath12k_dp *dp;
7279 u16 fc;
7280 struct ieee80211_supported_band *sband;
7281 s32 noise_floor;
7282
7283 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
7284 ath12k_warn(ab, "failed to extract mgmt rx event");
7285 dev_kfree_skb(skb);
7286 return;
7287 }
7288
7289 memset(status, 0, sizeof(*status));
7290
7291 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n",
7292 rx_ev.status);
7293
7294 rcu_read_lock();
7295 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id);
7296
7297 if (!ar) {
7298 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n",
7299 rx_ev.pdev_id);
7300 dev_kfree_skb(skb);
7301 goto exit;
7302 }
7303
7304 if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) ||
7305 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT |
7306 WMI_RX_STATUS_ERR_KEY_CACHE_MISS |
7307 WMI_RX_STATUS_ERR_CRC))) {
7308 dev_kfree_skb(skb);
7309 goto exit;
7310 }
7311
7312 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC)
7313 status->flag |= RX_FLAG_MMIC_ERROR;
7314
7315 if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ &&
7316 rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) {
7317 status->band = NL80211_BAND_6GHZ;
7318 status->freq = rx_ev.chan_freq;
7319 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) {
7320 status->band = NL80211_BAND_2GHZ;
7321 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) {
7322 status->band = NL80211_BAND_5GHZ;
7323 } else {
7324 /* Shouldn't happen unless list of advertised channels to
7325 * mac80211 has been changed.
7326 */
7327 WARN_ON_ONCE(1);
7328 dev_kfree_skb(skb);
7329 goto exit;
7330 }
7331
7332 if (rx_ev.phy_mode == MODE_11B &&
7333 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ))
7334 ath12k_dbg(ab, ATH12K_DBG_WMI,
7335 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band);
7336
7337 sband = &ar->mac.sbands[status->band];
7338
7339 if (status->band != NL80211_BAND_6GHZ)
7340 status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
7341 status->band);
7342
7343 spin_lock_bh(&ar->data_lock);
7344 noise_floor = ath12k_pdev_get_noise_floor(ar);
7345 spin_unlock_bh(&ar->data_lock);
7346
7347 status->signal = rx_ev.snr + noise_floor;
7348 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
7349
7350 hdr = (struct ieee80211_hdr *)skb->data;
7351 fc = le16_to_cpu(hdr->frame_control);
7352
7353 is_4addr_null_pkt = (ieee80211_is_nullfunc(hdr->frame_control) ||
7354 ieee80211_is_qos_nullfunc(hdr->frame_control)) &&
7355 ieee80211_has_a4(hdr->frame_control);
7356
7357 /*
7358 * Add check to drop frames other than 4-address NULL frame. Since
7359 * firmware sends all NULL frames in this path (3-address and 4-address)
7360 */
7361 if (ieee80211_is_data(hdr->frame_control) && !is_4addr_null_pkt) {
7362 dev_kfree_skb(skb);
7363 goto exit;
7364 }
7365
7366 if (is_4addr_null_pkt) {
7367 dp = ath12k_ab_to_dp(ar->ab);
7368 spin_lock_bh(&dp->dp_lock);
7369 peer = ath12k_dp_link_peer_find_by_pdev_and_addr(dp, ar->pdev_idx,
7370 hdr->addr2);
7371 if (!peer) {
7372 spin_unlock_bh(&dp->dp_lock);
7373 dev_kfree_skb(skb);
7374 goto exit;
7375 }
7376 pubsta = peer->sta;
7377 if (pubsta && pubsta->valid_links) {
7378 status->link_valid = 1;
7379 status->link_id = peer->link_id;
7380 }
7381 spin_unlock_bh(&dp->dp_lock);
7382 goto send_rx;
7383 }
7384
7385 /* Firmware is guaranteed to report all essential management frames via
7386 * WMI while it can deliver some extra via HTT. Since there can be
7387 * duplicates split the reporting wrt monitor/sniffing.
7388 */
7389 status->flag |= RX_FLAG_SKIP_MONITOR;
7390
7391 /* In case of PMF, FW delivers decrypted frames with Protected Bit set
7392 * including group privacy action frames.
7393 */
7394 if (ieee80211_has_protected(hdr->frame_control)) {
7395 status->flag |= RX_FLAG_DECRYPTED;
7396
7397 if (!ieee80211_is_robust_mgmt_frame(skb)) {
7398 status->flag |= RX_FLAG_IV_STRIPPED |
7399 RX_FLAG_MMIC_STRIPPED;
7400 hdr->frame_control = __cpu_to_le16(fc &
7401 ~IEEE80211_FCTL_PROTECTED);
7402 }
7403 }
7404
7405 if (ieee80211_is_beacon(hdr->frame_control))
7406 ath12k_mac_handle_beacon(ar, skb);
7407
7408 send_rx:
7409 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7410 "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
7411 skb, skb->len,
7412 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
7413
7414 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7415 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
7416 status->freq, status->band, status->signal,
7417 status->rate_idx);
7418
7419 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb);
7420
7421 exit:
7422 rcu_read_unlock();
7423 }
7424
ath12k_mgmt_tx_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7425 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
7426 {
7427 struct wmi_mgmt_tx_compl_event tx_compl_param = {};
7428 struct ath12k *ar;
7429
7430 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
7431 ath12k_warn(ab, "failed to extract mgmt tx compl event");
7432 return;
7433 }
7434
7435 rcu_read_lock();
7436 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id));
7437 if (!ar) {
7438 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n",
7439 tx_compl_param.pdev_id);
7440 goto exit;
7441 }
7442
7443 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
7444 le32_to_cpu(tx_compl_param.status),
7445 le32_to_cpu(tx_compl_param.ack_rssi));
7446
7447 ath12k_dbg(ab, ATH12K_DBG_MGMT,
7448 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
7449 tx_compl_param.pdev_id, tx_compl_param.desc_id,
7450 tx_compl_param.status);
7451
7452 exit:
7453 rcu_read_unlock();
7454 }
7455
ath12k_get_ar_on_scan_state(struct ath12k_base * ab,u32 vdev_id,enum ath12k_scan_state state)7456 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
7457 u32 vdev_id,
7458 enum ath12k_scan_state state)
7459 {
7460 int i;
7461 struct ath12k_pdev *pdev;
7462 struct ath12k *ar;
7463
7464 for (i = 0; i < ab->num_radios; i++) {
7465 pdev = rcu_dereference(ab->pdevs_active[i]);
7466 if (pdev && pdev->ar) {
7467 ar = pdev->ar;
7468
7469 spin_lock_bh(&ar->data_lock);
7470 if (ar->scan.state == state &&
7471 ar->scan.arvif &&
7472 ar->scan.arvif->vdev_id == vdev_id) {
7473 spin_unlock_bh(&ar->data_lock);
7474 return ar;
7475 }
7476 spin_unlock_bh(&ar->data_lock);
7477 }
7478 }
7479 return NULL;
7480 }
7481
ath12k_scan_event(struct ath12k_base * ab,struct sk_buff * skb)7482 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
7483 {
7484 struct ath12k *ar;
7485 struct wmi_scan_event scan_ev = {};
7486
7487 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
7488 ath12k_warn(ab, "failed to extract scan event");
7489 return;
7490 }
7491
7492 rcu_read_lock();
7493
7494 /* In case the scan was cancelled, ex. during interface teardown,
7495 * the interface will not be found in active interfaces.
7496 * Rather, in such scenarios, iterate over the active pdev's to
7497 * search 'ar' if the corresponding 'ar' scan is ABORTING and the
7498 * aborting scan's vdev id matches this event info.
7499 */
7500 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED &&
7501 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) {
7502 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7503 ATH12K_SCAN_ABORTING);
7504 if (!ar)
7505 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id),
7506 ATH12K_SCAN_RUNNING);
7507 } else {
7508 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id));
7509 }
7510
7511 if (!ar) {
7512 ath12k_warn(ab, "Received scan event for unknown vdev");
7513 rcu_read_unlock();
7514 return;
7515 }
7516
7517 spin_lock_bh(&ar->data_lock);
7518
7519 ath12k_dbg(ab, ATH12K_DBG_WMI,
7520 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
7521 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type),
7522 le32_to_cpu(scan_ev.reason)),
7523 le32_to_cpu(scan_ev.event_type),
7524 le32_to_cpu(scan_ev.reason),
7525 le32_to_cpu(scan_ev.channel_freq),
7526 le32_to_cpu(scan_ev.scan_req_id),
7527 le32_to_cpu(scan_ev.scan_id),
7528 le32_to_cpu(scan_ev.vdev_id),
7529 ath12k_scan_state_str(ar->scan.state), ar->scan.state);
7530
7531 switch (le32_to_cpu(scan_ev.event_type)) {
7532 case WMI_SCAN_EVENT_STARTED:
7533 ath12k_wmi_event_scan_started(ar);
7534 break;
7535 case WMI_SCAN_EVENT_COMPLETED:
7536 ath12k_wmi_event_scan_completed(ar);
7537 break;
7538 case WMI_SCAN_EVENT_BSS_CHANNEL:
7539 ath12k_wmi_event_scan_bss_chan(ar);
7540 break;
7541 case WMI_SCAN_EVENT_FOREIGN_CHAN:
7542 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq));
7543 break;
7544 case WMI_SCAN_EVENT_START_FAILED:
7545 ath12k_warn(ab, "received scan start failure event\n");
7546 ath12k_wmi_event_scan_start_failed(ar);
7547 break;
7548 case WMI_SCAN_EVENT_DEQUEUED:
7549 __ath12k_mac_scan_finish(ar);
7550 break;
7551 case WMI_SCAN_EVENT_PREEMPTED:
7552 case WMI_SCAN_EVENT_RESTARTED:
7553 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT:
7554 default:
7555 break;
7556 }
7557
7558 spin_unlock_bh(&ar->data_lock);
7559
7560 rcu_read_unlock();
7561 }
7562
ath12k_peer_sta_kickout_event(struct ath12k_base * ab,struct sk_buff * skb)7563 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb)
7564 {
7565 struct wmi_peer_sta_kickout_arg arg = {};
7566 struct ath12k_link_vif *arvif;
7567 struct ieee80211_sta *sta;
7568 struct ath12k_sta *ahsta;
7569 struct ath12k_link_sta *arsta;
7570 struct ath12k *ar;
7571
7572 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) {
7573 ath12k_warn(ab, "failed to extract peer sta kickout event");
7574 return;
7575 }
7576
7577 rcu_read_lock();
7578
7579 spin_lock_bh(&ab->base_lock);
7580
7581 arsta = ath12k_link_sta_find_by_addr(ab, arg.mac_addr);
7582
7583 if (!arsta) {
7584 ath12k_warn(ab, "arsta not found %pM\n",
7585 arg.mac_addr);
7586 goto exit;
7587 }
7588
7589 arvif = arsta->arvif;
7590 if (!arvif) {
7591 ath12k_warn(ab, "invalid arvif in peer sta kickout ev for STA %pM",
7592 arg.mac_addr);
7593 goto exit;
7594 }
7595
7596 ar = arvif->ar;
7597 ahsta = arsta->ahsta;
7598 sta = ath12k_ahsta_to_sta(ahsta);
7599
7600 ath12k_dbg(ab, ATH12K_DBG_WMI,
7601 "peer sta kickout event %pM reason: %d rssi: %d\n",
7602 arg.mac_addr, arg.reason, arg.rssi);
7603
7604 switch (arg.reason) {
7605 case WMI_PEER_STA_KICKOUT_REASON_INACTIVITY:
7606 if (arvif->ahvif->vif->type == NL80211_IFTYPE_STATION) {
7607 ath12k_mac_handle_beacon_miss(ar, arvif);
7608 break;
7609 }
7610 fallthrough;
7611 default:
7612 ieee80211_report_low_ack(sta, 10);
7613 }
7614
7615 exit:
7616 spin_unlock_bh(&ab->base_lock);
7617 rcu_read_unlock();
7618 }
7619
ath12k_roam_event(struct ath12k_base * ab,struct sk_buff * skb)7620 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
7621 {
7622 struct ath12k_link_vif *arvif;
7623 struct wmi_roam_event roam_ev = {};
7624 struct ath12k *ar;
7625 u32 vdev_id;
7626 u8 roam_reason;
7627
7628 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) {
7629 ath12k_warn(ab, "failed to extract roam event");
7630 return;
7631 }
7632
7633 vdev_id = le32_to_cpu(roam_ev.vdev_id);
7634 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason),
7635 WMI_ROAM_REASON_MASK);
7636
7637 ath12k_dbg(ab, ATH12K_DBG_WMI,
7638 "wmi roam event vdev %u reason %d rssi %d\n",
7639 vdev_id, roam_reason, roam_ev.rssi);
7640
7641 guard(rcu)();
7642 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_id);
7643 if (!arvif) {
7644 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id);
7645 return;
7646 }
7647
7648 ar = arvif->ar;
7649
7650 if (roam_reason >= WMI_ROAM_REASON_MAX)
7651 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n",
7652 roam_reason, vdev_id);
7653
7654 switch (roam_reason) {
7655 case WMI_ROAM_REASON_BEACON_MISS:
7656 ath12k_mac_handle_beacon_miss(ar, arvif);
7657 break;
7658 case WMI_ROAM_REASON_BETTER_AP:
7659 case WMI_ROAM_REASON_LOW_RSSI:
7660 case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
7661 case WMI_ROAM_REASON_HO_FAILED:
7662 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n",
7663 roam_reason, vdev_id);
7664 break;
7665 }
7666 }
7667
ath12k_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7668 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7669 {
7670 struct wmi_chan_info_event ch_info_ev = {};
7671 struct ath12k *ar;
7672 struct ath12k_hw *ah;
7673 struct survey_info *survey;
7674 int idx;
7675 /* HW channel counters frequency value in hertz */
7676 u32 cc_freq_hz = ab->cc_freq_hz;
7677
7678 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) {
7679 ath12k_warn(ab, "failed to extract chan info event");
7680 return;
7681 }
7682
7683 ath12k_dbg(ab, ATH12K_DBG_WMI,
7684 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n",
7685 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq,
7686 ch_info_ev.cmd_flags, ch_info_ev.noise_floor,
7687 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count,
7688 ch_info_ev.mac_clk_mhz);
7689
7690 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) {
7691 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n");
7692 return;
7693 }
7694
7695 rcu_read_lock();
7696 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id));
7697 if (!ar) {
7698 ath12k_warn(ab, "invalid vdev id in chan info ev %d",
7699 ch_info_ev.vdev_id);
7700 rcu_read_unlock();
7701 return;
7702 }
7703 spin_lock_bh(&ar->data_lock);
7704 ah = ath12k_ar_to_ah(ar);
7705
7706 switch (ar->scan.state) {
7707 case ATH12K_SCAN_IDLE:
7708 case ATH12K_SCAN_STARTING:
7709 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n");
7710 goto exit;
7711 case ATH12K_SCAN_RUNNING:
7712 case ATH12K_SCAN_ABORTING:
7713 break;
7714 }
7715
7716 idx = freq_to_idx(ath12k_ar_to_hw(ar), le32_to_cpu(ch_info_ev.freq));
7717 if (idx >= ARRAY_SIZE(ah->survey)) {
7718 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n",
7719 ch_info_ev.freq, idx);
7720 goto exit;
7721 }
7722
7723 /* If FW provides MAC clock frequency in Mhz, overriding the initialized
7724 * HW channel counters frequency value
7725 */
7726 if (ch_info_ev.mac_clk_mhz)
7727 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000);
7728
7729 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) {
7730 scoped_guard(spinlock_bh, &ah->survey_lock) {
7731 survey = &ah->survey[idx];
7732 memset(survey, 0, sizeof(*survey));
7733 survey->noise = le32_to_cpu(ch_info_ev.noise_floor);
7734 survey->time =
7735 div_u64(le32_to_cpu(ch_info_ev.cycle_count),
7736 cc_freq_hz);
7737 survey->time_busy =
7738 div_u64(le32_to_cpu(ch_info_ev.rx_clear_count),
7739 cc_freq_hz);
7740 survey->filled = SURVEY_INFO_NOISE_DBM |
7741 SURVEY_INFO_TIME |
7742 SURVEY_INFO_TIME_BUSY;
7743 }
7744 }
7745 exit:
7746 spin_unlock_bh(&ar->data_lock);
7747 rcu_read_unlock();
7748 }
7749
7750 static void
ath12k_pdev_bss_chan_info_event(struct ath12k_base * ab,struct sk_buff * skb)7751 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
7752 {
7753 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {};
7754 struct survey_info *survey;
7755 struct ath12k *ar;
7756 struct ath12k_hw *ah;
7757 u32 cc_freq_hz = ab->cc_freq_hz;
7758 u64 busy, total, tx, rx, rx_bss;
7759 int idx;
7760
7761 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) {
7762 ath12k_warn(ab, "failed to extract pdev bss chan info event");
7763 return;
7764 }
7765
7766 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 |
7767 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low);
7768
7769 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 |
7770 le32_to_cpu(bss_ch_info_ev.cycle_count_low);
7771
7772 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 |
7773 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low);
7774
7775 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 |
7776 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low);
7777
7778 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 |
7779 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low);
7780
7781 ath12k_dbg(ab, ATH12K_DBG_WMI,
7782 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
7783 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq,
7784 bss_ch_info_ev.noise_floor, busy, total,
7785 tx, rx, rx_bss);
7786
7787 rcu_read_lock();
7788 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id));
7789
7790 if (!ar) {
7791 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n",
7792 bss_ch_info_ev.pdev_id);
7793 rcu_read_unlock();
7794 return;
7795 }
7796
7797 ah = ath12k_ar_to_ah(ar);
7798
7799 idx = freq_to_idx(ath12k_ar_to_hw(ar), le32_to_cpu(bss_ch_info_ev.freq));
7800 if (idx >= ARRAY_SIZE(ah->survey)) {
7801 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
7802 bss_ch_info_ev.freq, idx);
7803 goto exit;
7804 }
7805
7806 scoped_guard(spinlock_bh, &ah->survey_lock) {
7807 survey = &ah->survey[idx];
7808
7809 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor);
7810 survey->time = div_u64(total, cc_freq_hz);
7811 survey->time_busy = div_u64(busy, cc_freq_hz);
7812 survey->time_rx = div_u64(rx_bss, cc_freq_hz);
7813 survey->time_tx = div_u64(tx, cc_freq_hz);
7814 survey->filled |= (SURVEY_INFO_NOISE_DBM |
7815 SURVEY_INFO_TIME |
7816 SURVEY_INFO_TIME_BUSY |
7817 SURVEY_INFO_TIME_RX |
7818 SURVEY_INFO_TIME_TX);
7819 }
7820
7821 exit:
7822 complete(&ar->bss_survey_done);
7823
7824 rcu_read_unlock();
7825 }
7826
ath12k_vdev_install_key_compl_event(struct ath12k_base * ab,struct sk_buff * skb)7827 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
7828 struct sk_buff *skb)
7829 {
7830 struct wmi_vdev_install_key_complete_arg install_key_compl = {};
7831 struct ath12k *ar;
7832
7833 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
7834 ath12k_warn(ab, "failed to extract install key compl event");
7835 return;
7836 }
7837
7838 ath12k_dbg(ab, ATH12K_DBG_WMI,
7839 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n",
7840 install_key_compl.key_idx, install_key_compl.key_flags,
7841 install_key_compl.macaddr, install_key_compl.status);
7842
7843 rcu_read_lock();
7844 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id);
7845 if (!ar) {
7846 ath12k_warn(ab, "invalid vdev id in install key compl ev %d",
7847 install_key_compl.vdev_id);
7848 rcu_read_unlock();
7849 return;
7850 }
7851
7852 ar->install_key_status = 0;
7853
7854 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) {
7855 ath12k_warn(ab, "install key failed for %pM status %d\n",
7856 install_key_compl.macaddr, install_key_compl.status);
7857 ar->install_key_status = install_key_compl.status;
7858 }
7859
7860 complete(&ar->install_key_done);
7861 rcu_read_unlock();
7862 }
7863
ath12k_wmi_tlv_services_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)7864 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
7865 u16 tag, u16 len,
7866 const void *ptr,
7867 void *data)
7868 {
7869 const struct wmi_service_available_event *ev;
7870 u16 wmi_ext2_service_words;
7871 __le32 *wmi_ext2_service_bitmap;
7872 int i, j;
7873 u16 expected_len;
7874
7875 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32);
7876 if (len < expected_len) {
7877 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n",
7878 len, tag);
7879 return -EINVAL;
7880 }
7881
7882 switch (tag) {
7883 case WMI_TAG_SERVICE_AVAILABLE_EVENT:
7884 ev = (struct wmi_service_available_event *)ptr;
7885 for (i = 0, j = WMI_MAX_SERVICE;
7886 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE;
7887 i++) {
7888 do {
7889 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) &
7890 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7891 set_bit(j, ab->wmi_ab.svc_map);
7892 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7893 }
7894
7895 ath12k_dbg(ab, ATH12K_DBG_WMI,
7896 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x",
7897 ev->wmi_service_segment_bitmap[0],
7898 ev->wmi_service_segment_bitmap[1],
7899 ev->wmi_service_segment_bitmap[2],
7900 ev->wmi_service_segment_bitmap[3]);
7901 break;
7902 case WMI_TAG_ARRAY_UINT32:
7903 wmi_ext2_service_bitmap = (__le32 *)ptr;
7904 wmi_ext2_service_words = len / sizeof(u32);
7905 for (i = 0, j = WMI_MAX_EXT_SERVICE;
7906 i < wmi_ext2_service_words && j < WMI_MAX_EXT2_SERVICE;
7907 i++) {
7908 do {
7909 if (__le32_to_cpu(wmi_ext2_service_bitmap[i]) &
7910 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
7911 set_bit(j, ab->wmi_ab.svc_map);
7912 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
7913 ath12k_dbg(ab, ATH12K_DBG_WMI,
7914 "wmi_ext2_service bitmap 0x%08x\n",
7915 __le32_to_cpu(wmi_ext2_service_bitmap[i]));
7916 }
7917
7918 break;
7919 }
7920 return 0;
7921 }
7922
ath12k_service_available_event(struct ath12k_base * ab,struct sk_buff * skb)7923 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb)
7924 {
7925 int ret;
7926
7927 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
7928 ath12k_wmi_tlv_services_parser,
7929 NULL);
7930 return ret;
7931 }
7932
ath12k_peer_assoc_conf_event(struct ath12k_base * ab,struct sk_buff * skb)7933 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
7934 {
7935 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {};
7936 struct ath12k *ar;
7937
7938 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
7939 ath12k_warn(ab, "failed to extract peer assoc conf event");
7940 return;
7941 }
7942
7943 ath12k_dbg(ab, ATH12K_DBG_WMI,
7944 "peer assoc conf ev vdev id %d macaddr %pM\n",
7945 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr);
7946
7947 rcu_read_lock();
7948 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id);
7949
7950 if (!ar) {
7951 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d",
7952 peer_assoc_conf.vdev_id);
7953 rcu_read_unlock();
7954 return;
7955 }
7956
7957 complete(&ar->peer_assoc_done);
7958 rcu_read_unlock();
7959 }
7960
7961 static void
ath12k_wmi_fw_vdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)7962 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar,
7963 struct ath12k_fw_stats *fw_stats,
7964 char *buf, u32 *length)
7965 {
7966 const struct ath12k_fw_stats_vdev *vdev;
7967 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
7968 struct ath12k_link_vif *arvif;
7969 u32 len = *length;
7970 u8 *vif_macaddr;
7971 int i;
7972
7973 len += scnprintf(buf + len, buf_len - len, "\n");
7974 len += scnprintf(buf + len, buf_len - len, "%30s\n",
7975 "ath12k VDEV stats");
7976 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
7977 "=================");
7978
7979 list_for_each_entry(vdev, &fw_stats->vdevs, list) {
7980 arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id);
7981 if (!arvif)
7982 continue;
7983 vif_macaddr = arvif->ahvif->vif->addr;
7984
7985 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7986 "VDEV ID", vdev->vdev_id);
7987 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
7988 "VDEV MAC address", vif_macaddr);
7989 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7990 "beacon snr", vdev->beacon_snr);
7991 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7992 "data snr", vdev->data_snr);
7993 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7994 "num rx frames", vdev->num_rx_frames);
7995 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7996 "num rts fail", vdev->num_rts_fail);
7997 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
7998 "num rts success", vdev->num_rts_success);
7999 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8000 "num rx err", vdev->num_rx_err);
8001 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8002 "num rx discard", vdev->num_rx_discard);
8003 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8004 "num tx not acked", vdev->num_tx_not_acked);
8005
8006 for (i = 0 ; i < WLAN_MAX_AC; i++)
8007 len += scnprintf(buf + len, buf_len - len,
8008 "%25s [%02d] %u\n",
8009 "num tx frames", i,
8010 vdev->num_tx_frames[i]);
8011
8012 for (i = 0 ; i < WLAN_MAX_AC; i++)
8013 len += scnprintf(buf + len, buf_len - len,
8014 "%25s [%02d] %u\n",
8015 "num tx frames retries", i,
8016 vdev->num_tx_frames_retries[i]);
8017
8018 for (i = 0 ; i < WLAN_MAX_AC; i++)
8019 len += scnprintf(buf + len, buf_len - len,
8020 "%25s [%02d] %u\n",
8021 "num tx frames failures", i,
8022 vdev->num_tx_frames_failures[i]);
8023
8024 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
8025 len += scnprintf(buf + len, buf_len - len,
8026 "%25s [%02d] 0x%08x\n",
8027 "tx rate history", i,
8028 vdev->tx_rate_history[i]);
8029 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++)
8030 len += scnprintf(buf + len, buf_len - len,
8031 "%25s [%02d] %u\n",
8032 "beacon rssi history", i,
8033 vdev->beacon_rssi_history[i]);
8034
8035 len += scnprintf(buf + len, buf_len - len, "\n");
8036 *length = len;
8037 }
8038 }
8039
8040 static void
ath12k_wmi_fw_bcn_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)8041 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar,
8042 struct ath12k_fw_stats *fw_stats,
8043 char *buf, u32 *length)
8044 {
8045 const struct ath12k_fw_stats_bcn *bcn;
8046 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8047 struct ath12k_link_vif *arvif;
8048 u32 len = *length;
8049 size_t num_bcn;
8050
8051 num_bcn = list_count_nodes(&fw_stats->bcn);
8052
8053 len += scnprintf(buf + len, buf_len - len, "\n");
8054 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8055 "ath12k Beacon stats", num_bcn);
8056 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8057 "===================");
8058
8059 list_for_each_entry(bcn, &fw_stats->bcn, list) {
8060 arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id);
8061 if (!arvif)
8062 continue;
8063 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8064 "VDEV ID", bcn->vdev_id);
8065 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8066 "VDEV MAC address", arvif->ahvif->vif->addr);
8067 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8068 "================");
8069 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8070 "Num of beacon tx success", bcn->tx_bcn_succ_cnt);
8071 len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8072 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt);
8073
8074 len += scnprintf(buf + len, buf_len - len, "\n");
8075 *length = len;
8076 }
8077 }
8078
8079 static void
ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length,u64 fw_soc_drop_cnt)8080 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
8081 char *buf, u32 *length, u64 fw_soc_drop_cnt)
8082 {
8083 u32 len = *length;
8084 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8085
8086 len = scnprintf(buf + len, buf_len - len, "\n");
8087 len += scnprintf(buf + len, buf_len - len, "%30s\n",
8088 "ath12k PDEV stats");
8089 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8090 "=================");
8091
8092 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8093 "Channel noise floor", pdev->ch_noise_floor);
8094 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8095 "Channel TX power", pdev->chan_tx_power);
8096 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8097 "TX frame count", pdev->tx_frame_count);
8098 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8099 "RX frame count", pdev->rx_frame_count);
8100 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8101 "RX clear count", pdev->rx_clear_count);
8102 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8103 "Cycle count", pdev->cycle_count);
8104 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8105 "PHY error count", pdev->phy_err_count);
8106 len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n",
8107 "soc drop count", fw_soc_drop_cnt);
8108
8109 *length = len;
8110 }
8111
8112 static void
ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)8113 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
8114 char *buf, u32 *length)
8115 {
8116 u32 len = *length;
8117 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8118
8119 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8120 "ath12k PDEV TX stats");
8121 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8122 "====================");
8123
8124 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8125 "HTT cookies queued", pdev->comp_queued);
8126 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8127 "HTT cookies disp.", pdev->comp_delivered);
8128 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8129 "MSDU queued", pdev->msdu_enqued);
8130 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8131 "MPDU queued", pdev->mpdu_enqued);
8132 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8133 "MSDUs dropped", pdev->wmm_drop);
8134 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8135 "Local enqued", pdev->local_enqued);
8136 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8137 "Local freed", pdev->local_freed);
8138 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8139 "HW queued", pdev->hw_queued);
8140 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8141 "PPDUs reaped", pdev->hw_reaped);
8142 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8143 "Num underruns", pdev->underrun);
8144 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8145 "PPDUs cleaned", pdev->tx_abort);
8146 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8147 "MPDUs requeued", pdev->mpdus_requed);
8148 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8149 "Excessive retries", pdev->tx_ko);
8150 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8151 "HW rate", pdev->data_rc);
8152 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8153 "Sched self triggers", pdev->self_triggers);
8154 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8155 "Dropped due to SW retries",
8156 pdev->sw_retry_failure);
8157 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8158 "Illegal rate phy errors",
8159 pdev->illgl_rate_phy_err);
8160 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8161 "PDEV continuous xretry", pdev->pdev_cont_xretry);
8162 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8163 "TX timeout", pdev->pdev_tx_timeout);
8164 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8165 "PDEV resets", pdev->pdev_resets);
8166 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8167 "Stateless TIDs alloc failures",
8168 pdev->stateless_tid_alloc_failure);
8169 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8170 "PHY underrun", pdev->phy_underrun);
8171 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8172 "MPDU is more than txop limit", pdev->txop_ovf);
8173 *length = len;
8174 }
8175
8176 static void
ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev * pdev,char * buf,u32 * length)8177 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev,
8178 char *buf, u32 *length)
8179 {
8180 u32 len = *length;
8181 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8182
8183 len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8184 "ath12k PDEV RX stats");
8185 len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8186 "====================");
8187
8188 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8189 "Mid PPDU route change",
8190 pdev->mid_ppdu_route_change);
8191 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8192 "Tot. number of statuses", pdev->status_rcvd);
8193 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8194 "Extra frags on rings 0", pdev->r0_frags);
8195 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8196 "Extra frags on rings 1", pdev->r1_frags);
8197 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8198 "Extra frags on rings 2", pdev->r2_frags);
8199 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8200 "Extra frags on rings 3", pdev->r3_frags);
8201 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8202 "MSDUs delivered to HTT", pdev->htt_msdus);
8203 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8204 "MPDUs delivered to HTT", pdev->htt_mpdus);
8205 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8206 "MSDUs delivered to stack", pdev->loc_msdus);
8207 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8208 "MPDUs delivered to stack", pdev->loc_mpdus);
8209 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8210 "Oversized AMSUs", pdev->oversize_amsdu);
8211 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8212 "PHY errors", pdev->phy_errs);
8213 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8214 "PHY errors drops", pdev->phy_err_drop);
8215 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8216 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8217 *length = len;
8218 }
8219
8220 static void
ath12k_wmi_fw_pdev_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,char * buf,u32 * length)8221 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar,
8222 struct ath12k_fw_stats *fw_stats,
8223 char *buf, u32 *length)
8224 {
8225 const struct ath12k_fw_stats_pdev *pdev;
8226 u32 len = *length;
8227
8228 pdev = list_first_entry_or_null(&fw_stats->pdevs,
8229 struct ath12k_fw_stats_pdev, list);
8230 if (!pdev) {
8231 ath12k_warn(ar->ab, "failed to get pdev stats\n");
8232 return;
8233 }
8234
8235 ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len,
8236 ar->ab->fw_soc_drop_count);
8237 ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len);
8238 ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len);
8239
8240 *length = len;
8241 }
8242
ath12k_wmi_fw_stats_dump(struct ath12k * ar,struct ath12k_fw_stats * fw_stats,u32 stats_id,char * buf)8243 void ath12k_wmi_fw_stats_dump(struct ath12k *ar,
8244 struct ath12k_fw_stats *fw_stats,
8245 u32 stats_id, char *buf)
8246 {
8247 u32 len = 0;
8248 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE;
8249
8250 spin_lock_bh(&ar->data_lock);
8251
8252 switch (stats_id) {
8253 case WMI_REQUEST_VDEV_STAT:
8254 ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len);
8255 break;
8256 case WMI_REQUEST_BCN_STAT:
8257 ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len);
8258 break;
8259 case WMI_REQUEST_PDEV_STAT:
8260 ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len);
8261 break;
8262 default:
8263 break;
8264 }
8265
8266 spin_unlock_bh(&ar->data_lock);
8267
8268 if (len >= buf_len)
8269 buf[len - 1] = 0;
8270 else
8271 buf[len] = 0;
8272 }
8273
8274 static void
ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params * src,struct ath12k_fw_stats_vdev * dst)8275 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src,
8276 struct ath12k_fw_stats_vdev *dst)
8277 {
8278 int i;
8279
8280 dst->vdev_id = le32_to_cpu(src->vdev_id);
8281 dst->beacon_snr = le32_to_cpu(src->beacon_snr);
8282 dst->data_snr = le32_to_cpu(src->data_snr);
8283 dst->num_rx_frames = le32_to_cpu(src->num_rx_frames);
8284 dst->num_rts_fail = le32_to_cpu(src->num_rts_fail);
8285 dst->num_rts_success = le32_to_cpu(src->num_rts_success);
8286 dst->num_rx_err = le32_to_cpu(src->num_rx_err);
8287 dst->num_rx_discard = le32_to_cpu(src->num_rx_discard);
8288 dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked);
8289
8290 for (i = 0; i < WLAN_MAX_AC; i++)
8291 dst->num_tx_frames[i] =
8292 le32_to_cpu(src->num_tx_frames[i]);
8293
8294 for (i = 0; i < WLAN_MAX_AC; i++)
8295 dst->num_tx_frames_retries[i] =
8296 le32_to_cpu(src->num_tx_frames_retries[i]);
8297
8298 for (i = 0; i < WLAN_MAX_AC; i++)
8299 dst->num_tx_frames_failures[i] =
8300 le32_to_cpu(src->num_tx_frames_failures[i]);
8301
8302 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8303 dst->tx_rate_history[i] =
8304 le32_to_cpu(src->tx_rate_history[i]);
8305
8306 for (i = 0; i < MAX_TX_RATE_VALUES; i++)
8307 dst->beacon_rssi_history[i] =
8308 le32_to_cpu(src->beacon_rssi_history[i]);
8309 }
8310
8311 static void
ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params * src,struct ath12k_fw_stats_bcn * dst)8312 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src,
8313 struct ath12k_fw_stats_bcn *dst)
8314 {
8315 dst->vdev_id = le32_to_cpu(src->vdev_id);
8316 dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt);
8317 dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt);
8318 }
8319
8320 static void
ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params * src,struct ath12k_fw_stats_pdev * dst)8321 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src,
8322 struct ath12k_fw_stats_pdev *dst)
8323 {
8324 dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf);
8325 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
8326 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
8327 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
8328 dst->cycle_count = __le32_to_cpu(src->cycle_count);
8329 dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
8330 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
8331 }
8332
8333 static void
ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8334 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src,
8335 struct ath12k_fw_stats_pdev *dst)
8336 {
8337 dst->comp_queued = a_sle32_to_cpu(src->comp_queued);
8338 dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered);
8339 dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued);
8340 dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued);
8341 dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop);
8342 dst->local_enqued = a_sle32_to_cpu(src->local_enqued);
8343 dst->local_freed = a_sle32_to_cpu(src->local_freed);
8344 dst->hw_queued = a_sle32_to_cpu(src->hw_queued);
8345 dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped);
8346 dst->underrun = a_sle32_to_cpu(src->underrun);
8347 dst->tx_abort = a_sle32_to_cpu(src->tx_abort);
8348 dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed);
8349 dst->tx_ko = __le32_to_cpu(src->tx_ko);
8350 dst->data_rc = __le32_to_cpu(src->data_rc);
8351 dst->self_triggers = __le32_to_cpu(src->self_triggers);
8352 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
8353 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
8354 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
8355 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
8356 dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
8357 dst->stateless_tid_alloc_failure =
8358 __le32_to_cpu(src->stateless_tid_alloc_failure);
8359 dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
8360 dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
8361 }
8362
8363 static void
ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params * src,struct ath12k_fw_stats_pdev * dst)8364 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src,
8365 struct ath12k_fw_stats_pdev *dst)
8366 {
8367 dst->mid_ppdu_route_change =
8368 a_sle32_to_cpu(src->mid_ppdu_route_change);
8369 dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd);
8370 dst->r0_frags = a_sle32_to_cpu(src->r0_frags);
8371 dst->r1_frags = a_sle32_to_cpu(src->r1_frags);
8372 dst->r2_frags = a_sle32_to_cpu(src->r2_frags);
8373 dst->r3_frags = a_sle32_to_cpu(src->r3_frags);
8374 dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus);
8375 dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus);
8376 dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus);
8377 dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus);
8378 dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu);
8379 dst->phy_errs = a_sle32_to_cpu(src->phy_errs);
8380 dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop);
8381 dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs);
8382 }
8383
ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base * ab,struct wmi_tlv_fw_stats_parse * parse,const void * ptr,u16 len)8384 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab,
8385 struct wmi_tlv_fw_stats_parse *parse,
8386 const void *ptr,
8387 u16 len)
8388 {
8389 const struct wmi_stats_event *ev = parse->ev;
8390 struct ath12k_fw_stats *stats = parse->stats;
8391 struct ath12k *ar;
8392 struct ath12k_link_vif *arvif;
8393 struct ath12k_link_sta *arsta;
8394 int i, ret = 0;
8395 const void *data = ptr;
8396
8397 if (!ev) {
8398 ath12k_warn(ab, "failed to fetch update stats ev");
8399 return -EPROTO;
8400 }
8401
8402 if (!stats)
8403 return -EINVAL;
8404
8405 rcu_read_lock();
8406
8407 stats->pdev_id = le32_to_cpu(ev->pdev_id);
8408 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8409 if (!ar) {
8410 ath12k_warn(ab, "invalid pdev id %d in update stats event\n",
8411 le32_to_cpu(ev->pdev_id));
8412 ret = -EPROTO;
8413 goto exit;
8414 }
8415
8416 for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) {
8417 const struct wmi_vdev_stats_params *src;
8418 struct ath12k_fw_stats_vdev *dst;
8419
8420 src = data;
8421 if (len < sizeof(*src)) {
8422 ret = -EPROTO;
8423 goto exit;
8424 }
8425
8426 arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id));
8427 if (arvif) {
8428 spin_lock_bh(&ab->base_lock);
8429 arsta = ath12k_link_sta_find_by_addr(ab, arvif->bssid);
8430 if (arsta) {
8431 arsta->rssi_beacon = le32_to_cpu(src->beacon_snr);
8432 ath12k_dbg(ab, ATH12K_DBG_WMI,
8433 "wmi stats vdev id %d snr %d\n",
8434 src->vdev_id, src->beacon_snr);
8435 } else {
8436 ath12k_warn(ab,
8437 "not found link sta with bssid %pM for vdev stat\n",
8438 arvif->bssid);
8439 }
8440 spin_unlock_bh(&ab->base_lock);
8441 }
8442
8443 data += sizeof(*src);
8444 len -= sizeof(*src);
8445 dst = kzalloc_obj(*dst, GFP_ATOMIC);
8446 if (!dst)
8447 continue;
8448 ath12k_wmi_pull_vdev_stats(src, dst);
8449 stats->stats_id = WMI_REQUEST_VDEV_STAT;
8450 list_add_tail(&dst->list, &stats->vdevs);
8451 }
8452 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) {
8453 const struct ath12k_wmi_bcn_stats_params *src;
8454 struct ath12k_fw_stats_bcn *dst;
8455
8456 src = data;
8457 if (len < sizeof(*src)) {
8458 ret = -EPROTO;
8459 goto exit;
8460 }
8461
8462 data += sizeof(*src);
8463 len -= sizeof(*src);
8464 dst = kzalloc_obj(*dst, GFP_ATOMIC);
8465 if (!dst)
8466 continue;
8467 ath12k_wmi_pull_bcn_stats(src, dst);
8468 stats->stats_id = WMI_REQUEST_BCN_STAT;
8469 list_add_tail(&dst->list, &stats->bcn);
8470 }
8471 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) {
8472 const struct ath12k_wmi_pdev_stats_params *src;
8473 struct ath12k_fw_stats_pdev *dst;
8474
8475 src = data;
8476 if (len < sizeof(*src)) {
8477 ret = -EPROTO;
8478 goto exit;
8479 }
8480
8481 stats->stats_id = WMI_REQUEST_PDEV_STAT;
8482
8483 data += sizeof(*src);
8484 len -= sizeof(*src);
8485
8486 dst = kzalloc_obj(*dst, GFP_ATOMIC);
8487 if (!dst)
8488 continue;
8489
8490 ath12k_wmi_pull_pdev_stats_base(&src->base, dst);
8491 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst);
8492 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst);
8493 list_add_tail(&dst->list, &stats->pdevs);
8494 }
8495
8496 exit:
8497 rcu_read_unlock();
8498 return ret;
8499 }
8500
ath12k_wmi_tlv_rssi_chain_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8501 static int ath12k_wmi_tlv_rssi_chain_parse(struct ath12k_base *ab,
8502 u16 tag, u16 len,
8503 const void *ptr, void *data)
8504 {
8505 const struct wmi_rssi_stat_params *stats_rssi = ptr;
8506 struct wmi_tlv_fw_stats_parse *parse = data;
8507 const struct wmi_stats_event *ev = parse->ev;
8508 struct ath12k_fw_stats *stats = parse->stats;
8509 struct ath12k_link_vif *arvif;
8510 struct ath12k_link_sta *arsta;
8511 struct ath12k *ar;
8512 int vdev_id;
8513 int j;
8514
8515 if (!ev) {
8516 ath12k_warn(ab, "failed to fetch update stats ev");
8517 return -EPROTO;
8518 }
8519
8520 if (tag != WMI_TAG_RSSI_STATS)
8521 return -EPROTO;
8522
8523 if (!stats)
8524 return -EINVAL;
8525
8526 stats->pdev_id = le32_to_cpu(ev->pdev_id);
8527 vdev_id = le32_to_cpu(stats_rssi->vdev_id);
8528 guard(rcu)();
8529 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id);
8530 if (!ar) {
8531 ath12k_warn(ab, "invalid pdev id %d in rssi chain parse\n",
8532 stats->pdev_id);
8533 return -EPROTO;
8534 }
8535
8536 arvif = ath12k_mac_get_arvif(ar, vdev_id);
8537 if (!arvif) {
8538 ath12k_warn(ab, "not found vif for vdev id %d\n", vdev_id);
8539 return -EPROTO;
8540 }
8541
8542 ath12k_dbg(ab, ATH12K_DBG_WMI,
8543 "stats bssid %pM vif %p\n",
8544 arvif->bssid, arvif->ahvif->vif);
8545
8546 guard(spinlock_bh)(&ab->base_lock);
8547 arsta = ath12k_link_sta_find_by_addr(ab, arvif->bssid);
8548 if (!arsta) {
8549 ath12k_warn(ab,
8550 "not found link sta with bssid %pM for rssi chain\n",
8551 arvif->bssid);
8552 return -EPROTO;
8553 }
8554
8555 BUILD_BUG_ON(ARRAY_SIZE(arsta->chain_signal) >
8556 ARRAY_SIZE(stats_rssi->rssi_avg_beacon));
8557
8558 for (j = 0; j < ARRAY_SIZE(arsta->chain_signal); j++)
8559 arsta->chain_signal[j] = le32_to_cpu(stats_rssi->rssi_avg_beacon[j]);
8560
8561 stats->stats_id = WMI_REQUEST_RSSI_PER_CHAIN_STAT;
8562
8563 return 0;
8564 }
8565
ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8566 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab,
8567 u16 tag, u16 len,
8568 const void *ptr, void *data)
8569 {
8570 struct wmi_tlv_fw_stats_parse *parse = data;
8571 int ret = 0;
8572
8573 switch (tag) {
8574 case WMI_TAG_STATS_EVENT:
8575 parse->ev = ptr;
8576 break;
8577 case WMI_TAG_ARRAY_BYTE:
8578 ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len);
8579 break;
8580 case WMI_TAG_PER_CHAIN_RSSI_STATS:
8581 parse->rssi = ptr;
8582 if (le32_to_cpu(parse->ev->stats_id) & WMI_REQUEST_RSSI_PER_CHAIN_STAT)
8583 parse->rssi_num = le32_to_cpu(parse->rssi->num_per_chain_rssi);
8584 break;
8585 case WMI_TAG_ARRAY_STRUCT:
8586 if (parse->rssi_num && !parse->chain_rssi_done) {
8587 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
8588 ath12k_wmi_tlv_rssi_chain_parse,
8589 parse);
8590 if (ret)
8591 return ret;
8592
8593 parse->chain_rssi_done = true;
8594 }
8595 break;
8596 default:
8597 break;
8598 }
8599 return ret;
8600 }
8601
ath12k_wmi_pull_fw_stats(struct ath12k_base * ab,struct sk_buff * skb,struct ath12k_fw_stats * stats)8602 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb,
8603 struct ath12k_fw_stats *stats)
8604 {
8605 struct wmi_tlv_fw_stats_parse parse = {};
8606
8607 stats->stats_id = 0;
8608 parse.stats = stats;
8609
8610 return ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8611 ath12k_wmi_tlv_fw_stats_parse,
8612 &parse);
8613 }
8614
ath12k_wmi_fw_stats_process(struct ath12k * ar,struct ath12k_fw_stats * stats)8615 static void ath12k_wmi_fw_stats_process(struct ath12k *ar,
8616 struct ath12k_fw_stats *stats)
8617 {
8618 struct ath12k_base *ab = ar->ab;
8619 struct ath12k_pdev *pdev;
8620 bool is_end = true;
8621 size_t total_vdevs_started = 0;
8622 int i;
8623
8624 if (stats->stats_id == WMI_REQUEST_VDEV_STAT) {
8625 if (list_empty(&stats->vdevs)) {
8626 ath12k_warn(ab, "empty vdev stats");
8627 return;
8628 }
8629 /* FW sends all the active VDEV stats irrespective of PDEV,
8630 * hence limit until the count of all VDEVs started
8631 */
8632 rcu_read_lock();
8633 for (i = 0; i < ab->num_radios; i++) {
8634 pdev = rcu_dereference(ab->pdevs_active[i]);
8635 if (pdev && pdev->ar)
8636 total_vdevs_started += pdev->ar->num_started_vdevs;
8637 }
8638 rcu_read_unlock();
8639
8640 if (total_vdevs_started)
8641 is_end = ((++ar->fw_stats.num_vdev_recvd) ==
8642 total_vdevs_started);
8643
8644 list_splice_tail_init(&stats->vdevs,
8645 &ar->fw_stats.vdevs);
8646
8647 if (is_end)
8648 complete(&ar->fw_stats_done);
8649
8650 return;
8651 }
8652
8653 if (stats->stats_id == WMI_REQUEST_BCN_STAT) {
8654 if (list_empty(&stats->bcn)) {
8655 ath12k_warn(ab, "empty beacon stats");
8656 return;
8657 }
8658
8659 list_splice_tail_init(&stats->bcn,
8660 &ar->fw_stats.bcn);
8661 complete(&ar->fw_stats_done);
8662 }
8663 }
8664
ath12k_update_stats_event(struct ath12k_base * ab,struct sk_buff * skb)8665 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb)
8666 {
8667 struct ath12k_fw_stats stats = {};
8668 struct ath12k *ar;
8669 int ret;
8670
8671 INIT_LIST_HEAD(&stats.pdevs);
8672 INIT_LIST_HEAD(&stats.vdevs);
8673 INIT_LIST_HEAD(&stats.bcn);
8674
8675 ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats);
8676 if (ret) {
8677 ath12k_warn(ab, "failed to pull fw stats: %d\n", ret);
8678 goto free;
8679 }
8680
8681 ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats");
8682
8683 rcu_read_lock();
8684 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id);
8685 if (!ar) {
8686 rcu_read_unlock();
8687 ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n",
8688 stats.pdev_id, ret);
8689 goto free;
8690 }
8691
8692 spin_lock_bh(&ar->data_lock);
8693
8694 /* Handle WMI_REQUEST_PDEV_STAT status update */
8695 if (stats.stats_id == WMI_REQUEST_PDEV_STAT) {
8696 list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs);
8697 complete(&ar->fw_stats_done);
8698 goto complete;
8699 }
8700
8701 /* Handle WMI_REQUEST_RSSI_PER_CHAIN_STAT status update */
8702 if (stats.stats_id == WMI_REQUEST_RSSI_PER_CHAIN_STAT) {
8703 complete(&ar->fw_stats_done);
8704 goto complete;
8705 }
8706
8707 /* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */
8708 ath12k_wmi_fw_stats_process(ar, &stats);
8709
8710 complete:
8711 complete(&ar->fw_stats_complete);
8712 spin_unlock_bh(&ar->data_lock);
8713 rcu_read_unlock();
8714
8715 /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised
8716 * at this point, no need to free the individual list.
8717 */
8718 return;
8719
8720 free:
8721 ath12k_fw_stats_free(&stats);
8722 }
8723
8724 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned
8725 * is not part of BDF CTL(Conformance test limits) table entries.
8726 */
ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base * ab,struct sk_buff * skb)8727 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab,
8728 struct sk_buff *skb)
8729 {
8730 const void **tb;
8731 const struct wmi_pdev_ctl_failsafe_chk_event *ev;
8732 int ret;
8733
8734 tb = ath12k_wmi_tlv_parse(ab, skb);
8735 if (IS_ERR(tb)) {
8736 ret = PTR_ERR(tb);
8737 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
8738 return;
8739 }
8740
8741 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT];
8742 if (!ev) {
8743 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev");
8744 return;
8745 }
8746
8747 ath12k_dbg(ab, ATH12K_DBG_WMI,
8748 "pdev ctl failsafe check ev status %d\n",
8749 ev->ctl_failsafe_status);
8750
8751 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power
8752 * to 10 dBm else the CTL power entry in the BDF would be picked up.
8753 */
8754 if (ev->ctl_failsafe_status != 0)
8755 ath12k_warn(ab, "pdev ctl failsafe failure status %d",
8756 ev->ctl_failsafe_status);
8757 }
8758
8759 static int
ath12k_wmi_incumbent_signal_interference_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8760 ath12k_wmi_incumbent_signal_interference_subtlv_parser(struct ath12k_base *ab,
8761 u16 tag, u16 len,
8762 const void *ptr,
8763 void *data)
8764 {
8765 const struct ath12k_wmi_incumbent_signal_interference_params *info;
8766 struct ath12k_wmi_incumbent_signal_interference_arg *arg = data;
8767
8768 switch (tag) {
8769 case WMI_TAG_DCS_INCUMBENT_SIGNAL_INTERFERENCE_TYPE:
8770 if (len < sizeof(*info)) {
8771 ath12k_warn(ab,
8772 "DCS incumbent signal interference subtlv 0x%x invalid len %u\n",
8773 tag, len);
8774 return -EINVAL;
8775 }
8776
8777 info = ptr;
8778
8779 arg->chan_width = le32_to_cpu(info->chan_width);
8780 arg->chan_freq = le32_to_cpu(info->chan_freq);
8781 arg->center_freq0 = le32_to_cpu(info->center_freq0);
8782 arg->center_freq1 = le32_to_cpu(info->center_freq1);
8783 arg->chan_bw_interference_bitmap =
8784 le32_to_cpu(info->chan_bw_interference_bitmap);
8785
8786 ath12k_dbg(ab, ATH12K_DBG_WMI,
8787 "incumbent signal interference chan width %u freq %u center_freq0 %u center_freq1 %u bitmap 0x%x\n",
8788 arg->chan_width, arg->chan_freq,
8789 arg->center_freq0, arg->center_freq1,
8790 arg->chan_bw_interference_bitmap);
8791 break;
8792 default:
8793 ath12k_warn(ab, "Received invalid tag 0x%x for WMI DCS interference in subtlvs\n",
8794 tag);
8795 return -EINVAL;
8796 }
8797
8798 return 0;
8799 }
8800
ath12k_wmi_dcs_interference_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)8801 static int ath12k_wmi_dcs_interference_event_parser(struct ath12k_base *ab,
8802 u16 tag, u16 len,
8803 const void *ptr, void *data)
8804 {
8805 int ret = 0;
8806
8807 switch (tag) {
8808 case WMI_TAG_DCS_INTERFERENCE_EVENT:
8809 /* Fixed param should already be processed */
8810 break;
8811 case WMI_TAG_ARRAY_STRUCT:
8812 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
8813 ath12k_wmi_incumbent_signal_interference_subtlv_parser,
8814 data);
8815 break;
8816 default:
8817 ath12k_warn(ab, "Received invalid tag 0x%x for WMI DCS interference event\n",
8818 tag);
8819 ret = -EINVAL;
8820 break;
8821 }
8822
8823 return ret;
8824 }
8825
8826 static bool
ath12k_wmi_validate_interference_info(struct ath12k * ar,struct ath12k_wmi_incumbent_signal_interference_arg * info)8827 ath12k_wmi_validate_interference_info(struct ath12k *ar,
8828 struct ath12k_wmi_incumbent_signal_interference_arg *info)
8829 {
8830 switch (info->chan_width) {
8831 case WMI_CHAN_WIDTH_20:
8832 if (info->chan_bw_interference_bitmap > ATH12K_WMI_DCS_SEG_PRI20) {
8833 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8834 "DCS interference event received with wrong chan width bmap 0x%x for 20 MHz",
8835 info->chan_bw_interference_bitmap);
8836 return false;
8837 }
8838 break;
8839 case WMI_CHAN_WIDTH_40:
8840 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 |
8841 ATH12K_WMI_DCS_SEG_SEC20)) {
8842 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8843 "DCS interference event received with wrong chan width bmap 0x%x for 40 MHz",
8844 info->chan_bw_interference_bitmap);
8845 return false;
8846 }
8847 break;
8848 case WMI_CHAN_WIDTH_80:
8849 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 |
8850 ATH12K_WMI_DCS_SEG_SEC20 |
8851 ATH12K_WMI_DCS_SEG_SEC40)) {
8852 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8853 "DCS interference event received with wrong chan width bmap 0x%x for 80 MHz",
8854 info->chan_bw_interference_bitmap);
8855 return false;
8856 }
8857 break;
8858 case WMI_CHAN_WIDTH_160:
8859 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 |
8860 ATH12K_WMI_DCS_SEG_SEC20 |
8861 ATH12K_WMI_DCS_SEG_SEC40 |
8862 ATH12K_WMI_DCS_SEG_SEC80)) {
8863 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8864 "DCS interference event received with wrong chan width bmap 0x%x for 160 MHz",
8865 info->chan_bw_interference_bitmap);
8866 return false;
8867 }
8868 break;
8869 case WMI_CHAN_WIDTH_320:
8870 if (info->chan_bw_interference_bitmap > (ATH12K_WMI_DCS_SEG_PRI20 |
8871 ATH12K_WMI_DCS_SEG_SEC20 |
8872 ATH12K_WMI_DCS_SEG_SEC40 |
8873 ATH12K_WMI_DCS_SEG_SEC80 |
8874 ATH12K_WMI_DCS_SEG_SEC160)) {
8875 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8876 "DCS interference event received with wrong chan width bmap 0x%x for 320 MHz",
8877 info->chan_bw_interference_bitmap);
8878 return false;
8879 }
8880 break;
8881 default:
8882 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8883 "DCS interference event received with unknown channel width %u",
8884 info->chan_width);
8885 return false;
8886 }
8887 return true;
8888 }
8889
8890 static u32
ath12k_wmi_transform_interference_bitmap(int input_bitmap,struct cfg80211_chan_def * chandef)8891 ath12k_wmi_transform_interference_bitmap(int input_bitmap,
8892 struct cfg80211_chan_def *chandef)
8893 {
8894 u16 output_bits[ATH12K_MAX_20MHZ_SEGMENTS] = {};
8895 u16 input_bits[ATH12K_MAX_20MHZ_SEGMENTS] = {};
8896 u32 start_freq, segment_freq;
8897 int primary_index = -1;
8898 u32 output_bitmap = 0;
8899 u16 num_sub_chans;
8900 int bandwidth;
8901
8902 bandwidth = nl80211_chan_width_to_mhz(chandef->width);
8903 if (bandwidth < 0)
8904 return 0;
8905
8906 /*
8907 * Firmware reports bit 0 as primary 20 MHz irrespective of absolute
8908 * frequency position. Convert to standardized lowest-to-highest 20 MHz
8909 * ordering expected by cfg80211/mac80211 userspace consumers.
8910 */
8911 num_sub_chans = bandwidth / 20;
8912 start_freq = (chandef->center_freq1 - bandwidth / 2) + 10;
8913
8914 for (int i = 0; i < ATH12K_MAX_20MHZ_SEGMENTS; i++) {
8915 segment_freq = start_freq + (i * 20);
8916 if (segment_freq == chandef->chan->center_freq) {
8917 primary_index = i;
8918 break;
8919 }
8920 }
8921 if (primary_index == -1)
8922 return 0;
8923
8924 for (int i = 0; i < ATH12K_MAX_20MHZ_SEGMENTS; ++i)
8925 input_bits[i] = BIT(i) & input_bitmap;
8926
8927 for (int i = 0; i < num_sub_chans; ++i) {
8928 int src = i, dst = i;
8929
8930 switch (bandwidth) {
8931 case 40:
8932 if (primary_index == 1)
8933 dst = 1 - i;
8934 break;
8935 case 80:
8936 dst = intf_map_80[primary_index][i];
8937 break;
8938 case 160:
8939 dst = intf_map_160[primary_index][i];
8940 break;
8941 case 320:
8942 dst = intf_map_320[primary_index][i];
8943 break;
8944 }
8945 output_bits[dst] = input_bits[src];
8946 }
8947
8948 for (int i = 0; i < ATH12K_MAX_20MHZ_SEGMENTS; ++i)
8949 output_bitmap |= output_bits[i] ? BIT(i) : 0;
8950
8951 return output_bitmap;
8952 }
8953
8954 static void
ath12k_wmi_process_incumbent_signal_interference_evt(struct ath12k_base * ab,struct sk_buff * skb,const struct ath12k_wmi_intf_arg * intf_arg)8955 ath12k_wmi_process_incumbent_signal_interference_evt(struct ath12k_base *ab,
8956 struct sk_buff *skb,
8957 const struct ath12k_wmi_intf_arg *intf_arg)
8958 {
8959 struct ath12k_wmi_incumbent_signal_interference_arg info = {};
8960 struct ath12k_incumbent_signal_interference *incumbent;
8961 struct ath12k_mac_get_any_chanctx_conf_arg arg;
8962 u32 transformed_intf_bitmap;
8963 struct ieee80211_hw *hw;
8964 struct ath12k *ar;
8965 int ret;
8966
8967 guard(rcu)();
8968
8969 ar = ath12k_mac_get_ar_by_pdev_id(ab, intf_arg->pdev_id);
8970 if (!ar) {
8971 ath12k_warn(ab, "incumbent signal interference detected on invalid pdev %d\n",
8972 intf_arg->pdev_id);
8973 return;
8974 }
8975 if (!ar->supports_6ghz) {
8976 ath12k_warn(ab, "pdev does not support 6 GHz, dropping DCS interference event\n");
8977 return;
8978 }
8979
8980 incumbent = &ar->incumbent_signal_interference;
8981 spin_lock_bh(&ar->data_lock);
8982 if (incumbent->handling_in_progress) {
8983 spin_unlock_bh(&ar->data_lock);
8984 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
8985 "incumbent signal interference handling ongoing, dropping DCS interference event");
8986 return;
8987 }
8988 spin_unlock_bh(&ar->data_lock);
8989
8990 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
8991 ath12k_wmi_dcs_interference_event_parser,
8992 &info);
8993 if (ret) {
8994 ath12k_warn(ab,
8995 "failed to parse incumbent signal interference TLV. Error %d\n",
8996 ret);
8997 return;
8998 }
8999
9000 if (!ath12k_wmi_validate_interference_info(ar, &info)) {
9001 ath12k_warn(ab, "invalid DCS incumbent signal interference TLV - Skipping event");
9002 return;
9003 }
9004
9005 arg.ar = ar;
9006 arg.chanctx_conf = NULL;
9007 hw = ath12k_ar_to_hw(ar);
9008 ieee80211_iter_chan_contexts_atomic(hw,
9009 ath12k_mac_get_any_chanctx_conf_iter,
9010 &arg);
9011 if (!arg.chanctx_conf) {
9012 ath12k_warn(ab, "failed to find valid chanctx_conf in incumbent signal intf detected event\n");
9013 return;
9014 }
9015
9016 if (info.chan_freq != arg.chanctx_conf->def.chan->center_freq) {
9017 ath12k_dbg(ab, ATH12K_DBG_WMI,
9018 "dcs interference event received with wrong channel %d (ctx freq %d)",
9019 info.chan_freq, arg.chanctx_conf->def.chan->center_freq);
9020 return;
9021 }
9022
9023 spin_lock_bh(&ar->data_lock);
9024 incumbent->center_freq = arg.chanctx_conf->def.chan->center_freq;
9025 incumbent->width = arg.chanctx_conf->def.width;
9026 incumbent->chan_bw_interference_bitmap = info.chan_bw_interference_bitmap;
9027 incumbent->handling_in_progress = true;
9028 spin_unlock_bh(&ar->data_lock);
9029 transformed_intf_bitmap =
9030 ath12k_wmi_transform_interference_bitmap(info.chan_bw_interference_bitmap,
9031 &arg.chanctx_conf->def);
9032 ath12k_dbg(ab, ATH12K_DBG_WMI,
9033 "incumbent signal interference bitmap 0x%x (transformed 0x%x)\n",
9034 info.chan_bw_interference_bitmap, transformed_intf_bitmap);
9035 cfg80211_incumbent_signal_notify(hw->wiphy,
9036 &arg.chanctx_conf->def,
9037 transformed_intf_bitmap,
9038 GFP_ATOMIC);
9039 }
9040
9041 static void
ath12k_wmi_dcs_interference_event(struct ath12k_base * ab,struct sk_buff * skb)9042 ath12k_wmi_dcs_interference_event(struct ath12k_base *ab,
9043 struct sk_buff *skb)
9044 {
9045 const struct ath12k_wmi_dcs_interference_ev_fixed_params *dcs_intf_ev;
9046 struct ath12k_wmi_intf_arg dcs_intf_arg;
9047 const struct wmi_tlv *tlv;
9048 u16 tlv_tag;
9049 u8 *ptr;
9050
9051 if (skb->len < (sizeof(*dcs_intf_ev) + TLV_HDR_SIZE)) {
9052 ath12k_warn(ab, "DCS interference event is of incorrect length\n");
9053 return;
9054 }
9055
9056 ptr = skb->data;
9057 tlv = (struct wmi_tlv *)ptr;
9058 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
9059 ptr += sizeof(*tlv);
9060
9061 if (tlv_tag != WMI_TAG_DCS_INTERFERENCE_EVENT) {
9062 ath12k_warn(ab, "DCS interference event received with wrong tag\n");
9063 return;
9064 }
9065
9066 dcs_intf_ev = (struct ath12k_wmi_dcs_interference_ev_fixed_params *)ptr;
9067
9068 dcs_intf_arg.interference_type =
9069 le32_to_cpu(dcs_intf_ev->interference_type);
9070 dcs_intf_arg.pdev_id = le32_to_cpu(dcs_intf_ev->pdev_id);
9071
9072 if (dcs_intf_arg.interference_type ==
9073 ATH12K_WMI_DCS_INCUMBENT_SIGNAL_INTERFERENCE) {
9074 ath12k_dbg(ab, ATH12K_DBG_WMI,
9075 "incumbent signal interference (Type %u) detected on pdev %u.",
9076 dcs_intf_arg.interference_type,
9077 dcs_intf_arg.pdev_id);
9078 ath12k_wmi_process_incumbent_signal_interference_evt(ab, skb,
9079 &dcs_intf_arg);
9080 }
9081 }
9082
9083 static void
ath12k_wmi_process_csa_switch_count_event(struct ath12k_base * ab,const struct ath12k_wmi_pdev_csa_event * ev,const u32 * vdev_ids)9084 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab,
9085 const struct ath12k_wmi_pdev_csa_event *ev,
9086 const u32 *vdev_ids)
9087 {
9088 u32 current_switch_count = le32_to_cpu(ev->current_switch_count);
9089 u32 vdev_ids_len = ath12k_wmi_tlv_data_len(vdev_ids);
9090 u32 num_vdevs = le32_to_cpu(ev->num_vdevs);
9091 struct ieee80211_bss_conf *conf;
9092 struct ath12k_link_vif *arvif;
9093 struct ath12k_vif *ahvif;
9094 int i;
9095
9096 if (num_vdevs > vdev_ids_len / sizeof(*vdev_ids)) {
9097 ath12k_warn(ab, "csa switch count num_vdevs %u exceeds tlv array length %u\n",
9098 num_vdevs, vdev_ids_len);
9099 return;
9100 }
9101
9102 rcu_read_lock();
9103 for (i = 0; i < num_vdevs; i++) {
9104 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]);
9105
9106 if (!arvif) {
9107 ath12k_warn(ab, "Recvd csa status for unknown vdev %d",
9108 vdev_ids[i]);
9109 continue;
9110 }
9111 ahvif = arvif->ahvif;
9112
9113 if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) {
9114 ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n",
9115 arvif->link_id);
9116 continue;
9117 }
9118
9119 conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]);
9120 if (!conf) {
9121 ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n",
9122 ahvif->vif->addr, arvif->link_id);
9123 continue;
9124 }
9125
9126 if (!arvif->is_up || !conf->csa_active)
9127 continue;
9128
9129 /* Finish CSA when counter reaches zero */
9130 if (!current_switch_count) {
9131 ieee80211_csa_finish(ahvif->vif, arvif->link_id);
9132 arvif->current_cntdown_counter = 0;
9133 } else if (current_switch_count > 1) {
9134 /* If the count in event is not what we expect, don't update the
9135 * mac80211 count. Since during beacon Tx failure, count in the
9136 * firmware will not decrement and this event will come with the
9137 * previous count value again
9138 */
9139 if (current_switch_count != arvif->current_cntdown_counter)
9140 continue;
9141
9142 arvif->current_cntdown_counter =
9143 ieee80211_beacon_update_cntdwn(ahvif->vif,
9144 arvif->link_id);
9145 }
9146 }
9147 rcu_read_unlock();
9148 }
9149
9150 static void
ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base * ab,struct sk_buff * skb)9151 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab,
9152 struct sk_buff *skb)
9153 {
9154 const void **tb;
9155 const struct ath12k_wmi_pdev_csa_event *ev;
9156 const u32 *vdev_ids;
9157 int ret;
9158
9159 tb = ath12k_wmi_tlv_parse(ab, skb);
9160 if (IS_ERR(tb)) {
9161 ret = PTR_ERR(tb);
9162 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
9163 return;
9164 }
9165
9166 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT];
9167 vdev_ids = tb[WMI_TAG_ARRAY_UINT32];
9168
9169 if (!ev || !vdev_ids) {
9170 ath12k_warn(ab, "failed to fetch pdev csa switch count ev");
9171 return;
9172 }
9173
9174 ath12k_dbg(ab, ATH12K_DBG_WMI,
9175 "pdev csa switch count %d for pdev %d, num_vdevs %d",
9176 ev->current_switch_count, ev->pdev_id,
9177 ev->num_vdevs);
9178
9179 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids);
9180 }
9181
9182 static void
ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base * ab,struct sk_buff * skb)9183 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb)
9184 {
9185 const void **tb;
9186 struct ath12k_mac_get_any_chanctx_conf_arg arg;
9187 const struct ath12k_wmi_pdev_radar_event *ev;
9188 struct ath12k *ar;
9189 int ret;
9190
9191 tb = ath12k_wmi_tlv_parse(ab, skb);
9192 if (IS_ERR(tb)) {
9193 ret = PTR_ERR(tb);
9194 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
9195 return;
9196 }
9197
9198 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT];
9199
9200 if (!ev) {
9201 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev");
9202 return;
9203 }
9204
9205 ath12k_dbg(ab, ATH12K_DBG_WMI,
9206 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d",
9207 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width,
9208 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp,
9209 ev->freq_offset, ev->sidx);
9210
9211 rcu_read_lock();
9212
9213 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
9214
9215 if (!ar) {
9216 ath12k_warn(ab, "radar detected in invalid pdev %d\n",
9217 ev->pdev_id);
9218 goto exit;
9219 }
9220
9221 arg.ar = ar;
9222 arg.chanctx_conf = NULL;
9223 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar),
9224 ath12k_mac_get_any_chanctx_conf_iter, &arg);
9225 if (!arg.chanctx_conf) {
9226 ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n");
9227 goto exit;
9228 }
9229
9230 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n",
9231 ev->pdev_id);
9232
9233 if (ar->dfs_block_radar_events)
9234 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n");
9235 else
9236 ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf);
9237
9238 exit:
9239 rcu_read_unlock();
9240 }
9241
ath12k_tm_wmi_event_segmented(struct ath12k_base * ab,u32 cmd_id,struct sk_buff * skb)9242 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id,
9243 struct sk_buff *skb)
9244 {
9245 const struct ath12k_wmi_ftm_event *ev;
9246 const void **tb;
9247 int ret;
9248 u16 length;
9249
9250 tb = ath12k_wmi_tlv_parse(ab, skb);
9251
9252 if (IS_ERR(tb)) {
9253 ret = PTR_ERR(tb);
9254 ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret);
9255 return;
9256 }
9257
9258 ev = tb[WMI_TAG_ARRAY_BYTE];
9259 if (!ev) {
9260 ath12k_warn(ab, "failed to fetch ftm msg\n");
9261 return;
9262 }
9263
9264 length = skb->len - TLV_HDR_SIZE;
9265 ath12k_tm_process_event(ab, cmd_id, ev, length);
9266 }
9267
9268 static void
ath12k_wmi_pdev_temperature_event(struct ath12k_base * ab,struct sk_buff * skb)9269 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
9270 struct sk_buff *skb)
9271 {
9272 const struct wmi_pdev_temperature_event *ev;
9273 struct ath12k *ar;
9274 const void **tb;
9275 int temp;
9276 u32 pdev_id;
9277
9278 tb = ath12k_wmi_tlv_parse(ab, skb);
9279 if (IS_ERR(tb)) {
9280 ath12k_warn(ab, "failed to parse tlv: %ld\n", PTR_ERR(tb));
9281 return;
9282 }
9283
9284 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT];
9285 if (!ev) {
9286 ath12k_warn(ab, "failed to fetch pdev temp ev\n");
9287 return;
9288 }
9289
9290 temp = a_sle32_to_cpu(ev->temp);
9291 pdev_id = le32_to_cpu(ev->pdev_id);
9292
9293 ath12k_dbg(ab, ATH12K_DBG_WMI,
9294 "pdev temperature ev temp %d pdev_id %u\n",
9295 temp, pdev_id);
9296
9297 rcu_read_lock();
9298
9299 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id);
9300 if (!ar) {
9301 ath12k_warn(ab, "invalid pdev id %u in pdev temperature ev\n",
9302 pdev_id);
9303 goto exit;
9304 }
9305
9306 ath12k_thermal_event_temperature(ar, temp);
9307
9308 exit:
9309 rcu_read_unlock();
9310 }
9311
ath12k_wmi_thermal_throt_stats_event(struct ath12k_base * ab,struct sk_buff * skb)9312 static void ath12k_wmi_thermal_throt_stats_event(struct ath12k_base *ab,
9313 struct sk_buff *skb)
9314 {
9315 const struct wmi_therm_throt_stats_event *ev;
9316 struct ath12k *ar;
9317 const void **tb;
9318
9319 tb = ath12k_wmi_tlv_parse(ab, skb);
9320 if (IS_ERR(tb)) {
9321 ath12k_err(ab, "failed to parse thermal throttling stats tlv: %ld\n",
9322 PTR_ERR(tb));
9323 return;
9324 }
9325
9326 ev = tb[WMI_TAG_THERM_THROT_STATS_EVENT];
9327 if (!ev) {
9328 ath12k_err(ab, "failed to fetch thermal throt stats ev\n");
9329 return;
9330 }
9331
9332 rcu_read_lock();
9333 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id));
9334 if (!ar) {
9335 ath12k_warn(ab, "received thermal_throt_stats in invalid pdev %u\n",
9336 le32_to_cpu(ev->pdev_id));
9337 rcu_read_unlock();
9338 return;
9339 }
9340 rcu_read_unlock();
9341
9342 ath12k_dbg(ab, ATH12K_DBG_WMI,
9343 "thermal stats ev level %u pdev_id %u temp %u throt_levels %u\n",
9344 le32_to_cpu(ev->level), le32_to_cpu(ev->pdev_id),
9345 le32_to_cpu(ev->temp), le32_to_cpu(ev->therm_throt_levels));
9346 }
9347
ath12k_fils_discovery_event(struct ath12k_base * ab,struct sk_buff * skb)9348 static void ath12k_fils_discovery_event(struct ath12k_base *ab,
9349 struct sk_buff *skb)
9350 {
9351 const void **tb;
9352 const struct wmi_fils_discovery_event *ev;
9353 int ret;
9354
9355 tb = ath12k_wmi_tlv_parse(ab, skb);
9356 if (IS_ERR(tb)) {
9357 ret = PTR_ERR(tb);
9358 ath12k_warn(ab,
9359 "failed to parse FILS discovery event tlv %d\n",
9360 ret);
9361 return;
9362 }
9363
9364 ev = tb[WMI_TAG_HOST_SWFDA_EVENT];
9365 if (!ev) {
9366 ath12k_warn(ab, "failed to fetch FILS discovery event\n");
9367 return;
9368 }
9369
9370 ath12k_warn(ab,
9371 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n",
9372 ev->vdev_id, ev->fils_tt, ev->tbtt);
9373 }
9374
ath12k_probe_resp_tx_status_event(struct ath12k_base * ab,struct sk_buff * skb)9375 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab,
9376 struct sk_buff *skb)
9377 {
9378 const void **tb;
9379 const struct wmi_probe_resp_tx_status_event *ev;
9380 int ret;
9381
9382 tb = ath12k_wmi_tlv_parse(ab, skb);
9383 if (IS_ERR(tb)) {
9384 ret = PTR_ERR(tb);
9385 ath12k_warn(ab,
9386 "failed to parse probe response transmission status event tlv: %d\n",
9387 ret);
9388 return;
9389 }
9390
9391 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT];
9392 if (!ev) {
9393 ath12k_warn(ab,
9394 "failed to fetch probe response transmission status event");
9395 return;
9396 }
9397
9398 if (ev->tx_status)
9399 ath12k_warn(ab,
9400 "Probe response transmission failed for vdev_id %u, status %u\n",
9401 ev->vdev_id, ev->tx_status);
9402 }
9403
ath12k_wmi_p2p_noa_event(struct ath12k_base * ab,struct sk_buff * skb)9404 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab,
9405 struct sk_buff *skb)
9406 {
9407 const void **tb;
9408 const struct wmi_p2p_noa_event *ev;
9409 const struct ath12k_wmi_p2p_noa_info *noa;
9410 struct ath12k *ar;
9411 int ret, vdev_id;
9412
9413 tb = ath12k_wmi_tlv_parse(ab, skb);
9414 if (IS_ERR(tb)) {
9415 ret = PTR_ERR(tb);
9416 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret);
9417 return ret;
9418 }
9419
9420 ev = tb[WMI_TAG_P2P_NOA_EVENT];
9421 noa = tb[WMI_TAG_P2P_NOA_INFO];
9422
9423 if (!ev || !noa)
9424 return -EPROTO;
9425
9426 vdev_id = __le32_to_cpu(ev->vdev_id);
9427
9428 ath12k_dbg(ab, ATH12K_DBG_WMI,
9429 "wmi tlv p2p noa vdev_id %i descriptors %u\n",
9430 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM));
9431
9432 rcu_read_lock();
9433 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id);
9434 if (!ar) {
9435 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n",
9436 vdev_id);
9437 ret = -EINVAL;
9438 goto unlock;
9439 }
9440
9441 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa);
9442
9443 ret = 0;
9444
9445 unlock:
9446 rcu_read_unlock();
9447 return ret;
9448 }
9449
ath12k_rfkill_state_change_event(struct ath12k_base * ab,struct sk_buff * skb)9450 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab,
9451 struct sk_buff *skb)
9452 {
9453 const struct wmi_rfkill_state_change_event *ev;
9454 const void **tb;
9455 int ret;
9456
9457 tb = ath12k_wmi_tlv_parse(ab, skb);
9458 if (IS_ERR(tb)) {
9459 ret = PTR_ERR(tb);
9460 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
9461 return;
9462 }
9463
9464 ev = tb[WMI_TAG_RFKILL_EVENT];
9465 if (!ev)
9466 return;
9467
9468 ath12k_dbg(ab, ATH12K_DBG_MAC,
9469 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n",
9470 le32_to_cpu(ev->gpio_pin_num),
9471 le32_to_cpu(ev->int_type),
9472 le32_to_cpu(ev->radio_state));
9473
9474 spin_lock_bh(&ab->base_lock);
9475 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON));
9476 spin_unlock_bh(&ab->base_lock);
9477
9478 queue_work(ab->workqueue, &ab->rfkill_work);
9479 }
9480
9481 static void
ath12k_wmi_diag_event(struct ath12k_base * ab,struct sk_buff * skb)9482 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb)
9483 {
9484 trace_ath12k_wmi_diag(ab, skb->data, skb->len);
9485 }
9486
ath12k_wmi_twt_enable_event(struct ath12k_base * ab,struct sk_buff * skb)9487 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab,
9488 struct sk_buff *skb)
9489 {
9490 const void **tb;
9491 const struct wmi_twt_enable_event *ev;
9492 int ret;
9493
9494 tb = ath12k_wmi_tlv_parse(ab, skb);
9495 if (IS_ERR(tb)) {
9496 ret = PTR_ERR(tb);
9497 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n",
9498 ret);
9499 return;
9500 }
9501
9502 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT];
9503 if (!ev) {
9504 ath12k_warn(ab, "failed to fetch twt enable wmi event\n");
9505 return;
9506 }
9507
9508 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n",
9509 le32_to_cpu(ev->pdev_id),
9510 le32_to_cpu(ev->status));
9511 }
9512
ath12k_wmi_twt_disable_event(struct ath12k_base * ab,struct sk_buff * skb)9513 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab,
9514 struct sk_buff *skb)
9515 {
9516 const void **tb;
9517 const struct wmi_twt_disable_event *ev;
9518 int ret;
9519
9520 tb = ath12k_wmi_tlv_parse(ab, skb);
9521 if (IS_ERR(tb)) {
9522 ret = PTR_ERR(tb);
9523 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n",
9524 ret);
9525 return;
9526 }
9527
9528 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT];
9529 if (!ev) {
9530 ath12k_warn(ab, "failed to fetch twt disable wmi event\n");
9531 return;
9532 }
9533
9534 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n",
9535 le32_to_cpu(ev->pdev_id),
9536 le32_to_cpu(ev->status));
9537 }
9538
ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9539 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab,
9540 u16 tag, u16 len,
9541 const void *ptr, void *data)
9542 {
9543 const struct wmi_wow_ev_pg_fault_param *pf_param;
9544 const struct wmi_wow_ev_param *param;
9545 struct wmi_wow_ev_arg *arg = data;
9546 int pf_len;
9547
9548 switch (tag) {
9549 case WMI_TAG_WOW_EVENT_INFO:
9550 param = ptr;
9551 arg->wake_reason = le32_to_cpu(param->wake_reason);
9552 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n",
9553 arg->wake_reason, wow_reason(arg->wake_reason));
9554 break;
9555
9556 case WMI_TAG_ARRAY_BYTE:
9557 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) {
9558 pf_param = ptr;
9559 pf_len = le32_to_cpu(pf_param->len);
9560 if (pf_len > len - sizeof(pf_len) ||
9561 pf_len < 0) {
9562 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n",
9563 pf_len);
9564 return -EINVAL;
9565 }
9566 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n",
9567 pf_len);
9568 ath12k_dbg_dump(ab, ATH12K_DBG_WMI,
9569 "wow_reason_page_fault packet present",
9570 "wow_pg_fault ",
9571 pf_param->data,
9572 pf_len);
9573 }
9574 break;
9575 default:
9576 break;
9577 }
9578
9579 return 0;
9580 }
9581
ath12k_wmi_event_wow_wakeup_host(struct ath12k_base * ab,struct sk_buff * skb)9582 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb)
9583 {
9584 struct wmi_wow_ev_arg arg = { };
9585 int ret;
9586
9587 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
9588 ath12k_wmi_wow_wakeup_host_parse,
9589 &arg);
9590 if (ret) {
9591 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n",
9592 ret);
9593 return;
9594 }
9595
9596 complete(&ab->wow.wakeup_completed);
9597 }
9598
ath12k_wmi_gtk_offload_status_event(struct ath12k_base * ab,struct sk_buff * skb)9599 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab,
9600 struct sk_buff *skb)
9601 {
9602 const struct wmi_gtk_offload_status_event *ev;
9603 struct ath12k_link_vif *arvif;
9604 __be64 replay_ctr_be;
9605 u64 replay_ctr;
9606 const void **tb;
9607 int ret;
9608
9609 tb = ath12k_wmi_tlv_parse(ab, skb);
9610 if (IS_ERR(tb)) {
9611 ret = PTR_ERR(tb);
9612 ath12k_warn(ab, "failed to parse tlv: %d\n", ret);
9613 return;
9614 }
9615
9616 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT];
9617 if (!ev) {
9618 ath12k_warn(ab, "failed to fetch gtk offload status ev");
9619 return;
9620 }
9621
9622 rcu_read_lock();
9623 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id));
9624 if (!arvif) {
9625 rcu_read_unlock();
9626 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n",
9627 le32_to_cpu(ev->vdev_id));
9628 return;
9629 }
9630
9631 replay_ctr = le64_to_cpu(ev->replay_ctr);
9632 arvif->rekey_data.replay_ctr = replay_ctr;
9633 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n",
9634 le32_to_cpu(ev->refresh_cnt), replay_ctr);
9635
9636 /* supplicant expects big-endian replay counter */
9637 replay_ctr_be = cpu_to_be64(replay_ctr);
9638
9639 ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid,
9640 (void *)&replay_ctr_be, GFP_ATOMIC);
9641
9642 rcu_read_unlock();
9643 }
9644
ath12k_wmi_event_mlo_setup_complete(struct ath12k_base * ab,struct sk_buff * skb)9645 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab,
9646 struct sk_buff *skb)
9647 {
9648 const struct wmi_mlo_setup_complete_event *ev;
9649 struct ath12k *ar = NULL;
9650 struct ath12k_pdev *pdev;
9651 const void **tb;
9652 int ret, i;
9653
9654 tb = ath12k_wmi_tlv_parse(ab, skb);
9655 if (IS_ERR(tb)) {
9656 ret = PTR_ERR(tb);
9657 ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n",
9658 ret);
9659 return;
9660 }
9661
9662 ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT];
9663 if (!ev) {
9664 ath12k_warn(ab, "failed to fetch mlo setup complete event\n");
9665 return;
9666 }
9667
9668 if (le32_to_cpu(ev->pdev_id) > ab->num_radios)
9669 goto skip_lookup;
9670
9671 for (i = 0; i < ab->num_radios; i++) {
9672 pdev = &ab->pdevs[i];
9673 if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) {
9674 ar = pdev->ar;
9675 break;
9676 }
9677 }
9678
9679 skip_lookup:
9680 if (!ar) {
9681 ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n",
9682 ev->pdev_id, ev->status);
9683 return;
9684 }
9685
9686 ar->mlo_setup_status = le32_to_cpu(ev->status);
9687 complete(&ar->mlo_setup_done);
9688 }
9689
ath12k_wmi_event_teardown_complete(struct ath12k_base * ab,struct sk_buff * skb)9690 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab,
9691 struct sk_buff *skb)
9692 {
9693 const struct wmi_mlo_teardown_complete_event *ev;
9694 const void **tb;
9695 int ret;
9696
9697 tb = ath12k_wmi_tlv_parse(ab, skb);
9698 if (IS_ERR(tb)) {
9699 ret = PTR_ERR(tb);
9700 ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret);
9701 return;
9702 }
9703
9704 ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE];
9705 if (!ev)
9706 ath12k_warn(ab, "failed to fetch teardown complete event\n");
9707 }
9708
9709 #ifdef CONFIG_ATH12K_DEBUGFS
ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base * ab,const void * ptr,u16 tag,u16 len,struct wmi_tpc_stats_arg * tpc_stats)9710 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab,
9711 const void *ptr, u16 tag, u16 len,
9712 struct wmi_tpc_stats_arg *tpc_stats)
9713 {
9714 u32 len1, len2, len3, len4;
9715 s16 *dst_ptr;
9716 s8 *dst_ptr_ctl;
9717
9718 len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len);
9719 len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len);
9720 len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len);
9721 len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len);
9722
9723 switch (tpc_stats->event_count) {
9724 case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT:
9725 if (len1 > len)
9726 return -ENOBUFS;
9727
9728 if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) {
9729 dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array;
9730 memcpy(dst_ptr, ptr, len1);
9731 }
9732 break;
9733 case ATH12K_TPC_STATS_RATES_EVENT1:
9734 if (len2 > len)
9735 return -ENOBUFS;
9736
9737 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) {
9738 dst_ptr = tpc_stats->rates_array1.rate_array;
9739 memcpy(dst_ptr, ptr, len2);
9740 }
9741 break;
9742 case ATH12K_TPC_STATS_RATES_EVENT2:
9743 if (len3 > len)
9744 return -ENOBUFS;
9745
9746 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) {
9747 dst_ptr = tpc_stats->rates_array2.rate_array;
9748 memcpy(dst_ptr, ptr, len3);
9749 }
9750 break;
9751 case ATH12K_TPC_STATS_CTL_TABLE_EVENT:
9752 if (len4 > len)
9753 return -ENOBUFS;
9754
9755 if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) {
9756 dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table;
9757 memcpy(dst_ptr_ctl, ptr, len4);
9758 }
9759 break;
9760 }
9761 return 0;
9762 }
9763
ath12k_tpc_get_reg_pwr(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_max_reg_power_fixed_params * ev)9764 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab,
9765 struct wmi_tpc_stats_arg *tpc_stats,
9766 struct wmi_max_reg_power_fixed_params *ev)
9767 {
9768 struct wmi_max_reg_power_allowed_arg *reg_pwr;
9769 u32 total_size;
9770
9771 ath12k_dbg(ab, ATH12K_DBG_WMI,
9772 "Received reg power array type %d length %d for tpc stats\n",
9773 ev->reg_power_type, ev->reg_array_len);
9774
9775 switch (le32_to_cpu(ev->reg_power_type)) {
9776 case TPC_STATS_REG_PWR_ALLOWED_TYPE:
9777 reg_pwr = &tpc_stats->max_reg_allowed_power;
9778 break;
9779 default:
9780 return -EINVAL;
9781 }
9782
9783 /* Each entry is 2 byte hence multiplying the indices with 2 */
9784 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9785 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2;
9786 if (le32_to_cpu(ev->reg_array_len) != total_size) {
9787 ath12k_warn(ab,
9788 "Total size and reg_array_len doesn't match for tpc stats\n");
9789 return -EINVAL;
9790 }
9791
9792 memcpy(®_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params));
9793
9794 reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len),
9795 GFP_ATOMIC);
9796 if (!reg_pwr->reg_pwr_array)
9797 return -ENOMEM;
9798
9799 tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED;
9800
9801 return 0;
9802 }
9803
ath12k_tpc_get_rate_array(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_rates_array_fixed_params * ev)9804 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab,
9805 struct wmi_tpc_stats_arg *tpc_stats,
9806 struct wmi_tpc_rates_array_fixed_params *ev)
9807 {
9808 struct wmi_tpc_rates_array_arg *rates_array;
9809 u32 flag = 0, rate_array_len;
9810
9811 ath12k_dbg(ab, ATH12K_DBG_WMI,
9812 "Received rates array type %d length %d for tpc stats\n",
9813 ev->rate_array_type, ev->rate_array_len);
9814
9815 switch (le32_to_cpu(ev->rate_array_type)) {
9816 case ATH12K_TPC_STATS_RATES_ARRAY1:
9817 rates_array = &tpc_stats->rates_array1;
9818 flag = WMI_TPC_RATES_ARRAY1;
9819 break;
9820 case ATH12K_TPC_STATS_RATES_ARRAY2:
9821 rates_array = &tpc_stats->rates_array2;
9822 flag = WMI_TPC_RATES_ARRAY2;
9823 break;
9824 default:
9825 ath12k_warn(ab,
9826 "Received invalid type of rates array for tpc stats\n");
9827 return -EINVAL;
9828 }
9829 memcpy(&rates_array->tpc_rates_array, ev,
9830 sizeof(struct wmi_tpc_rates_array_fixed_params));
9831 rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len);
9832 rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC);
9833 if (!rates_array->rate_array)
9834 return -ENOMEM;
9835
9836 tpc_stats->tlvs_rcvd |= flag;
9837 return 0;
9838 }
9839
ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base * ab,struct wmi_tpc_stats_arg * tpc_stats,struct wmi_tpc_ctl_pwr_fixed_params * ev)9840 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab,
9841 struct wmi_tpc_stats_arg *tpc_stats,
9842 struct wmi_tpc_ctl_pwr_fixed_params *ev)
9843 {
9844 struct wmi_tpc_ctl_pwr_table_arg *ctl_array;
9845 u32 total_size, ctl_array_len, flag = 0;
9846
9847 ath12k_dbg(ab, ATH12K_DBG_WMI,
9848 "Received ctl array type %d length %d for tpc stats\n",
9849 ev->ctl_array_type, ev->ctl_array_len);
9850
9851 switch (le32_to_cpu(ev->ctl_array_type)) {
9852 case ATH12K_TPC_STATS_CTL_ARRAY:
9853 ctl_array = &tpc_stats->ctl_array;
9854 flag = WMI_TPC_CTL_PWR_ARRAY;
9855 break;
9856 default:
9857 ath12k_warn(ab,
9858 "Received invalid type of ctl pwr table for tpc stats\n");
9859 return -EINVAL;
9860 }
9861
9862 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) *
9863 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4);
9864 if (le32_to_cpu(ev->ctl_array_len) != total_size) {
9865 ath12k_warn(ab,
9866 "Total size and ctl_array_len doesn't match for tpc stats\n");
9867 return -EINVAL;
9868 }
9869
9870 memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params));
9871 ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len);
9872 ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC);
9873 if (!ctl_array->ctl_pwr_table)
9874 return -ENOMEM;
9875
9876 tpc_stats->tlvs_rcvd |= flag;
9877 return 0;
9878 }
9879
ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9880 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab,
9881 u16 tag, u16 len,
9882 const void *ptr, void *data)
9883 {
9884 struct wmi_tpc_rates_array_fixed_params *tpc_rates_array;
9885 struct wmi_max_reg_power_fixed_params *tpc_reg_pwr;
9886 struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr;
9887 struct wmi_tpc_stats_arg *tpc_stats = data;
9888 struct wmi_tpc_config_params *tpc_config;
9889 int ret = 0;
9890
9891 if (!tpc_stats) {
9892 ath12k_warn(ab, "tpc stats memory unavailable\n");
9893 return -EINVAL;
9894 }
9895
9896 switch (tag) {
9897 case WMI_TAG_TPC_STATS_CONFIG_EVENT:
9898 tpc_config = (struct wmi_tpc_config_params *)ptr;
9899 memcpy(&tpc_stats->tpc_config, tpc_config,
9900 sizeof(struct wmi_tpc_config_params));
9901 break;
9902 case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED:
9903 tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr;
9904 ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr);
9905 break;
9906 case WMI_TAG_TPC_STATS_RATES_ARRAY:
9907 tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr;
9908 ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array);
9909 break;
9910 case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT:
9911 tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr;
9912 ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr);
9913 break;
9914 default:
9915 ath12k_warn(ab,
9916 "Received invalid tag for tpc stats in subtlvs\n");
9917 return -EINVAL;
9918 }
9919 return ret;
9920 }
9921
ath12k_wmi_tpc_stats_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)9922 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab,
9923 u16 tag, u16 len,
9924 const void *ptr, void *data)
9925 {
9926 struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data;
9927 int ret;
9928
9929 switch (tag) {
9930 case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM:
9931 ret = 0;
9932 /* Fixed param is already processed*/
9933 break;
9934 case WMI_TAG_ARRAY_STRUCT:
9935 /* len 0 is expected for array of struct when there
9936 * is no content of that type to pack inside that tlv
9937 */
9938 if (len == 0)
9939 return 0;
9940 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
9941 ath12k_wmi_tpc_stats_subtlv_parser,
9942 tpc_stats);
9943 break;
9944 case WMI_TAG_ARRAY_INT16:
9945 if (len == 0)
9946 return 0;
9947 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9948 WMI_TAG_ARRAY_INT16,
9949 len, tpc_stats);
9950 break;
9951 case WMI_TAG_ARRAY_BYTE:
9952 if (len == 0)
9953 return 0;
9954 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr,
9955 WMI_TAG_ARRAY_BYTE,
9956 len, tpc_stats);
9957 break;
9958 default:
9959 ath12k_warn(ab, "Received invalid tag for tpc stats\n");
9960 ret = -EINVAL;
9961 break;
9962 }
9963 return ret;
9964 }
9965
ath12k_wmi_free_tpc_stats_mem(struct ath12k * ar)9966 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar)
9967 {
9968 struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats;
9969
9970 lockdep_assert_held(&ar->data_lock);
9971 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n");
9972 if (tpc_stats) {
9973 kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array);
9974 kfree(tpc_stats->rates_array1.rate_array);
9975 kfree(tpc_stats->rates_array2.rate_array);
9976 kfree(tpc_stats->ctl_array.ctl_pwr_table);
9977 kfree(tpc_stats);
9978 ar->debug.tpc_stats = NULL;
9979 }
9980 }
9981
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)9982 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
9983 struct sk_buff *skb)
9984 {
9985 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param;
9986 struct wmi_tpc_stats_arg *tpc_stats;
9987 const struct wmi_tlv *tlv;
9988 void *ptr = skb->data;
9989 struct ath12k *ar;
9990 u16 tlv_tag;
9991 u16 tlv_len;
9992 u32 event_count;
9993 int ret;
9994
9995 if (!skb->data) {
9996 ath12k_warn(ab, "No data present in tpc stats event\n");
9997 return;
9998 }
9999
10000 if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
10001 ath12k_warn(ab, "TPC stats event size invalid\n");
10002 return;
10003 }
10004
10005 tlv = (struct wmi_tlv *)ptr;
10006 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
10007 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN);
10008 ptr += sizeof(*tlv);
10009
10010 if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) {
10011 ath12k_warn(ab, "TPC stats without fixed param tlv at start\n");
10012 return;
10013 }
10014
10015 if (tlv_len < sizeof(*fixed_param)) {
10016 ath12k_warn(ab, "TPC stats fixed param tlv len %u too short\n",
10017 tlv_len);
10018 return;
10019 }
10020
10021 fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr;
10022 rcu_read_lock();
10023 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1);
10024 if (!ar) {
10025 ath12k_warn(ab, "Failed to get ar for tpc stats\n");
10026 rcu_read_unlock();
10027 return;
10028 }
10029 spin_lock_bh(&ar->data_lock);
10030 if (!ar->debug.tpc_request) {
10031 /* Event is received either without request or the
10032 * timeout, if memory is already allocated free it
10033 */
10034 if (ar->debug.tpc_stats) {
10035 ath12k_warn(ab, "Freeing memory for tpc_stats\n");
10036 ath12k_wmi_free_tpc_stats_mem(ar);
10037 }
10038 goto unlock;
10039 }
10040
10041 event_count = le32_to_cpu(fixed_param->event_count);
10042 if (event_count == 0) {
10043 if (ar->debug.tpc_stats) {
10044 ath12k_warn(ab,
10045 "Invalid tpc memory present\n");
10046 goto unlock;
10047 }
10048 ar->debug.tpc_stats =
10049 kzalloc_obj(struct wmi_tpc_stats_arg, GFP_ATOMIC);
10050 if (!ar->debug.tpc_stats) {
10051 ath12k_warn(ab,
10052 "Failed to allocate memory for tpc stats\n");
10053 goto unlock;
10054 }
10055 }
10056
10057 tpc_stats = ar->debug.tpc_stats;
10058 if (!tpc_stats) {
10059 ath12k_warn(ab, "tpc stats memory unavailable\n");
10060 goto unlock;
10061 }
10062
10063 if (!(event_count == 0)) {
10064 if (event_count != tpc_stats->event_count + 1) {
10065 ath12k_warn(ab,
10066 "Invalid tpc event received\n");
10067 goto unlock;
10068 }
10069 }
10070 tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id);
10071 tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event);
10072 tpc_stats->event_count = le32_to_cpu(fixed_param->event_count);
10073 ath12k_dbg(ab, ATH12K_DBG_WMI,
10074 "tpc stats event_count %d\n",
10075 tpc_stats->event_count);
10076 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
10077 ath12k_wmi_tpc_stats_event_parser,
10078 tpc_stats);
10079 if (ret) {
10080 ath12k_wmi_free_tpc_stats_mem(ar);
10081 ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret);
10082 goto unlock;
10083 }
10084
10085 if (tpc_stats->end_of_event)
10086 complete(&ar->debug.tpc_complete);
10087
10088 unlock:
10089 spin_unlock_bh(&ar->data_lock);
10090 rcu_read_unlock();
10091 }
10092 #else
ath12k_wmi_process_tpc_stats(struct ath12k_base * ab,struct sk_buff * skb)10093 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
10094 struct sk_buff *skb)
10095 {
10096 }
10097 #endif
10098
10099 static int
ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)10100 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab,
10101 u16 tag, u16 len,
10102 const void *ptr, void *data)
10103 {
10104 const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info;
10105 const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info;
10106 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data;
10107 struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg;
10108 s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM];
10109 u8 num_20mhz_segments;
10110 s8 min_nf, *nf_ptr;
10111 int i, j;
10112
10113 switch (tag) {
10114 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO:
10115 if (len < sizeof(*param_info)) {
10116 ath12k_warn(ab,
10117 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
10118 tag, len);
10119 return -EINVAL;
10120 }
10121
10122 param_info = ptr;
10123
10124 param_arg.curr_bw = le32_to_cpu(param_info->curr_bw);
10125 param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask);
10126
10127 /* The received array is actually a 2D byte-array for per chain,
10128 * per 20MHz subband. Convert to 2D byte-array
10129 */
10130 nf_ptr = ¶m_arg.nf_hw_dbm[0][0];
10131
10132 for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) {
10133 nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]);
10134
10135 for (j = 0; j < 4; j++) {
10136 *nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF;
10137 nf_ptr++;
10138 }
10139 }
10140
10141 switch (param_arg.curr_bw) {
10142 case WMI_CHAN_WIDTH_20:
10143 num_20mhz_segments = 1;
10144 break;
10145 case WMI_CHAN_WIDTH_40:
10146 num_20mhz_segments = 2;
10147 break;
10148 case WMI_CHAN_WIDTH_80:
10149 num_20mhz_segments = 4;
10150 break;
10151 case WMI_CHAN_WIDTH_160:
10152 num_20mhz_segments = 8;
10153 break;
10154 case WMI_CHAN_WIDTH_320:
10155 num_20mhz_segments = 16;
10156 break;
10157 default:
10158 ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event",
10159 param_arg.curr_bw);
10160 /* In error case, still consider the primary 20 MHz segment since
10161 * that would be much better than instead of dropping the whole
10162 * event
10163 */
10164 num_20mhz_segments = 1;
10165 }
10166
10167 min_nf = ATH12K_DEFAULT_NOISE_FLOOR;
10168
10169 for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) {
10170 if (!(param_arg.curr_rx_chainmask & BIT(i)))
10171 continue;
10172
10173 for (j = 0; j < num_20mhz_segments; j++) {
10174 if (param_arg.nf_hw_dbm[i][j] < min_nf)
10175 min_nf = param_arg.nf_hw_dbm[i][j];
10176 }
10177 }
10178
10179 rssi_info->min_nf_dbm = min_nf;
10180 rssi_info->nf_dbm_present = true;
10181 break;
10182 case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO:
10183 if (len < sizeof(*temp_info)) {
10184 ath12k_warn(ab,
10185 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
10186 tag, len);
10187 return -EINVAL;
10188 }
10189
10190 temp_info = ptr;
10191 rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset);
10192 rssi_info->temp_offset_present = true;
10193 break;
10194 default:
10195 ath12k_dbg(ab, ATH12K_DBG_WMI,
10196 "Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag);
10197 }
10198
10199 return 0;
10200 }
10201
10202 static int
ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base * ab,u16 tag,u16 len,const void * ptr,void * data)10203 ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab,
10204 u16 tag, u16 len,
10205 const void *ptr, void *data)
10206 {
10207 int ret = 0;
10208
10209 switch (tag) {
10210 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM:
10211 /* Fixed param is already processed*/
10212 break;
10213 case WMI_TAG_ARRAY_STRUCT:
10214 /* len 0 is expected for array of struct when there
10215 * is no content of that type inside that tlv
10216 */
10217 if (len == 0)
10218 return 0;
10219
10220 ret = ath12k_wmi_tlv_iter(ab, ptr, len,
10221 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser,
10222 data);
10223 break;
10224 default:
10225 ath12k_dbg(ab, ATH12K_DBG_WMI,
10226 "Received invalid tag 0x%x for RSSI dbm conv info event\n",
10227 tag);
10228 break;
10229 }
10230
10231 return ret;
10232 }
10233
10234 static int
ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base * ab,u8 * ptr,size_t len,int * pdev_id)10235 ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr,
10236 size_t len, int *pdev_id)
10237 {
10238 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param;
10239 const struct wmi_tlv *tlv;
10240 u16 tlv_tag;
10241
10242 if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
10243 ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len);
10244 return -EINVAL;
10245 }
10246
10247 tlv = (struct wmi_tlv *)ptr;
10248 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
10249 ptr += sizeof(*tlv);
10250
10251 if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) {
10252 ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n");
10253 return -EINVAL;
10254 }
10255
10256 fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr;
10257 *pdev_id = le32_to_cpu(fixed_param->pdev_id);
10258
10259 return 0;
10260 }
10261
10262 static void
ath12k_wmi_update_rssi_offsets(struct ath12k * ar,struct ath12k_wmi_rssi_dbm_conv_info_arg * rssi_info)10263 ath12k_wmi_update_rssi_offsets(struct ath12k *ar,
10264 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info)
10265 {
10266 struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info;
10267
10268 lockdep_assert_held(&ar->data_lock);
10269
10270 if (rssi_info->temp_offset_present)
10271 info->temp_offset = rssi_info->temp_offset;
10272
10273 if (rssi_info->nf_dbm_present)
10274 info->min_nf_dbm = rssi_info->min_nf_dbm;
10275
10276 info->noise_floor = info->min_nf_dbm + info->temp_offset;
10277 }
10278
10279 static void
ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base * ab,struct sk_buff * skb)10280 ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab,
10281 struct sk_buff *skb)
10282 {
10283 struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info = {};
10284 struct ath12k *ar;
10285 s32 noise_floor;
10286 u32 pdev_id;
10287 int ret;
10288
10289 ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len,
10290 &pdev_id);
10291 if (ret) {
10292 ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n",
10293 ret);
10294 return;
10295 }
10296
10297 rcu_read_lock();
10298 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id);
10299 /* If pdev is not active, ignore the event */
10300 if (!ar)
10301 goto out_unlock;
10302
10303 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
10304 ath12k_wmi_rssi_dbm_conv_info_event_parser,
10305 &rssi_info);
10306 if (ret) {
10307 ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n");
10308 goto out_unlock;
10309 }
10310
10311 spin_lock_bh(&ar->data_lock);
10312 ath12k_wmi_update_rssi_offsets(ar, &rssi_info);
10313 noise_floor = ath12k_pdev_get_noise_floor(ar);
10314 spin_unlock_bh(&ar->data_lock);
10315
10316 ath12k_dbg(ab, ATH12K_DBG_WMI,
10317 "RSSI noise floor updated, new value is %d dbm\n", noise_floor);
10318 out_unlock:
10319 rcu_read_unlock();
10320 }
10321
ath12k_wmi_op_rx(struct ath12k_base * ab,struct sk_buff * skb)10322 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
10323 {
10324 struct wmi_cmd_hdr *cmd_hdr;
10325 enum wmi_tlv_event_id id;
10326
10327 cmd_hdr = skb_pull_data(skb, sizeof(*cmd_hdr));
10328 if (!cmd_hdr)
10329 goto out;
10330
10331 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID);
10332
10333 switch (id) {
10334 /* Process all the WMI events here */
10335 case WMI_SERVICE_READY_EVENTID:
10336 ath12k_service_ready_event(ab, skb);
10337 break;
10338 case WMI_SERVICE_READY_EXT_EVENTID:
10339 ath12k_service_ready_ext_event(ab, skb);
10340 break;
10341 case WMI_SERVICE_READY_EXT2_EVENTID:
10342 ath12k_service_ready_ext2_event(ab, skb);
10343 break;
10344 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID:
10345 ath12k_reg_chan_list_event(ab, skb);
10346 break;
10347 case WMI_READY_EVENTID:
10348 ath12k_ready_event(ab, skb);
10349 break;
10350 case WMI_PEER_DELETE_RESP_EVENTID:
10351 ath12k_peer_delete_resp_event(ab, skb);
10352 break;
10353 case WMI_VDEV_START_RESP_EVENTID:
10354 ath12k_vdev_start_resp_event(ab, skb);
10355 break;
10356 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID:
10357 ath12k_bcn_tx_status_event(ab, skb);
10358 break;
10359 case WMI_VDEV_STOPPED_EVENTID:
10360 ath12k_vdev_stopped_event(ab, skb);
10361 break;
10362 case WMI_MGMT_RX_EVENTID:
10363 ath12k_mgmt_rx_event(ab, skb);
10364 /* mgmt_rx_event() owns the skb now! */
10365 return;
10366 case WMI_MGMT_TX_COMPLETION_EVENTID:
10367 ath12k_mgmt_tx_compl_event(ab, skb);
10368 break;
10369 case WMI_SCAN_EVENTID:
10370 ath12k_scan_event(ab, skb);
10371 break;
10372 case WMI_PEER_STA_KICKOUT_EVENTID:
10373 ath12k_peer_sta_kickout_event(ab, skb);
10374 break;
10375 case WMI_ROAM_EVENTID:
10376 ath12k_roam_event(ab, skb);
10377 break;
10378 case WMI_CHAN_INFO_EVENTID:
10379 ath12k_chan_info_event(ab, skb);
10380 break;
10381 case WMI_PDEV_BSS_CHAN_INFO_EVENTID:
10382 ath12k_pdev_bss_chan_info_event(ab, skb);
10383 break;
10384 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
10385 ath12k_vdev_install_key_compl_event(ab, skb);
10386 break;
10387 case WMI_SERVICE_AVAILABLE_EVENTID:
10388 ath12k_service_available_event(ab, skb);
10389 break;
10390 case WMI_PEER_ASSOC_CONF_EVENTID:
10391 ath12k_peer_assoc_conf_event(ab, skb);
10392 break;
10393 case WMI_UPDATE_STATS_EVENTID:
10394 ath12k_update_stats_event(ab, skb);
10395 break;
10396 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID:
10397 ath12k_pdev_ctl_failsafe_check_event(ab, skb);
10398 break;
10399 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID:
10400 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb);
10401 break;
10402 case WMI_PDEV_TEMPERATURE_EVENTID:
10403 ath12k_wmi_pdev_temperature_event(ab, skb);
10404 break;
10405 case WMI_THERM_THROT_STATS_EVENTID:
10406 ath12k_wmi_thermal_throt_stats_event(ab, skb);
10407 break;
10408 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID:
10409 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb);
10410 break;
10411 case WMI_HOST_FILS_DISCOVERY_EVENTID:
10412 ath12k_fils_discovery_event(ab, skb);
10413 break;
10414 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID:
10415 ath12k_probe_resp_tx_status_event(ab, skb);
10416 break;
10417 case WMI_RFKILL_STATE_CHANGE_EVENTID:
10418 ath12k_rfkill_state_change_event(ab, skb);
10419 break;
10420 case WMI_TWT_ENABLE_EVENTID:
10421 ath12k_wmi_twt_enable_event(ab, skb);
10422 break;
10423 case WMI_TWT_DISABLE_EVENTID:
10424 ath12k_wmi_twt_disable_event(ab, skb);
10425 break;
10426 case WMI_P2P_NOA_EVENTID:
10427 ath12k_wmi_p2p_noa_event(ab, skb);
10428 break;
10429 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID:
10430 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb);
10431 break;
10432 case WMI_VDEV_DELETE_RESP_EVENTID:
10433 ath12k_vdev_delete_resp_event(ab, skb);
10434 break;
10435 case WMI_DIAG_EVENTID:
10436 ath12k_wmi_diag_event(ab, skb);
10437 break;
10438 case WMI_WOW_WAKEUP_HOST_EVENTID:
10439 ath12k_wmi_event_wow_wakeup_host(ab, skb);
10440 break;
10441 case WMI_GTK_OFFLOAD_STATUS_EVENTID:
10442 ath12k_wmi_gtk_offload_status_event(ab, skb);
10443 break;
10444 case WMI_MLO_SETUP_COMPLETE_EVENTID:
10445 ath12k_wmi_event_mlo_setup_complete(ab, skb);
10446 break;
10447 case WMI_MLO_TEARDOWN_COMPLETE_EVENTID:
10448 ath12k_wmi_event_teardown_complete(ab, skb);
10449 break;
10450 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID:
10451 ath12k_wmi_process_tpc_stats(ab, skb);
10452 break;
10453 case WMI_11D_NEW_COUNTRY_EVENTID:
10454 ath12k_reg_11d_new_cc_event(ab, skb);
10455 break;
10456 case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID:
10457 ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb);
10458 break;
10459 case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID:
10460 ath12k_wmi_obss_color_collision_event(ab, skb);
10461 break;
10462 case WMI_DCS_INTERFERENCE_EVENTID:
10463 ath12k_wmi_dcs_interference_event(ab, skb);
10464 break;
10465 /* add Unsupported events (rare) here */
10466 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
10467 case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
10468 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID:
10469 ath12k_dbg(ab, ATH12K_DBG_WMI,
10470 "ignoring unsupported event 0x%x\n", id);
10471 break;
10472 /* add Unsupported events (frequent) here */
10473 case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID:
10474 case WMI_MGMT_RX_FW_CONSUMED_EVENTID:
10475 /* debug might flood hence silently ignore (no-op) */
10476 break;
10477 case WMI_PDEV_UTF_EVENTID:
10478 if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags))
10479 ath12k_tm_wmi_event_segmented(ab, id, skb);
10480 else
10481 ath12k_tm_wmi_event_unsegmented(ab, id, skb);
10482 break;
10483 default:
10484 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id);
10485 break;
10486 }
10487
10488 out:
10489 dev_kfree_skb(skb);
10490 }
10491
ath12k_connect_pdev_htc_service(struct ath12k_base * ab,u32 pdev_idx)10492 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab,
10493 u32 pdev_idx)
10494 {
10495 int status;
10496 static const u32 svc_id[] = {
10497 ATH12K_HTC_SVC_ID_WMI_CONTROL,
10498 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1,
10499 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2
10500 };
10501 struct ath12k_htc_svc_conn_req conn_req = {};
10502 struct ath12k_htc_svc_conn_resp conn_resp = {};
10503
10504 /* these fields are the same for all service endpoints */
10505 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete;
10506 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx;
10507 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits;
10508
10509 /* connect to control service */
10510 conn_req.service_id = svc_id[pdev_idx];
10511
10512 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp);
10513 if (status) {
10514 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n",
10515 status);
10516 return status;
10517 }
10518
10519 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid;
10520 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid;
10521 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len;
10522
10523 return 0;
10524 }
10525
10526 static int
ath12k_wmi_send_unit_test_cmd(struct ath12k * ar,const struct wmi_unit_test_arg * ut)10527 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar,
10528 const struct wmi_unit_test_arg *ut)
10529 {
10530 struct ath12k_wmi_pdev *wmi = ar->wmi;
10531 struct wmi_unit_test_cmd *cmd;
10532 int buf_len, arg_len;
10533 struct sk_buff *skb;
10534 struct wmi_tlv *tlv;
10535 __le32 *ut_cmd_args;
10536 void *ptr;
10537 int ret;
10538 int i;
10539
10540 arg_len = sizeof(*ut_cmd_args) * ut->num_args;
10541 buf_len = sizeof(*cmd) + arg_len + TLV_HDR_SIZE;
10542
10543 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10544 if (!skb)
10545 return -ENOMEM;
10546
10547 ptr = skb->data;
10548 cmd = ptr;
10549 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD,
10550 sizeof(*cmd));
10551 cmd->vdev_id = cpu_to_le32(ut->vdev_id);
10552 cmd->module_id = cpu_to_le32(ut->module_id);
10553 cmd->num_args = cpu_to_le32(ut->num_args);
10554 cmd->diag_token = cpu_to_le32(ut->diag_token);
10555
10556 ptr += sizeof(*cmd);
10557 tlv = ptr;
10558 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
10559
10560 ptr += TLV_HDR_SIZE;
10561 ut_cmd_args = ptr;
10562 for (i = 0; i < ut->num_args; i++)
10563 ut_cmd_args[i] = cpu_to_le32(ut->args[i]);
10564
10565 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10566 "WMI unit test : module %d vdev %d n_args %d token %d\n",
10567 ut->module_id, ut->vdev_id, ut->num_args, ut->diag_token);
10568
10569 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID);
10570
10571 if (ret) {
10572 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n",
10573 ret);
10574 dev_kfree_skb(skb);
10575 }
10576
10577 return ret;
10578 }
10579
ath12k_wmi_simulate_radar(struct ath12k * ar)10580 int ath12k_wmi_simulate_radar(struct ath12k *ar)
10581 {
10582 struct ath12k_link_vif *arvif;
10583 struct wmi_unit_test_arg wmi_ut = {};
10584 bool arvif_found = false;
10585
10586 list_for_each_entry(arvif, &ar->arvifs, list) {
10587 if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
10588 arvif_found = true;
10589 break;
10590 }
10591 }
10592
10593 if (!arvif_found)
10594 return -EINVAL;
10595
10596 wmi_ut.args[DFS_TEST_CMDID] = 0;
10597 wmi_ut.args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id;
10598 /*
10599 * Currently we could pass segment_id(b0 - b1), chirp(b2)
10600 * freq offset (b3 - b10) to unit test. For simulation
10601 * purpose this can be set to 0 which is valid.
10602 */
10603 wmi_ut.args[DFS_TEST_RADAR_PARAM] = 0;
10604
10605 wmi_ut.vdev_id = arvif->vdev_id;
10606 wmi_ut.module_id = DFS_UNIT_TEST_MODULE;
10607 wmi_ut.num_args = DFS_MAX_TEST_ARGS;
10608 wmi_ut.diag_token = DFS_UNIT_TEST_TOKEN;
10609
10610 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n");
10611
10612 return ath12k_wmi_send_unit_test_cmd(ar, &wmi_ut);
10613 }
10614
ath12k_wmi_send_tpc_stats_request(struct ath12k * ar,enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)10615 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar,
10616 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type)
10617 {
10618 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd;
10619 struct ath12k_wmi_pdev *wmi = ar->wmi;
10620 struct sk_buff *skb;
10621 struct wmi_tlv *tlv;
10622 __le32 *pdev_id;
10623 u32 buf_len;
10624 void *ptr;
10625 int ret;
10626
10627 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE;
10628
10629 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
10630 if (!skb)
10631 return -ENOMEM;
10632 cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data;
10633 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM,
10634 sizeof(*cmd));
10635
10636 cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT);
10637 cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET);
10638 cmd->subid = cpu_to_le32(tpc_stats_type);
10639
10640 ptr = skb->data + sizeof(*cmd);
10641
10642 /* The below TLV arrays optionally follow this fixed param TLV structure
10643 * 1. ARRAY_UINT32 pdev_ids[]
10644 * If this array is present and non-zero length, stats should only
10645 * be provided from the pdevs identified in the array.
10646 * 2. ARRAY_UNIT32 vdev_ids[]
10647 * If this array is present and non-zero length, stats should only
10648 * be provided from the vdevs identified in the array.
10649 * 3. ath12k_wmi_mac_addr_params peer_macaddr[];
10650 * If this array is present and non-zero length, stats should only
10651 * be provided from the peers with the MAC addresses specified
10652 * in the array
10653 */
10654 tlv = ptr;
10655 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
10656 ptr += TLV_HDR_SIZE;
10657
10658 pdev_id = ptr;
10659 *pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar));
10660 ptr += sizeof(*pdev_id);
10661
10662 tlv = ptr;
10663 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10664 ptr += TLV_HDR_SIZE;
10665
10666 tlv = ptr;
10667 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0);
10668 ptr += TLV_HDR_SIZE;
10669
10670 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID);
10671 if (ret) {
10672 ath12k_warn(ar->ab,
10673 "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n");
10674 dev_kfree_skb(skb);
10675 return ret;
10676 }
10677 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n",
10678 ar->pdev->pdev_id);
10679
10680 return ret;
10681 }
10682
ath12k_wmi_simulate_incumbent_signal_interference(struct ath12k * ar,u32 chan_bw_interference_bitmap)10683 int ath12k_wmi_simulate_incumbent_signal_interference(struct ath12k *ar,
10684 u32 chan_bw_interference_bitmap)
10685 {
10686 struct wmi_unit_test_arg wmi_ut = {};
10687 struct ath12k_link_vif *arvif;
10688 struct ath12k_vif *ahvif;
10689 bool arvif_found = false;
10690
10691 list_for_each_entry(arvif, &ar->arvifs, list) {
10692 ahvif = arvif->ahvif;
10693 if (arvif->is_started && ahvif->vdev_type == WMI_VDEV_TYPE_AP) {
10694 arvif_found = true;
10695 break;
10696 }
10697 }
10698
10699 if (!arvif_found)
10700 return -EINVAL;
10701
10702 wmi_ut.args[ATH12K_WMI_INCUMBENT_SIGNAL_TEST_INTF] =
10703 ATH12K_WMI_UNIT_TEST_INCUMBENT_SIGNAL_INTF_TYPE;
10704 wmi_ut.args[ATH12K_WMI_INCUMBENT_SIGNAL_TEST_BITMAP] =
10705 chan_bw_interference_bitmap;
10706
10707 wmi_ut.vdev_id = arvif->vdev_id;
10708 wmi_ut.module_id = ATH12K_WMI_INCUMBENT_SIGNAL_UNIT_TEST_MODULE;
10709 wmi_ut.num_args = ATH12K_WMI_INCUMBENT_SIGNAL_MAX_TEST_ARGS;
10710 wmi_ut.diag_token = ATH12K_WMI_INCUMBENT_SIGNAL_UNIT_TEST_TOKEN;
10711
10712 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10713 "Triggering incumbent signal interference simulation, interference bitmap: 0x%x\n",
10714 chan_bw_interference_bitmap);
10715
10716 return ath12k_wmi_send_unit_test_cmd(ar, &wmi_ut);
10717 }
10718
ath12k_wmi_connect(struct ath12k_base * ab)10719 int ath12k_wmi_connect(struct ath12k_base *ab)
10720 {
10721 u32 i;
10722 u8 wmi_ep_count;
10723
10724 wmi_ep_count = ab->htc.wmi_ep_count;
10725 if (wmi_ep_count > ab->hw_params->max_radios)
10726 return -1;
10727
10728 for (i = 0; i < wmi_ep_count; i++)
10729 ath12k_connect_pdev_htc_service(ab, i);
10730
10731 return 0;
10732 }
10733
ath12k_wmi_pdev_detach(struct ath12k_base * ab,u8 pdev_id)10734 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id)
10735 {
10736 if (WARN_ON(pdev_id >= MAX_RADIOS))
10737 return;
10738
10739 /* TODO: Deinit any pdev specific wmi resource */
10740 }
10741
ath12k_wmi_pdev_attach(struct ath12k_base * ab,u8 pdev_id)10742 int ath12k_wmi_pdev_attach(struct ath12k_base *ab,
10743 u8 pdev_id)
10744 {
10745 struct ath12k_wmi_pdev *wmi_handle;
10746
10747 if (pdev_id >= ab->hw_params->max_radios)
10748 return -EINVAL;
10749
10750 wmi_handle = &ab->wmi_ab.wmi[pdev_id];
10751
10752 wmi_handle->wmi_ab = &ab->wmi_ab;
10753
10754 ab->wmi_ab.ab = ab;
10755 /* TODO: Init remaining resource specific to pdev */
10756
10757 return 0;
10758 }
10759
ath12k_wmi_attach(struct ath12k_base * ab)10760 int ath12k_wmi_attach(struct ath12k_base *ab)
10761 {
10762 int ret;
10763
10764 ret = ath12k_wmi_pdev_attach(ab, 0);
10765 if (ret)
10766 return ret;
10767
10768 ab->wmi_ab.ab = ab;
10769 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX;
10770
10771 /* It's overwritten when service_ext_ready is handled */
10772 if (ab->hw_params->single_pdev_only)
10773 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE;
10774
10775 /* TODO: Init remaining wmi soc resources required */
10776 init_completion(&ab->wmi_ab.service_ready);
10777 init_completion(&ab->wmi_ab.unified_ready);
10778
10779 return 0;
10780 }
10781
ath12k_wmi_detach(struct ath12k_base * ab)10782 void ath12k_wmi_detach(struct ath12k_base *ab)
10783 {
10784 int i;
10785
10786 /* TODO: Deinit wmi resource specific to SOC as required */
10787
10788 for (i = 0; i < ab->htc.wmi_ep_count; i++)
10789 ath12k_wmi_pdev_detach(ab, i);
10790
10791 ath12k_wmi_free_dbring_caps(ab);
10792 }
10793
ath12k_wmi_hw_data_filter_cmd(struct ath12k * ar,struct wmi_hw_data_filter_arg * arg)10794 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg)
10795 {
10796 struct wmi_hw_data_filter_cmd *cmd;
10797 struct sk_buff *skb;
10798 int ret, len;
10799
10800 len = sizeof(*cmd);
10801 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10802
10803 if (!skb)
10804 return -ENOMEM;
10805
10806 cmd = (struct wmi_hw_data_filter_cmd *)skb->data;
10807 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD,
10808 sizeof(*cmd));
10809 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
10810 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0);
10811
10812 /* Set all modes in case of disable */
10813 if (arg->enable)
10814 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap);
10815 else
10816 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U);
10817
10818 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
10819 "wmi hw data filter enable %d filter_bitmap 0x%x\n",
10820 arg->enable, arg->hw_filter_bitmap);
10821
10822 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID);
10823 if (ret) {
10824 ath12k_warn(ar->ab, "failed to send WMI_HW_DATA_FILTER_CMDID\n");
10825 dev_kfree_skb(skb);
10826 }
10827
10828 return ret;
10829 }
10830
ath12k_wmi_wow_host_wakeup_ind(struct ath12k * ar)10831 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar)
10832 {
10833 struct wmi_wow_host_wakeup_cmd *cmd;
10834 struct sk_buff *skb;
10835 size_t len;
10836 int ret;
10837
10838 len = sizeof(*cmd);
10839 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10840 if (!skb)
10841 return -ENOMEM;
10842
10843 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data;
10844 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD,
10845 sizeof(*cmd));
10846
10847 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n");
10848
10849 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID);
10850 if (ret) {
10851 ath12k_warn(ar->ab, "failed to send WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID\n");
10852 dev_kfree_skb(skb);
10853 }
10854
10855 return ret;
10856 }
10857
ath12k_wmi_wow_enable(struct ath12k * ar)10858 int ath12k_wmi_wow_enable(struct ath12k *ar)
10859 {
10860 struct wmi_wow_enable_cmd *cmd;
10861 struct sk_buff *skb;
10862 int ret, len;
10863
10864 len = sizeof(*cmd);
10865 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10866 if (!skb)
10867 return -ENOMEM;
10868
10869 cmd = (struct wmi_wow_enable_cmd *)skb->data;
10870 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD,
10871 sizeof(*cmd));
10872
10873 cmd->enable = cpu_to_le32(1);
10874 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED);
10875 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n");
10876
10877 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID);
10878 if (ret) {
10879 ath12k_warn(ar->ab, "failed to send WMI_WOW_ENABLE_CMDID\n");
10880 dev_kfree_skb(skb);
10881 }
10882
10883 return ret;
10884 }
10885
ath12k_wmi_wow_add_wakeup_event(struct ath12k * ar,u32 vdev_id,enum wmi_wow_wakeup_event event,u32 enable)10886 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id,
10887 enum wmi_wow_wakeup_event event,
10888 u32 enable)
10889 {
10890 struct wmi_wow_add_del_event_cmd *cmd;
10891 struct sk_buff *skb;
10892 size_t len;
10893 int ret;
10894
10895 len = sizeof(*cmd);
10896 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10897 if (!skb)
10898 return -ENOMEM;
10899
10900 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data;
10901 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD,
10902 sizeof(*cmd));
10903 cmd->vdev_id = cpu_to_le32(vdev_id);
10904 cmd->is_add = cpu_to_le32(enable);
10905 cmd->event_bitmap = cpu_to_le32((1 << event));
10906
10907 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n",
10908 wow_wakeup_event(event), enable, vdev_id);
10909
10910 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID);
10911 if (ret) {
10912 ath12k_warn(ar->ab, "failed to send WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID\n");
10913 dev_kfree_skb(skb);
10914 }
10915
10916 return ret;
10917 }
10918
ath12k_wmi_wow_add_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id,const u8 * pattern,const u8 * mask,int pattern_len,int pattern_offset)10919 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id,
10920 const u8 *pattern, const u8 *mask,
10921 int pattern_len, int pattern_offset)
10922 {
10923 struct wmi_wow_add_pattern_cmd *cmd;
10924 struct wmi_wow_bitmap_pattern_params *bitmap;
10925 struct wmi_tlv *tlv;
10926 struct sk_buff *skb;
10927 void *ptr;
10928 size_t len;
10929 int ret;
10930
10931 len = sizeof(*cmd) +
10932 sizeof(*tlv) + /* array struct */
10933 sizeof(*bitmap) + /* bitmap */
10934 sizeof(*tlv) + /* empty ipv4 sync */
10935 sizeof(*tlv) + /* empty ipv6 sync */
10936 sizeof(*tlv) + /* empty magic */
10937 sizeof(*tlv) + /* empty info timeout */
10938 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */
10939
10940 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
10941 if (!skb)
10942 return -ENOMEM;
10943
10944 /* cmd */
10945 ptr = skb->data;
10946 cmd = ptr;
10947 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD,
10948 sizeof(*cmd));
10949 cmd->vdev_id = cpu_to_le32(vdev_id);
10950 cmd->pattern_id = cpu_to_le32(pattern_id);
10951 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
10952
10953 ptr += sizeof(*cmd);
10954
10955 /* bitmap */
10956 tlv = ptr;
10957 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap));
10958
10959 ptr += sizeof(*tlv);
10960
10961 bitmap = ptr;
10962 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T,
10963 sizeof(*bitmap));
10964 memcpy(bitmap->patternbuf, pattern, pattern_len);
10965 memcpy(bitmap->bitmaskbuf, mask, pattern_len);
10966 bitmap->pattern_offset = cpu_to_le32(pattern_offset);
10967 bitmap->pattern_len = cpu_to_le32(pattern_len);
10968 bitmap->bitmask_len = cpu_to_le32(pattern_len);
10969 bitmap->pattern_id = cpu_to_le32(pattern_id);
10970
10971 ptr += sizeof(*bitmap);
10972
10973 /* ipv4 sync */
10974 tlv = ptr;
10975 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10976
10977 ptr += sizeof(*tlv);
10978
10979 /* ipv6 sync */
10980 tlv = ptr;
10981 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10982
10983 ptr += sizeof(*tlv);
10984
10985 /* magic */
10986 tlv = ptr;
10987 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0);
10988
10989 ptr += sizeof(*tlv);
10990
10991 /* pattern info timeout */
10992 tlv = ptr;
10993 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
10994
10995 ptr += sizeof(*tlv);
10996
10997 /* ratelimit interval */
10998 tlv = ptr;
10999 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32));
11000
11001 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n",
11002 vdev_id, pattern_id, pattern_offset, pattern_len);
11003
11004 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ",
11005 bitmap->patternbuf, pattern_len);
11006 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ",
11007 bitmap->bitmaskbuf, pattern_len);
11008
11009 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID);
11010 if (ret) {
11011 ath12k_warn(ar->ab, "failed to send WMI_WOW_ADD_WAKE_PATTERN_CMDID\n");
11012 dev_kfree_skb(skb);
11013 }
11014
11015 return ret;
11016 }
11017
ath12k_wmi_wow_del_pattern(struct ath12k * ar,u32 vdev_id,u32 pattern_id)11018 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id)
11019 {
11020 struct wmi_wow_del_pattern_cmd *cmd;
11021 struct sk_buff *skb;
11022 size_t len;
11023 int ret;
11024
11025 len = sizeof(*cmd);
11026 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11027 if (!skb)
11028 return -ENOMEM;
11029
11030 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data;
11031 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD,
11032 sizeof(*cmd));
11033 cmd->vdev_id = cpu_to_le32(vdev_id);
11034 cmd->pattern_id = cpu_to_le32(pattern_id);
11035 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN);
11036
11037 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n",
11038 vdev_id, pattern_id);
11039
11040 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID);
11041 if (ret) {
11042 ath12k_warn(ar->ab, "failed to send WMI_WOW_DEL_WAKE_PATTERN_CMDID\n");
11043 dev_kfree_skb(skb);
11044 }
11045
11046 return ret;
11047 }
11048
11049 static struct sk_buff *
ath12k_wmi_op_gen_config_pno_start(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno)11050 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id,
11051 struct wmi_pno_scan_req_arg *pno)
11052 {
11053 struct nlo_configured_params *nlo_list;
11054 size_t len, nlo_list_len, channel_list_len;
11055 struct wmi_wow_nlo_config_cmd *cmd;
11056 __le32 *channel_list;
11057 struct wmi_tlv *tlv;
11058 struct sk_buff *skb;
11059 void *ptr;
11060 u32 i;
11061
11062 len = sizeof(*cmd) +
11063 sizeof(*tlv) +
11064 /* TLV place holder for array of structures
11065 * nlo_configured_params(nlo_list)
11066 */
11067 sizeof(*tlv);
11068 /* TLV place holder for array of uint32 channel_list */
11069
11070 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count;
11071 len += channel_list_len;
11072
11073 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count;
11074 len += nlo_list_len;
11075
11076 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11077 if (!skb)
11078 return ERR_PTR(-ENOMEM);
11079
11080 ptr = skb->data;
11081 cmd = ptr;
11082 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd));
11083
11084 cmd->vdev_id = cpu_to_le32(pno->vdev_id);
11085 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN);
11086
11087 /* current FW does not support min-max range for dwell time */
11088 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time);
11089 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time);
11090
11091 if (pno->do_passive_scan)
11092 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE);
11093
11094 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period);
11095 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period);
11096 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles);
11097 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time);
11098
11099 if (pno->enable_pno_scan_randomization) {
11100 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ |
11101 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ);
11102 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr);
11103 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask);
11104 }
11105
11106 ptr += sizeof(*cmd);
11107
11108 /* nlo_configured_params(nlo_list) */
11109 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count);
11110 tlv = ptr;
11111 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len);
11112
11113 ptr += sizeof(*tlv);
11114 nlo_list = ptr;
11115 for (i = 0; i < pno->uc_networks_count; i++) {
11116 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header);
11117 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE,
11118 sizeof(*nlo_list));
11119
11120 nlo_list[i].ssid.valid = cpu_to_le32(1);
11121 nlo_list[i].ssid.ssid.ssid_len =
11122 cpu_to_le32(pno->a_networks[i].ssid.ssid_len);
11123 memcpy(nlo_list[i].ssid.ssid.ssid,
11124 pno->a_networks[i].ssid.ssid,
11125 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len));
11126
11127 if (pno->a_networks[i].rssi_threshold &&
11128 pno->a_networks[i].rssi_threshold > -300) {
11129 nlo_list[i].rssi_cond.valid = cpu_to_le32(1);
11130 nlo_list[i].rssi_cond.rssi =
11131 cpu_to_le32(pno->a_networks[i].rssi_threshold);
11132 }
11133
11134 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1);
11135 nlo_list[i].bcast_nw_type.bcast_nw_type =
11136 cpu_to_le32(pno->a_networks[i].bcast_nw_type);
11137 }
11138
11139 ptr += nlo_list_len;
11140 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count);
11141 tlv = ptr;
11142 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len);
11143 ptr += sizeof(*tlv);
11144 channel_list = ptr;
11145
11146 for (i = 0; i < pno->a_networks[0].channel_count; i++)
11147 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]);
11148
11149 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n",
11150 vdev_id);
11151
11152 return skb;
11153 }
11154
ath12k_wmi_op_gen_config_pno_stop(struct ath12k * ar,u32 vdev_id)11155 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar,
11156 u32 vdev_id)
11157 {
11158 struct wmi_wow_nlo_config_cmd *cmd;
11159 struct sk_buff *skb;
11160 size_t len;
11161
11162 len = sizeof(*cmd);
11163 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11164 if (!skb)
11165 return ERR_PTR(-ENOMEM);
11166
11167 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data;
11168 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len);
11169
11170 cmd->vdev_id = cpu_to_le32(vdev_id);
11171 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP);
11172
11173 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
11174 "wmi tlv stop pno config vdev_id %d\n", vdev_id);
11175 return skb;
11176 }
11177
ath12k_wmi_wow_config_pno(struct ath12k * ar,u32 vdev_id,struct wmi_pno_scan_req_arg * pno_scan)11178 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id,
11179 struct wmi_pno_scan_req_arg *pno_scan)
11180 {
11181 struct sk_buff *skb;
11182 int ret;
11183
11184 if (pno_scan->enable)
11185 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan);
11186 else
11187 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id);
11188
11189 if (IS_ERR_OR_NULL(skb))
11190 return -ENOMEM;
11191
11192 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID);
11193 if (ret) {
11194 ath12k_warn(ar->ab, "failed to send WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID\n");
11195 dev_kfree_skb(skb);
11196 }
11197
11198 return ret;
11199 }
11200
ath12k_wmi_fill_ns_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable,bool ext)11201 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar,
11202 struct wmi_arp_ns_offload_arg *offload,
11203 void **ptr,
11204 bool enable,
11205 bool ext)
11206 {
11207 struct wmi_ns_offload_params *ns;
11208 struct wmi_tlv *tlv;
11209 void *buf_ptr = *ptr;
11210 u32 ns_cnt, ns_ext_tuples;
11211 int i, max_offloads;
11212
11213 ns_cnt = offload->ipv6_count;
11214
11215 tlv = buf_ptr;
11216
11217 if (ext) {
11218 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS;
11219 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11220 ns_ext_tuples * sizeof(*ns));
11221 i = WMI_MAX_NS_OFFLOADS;
11222 max_offloads = offload->ipv6_count;
11223 } else {
11224 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11225 WMI_MAX_NS_OFFLOADS * sizeof(*ns));
11226 i = 0;
11227 max_offloads = WMI_MAX_NS_OFFLOADS;
11228 }
11229
11230 buf_ptr += sizeof(*tlv);
11231
11232 for (; i < max_offloads; i++) {
11233 ns = buf_ptr;
11234 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE,
11235 sizeof(*ns));
11236
11237 if (enable) {
11238 if (i < ns_cnt)
11239 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID);
11240
11241 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16);
11242 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16);
11243
11244 if (offload->ipv6_type[i])
11245 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST);
11246
11247 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN);
11248
11249 if (!is_zero_ether_addr(ns->target_mac.addr))
11250 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID);
11251
11252 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
11253 "wmi index %d ns_solicited %pI6 target %pI6",
11254 i, ns->solicitation_ipaddr,
11255 ns->target_ipaddr[0]);
11256 }
11257
11258 buf_ptr += sizeof(*ns);
11259 }
11260
11261 *ptr = buf_ptr;
11262 }
11263
ath12k_wmi_fill_arp_offload(struct ath12k * ar,struct wmi_arp_ns_offload_arg * offload,void ** ptr,bool enable)11264 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar,
11265 struct wmi_arp_ns_offload_arg *offload,
11266 void **ptr,
11267 bool enable)
11268 {
11269 struct wmi_arp_offload_params *arp;
11270 struct wmi_tlv *tlv;
11271 void *buf_ptr = *ptr;
11272 int i;
11273
11274 /* fill arp tuple */
11275 tlv = buf_ptr;
11276 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11277 WMI_MAX_ARP_OFFLOADS * sizeof(*arp));
11278 buf_ptr += sizeof(*tlv);
11279
11280 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) {
11281 arp = buf_ptr;
11282 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE,
11283 sizeof(*arp));
11284
11285 if (enable && i < offload->ipv4_count) {
11286 /* Copy the target ip addr and flags */
11287 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID);
11288 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4);
11289
11290 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4",
11291 arp->target_ipaddr);
11292 }
11293
11294 buf_ptr += sizeof(*arp);
11295 }
11296
11297 *ptr = buf_ptr;
11298 }
11299
ath12k_wmi_arp_ns_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,struct wmi_arp_ns_offload_arg * offload,bool enable)11300 int ath12k_wmi_arp_ns_offload(struct ath12k *ar,
11301 struct ath12k_link_vif *arvif,
11302 struct wmi_arp_ns_offload_arg *offload,
11303 bool enable)
11304 {
11305 struct wmi_set_arp_ns_offload_cmd *cmd;
11306 struct wmi_tlv *tlv;
11307 struct sk_buff *skb;
11308 void *buf_ptr;
11309 size_t len;
11310 u8 ns_cnt, ns_ext_tuples = 0;
11311 int ret;
11312
11313 ns_cnt = offload->ipv6_count;
11314
11315 len = sizeof(*cmd) +
11316 sizeof(*tlv) +
11317 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) +
11318 sizeof(*tlv) +
11319 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params);
11320
11321 if (ns_cnt > WMI_MAX_NS_OFFLOADS) {
11322 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS;
11323 len += sizeof(*tlv) +
11324 ns_ext_tuples * sizeof(struct wmi_ns_offload_params);
11325 }
11326
11327 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11328 if (!skb)
11329 return -ENOMEM;
11330
11331 buf_ptr = skb->data;
11332 cmd = buf_ptr;
11333 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD,
11334 sizeof(*cmd));
11335 cmd->flags = cpu_to_le32(0);
11336 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
11337 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples);
11338
11339 buf_ptr += sizeof(*cmd);
11340
11341 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0);
11342 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable);
11343
11344 if (ns_ext_tuples)
11345 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1);
11346
11347 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID);
11348 if (ret) {
11349 ath12k_warn(ar->ab, "failed to send WMI_SET_ARP_NS_OFFLOAD_CMDID\n");
11350 dev_kfree_skb(skb);
11351 }
11352
11353 return ret;
11354 }
11355
ath12k_wmi_gtk_rekey_offload(struct ath12k * ar,struct ath12k_link_vif * arvif,bool enable)11356 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar,
11357 struct ath12k_link_vif *arvif, bool enable)
11358 {
11359 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data;
11360 struct wmi_gtk_rekey_offload_cmd *cmd;
11361 struct sk_buff *skb;
11362 __le64 replay_ctr;
11363 int ret, len;
11364
11365 len = sizeof(*cmd);
11366 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11367 if (!skb)
11368 return -ENOMEM;
11369
11370 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
11371 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
11372 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
11373
11374 if (enable) {
11375 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE);
11376
11377 /* the length in rekey_data and cmd is equal */
11378 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck));
11379 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek));
11380
11381 replay_ctr = cpu_to_le64(rekey_data->replay_ctr);
11382 memcpy(cmd->replay_ctr, &replay_ctr,
11383 sizeof(replay_ctr));
11384 } else {
11385 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE);
11386 }
11387
11388 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n",
11389 arvif->vdev_id, enable);
11390 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
11391 if (ret) {
11392 ath12k_warn(ar->ab, "failed to send WMI_GTK_OFFLOAD_CMDID offload\n");
11393 dev_kfree_skb(skb);
11394 }
11395
11396 return ret;
11397 }
11398
ath12k_wmi_gtk_rekey_getinfo(struct ath12k * ar,struct ath12k_link_vif * arvif)11399 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar,
11400 struct ath12k_link_vif *arvif)
11401 {
11402 struct wmi_gtk_rekey_offload_cmd *cmd;
11403 struct sk_buff *skb;
11404 int ret, len;
11405
11406 len = sizeof(*cmd);
11407 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len);
11408 if (!skb)
11409 return -ENOMEM;
11410
11411 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data;
11412 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd));
11413 cmd->vdev_id = cpu_to_le32(arvif->vdev_id);
11414 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE);
11415
11416 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n",
11417 arvif->vdev_id);
11418 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID);
11419 if (ret) {
11420 ath12k_warn(ar->ab, "failed to send WMI_GTK_OFFLOAD_CMDID getinfo\n");
11421 dev_kfree_skb(skb);
11422 }
11423
11424 return ret;
11425 }
11426
ath12k_wmi_sta_keepalive(struct ath12k * ar,const struct wmi_sta_keepalive_arg * arg)11427 int ath12k_wmi_sta_keepalive(struct ath12k *ar,
11428 const struct wmi_sta_keepalive_arg *arg)
11429 {
11430 struct wmi_sta_keepalive_arp_resp_params *arp;
11431 struct ath12k_wmi_pdev *wmi = ar->wmi;
11432 struct wmi_sta_keepalive_cmd *cmd;
11433 struct sk_buff *skb;
11434 size_t len;
11435 int ret;
11436
11437 len = sizeof(*cmd) + sizeof(*arp);
11438 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11439 if (!skb)
11440 return -ENOMEM;
11441
11442 cmd = (struct wmi_sta_keepalive_cmd *)skb->data;
11443 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd));
11444 cmd->vdev_id = cpu_to_le32(arg->vdev_id);
11445 cmd->enabled = cpu_to_le32(arg->enabled);
11446 cmd->interval = cpu_to_le32(arg->interval);
11447 cmd->method = cpu_to_le32(arg->method);
11448
11449 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1);
11450 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE,
11451 sizeof(*arp));
11452 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE ||
11453 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) {
11454 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr);
11455 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr);
11456 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr);
11457 }
11458
11459 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
11460 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n",
11461 arg->vdev_id, arg->enabled, arg->method, arg->interval);
11462
11463 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID);
11464 if (ret) {
11465 ath12k_warn(ar->ab, "failed to send WMI_STA_KEEPALIVE_CMDID\n");
11466 dev_kfree_skb(skb);
11467 }
11468
11469 return ret;
11470 }
11471
ath12k_wmi_mlo_setup(struct ath12k * ar,struct wmi_mlo_setup_arg * mlo_params)11472 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params)
11473 {
11474 struct wmi_mlo_setup_cmd *cmd;
11475 struct ath12k_wmi_pdev *wmi = ar->wmi;
11476 u32 *partner_links, num_links;
11477 int i, ret, buf_len, arg_len;
11478 struct sk_buff *skb;
11479 struct wmi_tlv *tlv;
11480 void *ptr;
11481
11482 num_links = mlo_params->num_partner_links;
11483 arg_len = num_links * sizeof(u32);
11484 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len;
11485
11486 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len);
11487 if (!skb)
11488 return -ENOMEM;
11489
11490 cmd = (struct wmi_mlo_setup_cmd *)skb->data;
11491 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD,
11492 sizeof(*cmd));
11493 cmd->mld_group_id = mlo_params->group_id;
11494 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
11495 ptr = skb->data + sizeof(*cmd);
11496
11497 tlv = ptr;
11498 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len);
11499 ptr += TLV_HDR_SIZE;
11500
11501 partner_links = ptr;
11502 for (i = 0; i < num_links; i++)
11503 partner_links[i] = mlo_params->partner_link_id[i];
11504
11505 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID);
11506 if (ret) {
11507 ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n",
11508 ret);
11509 dev_kfree_skb(skb);
11510 }
11511
11512 return ret;
11513 }
11514
ath12k_wmi_mlo_ready(struct ath12k * ar)11515 int ath12k_wmi_mlo_ready(struct ath12k *ar)
11516 {
11517 struct wmi_mlo_ready_cmd *cmd;
11518 struct ath12k_wmi_pdev *wmi = ar->wmi;
11519 struct sk_buff *skb;
11520 int ret, len;
11521
11522 len = sizeof(*cmd);
11523 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11524 if (!skb)
11525 return -ENOMEM;
11526
11527 cmd = (struct wmi_mlo_ready_cmd *)skb->data;
11528 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD,
11529 sizeof(*cmd));
11530 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
11531
11532 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID);
11533 if (ret) {
11534 ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n",
11535 ret);
11536 dev_kfree_skb(skb);
11537 }
11538
11539 return ret;
11540 }
11541
ath12k_wmi_mlo_teardown(struct ath12k * ar)11542 int ath12k_wmi_mlo_teardown(struct ath12k *ar)
11543 {
11544 struct wmi_mlo_teardown_cmd *cmd;
11545 struct ath12k_wmi_pdev *wmi = ar->wmi;
11546 struct sk_buff *skb;
11547 int ret, len;
11548
11549 len = sizeof(*cmd);
11550 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11551 if (!skb)
11552 return -ENOMEM;
11553
11554 cmd = (struct wmi_mlo_teardown_cmd *)skb->data;
11555 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD,
11556 sizeof(*cmd));
11557 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id);
11558 cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON;
11559
11560 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID);
11561 if (ret) {
11562 ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n",
11563 ret);
11564 dev_kfree_skb(skb);
11565 }
11566
11567 return ret;
11568 }
11569
ath12k_wmi_supports_6ghz_cc_ext(struct ath12k * ar)11570 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar)
11571 {
11572 return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT,
11573 ar->ab->wmi_ab.svc_map) && ar->supports_6ghz;
11574 }
11575
ath12k_wmi_send_vdev_set_tpc_power(struct ath12k * ar,u32 vdev_id,struct ath12k_reg_tpc_power_info * param)11576 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar,
11577 u32 vdev_id,
11578 struct ath12k_reg_tpc_power_info *param)
11579 {
11580 struct wmi_vdev_set_tpc_power_cmd *cmd;
11581 struct ath12k_wmi_pdev *wmi = ar->wmi;
11582 struct wmi_vdev_ch_power_params *ch;
11583 int i, ret, len, array_len;
11584 struct sk_buff *skb;
11585 struct wmi_tlv *tlv;
11586 u8 *ptr;
11587
11588 array_len = sizeof(*ch) * param->num_pwr_levels;
11589 len = sizeof(*cmd) + TLV_HDR_SIZE + array_len;
11590
11591 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
11592 if (!skb)
11593 return -ENOMEM;
11594
11595 ptr = skb->data;
11596
11597 cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr;
11598 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD,
11599 sizeof(*cmd));
11600 cmd->vdev_id = cpu_to_le32(vdev_id);
11601 cmd->psd_power = cpu_to_le32(param->is_psd_power);
11602 cmd->eirp_power = cpu_to_le32(param->eirp_power);
11603 cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type);
11604
11605 ath12k_dbg(ar->ab, ATH12K_DBG_WMI,
11606 "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n",
11607 vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type);
11608
11609 ptr += sizeof(*cmd);
11610 tlv = (struct wmi_tlv *)ptr;
11611 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len);
11612
11613 ptr += TLV_HDR_SIZE;
11614 ch = (struct wmi_vdev_ch_power_params *)ptr;
11615
11616 for (i = 0; i < param->num_pwr_levels; i++, ch++) {
11617 ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO,
11618 sizeof(*ch));
11619 ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq);
11620 ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power);
11621
11622 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n",
11623 ch->chan_cfreq, ch->tx_power);
11624 }
11625
11626 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID);
11627 if (ret) {
11628 ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n");
11629 dev_kfree_skb(skb);
11630 }
11631
11632 return ret;
11633 }
11634
11635 static int
ath12k_wmi_fill_disallowed_bmap(struct ath12k_base * ab,struct wmi_disallowed_mlo_mode_bitmap_params * dislw_bmap,struct wmi_mlo_link_set_active_arg * arg)11636 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab,
11637 struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap,
11638 struct wmi_mlo_link_set_active_arg *arg)
11639 {
11640 struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg;
11641 u8 i;
11642
11643 if (arg->num_disallow_mode_comb >
11644 ARRAY_SIZE(arg->disallow_bmap)) {
11645 ath12k_warn(ab, "invalid num_disallow_mode_comb: %d",
11646 arg->num_disallow_mode_comb);
11647 return -EINVAL;
11648 }
11649
11650 dislw_bmap_arg = &arg->disallow_bmap[0];
11651 for (i = 0; i < arg->num_disallow_mode_comb; i++) {
11652 dislw_bmap->tlv_header =
11653 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap));
11654 dislw_bmap->disallowed_mode_bitmap =
11655 cpu_to_le32(dislw_bmap_arg->disallowed_mode);
11656 dislw_bmap->ieee_link_id_comb =
11657 le32_encode_bits(dislw_bmap_arg->ieee_link_id[0],
11658 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) |
11659 le32_encode_bits(dislw_bmap_arg->ieee_link_id[1],
11660 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) |
11661 le32_encode_bits(dislw_bmap_arg->ieee_link_id[2],
11662 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) |
11663 le32_encode_bits(dislw_bmap_arg->ieee_link_id[3],
11664 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4);
11665
11666 ath12k_dbg(ab, ATH12K_DBG_WMI,
11667 "entry %d disallowed_mode %d ieee_link_id_comb 0x%x",
11668 i, dislw_bmap_arg->disallowed_mode,
11669 dislw_bmap_arg->ieee_link_id_comb);
11670 dislw_bmap++;
11671 dislw_bmap_arg++;
11672 }
11673
11674 return 0;
11675 }
11676
ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base * ab,struct wmi_mlo_link_set_active_arg * arg)11677 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab,
11678 struct wmi_mlo_link_set_active_arg *arg)
11679 {
11680 struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap;
11681 struct wmi_mlo_set_active_link_number_params *link_num_param;
11682 u32 num_link_num_param = 0, num_vdev_bitmap = 0;
11683 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab;
11684 struct wmi_mlo_link_set_active_cmd *cmd;
11685 u32 num_inactive_vdev_bitmap = 0;
11686 u32 num_disallow_mode_comb = 0;
11687 struct wmi_tlv *tlv;
11688 struct sk_buff *skb;
11689 __le32 *vdev_bitmap;
11690 void *buf_ptr;
11691 int i, ret;
11692 u32 len;
11693
11694 if (!arg->num_vdev_bitmap && !arg->num_link_entry) {
11695 ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry");
11696 return -EINVAL;
11697 }
11698
11699 switch (arg->force_mode) {
11700 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM:
11701 case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM:
11702 num_link_num_param = arg->num_link_entry;
11703 fallthrough;
11704 case WMI_MLO_LINK_FORCE_MODE_ACTIVE:
11705 case WMI_MLO_LINK_FORCE_MODE_INACTIVE:
11706 case WMI_MLO_LINK_FORCE_MODE_NO_FORCE:
11707 num_vdev_bitmap = arg->num_vdev_bitmap;
11708 break;
11709 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE:
11710 num_vdev_bitmap = arg->num_vdev_bitmap;
11711 num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap;
11712 break;
11713 default:
11714 ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode);
11715 return -EINVAL;
11716 }
11717
11718 num_disallow_mode_comb = arg->num_disallow_mode_comb;
11719 len = sizeof(*cmd) +
11720 TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param +
11721 TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap +
11722 TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE +
11723 TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb;
11724 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE)
11725 len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
11726
11727 skb = ath12k_wmi_alloc_skb(wmi_ab, len);
11728 if (!skb)
11729 return -ENOMEM;
11730
11731 cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data;
11732 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD,
11733 sizeof(*cmd));
11734 cmd->force_mode = cpu_to_le32(arg->force_mode);
11735 cmd->reason = cpu_to_le32(arg->reason);
11736 ath12k_dbg(ab, ATH12K_DBG_WMI,
11737 "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d",
11738 arg->force_mode, arg->reason, num_link_num_param,
11739 num_vdev_bitmap, num_inactive_vdev_bitmap,
11740 num_disallow_mode_comb);
11741
11742 buf_ptr = skb->data + sizeof(*cmd);
11743 tlv = buf_ptr;
11744 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11745 sizeof(*link_num_param) * num_link_num_param);
11746 buf_ptr += TLV_HDR_SIZE;
11747
11748 if (num_link_num_param) {
11749 cmd->ctrl_flags =
11750 le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0,
11751 CRTL_F_DYNC_FORCE_LINK_NUM);
11752
11753 link_num_param = buf_ptr;
11754 for (i = 0; i < num_link_num_param; i++) {
11755 link_num_param->tlv_header =
11756 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param));
11757 link_num_param->num_of_link =
11758 cpu_to_le32(arg->link_num[i].num_of_link);
11759 link_num_param->vdev_type =
11760 cpu_to_le32(arg->link_num[i].vdev_type);
11761 link_num_param->vdev_subtype =
11762 cpu_to_le32(arg->link_num[i].vdev_subtype);
11763 link_num_param->home_freq =
11764 cpu_to_le32(arg->link_num[i].home_freq);
11765 ath12k_dbg(ab, ATH12K_DBG_WMI,
11766 "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d",
11767 i, arg->link_num[i].num_of_link,
11768 arg->link_num[i].vdev_type,
11769 arg->link_num[i].vdev_subtype,
11770 arg->link_num[i].home_freq,
11771 __le32_to_cpu(cmd->ctrl_flags));
11772 link_num_param++;
11773 }
11774
11775 buf_ptr += sizeof(*link_num_param) * num_link_num_param;
11776 }
11777
11778 tlv = buf_ptr;
11779 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
11780 sizeof(*vdev_bitmap) * num_vdev_bitmap);
11781 buf_ptr += TLV_HDR_SIZE;
11782
11783 if (num_vdev_bitmap) {
11784 vdev_bitmap = buf_ptr;
11785 for (i = 0; i < num_vdev_bitmap; i++) {
11786 vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]);
11787 ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x",
11788 i, arg->vdev_bitmap[i]);
11789 }
11790
11791 buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap;
11792 }
11793
11794 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) {
11795 tlv = buf_ptr;
11796 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32,
11797 sizeof(*vdev_bitmap) *
11798 num_inactive_vdev_bitmap);
11799 buf_ptr += TLV_HDR_SIZE;
11800
11801 if (num_inactive_vdev_bitmap) {
11802 vdev_bitmap = buf_ptr;
11803 for (i = 0; i < num_inactive_vdev_bitmap; i++) {
11804 vdev_bitmap[i] =
11805 cpu_to_le32(arg->inactive_vdev_bitmap[i]);
11806 ath12k_dbg(ab, ATH12K_DBG_WMI,
11807 "entry %d inactive_vdev_id_bitmap 0x%x",
11808 i, arg->inactive_vdev_bitmap[i]);
11809 }
11810
11811 buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap;
11812 }
11813 } else {
11814 /* add empty vdev bitmap2 tlv */
11815 tlv = buf_ptr;
11816 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11817 buf_ptr += TLV_HDR_SIZE;
11818 }
11819
11820 /* add empty ieee_link_id_bitmap tlv */
11821 tlv = buf_ptr;
11822 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11823 buf_ptr += TLV_HDR_SIZE;
11824
11825 /* add empty ieee_link_id_bitmap2 tlv */
11826 tlv = buf_ptr;
11827 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0);
11828 buf_ptr += TLV_HDR_SIZE;
11829
11830 tlv = buf_ptr;
11831 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT,
11832 sizeof(*disallowed_mode_bmap) *
11833 arg->num_disallow_mode_comb);
11834 buf_ptr += TLV_HDR_SIZE;
11835
11836 ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg);
11837 if (ret)
11838 goto free_skb;
11839
11840 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID);
11841 if (ret) {
11842 ath12k_warn(ab,
11843 "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret);
11844 goto free_skb;
11845 }
11846
11847 ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd");
11848
11849 return ret;
11850
11851 free_skb:
11852 dev_kfree_skb(skb);
11853 return ret;
11854 }
11855
ath12k_wmi_alloc(void)11856 int ath12k_wmi_alloc(void)
11857 {
11858 guard(mutex)(&ath12k_wmi_mutex);
11859
11860 if (!ath12k_wmi_tb) {
11861 ath12k_wmi_tb = __alloc_percpu(WMI_TAG_MAX * sizeof(void *),
11862 __alignof__(void *));
11863 if (!ath12k_wmi_tb)
11864 return -ENOMEM;
11865
11866 refcount_set(&ath12k_wmi_refcount, 1);
11867 } else {
11868 refcount_inc(&ath12k_wmi_refcount);
11869 }
11870
11871 return 0;
11872 }
11873
ath12k_wmi_free(void)11874 void ath12k_wmi_free(void)
11875 {
11876 guard(mutex)(&ath12k_wmi_mutex);
11877
11878 if (refcount_dec_and_test(&ath12k_wmi_refcount)) {
11879 free_percpu(ath12k_wmi_tb);
11880 ath12k_wmi_tb = NULL;
11881 }
11882 }
11883