1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */ 2 /* 3 * Broadcom NetXtreme-E RoCE driver. 4 * 5 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 6 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 7 * 8 * This software is available to you under a choice of one of two 9 * licenses. You may choose to be licensed under the terms of the GNU 10 * General Public License (GPL) Version 2, available from the file 11 * COPYING in the main directory of this source tree, or the 12 * BSD license below: 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in 22 * the documentation and/or other materials provided with the 23 * distribution. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 27 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 32 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 33 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 34 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 35 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Description: Uverbs ABI header file 38 */ 39 40 #ifndef __BNXT_RE_UVERBS_ABI_H__ 41 #define __BNXT_RE_UVERBS_ABI_H__ 42 43 #include <linux/types.h> 44 #include <rdma/ib_user_ioctl_cmds.h> 45 46 #define BNXT_RE_ABI_VERSION 1 47 48 #define BNXT_RE_CHIP_ID0_CHIP_NUM_SFT 0x00 49 #define BNXT_RE_CHIP_ID0_CHIP_REV_SFT 0x10 50 #define BNXT_RE_CHIP_ID0_CHIP_MET_SFT 0x18 51 52 enum { 53 BNXT_RE_UCNTX_CMASK_HAVE_CCTX = 0x1ULL, 54 BNXT_RE_UCNTX_CMASK_HAVE_MODE = 0x02ULL, 55 BNXT_RE_UCNTX_CMASK_WC_DPI_ENABLED = 0x04ULL, 56 BNXT_RE_UCNTX_CMASK_DBR_PACING_ENABLED = 0x08ULL, 57 BNXT_RE_UCNTX_CMASK_POW2_DISABLED = 0x10ULL, 58 BNXT_RE_UCNTX_CMASK_MSN_TABLE_ENABLED = 0x40, 59 BNXT_RE_UCNTX_CMASK_QP_RATE_LIMIT_ENABLED = 0x80ULL, 60 }; 61 62 enum bnxt_re_wqe_mode { 63 BNXT_QPLIB_WQE_MODE_STATIC = 0x00, 64 BNXT_QPLIB_WQE_MODE_VARIABLE = 0x01, 65 BNXT_QPLIB_WQE_MODE_INVALID = 0x02, 66 }; 67 68 enum { 69 BNXT_RE_COMP_MASK_REQ_UCNTX_POW2_SUPPORT = 0x01, 70 BNXT_RE_COMP_MASK_REQ_UCNTX_VAR_WQE_SUPPORT = 0x02, 71 }; 72 73 struct bnxt_re_uctx_req { 74 __aligned_u64 comp_mask; 75 }; 76 77 struct bnxt_re_uctx_resp { 78 __u32 dev_id; 79 __u32 max_qp; 80 __u32 pg_size; 81 __u32 cqe_sz; 82 __u32 max_cqd; 83 __u32 rsvd; 84 __aligned_u64 comp_mask; 85 __u32 chip_id0; 86 __u32 chip_id1; 87 __u32 mode; 88 __u32 rsvd1; /* padding */ 89 }; 90 91 /* 92 * This struct is placed after the ib_uverbs_alloc_pd_resp struct, which is 93 * not 8 byted aligned. To avoid undesired padding in various cases we have to 94 * set this struct to packed. 95 */ 96 struct bnxt_re_pd_resp { 97 __u32 pdid; 98 __u32 dpi; 99 __u64 dbr; 100 } __attribute__((packed, aligned(4))); 101 102 struct bnxt_re_cq_req { 103 __aligned_u64 cq_va; 104 __aligned_u64 cq_handle; 105 __aligned_u64 comp_mask; 106 }; 107 108 enum bnxt_re_resp_cq_mask { 109 BNXT_RE_CQ_TOGGLE_PAGE_SUPPORT = 0x1, 110 }; 111 112 enum bnxt_re_req_cq_mask { 113 BNXT_RE_CQ_FIXED_NUM_CQE_ENABLE = 0x1, 114 }; 115 116 struct bnxt_re_cq_resp { 117 __u32 cqid; 118 __u32 tail; 119 __u32 phase; 120 __u32 rsvd; 121 __aligned_u64 comp_mask; 122 }; 123 124 struct bnxt_re_resize_cq_req { 125 __aligned_u64 cq_va; 126 }; 127 128 enum bnxt_re_qp_mask { 129 BNXT_RE_QP_REQ_MASK_VAR_WQE_SQ_SLOTS = 0x1, 130 }; 131 132 struct bnxt_re_qp_req { 133 __aligned_u64 qpsva; 134 __aligned_u64 qprva; 135 __aligned_u64 qp_handle; 136 __aligned_u64 comp_mask; 137 __u32 sq_slots; 138 }; 139 140 struct bnxt_re_qp_resp { 141 __u32 qpid; 142 __u32 rsvd; 143 }; 144 145 struct bnxt_re_srq_req { 146 __aligned_u64 srqva; 147 __aligned_u64 srq_handle; 148 }; 149 150 enum bnxt_re_srq_mask { 151 BNXT_RE_SRQ_TOGGLE_PAGE_SUPPORT = 0x1, 152 }; 153 154 struct bnxt_re_srq_resp { 155 __u32 srqid; 156 __u32 rsvd; /* padding */ 157 __aligned_u64 comp_mask; 158 }; 159 160 enum bnxt_re_shpg_offt { 161 BNXT_RE_BEG_RESV_OFFT = 0x00, 162 BNXT_RE_AVID_OFFT = 0x10, 163 BNXT_RE_AVID_SIZE = 0x04, 164 BNXT_RE_END_RESV_OFFT = 0xFF0 165 }; 166 167 enum bnxt_re_objects { 168 BNXT_RE_OBJECT_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT), 169 BNXT_RE_OBJECT_NOTIFY_DRV, 170 BNXT_RE_OBJECT_GET_TOGGLE_MEM, 171 BNXT_RE_OBJECT_DBR, 172 BNXT_RE_OBJECT_DEFAULT_DBR, 173 }; 174 175 enum bnxt_re_alloc_page_type { 176 BNXT_RE_ALLOC_WC_PAGE = 0, 177 BNXT_RE_ALLOC_DBR_BAR_PAGE, 178 BNXT_RE_ALLOC_DBR_PAGE, 179 }; 180 181 enum bnxt_re_var_alloc_page_attrs { 182 BNXT_RE_ALLOC_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 183 BNXT_RE_ALLOC_PAGE_TYPE, 184 BNXT_RE_ALLOC_PAGE_DPI, 185 BNXT_RE_ALLOC_PAGE_MMAP_OFFSET, 186 BNXT_RE_ALLOC_PAGE_MMAP_LENGTH, 187 }; 188 189 enum bnxt_re_alloc_page_attrs { 190 BNXT_RE_DESTROY_PAGE_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 191 }; 192 193 enum bnxt_re_alloc_page_methods { 194 BNXT_RE_METHOD_ALLOC_PAGE = (1U << UVERBS_ID_NS_SHIFT), 195 BNXT_RE_METHOD_DESTROY_PAGE, 196 }; 197 198 enum bnxt_re_notify_drv_methods { 199 BNXT_RE_METHOD_NOTIFY_DRV = (1U << UVERBS_ID_NS_SHIFT), 200 }; 201 202 /* Toggle mem */ 203 204 enum bnxt_re_get_toggle_mem_type { 205 BNXT_RE_CQ_TOGGLE_MEM = 0, 206 BNXT_RE_SRQ_TOGGLE_MEM, 207 }; 208 209 enum bnxt_re_var_toggle_mem_attrs { 210 BNXT_RE_TOGGLE_MEM_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 211 BNXT_RE_TOGGLE_MEM_TYPE, 212 BNXT_RE_TOGGLE_MEM_RES_ID, 213 BNXT_RE_TOGGLE_MEM_MMAP_PAGE, 214 BNXT_RE_TOGGLE_MEM_MMAP_OFFSET, 215 BNXT_RE_TOGGLE_MEM_MMAP_LENGTH, 216 }; 217 218 enum bnxt_re_toggle_mem_attrs { 219 BNXT_RE_RELEASE_TOGGLE_MEM_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 220 }; 221 222 enum bnxt_re_toggle_mem_methods { 223 BNXT_RE_METHOD_GET_TOGGLE_MEM = (1U << UVERBS_ID_NS_SHIFT), 224 BNXT_RE_METHOD_RELEASE_TOGGLE_MEM, 225 }; 226 227 struct bnxt_re_packet_pacing_caps { 228 __u32 qp_rate_limit_min; 229 __u32 qp_rate_limit_max; /* In kbps */ 230 /* Corresponding bit will be set if qp type from 231 * 'enum ib_qp_type' is supported, e.g. 232 * supported_qpts |= 1 << IB_QPT_RC 233 */ 234 __u32 supported_qpts; 235 __u32 reserved; 236 }; 237 238 struct bnxt_re_query_device_ex_resp { 239 struct bnxt_re_packet_pacing_caps packet_pacing_caps; 240 }; 241 242 struct bnxt_re_db_region { 243 __u32 dpi; 244 __u32 reserved; 245 __aligned_u64 umdbr; 246 }; 247 248 enum bnxt_re_obj_dbr_alloc_attrs { 249 BNXT_RE_ALLOC_DBR_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 250 BNXT_RE_ALLOC_DBR_ATTR, 251 BNXT_RE_ALLOC_DBR_OFFSET, 252 }; 253 254 enum bnxt_re_obj_dbr_free_attrs { 255 BNXT_RE_FREE_DBR_HANDLE = (1U << UVERBS_ID_NS_SHIFT), 256 }; 257 258 enum bnxt_re_obj_default_dbr_attrs { 259 BNXT_RE_DEFAULT_DBR_ATTR = (1U << UVERBS_ID_NS_SHIFT), 260 }; 261 262 enum bnxt_re_obj_dpi_methods { 263 BNXT_RE_METHOD_DBR_ALLOC = (1U << UVERBS_ID_NS_SHIFT), 264 BNXT_RE_METHOD_DBR_FREE, 265 BNXT_RE_METHOD_GET_DEFAULT_DBR, 266 }; 267 268 #endif /* __BNXT_RE_UVERBS_ABI_H__*/ 269