1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * comedi/drivers/pcl730.c
4 * Driver for Advantech PCL-730 and clones
5 * José Luis Sánchez
6 */
7
8 /*
9 * Driver: pcl730
10 * Description: Advantech PCL-730 (& compatibles)
11 * Devices: [Advantech] PCL-730 (pcl730), PCM-3730 (pcm3730), PCL-725 (pcl725),
12 * PCL-733 (pcl733), PCL-734 (pcl734),
13 * [ADLink] ACL-7130 (acl7130), ACL-7225b (acl7225b),
14 * [ICP] ISO-730 (iso730), P8R8-DIO (p8r8dio), P16R16-DIO (p16r16dio),
15 * [Diamond Systems] OPMM-1616-XT (opmm-1616-xt), PEARL-MM-P (pearl-mm-p),
16 * IR104-PBF (ir104-pbf),
17 * Author: José Luis Sánchez (jsanchezv@teleline.es)
18 * Status: untested
19 *
20 * Configuration options:
21 * [0] - I/O port base
22 *
23 * Interrupts are not supported.
24 * The ACL-7130 card has an 8254 timer/counter not supported by this driver.
25 */
26
27 #include <linux/module.h>
28 #include <linux/comedi/comedidev.h>
29
30 /*
31 * Register map
32 *
33 * The register map varies slightly depending on the board type but
34 * all registers are 8-bit.
35 *
36 * The boardinfo 'io_range' is used to allow comedi to request the
37 * proper range required by the board.
38 *
39 * The comedi_subdevice 'private' data is used to pass the register
40 * offset to the (*insn_bits) functions to read/write the correct
41 * registers.
42 *
43 * The basic register mapping looks like this:
44 *
45 * BASE+0 Isolated outputs 0-7 (write) / inputs 0-7 (read)
46 * BASE+1 Isolated outputs 8-15 (write) / inputs 8-15 (read)
47 * BASE+2 TTL outputs 0-7 (write) / inputs 0-7 (read)
48 * BASE+3 TTL outputs 8-15 (write) / inputs 8-15 (read)
49 *
50 * The pcm3730 board does not have register BASE+1.
51 *
52 * The pcl725 and p8r8dio only have registers BASE+0 and BASE+1:
53 *
54 * BASE+0 Isolated outputs 0-7 (write) (read back on p8r8dio)
55 * BASE+1 Isolated inputs 0-7 (read)
56 *
57 * The acl7225b and p16r16dio boards have this register mapping:
58 *
59 * BASE+0 Isolated outputs 0-7 (write) (read back)
60 * BASE+1 Isolated outputs 8-15 (write) (read back)
61 * BASE+2 Isolated inputs 0-7 (read)
62 * BASE+3 Isolated inputs 8-15 (read)
63 *
64 * The pcl733 and pcl733 boards have this register mapping:
65 *
66 * BASE+0 Isolated outputs 0-7 (write) or inputs 0-7 (read)
67 * BASE+1 Isolated outputs 8-15 (write) or inputs 8-15 (read)
68 * BASE+2 Isolated outputs 16-23 (write) or inputs 16-23 (read)
69 * BASE+3 Isolated outputs 24-31 (write) or inputs 24-31 (read)
70 *
71 * The opmm-1616-xt board has this register mapping:
72 *
73 * BASE+0 Isolated outputs 0-7 (write) (read back)
74 * BASE+1 Isolated outputs 8-15 (write) (read back)
75 * BASE+2 Isolated inputs 0-7 (read)
76 * BASE+3 Isolated inputs 8-15 (read)
77 *
78 * These registers are not currently supported:
79 *
80 * BASE+2 Relay select register (write)
81 * BASE+3 Board reset control register (write)
82 * BASE+4 Interrupt control register (write)
83 * BASE+4 Change detect 7-0 status register (read)
84 * BASE+5 LED control register (write)
85 * BASE+5 Change detect 15-8 status register (read)
86 *
87 * The pearl-mm-p board has this register mapping:
88 *
89 * BASE+0 Isolated outputs 0-7 (write)
90 * BASE+1 Isolated outputs 8-15 (write)
91 *
92 * The ir104-pbf board has this register mapping:
93 *
94 * BASE+0 Isolated outputs 0-7 (write) (read back)
95 * BASE+1 Isolated outputs 8-15 (write) (read back)
96 * BASE+2 Isolated outputs 16-19 (write) (read back)
97 * BASE+4 Isolated inputs 0-7 (read)
98 * BASE+5 Isolated inputs 8-15 (read)
99 * BASE+6 Isolated inputs 16-19 (read)
100 */
101
102 struct pcl730_board {
103 const char *name;
104 unsigned short io_range;
105 unsigned short min_io_start;
106 unsigned short align_io_start;
107 unsigned is_pcl725:1;
108 unsigned is_acl7225b:1;
109 unsigned is_ir104:1;
110 unsigned has_readback:1;
111 unsigned has_ttl_io:1;
112 int n_subdevs;
113 int n_iso_out_chan;
114 int n_iso_in_chan;
115 int n_ttl_chan;
116 };
117
118 static const struct pcl730_board pcl730_boards[] = {
119 {
120 .name = "pcl730",
121 .io_range = 0x04,
122 .min_io_start = 0,
123 .align_io_start = 0x04,
124 .has_ttl_io = 1,
125 .n_subdevs = 4,
126 .n_iso_out_chan = 16,
127 .n_iso_in_chan = 16,
128 .n_ttl_chan = 16,
129 }, {
130 .name = "iso730",
131 .io_range = 0x04,
132 .min_io_start = 0,
133 .align_io_start = 0x04,
134 .n_subdevs = 4,
135 .n_iso_out_chan = 16,
136 .n_iso_in_chan = 16,
137 .n_ttl_chan = 16,
138 }, {
139 .name = "acl7130",
140 .io_range = 0x08,
141 .min_io_start = 0x200,
142 .align_io_start = 0x08,
143 .has_ttl_io = 1,
144 .n_subdevs = 4,
145 .n_iso_out_chan = 16,
146 .n_iso_in_chan = 16,
147 .n_ttl_chan = 16,
148 }, {
149 .name = "pcm3730",
150 .io_range = 0x04,
151 .min_io_start = 0,
152 .align_io_start = 0x04,
153 .has_ttl_io = 1,
154 .n_subdevs = 4,
155 .n_iso_out_chan = 8,
156 .n_iso_in_chan = 8,
157 .n_ttl_chan = 16,
158 }, {
159 .name = "pcl725",
160 .io_range = 0x02,
161 .min_io_start = 0x200,
162 .align_io_start = 0x02,
163 .is_pcl725 = 1,
164 .n_subdevs = 2,
165 .n_iso_out_chan = 8,
166 .n_iso_in_chan = 8,
167 }, {
168 .name = "p8r8dio",
169 .io_range = 0x02,
170 .min_io_start = 0,
171 .align_io_start = 0x10,
172 .is_pcl725 = 1,
173 .has_readback = 1,
174 .n_subdevs = 2,
175 .n_iso_out_chan = 8,
176 .n_iso_in_chan = 8,
177 }, {
178 .name = "acl7225b",
179 .io_range = 0x08, /* only 4 are used */
180 .min_io_start = 0x200,
181 .align_io_start = 0x08,
182 .is_acl7225b = 1,
183 .has_readback = 1,
184 .n_subdevs = 2,
185 .n_iso_out_chan = 16,
186 .n_iso_in_chan = 16,
187 }, {
188 .name = "p16r16dio",
189 .io_range = 0x04,
190 .min_io_start = 0,
191 .align_io_start = 0x08,
192 .is_acl7225b = 1,
193 .has_readback = 1,
194 .n_subdevs = 2,
195 .n_iso_out_chan = 16,
196 .n_iso_in_chan = 16,
197 }, {
198 .name = "pcl733",
199 .io_range = 0x04,
200 .min_io_start = 0,
201 .align_io_start = 0x04,
202 .n_subdevs = 1,
203 .n_iso_in_chan = 32,
204 }, {
205 .name = "pcl734",
206 .io_range = 0x04,
207 .min_io_start = 0,
208 .align_io_start = 0x04,
209 .n_subdevs = 1,
210 .n_iso_out_chan = 32,
211 }, {
212 .name = "opmm-1616-xt",
213 .io_range = 0x10,
214 .min_io_start = 0x100,
215 .align_io_start = 0x10,
216 .is_acl7225b = 1,
217 .has_readback = 1,
218 .n_subdevs = 2,
219 .n_iso_out_chan = 16,
220 .n_iso_in_chan = 16,
221 }, {
222 .name = "pearl-mm-p",
223 .io_range = 0x02,
224 .min_io_start = 0x240,
225 .align_io_start = 0x40,
226 .n_subdevs = 1,
227 .n_iso_out_chan = 16,
228 }, {
229 .name = "ir104-pbf",
230 .io_range = 0x08,
231 .min_io_start = 0x240,
232 .align_io_start = 0x20,
233 .is_ir104 = 1,
234 .has_readback = 1,
235 .n_iso_out_chan = 20,
236 .n_iso_in_chan = 20,
237 },
238 };
239
pcl730_do_insn_bits(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)240 static int pcl730_do_insn_bits(struct comedi_device *dev,
241 struct comedi_subdevice *s,
242 struct comedi_insn *insn,
243 unsigned int *data)
244 {
245 unsigned long reg = (unsigned long)s->private;
246 unsigned int mask;
247
248 mask = comedi_dio_update_state(s, data);
249 if (mask) {
250 if (mask & 0x00ff)
251 outb(s->state & 0xff, dev->iobase + reg);
252 if ((mask & 0xff00) && (s->n_chan > 8))
253 outb((s->state >> 8) & 0xff, dev->iobase + reg + 1);
254 if ((mask & 0xff0000) && (s->n_chan > 16))
255 outb((s->state >> 16) & 0xff, dev->iobase + reg + 2);
256 if ((mask & 0xff000000) && (s->n_chan > 24))
257 outb((s->state >> 24) & 0xff, dev->iobase + reg + 3);
258 }
259
260 data[1] = s->state;
261
262 return insn->n;
263 }
264
pcl730_get_bits(struct comedi_device * dev,struct comedi_subdevice * s)265 static unsigned int pcl730_get_bits(struct comedi_device *dev,
266 struct comedi_subdevice *s)
267 {
268 unsigned long reg = (unsigned long)s->private;
269 unsigned int val;
270
271 val = inb(dev->iobase + reg);
272 if (s->n_chan > 8)
273 val |= (inb(dev->iobase + reg + 1) << 8);
274 if (s->n_chan > 16)
275 val |= (inb(dev->iobase + reg + 2) << 16);
276 if (s->n_chan > 24)
277 val |= (inb(dev->iobase + reg + 3) << 24);
278
279 return val;
280 }
281
pcl730_di_insn_bits(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)282 static int pcl730_di_insn_bits(struct comedi_device *dev,
283 struct comedi_subdevice *s,
284 struct comedi_insn *insn,
285 unsigned int *data)
286 {
287 data[1] = pcl730_get_bits(dev, s);
288
289 return insn->n;
290 }
291
pcl730_attach(struct comedi_device * dev,struct comedi_devconfig * it)292 static int pcl730_attach(struct comedi_device *dev,
293 struct comedi_devconfig *it)
294 {
295 const struct pcl730_board *board = dev->board_ptr;
296 struct comedi_subdevice *s;
297 unsigned int iobase = it->options[0];
298 int subdev;
299 int ret;
300
301 if (board->is_ir104) {
302 switch (iobase) {
303 case 0x240:
304 case 0x260:
305 case 0x280:
306 case 0x300:
307 break;
308 default:
309 dev_warn(dev->class_dev,
310 "%s: unsupported I/O base address %#x\n",
311 dev->board_name, iobase);
312 return -EINVAL;
313 }
314 }
315 ret = comedi_check_request_region(dev, iobase, board->io_range,
316 board->min_io_start, 0x3ff,
317 board->align_io_start);
318 if (ret)
319 return ret;
320
321 ret = comedi_alloc_subdevices(dev, board->n_subdevs);
322 if (ret)
323 return ret;
324
325 subdev = 0;
326
327 if (board->n_iso_out_chan) {
328 /* Isolated Digital Outputs */
329 s = &dev->subdevices[subdev++];
330 s->type = COMEDI_SUBD_DO;
331 s->subdev_flags = SDF_WRITABLE;
332 s->n_chan = board->n_iso_out_chan;
333 s->maxdata = 1;
334 s->range_table = &range_digital;
335 s->insn_bits = pcl730_do_insn_bits;
336 s->private = (void *)0;
337
338 /* get the initial state if supported */
339 if (board->has_readback)
340 s->state = pcl730_get_bits(dev, s);
341 }
342
343 if (board->n_iso_in_chan) {
344 /* Isolated Digital Inputs */
345 s = &dev->subdevices[subdev++];
346 s->type = COMEDI_SUBD_DI;
347 s->subdev_flags = SDF_READABLE;
348 s->n_chan = board->n_iso_in_chan;
349 s->maxdata = 1;
350 s->range_table = &range_digital;
351 s->insn_bits = pcl730_di_insn_bits;
352 s->private = board->is_ir104 ? (void *)4 :
353 board->is_acl7225b ? (void *)2 :
354 board->is_pcl725 ? (void *)1 : (void *)0;
355 }
356
357 if (board->has_ttl_io) {
358 /* TTL Digital Outputs */
359 s = &dev->subdevices[subdev++];
360 s->type = COMEDI_SUBD_DO;
361 s->subdev_flags = SDF_WRITABLE;
362 s->n_chan = board->n_ttl_chan;
363 s->maxdata = 1;
364 s->range_table = &range_digital;
365 s->insn_bits = pcl730_do_insn_bits;
366 s->private = (void *)2;
367
368 /* TTL Digital Inputs */
369 s = &dev->subdevices[subdev++];
370 s->type = COMEDI_SUBD_DI;
371 s->subdev_flags = SDF_READABLE;
372 s->n_chan = board->n_ttl_chan;
373 s->maxdata = 1;
374 s->range_table = &range_digital;
375 s->insn_bits = pcl730_di_insn_bits;
376 s->private = (void *)2;
377 }
378
379 return 0;
380 }
381
382 static struct comedi_driver pcl730_driver = {
383 .driver_name = "pcl730",
384 .module = THIS_MODULE,
385 .attach = pcl730_attach,
386 .detach = comedi_legacy_detach,
387 .board_name = &pcl730_boards[0].name,
388 .num_names = ARRAY_SIZE(pcl730_boards),
389 .offset = sizeof(struct pcl730_board),
390 };
391 module_comedi_driver(pcl730_driver);
392
393 MODULE_AUTHOR("Comedi https://www.comedi.org");
394 MODULE_DESCRIPTION("Comedi low-level driver");
395 MODULE_LICENSE("GPL");
396