1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
4 *
5 * Copyright (C) 2007 David Brownell
6 */
7
8 #include <linux/delay.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/gpio/driver.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/property.h>
18 #include <linux/slab.h>
19 #include <linux/spinlock.h>
20
21 #include <asm/byteorder.h>
22
23 static const struct i2c_device_id pcf857x_id[] = {
24 { .name = "pcf8574", .driver_data = 8 },
25 { .name = "pcf8574a", .driver_data = 8 },
26 { .name = "pca8574", .driver_data = 8 },
27 { .name = "pca9670", .driver_data = 8 },
28 { .name = "pca9672", .driver_data = 8 },
29 { .name = "pca9674", .driver_data = 8 },
30 { .name = "pcf8575", .driver_data = 16 },
31 { .name = "pca8575", .driver_data = 16 },
32 { .name = "pca9671", .driver_data = 16 },
33 { .name = "pca9673", .driver_data = 16 },
34 { .name = "pca9675", .driver_data = 16 },
35 { .name = "max7328", .driver_data = 8 },
36 { .name = "max7329", .driver_data = 8 },
37 { }
38 };
39 MODULE_DEVICE_TABLE(i2c, pcf857x_id);
40
41 static const struct of_device_id pcf857x_of_table[] = {
42 { .compatible = "nxp,pcf8574", (void *)8 },
43 { .compatible = "nxp,pcf8574a", (void *)8 },
44 { .compatible = "nxp,pca8574", (void *)8 },
45 { .compatible = "nxp,pca9670", (void *)8 },
46 { .compatible = "nxp,pca9672", (void *)8 },
47 { .compatible = "nxp,pca9674", (void *)8 },
48 { .compatible = "nxp,pcf8575", (void *)16 },
49 { .compatible = "nxp,pca8575", (void *)16 },
50 { .compatible = "nxp,pca9671", (void *)16 },
51 { .compatible = "nxp,pca9673", (void *)16 },
52 { .compatible = "nxp,pca9675", (void *)16 },
53 { .compatible = "maxim,max7328", (void *)8 },
54 { .compatible = "maxim,max7329", (void *)8 },
55 { }
56 };
57 MODULE_DEVICE_TABLE(of, pcf857x_of_table);
58
59 /*
60 * The pcf857x, pca857x, and pca967x chips only expose one read and one
61 * write register. Writing a "one" bit (to match the reset state) lets
62 * that pin be used as an input; it's not an open-drain model, but acts
63 * a bit like one. This is described as "quasi-bidirectional"; read the
64 * chip documentation for details.
65 *
66 * Many other I2C GPIO expander chips (like the pca953x models) have
67 * more complex register models and more conventional circuitry using
68 * push/pull drivers. They often use the same 0x20..0x27 addresses as
69 * pcf857x parts, making the "legacy" I2C driver model problematic.
70 */
71 struct pcf857x {
72 struct gpio_chip chip;
73 struct i2c_client *client;
74 struct mutex lock; /* protect 'out' */
75 unsigned int out; /* software latch */
76 unsigned int status; /* current status */
77 unsigned int irq_enabled; /* enabled irqs */
78
79 int (*write)(struct i2c_client *client, unsigned int data);
80 int (*read)(struct i2c_client *client);
81 };
82
83 /*-------------------------------------------------------------------------*/
84
85 /* Talk to 8-bit I/O expander */
86
i2c_write_le8(struct i2c_client * client,unsigned int data)87 static int i2c_write_le8(struct i2c_client *client, unsigned int data)
88 {
89 return i2c_smbus_write_byte(client, data);
90 }
91
i2c_read_le8(struct i2c_client * client)92 static int i2c_read_le8(struct i2c_client *client)
93 {
94 return i2c_smbus_read_byte(client);
95 }
96
97 /* Talk to 16-bit I/O expander */
98
i2c_write_le16(struct i2c_client * client,unsigned int word)99 static int i2c_write_le16(struct i2c_client *client, unsigned int word)
100 {
101 __le16 buf = cpu_to_le16(word);
102 int status;
103
104 status = i2c_master_send(client, (char *)&buf, sizeof(buf));
105 return (status < 0) ? status : 0;
106 }
107
i2c_read_le16(struct i2c_client * client)108 static int i2c_read_le16(struct i2c_client *client)
109 {
110 __le16 buf;
111 int status;
112
113 status = i2c_master_recv(client, (char *)&buf, sizeof(buf));
114 if (status < 0)
115 return status;
116
117 return le16_to_cpu(buf);
118 }
119
120 /*-------------------------------------------------------------------------*/
121
pcf857x_input(struct gpio_chip * chip,unsigned int offset)122 static int pcf857x_input(struct gpio_chip *chip, unsigned int offset)
123 {
124 struct pcf857x *gpio = gpiochip_get_data(chip);
125 int status;
126
127 mutex_lock(&gpio->lock);
128 gpio->out |= (1 << offset);
129 status = gpio->write(gpio->client, gpio->out);
130 mutex_unlock(&gpio->lock);
131
132 return status;
133 }
134
pcf857x_get(struct gpio_chip * chip,unsigned int offset)135 static int pcf857x_get(struct gpio_chip *chip, unsigned int offset)
136 {
137 struct pcf857x *gpio = gpiochip_get_data(chip);
138 int value;
139
140 value = gpio->read(gpio->client);
141 return (value < 0) ? value : !!(value & (1 << offset));
142 }
143
pcf857x_get_multiple(struct gpio_chip * chip,unsigned long * mask,unsigned long * bits)144 static int pcf857x_get_multiple(struct gpio_chip *chip, unsigned long *mask,
145 unsigned long *bits)
146 {
147 struct pcf857x *gpio = gpiochip_get_data(chip);
148 int value = gpio->read(gpio->client);
149
150 if (value < 0)
151 return value;
152
153 *bits &= ~*mask;
154 *bits |= value & *mask;
155
156 return 0;
157 }
158
pcf857x_output(struct gpio_chip * chip,unsigned int offset,int value)159 static int pcf857x_output(struct gpio_chip *chip, unsigned int offset, int value)
160 {
161 struct pcf857x *gpio = gpiochip_get_data(chip);
162 unsigned int bit = 1 << offset;
163 int status;
164
165 mutex_lock(&gpio->lock);
166 if (value)
167 gpio->out |= bit;
168 else
169 gpio->out &= ~bit;
170 status = gpio->write(gpio->client, gpio->out);
171 mutex_unlock(&gpio->lock);
172
173 return status;
174 }
175
pcf857x_set(struct gpio_chip * chip,unsigned int offset,int value)176 static int pcf857x_set(struct gpio_chip *chip, unsigned int offset, int value)
177 {
178 return pcf857x_output(chip, offset, value);
179 }
180
pcf857x_set_multiple(struct gpio_chip * chip,unsigned long * mask,unsigned long * bits)181 static int pcf857x_set_multiple(struct gpio_chip *chip, unsigned long *mask,
182 unsigned long *bits)
183 {
184 struct pcf857x *gpio = gpiochip_get_data(chip);
185 int status;
186
187 mutex_lock(&gpio->lock);
188 gpio->out &= ~*mask;
189 gpio->out |= *bits & *mask;
190 status = gpio->write(gpio->client, gpio->out);
191 mutex_unlock(&gpio->lock);
192
193 return status;
194 }
195
196 /*-------------------------------------------------------------------------*/
197
pcf857x_irq(int irq,void * data)198 static irqreturn_t pcf857x_irq(int irq, void *data)
199 {
200 struct pcf857x *gpio = data;
201 unsigned long change, i, status;
202
203 status = gpio->read(gpio->client);
204
205 /*
206 * call the interrupt handler iff gpio is used as
207 * interrupt source, just to avoid bad irqs
208 */
209 mutex_lock(&gpio->lock);
210 change = (gpio->status ^ status) & gpio->irq_enabled;
211 gpio->status = status;
212 mutex_unlock(&gpio->lock);
213
214 for_each_set_bit(i, &change, gpio->chip.ngpio)
215 handle_nested_irq(irq_find_mapping(gpio->chip.irq.domain, i));
216
217 return IRQ_HANDLED;
218 }
219
220 /*
221 * NOP functions
222 */
noop(struct irq_data * data)223 static void noop(struct irq_data *data) { }
224
pcf857x_irq_set_wake(struct irq_data * data,unsigned int on)225 static int pcf857x_irq_set_wake(struct irq_data *data, unsigned int on)
226 {
227 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
228
229 return irq_set_irq_wake(gpio->client->irq, on);
230 }
231
pcf857x_irq_enable(struct irq_data * data)232 static void pcf857x_irq_enable(struct irq_data *data)
233 {
234 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
235 irq_hw_number_t hwirq = irqd_to_hwirq(data);
236
237 gpiochip_enable_irq(&gpio->chip, hwirq);
238 gpio->irq_enabled |= (1 << hwirq);
239 }
240
pcf857x_irq_disable(struct irq_data * data)241 static void pcf857x_irq_disable(struct irq_data *data)
242 {
243 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
244 irq_hw_number_t hwirq = irqd_to_hwirq(data);
245
246 gpio->irq_enabled &= ~(1 << hwirq);
247 gpiochip_disable_irq(&gpio->chip, hwirq);
248 }
249
pcf857x_irq_bus_lock(struct irq_data * data)250 static void pcf857x_irq_bus_lock(struct irq_data *data)
251 {
252 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
253
254 mutex_lock(&gpio->lock);
255 }
256
pcf857x_irq_bus_sync_unlock(struct irq_data * data)257 static void pcf857x_irq_bus_sync_unlock(struct irq_data *data)
258 {
259 struct pcf857x *gpio = irq_data_get_irq_chip_data(data);
260
261 mutex_unlock(&gpio->lock);
262 }
263
264 static const struct irq_chip pcf857x_irq_chip = {
265 .name = "pcf857x",
266 .irq_enable = pcf857x_irq_enable,
267 .irq_disable = pcf857x_irq_disable,
268 .irq_ack = noop,
269 .irq_mask = noop,
270 .irq_unmask = noop,
271 .irq_set_wake = pcf857x_irq_set_wake,
272 .irq_bus_lock = pcf857x_irq_bus_lock,
273 .irq_bus_sync_unlock = pcf857x_irq_bus_sync_unlock,
274 .flags = IRQCHIP_IMMUTABLE,
275 GPIOCHIP_IRQ_RESOURCE_HELPERS,
276 };
277
278 /*-------------------------------------------------------------------------*/
279
pcf857x_probe(struct i2c_client * client)280 static int pcf857x_probe(struct i2c_client *client)
281 {
282 struct gpio_desc *reset_gpio;
283 struct pcf857x *gpio;
284 unsigned int n_latch = 0;
285 int status;
286
287 /* Allocate, initialize, and register this gpio_chip. */
288 gpio = devm_kzalloc(&client->dev, sizeof(*gpio), GFP_KERNEL);
289 if (!gpio)
290 return -ENOMEM;
291
292 mutex_init(&gpio->lock);
293
294 gpio->chip.base = -1;
295 gpio->chip.can_sleep = true;
296 gpio->chip.parent = &client->dev;
297 gpio->chip.owner = THIS_MODULE;
298 gpio->chip.get = pcf857x_get;
299 gpio->chip.get_multiple = pcf857x_get_multiple;
300 gpio->chip.set = pcf857x_set;
301 gpio->chip.set_multiple = pcf857x_set_multiple;
302 gpio->chip.direction_input = pcf857x_input;
303 gpio->chip.direction_output = pcf857x_output;
304 gpio->chip.ngpio = (uintptr_t)i2c_get_match_data(client);
305
306 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_HIGH);
307 if (IS_ERR(reset_gpio))
308 return dev_err_probe(&client->dev, PTR_ERR(reset_gpio),
309 "failed to get reset GPIO\n");
310
311 if (reset_gpio) {
312 /* Reset already held with devm_gpiod_get_optional with GPIOD_OUT_HIGH */
313 fsleep(4); /* tw(rst) > 4us */
314 gpiod_set_value_cansleep(reset_gpio, 0);
315 fsleep(100); /* trst > 100uS */
316
317 /*
318 * Performing a reset means "The PCA9670 registers and I2C-bus
319 * state machine will be held in their default state until the
320 * RESET input is once again HIGH".
321 *
322 * This is the same as writing 1 for all pins, which is the same
323 * as n_latch=0, the default value of the variable.
324 */
325 } else {
326 device_property_read_u32(&client->dev, "lines-initial-states",
327 &n_latch);
328 }
329
330 /* NOTE: the OnSemi jlc1562b is also largely compatible with
331 * these parts, notably for output. It has a low-resolution
332 * DAC instead of pin change IRQs; and its inputs can be the
333 * result of comparators.
334 */
335
336 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
337 * 9670, 9672, 9764, and 9764a use quite a variety.
338 *
339 * NOTE: we don't distinguish here between *4 and *4a parts.
340 */
341 if (gpio->chip.ngpio == 8) {
342 gpio->write = i2c_write_le8;
343 gpio->read = i2c_read_le8;
344
345 if (!i2c_check_functionality(client->adapter,
346 I2C_FUNC_SMBUS_BYTE))
347 status = -EIO;
348
349 /* fail if there's no chip present */
350 else
351 status = i2c_smbus_read_byte(client);
352
353 /* '75/'75c addresses are 0x20..0x27, just like the '74;
354 * the '75c doesn't have a current source pulling high.
355 * 9671, 9673, and 9765 use quite a variety of addresses.
356 *
357 * NOTE: we don't distinguish here between '75 and '75c parts.
358 */
359 } else if (gpio->chip.ngpio == 16) {
360 gpio->write = i2c_write_le16;
361 gpio->read = i2c_read_le16;
362
363 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
364 status = -EIO;
365
366 /* fail if there's no chip present */
367 else
368 status = i2c_read_le16(client);
369
370 } else {
371 dev_dbg(&client->dev, "unsupported number of gpios\n");
372 status = -EINVAL;
373 }
374
375 if (status < 0)
376 goto fail;
377
378 gpio->chip.label = client->name;
379
380 gpio->client = client;
381 i2c_set_clientdata(client, gpio);
382
383 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
384 * We can't actually know whether a pin is configured (a) as output
385 * and driving the signal low, or (b) as input and reporting a low
386 * value ... without knowing the last value written since the chip
387 * came out of reset (if any). We can't read the latched output.
388 *
389 * In short, the only reliable solution for setting up pin direction
390 * is to do it explicitly. The setup() method can do that, but it
391 * may cause transient glitching since it can't know the last value
392 * written (some pins may need to be driven low).
393 *
394 * Using n_latch avoids that trouble. When left initialized to zero,
395 * our software copy of the "latch" then matches the chip's all-ones
396 * reset state. Otherwise it flags pins to be driven low.
397 */
398 gpio->out = ~n_latch;
399 gpio->status = gpio->read(gpio->client);
400
401 /* Enable irqchip if we have an interrupt */
402 if (client->irq) {
403 struct gpio_irq_chip *girq;
404
405 status = devm_request_threaded_irq(&client->dev, client->irq,
406 NULL, pcf857x_irq, IRQF_ONESHOT |
407 IRQF_TRIGGER_FALLING | IRQF_SHARED,
408 dev_name(&client->dev), gpio);
409 if (status)
410 goto fail;
411
412 girq = &gpio->chip.irq;
413 gpio_irq_chip_set_chip(girq, &pcf857x_irq_chip);
414 /* This will let us handle the parent IRQ in the driver */
415 girq->parent_handler = NULL;
416 girq->num_parents = 0;
417 girq->parents = NULL;
418 girq->default_type = IRQ_TYPE_NONE;
419 girq->handler = handle_level_irq;
420 girq->threaded = true;
421 }
422
423 status = devm_gpiochip_add_data(&client->dev, &gpio->chip, gpio);
424 if (status < 0)
425 goto fail;
426
427 dev_info(&client->dev, "probed\n");
428
429 return 0;
430
431 fail:
432 dev_dbg(&client->dev, "probe error %d for '%s'\n", status,
433 client->name);
434
435 return status;
436 }
437
pcf857x_shutdown(struct i2c_client * client)438 static void pcf857x_shutdown(struct i2c_client *client)
439 {
440 struct pcf857x *gpio = i2c_get_clientdata(client);
441
442 /* Drive all the I/O lines high */
443 gpio->write(gpio->client, BIT(gpio->chip.ngpio) - 1);
444 }
445
446 static struct i2c_driver pcf857x_driver = {
447 .driver = {
448 .name = "pcf857x",
449 .of_match_table = pcf857x_of_table,
450 },
451 .probe = pcf857x_probe,
452 .shutdown = pcf857x_shutdown,
453 .id_table = pcf857x_id,
454 };
455
pcf857x_init(void)456 static int __init pcf857x_init(void)
457 {
458 return i2c_add_driver(&pcf857x_driver);
459 }
460 /* register after i2c postcore initcall and before
461 * subsys initcalls that may rely on these GPIOs
462 */
463 subsys_initcall(pcf857x_init);
464
pcf857x_exit(void)465 static void __exit pcf857x_exit(void)
466 {
467 i2c_del_driver(&pcf857x_driver);
468 }
469 module_exit(pcf857x_exit);
470
471 MODULE_DESCRIPTION("Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders");
472 MODULE_LICENSE("GPL");
473 MODULE_AUTHOR("David Brownell");
474