xref: /linux/drivers/gpio/gpio-max7360.c (revision fab183d632628381b466a41479489541ac0e29a0)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright 2025 Bootlin
4  *
5  * Author: Kamel BOUHARA <kamel.bouhara@bootlin.com>
6  * Author: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
7  */
8 
9 #include <linux/bitfield.h>
10 #include <linux/bitmap.h>
11 #include <linux/err.h>
12 #include <linux/gpio/driver.h>
13 #include <linux/gpio/regmap.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/mfd/max7360.h>
17 #include <linux/minmax.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/property.h>
21 #include <linux/regmap.h>
22 
23 #define MAX7360_GPIO_PORT	1
24 #define MAX7360_GPIO_COL	2
25 
26 struct max7360_gpio_plat_data {
27 	unsigned int function;
28 };
29 
30 static struct max7360_gpio_plat_data max7360_gpio_port_plat = { .function = MAX7360_GPIO_PORT };
31 static struct max7360_gpio_plat_data max7360_gpio_col_plat = { .function = MAX7360_GPIO_COL };
32 
max7360_get_available_gpos(struct device * dev,unsigned int * available_gpios)33 static int max7360_get_available_gpos(struct device *dev, unsigned int *available_gpios)
34 {
35 	u32 columns;
36 	int ret;
37 
38 	ret = device_property_read_u32(dev->parent, "keypad,num-columns", &columns);
39 	if (ret) {
40 		dev_err(dev, "Failed to read columns count\n");
41 		return ret;
42 	}
43 
44 	*available_gpios = min(MAX7360_MAX_GPO, MAX7360_MAX_KEY_COLS - columns);
45 
46 	return 0;
47 }
48 
max7360_gpo_init_valid_mask(struct gpio_chip * gc,unsigned long * valid_mask,unsigned int ngpios)49 static int max7360_gpo_init_valid_mask(struct gpio_chip *gc,
50 				       unsigned long *valid_mask,
51 				       unsigned int ngpios)
52 {
53 	unsigned int available_gpios;
54 	int ret;
55 
56 	ret = max7360_get_available_gpos(gc->parent, &available_gpios);
57 	if (ret)
58 		return ret;
59 
60 	bitmap_clear(valid_mask, 0, MAX7360_MAX_KEY_COLS - available_gpios);
61 
62 	return 0;
63 }
64 
max7360_set_gpos_count(struct device * dev,struct regmap * regmap)65 static int max7360_set_gpos_count(struct device *dev, struct regmap *regmap)
66 {
67 	/*
68 	 * MAX7360 COL0 to COL7 pins can be used either as keypad columns,
69 	 * general purpose output or a mix of both.
70 	 * By default, all pins are used as keypad, here we update this
71 	 * configuration to allow to use some of them as GPIOs.
72 	 */
73 	unsigned int available_gpios;
74 	unsigned int val;
75 	int ret;
76 
77 	ret = max7360_get_available_gpos(dev, &available_gpios);
78 	if (ret)
79 		return ret;
80 
81 	/*
82 	 * Configure which GPIOs will be used for keypad.
83 	 * MAX7360_REG_DEBOUNCE contains configuration both for keypad debounce
84 	 * timings and gpos/keypad columns repartition. Only the later is
85 	 * modified here.
86 	 */
87 	val = FIELD_PREP(MAX7360_PORTS, available_gpios);
88 	ret = regmap_write_bits(regmap, MAX7360_REG_DEBOUNCE, MAX7360_PORTS, val);
89 	if (ret)
90 		dev_err(dev, "Failed to write max7360 columns/gpos configuration");
91 
92 	return ret;
93 }
94 
max7360_gpio_reg_mask_xlate(struct gpio_regmap * gpio,enum gpio_regmap_operation op,unsigned int base,unsigned int offset,unsigned int * reg,unsigned int * mask)95 static int max7360_gpio_reg_mask_xlate(struct gpio_regmap *gpio,
96 				       enum gpio_regmap_operation op,
97 				       unsigned int base, unsigned int offset,
98 				       unsigned int *reg, unsigned int *mask)
99 {
100 	if (base == MAX7360_REG_PWMBASE) {
101 		/*
102 		 * GPIO output is using PWM duty cycle registers: one register
103 		 * per line, with value being either 0 or 255.
104 		 */
105 		*reg = base + offset;
106 		*mask = GENMASK(7, 0);
107 	} else {
108 		*reg = base;
109 		*mask = BIT(offset);
110 	}
111 
112 	return 0;
113 }
114 
115 static const struct regmap_irq max7360_regmap_irqs[MAX7360_MAX_GPIO] = {
116 	REGMAP_IRQ_REG(0, 0, BIT(0)),
117 	REGMAP_IRQ_REG(1, 0, BIT(1)),
118 	REGMAP_IRQ_REG(2, 0, BIT(2)),
119 	REGMAP_IRQ_REG(3, 0, BIT(3)),
120 	REGMAP_IRQ_REG(4, 0, BIT(4)),
121 	REGMAP_IRQ_REG(5, 0, BIT(5)),
122 	REGMAP_IRQ_REG(6, 0, BIT(6)),
123 	REGMAP_IRQ_REG(7, 0, BIT(7)),
124 };
125 
max7360_handle_mask_sync(const int index,const unsigned int mask_buf_def,const unsigned int mask_buf,void * const irq_drv_data)126 static int max7360_handle_mask_sync(const int index,
127 				    const unsigned int mask_buf_def,
128 				    const unsigned int mask_buf,
129 				    void *const irq_drv_data)
130 {
131 	struct regmap *regmap = gpio_regmap_get_drvdata(irq_drv_data);
132 	int ret;
133 
134 	for (unsigned int i = 0; i < MAX7360_MAX_GPIO; i++) {
135 		ret = regmap_assign_bits(regmap, MAX7360_REG_PWMCFG(i),
136 					 MAX7360_PORT_CFG_INTERRUPT_MASK, mask_buf & BIT(i));
137 		if (ret)
138 			return ret;
139 	}
140 
141 	return 0;
142 }
143 
max7360_gpio_probe(struct platform_device * pdev)144 static int max7360_gpio_probe(struct platform_device *pdev)
145 {
146 	const struct max7360_gpio_plat_data *plat_data;
147 	struct gpio_regmap_config gpio_config = { };
148 	struct regmap_irq_chip *irq_chip;
149 	struct device *dev = &pdev->dev;
150 	struct regmap *regmap;
151 	unsigned int outconf;
152 	int ret;
153 
154 	regmap = dev_get_regmap(dev->parent, NULL);
155 	if (!regmap)
156 		return dev_err_probe(dev, -ENODEV, "could not get parent regmap\n");
157 
158 	plat_data = device_get_match_data(dev);
159 	if (plat_data->function == MAX7360_GPIO_PORT) {
160 		if (device_property_read_bool(dev, "interrupt-controller")) {
161 			/*
162 			 * Port GPIOs with interrupt-controller property: add IRQ
163 			 * controller.
164 			 */
165 			gpio_config.regmap_irq_flags = IRQF_ONESHOT | IRQF_SHARED;
166 			gpio_config.regmap_irq_line =
167 				fwnode_irq_get_byname(dev_fwnode(dev->parent), "inti");
168 			if (gpio_config.regmap_irq_line < 0)
169 				return dev_err_probe(dev, gpio_config.regmap_irq_line,
170 						     "Failed to get IRQ\n");
171 
172 			/* Create custom IRQ configuration. */
173 			irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL);
174 			if (!irq_chip)
175 				return -ENOMEM;
176 
177 			irq_chip->name = dev_name(dev);
178 			irq_chip->status_base = MAX7360_REG_GPIOIN;
179 			irq_chip->status_is_level = true;
180 			irq_chip->num_regs = 1;
181 			irq_chip->num_irqs = MAX7360_MAX_GPIO;
182 			irq_chip->irqs = max7360_regmap_irqs;
183 			irq_chip->handle_mask_sync = max7360_handle_mask_sync;
184 
185 			gpio_config.regmap_irq_chip = irq_chip;
186 			gpio_config.drvdata = regmap;
187 
188 			for (unsigned int i = 0; i < MAX7360_MAX_GPIO; i++) {
189 				ret = regmap_write_bits(regmap, MAX7360_REG_PWMCFG(i),
190 							MAX7360_PORT_CFG_INTERRUPT_EDGES,
191 							MAX7360_PORT_CFG_INTERRUPT_EDGES);
192 				if (ret)
193 					return dev_err_probe(dev, ret,
194 							     "Failed to enable interrupts\n");
195 			}
196 		}
197 
198 		/*
199 		 * Port GPIOs: set output mode configuration (constant-current or not).
200 		 * This property is optional.
201 		 */
202 		ret = device_property_read_u32(dev, "maxim,constant-current-disable", &outconf);
203 		if (!ret) {
204 			ret = regmap_write(regmap, MAX7360_REG_GPIOOUTM, outconf);
205 			if (ret)
206 				return dev_err_probe(dev, ret,
207 						     "Failed to set constant-current configuration\n");
208 		}
209 	}
210 
211 	/* Add gpio device. */
212 	gpio_config.parent = dev;
213 	gpio_config.regmap = regmap;
214 	if (plat_data->function == MAX7360_GPIO_PORT) {
215 		gpio_config.ngpio = MAX7360_MAX_GPIO;
216 		gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOIN);
217 		gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PWMBASE);
218 		gpio_config.reg_dir_out_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOCTRL);
219 		gpio_config.ngpio_per_reg = MAX7360_MAX_GPIO;
220 		gpio_config.reg_mask_xlate = max7360_gpio_reg_mask_xlate;
221 	} else {
222 		ret = max7360_set_gpos_count(dev, regmap);
223 		if (ret)
224 			return dev_err_probe(dev, ret, "Failed to set GPOS pin count\n");
225 
226 		gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PORTS);
227 		gpio_config.ngpio = MAX7360_MAX_KEY_COLS;
228 		gpio_config.init_valid_mask = max7360_gpo_init_valid_mask;
229 	}
230 
231 	return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config));
232 }
233 
234 static const struct of_device_id max7360_gpio_of_match[] = {
235 	{
236 		.compatible = "maxim,max7360-gpo",
237 		.data = &max7360_gpio_col_plat
238 	}, {
239 		.compatible = "maxim,max7360-gpio",
240 		.data = &max7360_gpio_port_plat
241 	}, {
242 	}
243 };
244 MODULE_DEVICE_TABLE(of, max7360_gpio_of_match);
245 
246 static struct platform_driver max7360_gpio_driver = {
247 	.driver = {
248 		.name	= "max7360-gpio",
249 		.of_match_table = max7360_gpio_of_match,
250 	},
251 	.probe		= max7360_gpio_probe,
252 };
253 module_platform_driver(max7360_gpio_driver);
254 
255 MODULE_DESCRIPTION("MAX7360 GPIO driver");
256 MODULE_AUTHOR("Kamel BOUHARA <kamel.bouhara@bootlin.com>");
257 MODULE_AUTHOR("Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>");
258 MODULE_LICENSE("GPL");
259