xref: /linux/drivers/scsi/pm8001/pm8001_sas.h (revision 88e45067a30918ebb4942120892963e2311330af)
1 /*
2  * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
3  *
4  * Copyright (c) 2008-2009 USI Co., Ltd.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions, and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14  *    substantially similar to the "NO WARRANTY" disclaimer below
15  *    ("Disclaimer") and any redistribution must be conditioned upon
16  *    including a substantially similar Disclaimer requirement for further
17  *    binary redistribution.
18  * 3. Neither the names of the above-listed copyright holders nor the names
19  *    of any contributors may be used to endorse or promote products derived
20  *    from this software without specific prior written permission.
21  *
22  * Alternatively, this software may be distributed under the terms of the
23  * GNU General Public License ("GPL") version 2 as published by the Free
24  * Software Foundation.
25  *
26  * NO WARRANTY
27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGES.
38  *
39  */
40 
41 #ifndef _PM8001_SAS_H_
42 #define _PM8001_SAS_H_
43 
44 #include <linux/kernel.h>
45 #include <linux/module.h>
46 #include <linux/spinlock.h>
47 #include <linux/delay.h>
48 #include <linux/types.h>
49 #include <linux/ctype.h>
50 #include <linux/dma-mapping.h>
51 #include <linux/pci.h>
52 #include <linux/interrupt.h>
53 #include <linux/workqueue.h>
54 #include <scsi/libsas.h>
55 #include <scsi/scsi_tcq.h>
56 #include <scsi/sas_ata.h>
57 #include <linux/atomic.h>
58 #include <linux/blk-mq.h>
59 #include "pm8001_defs.h"
60 
61 #define DRV_NAME		"pm80xx"
62 #define DRV_VERSION		"0.1.40"
63 #define PM8001_FAIL_LOGGING	0x01 /* Error message logging */
64 #define PM8001_INIT_LOGGING	0x02 /* driver init logging */
65 #define PM8001_DISC_LOGGING	0x04 /* discovery layer logging */
66 #define PM8001_IO_LOGGING	0x08 /* I/O path logging */
67 #define PM8001_EH_LOGGING	0x10 /* libsas EH function logging*/
68 #define PM8001_IOCTL_LOGGING	0x20 /* IOCTL message logging */
69 #define PM8001_MSG_LOGGING	0x40 /* misc message logging */
70 #define PM8001_DEV_LOGGING	0x80 /* development message logging */
71 #define PM8001_DEVIO_LOGGING	0x100 /* development io message logging */
72 #define PM8001_IOERR_LOGGING	0x200 /* development io err message logging */
73 #define PM8001_EVENT_LOGGING	0x400 /* HW event logging */
74 
75 #define pm8001_info(HBA, fmt, ...)					\
76 	pr_info("%s:: %s %d: " fmt,					\
77 		(HBA)->name, __func__, __LINE__, ##__VA_ARGS__)
78 
79 #define pm8001_dbg(HBA, level, fmt, ...)				\
80 do {									\
81 	if (unlikely((HBA)->logging_level & PM8001_##level##_LOGGING))	\
82 		pm8001_info(HBA, fmt, ##__VA_ARGS__);			\
83 } while (0)
84 
85 extern bool pm8001_use_msix;
86 
87 #define IS_SPCV_12G(dev)	((dev->device == 0X8074)		\
88 				|| (dev->device == 0X8076)		\
89 				|| (dev->device == 0X8077)		\
90 				|| (dev->device == 0X8070)		\
91 				|| (dev->device == 0X8072))
92 
93 #define PM8001_NAME_LENGTH		32/* generic length of strings */
94 extern struct list_head hba_list;
95 extern const struct pm8001_dispatch pm8001_8001_dispatch;
96 extern const struct pm8001_dispatch pm8001_80xx_dispatch;
97 
98 extern uint pcs_event_log_severity;
99 
100 struct pm8001_hba_info;
101 struct pm8001_ccb_info;
102 struct pm8001_device;
103 
104 struct pm8001_ioctl_payload {
105 	u32	signature;
106 	u16	major_function;
107 	u16	minor_function;
108 	u16	status;
109 	u16	offset;
110 	u16	id;
111 	u32	wr_length;
112 	u32	rd_length;
113 	u8	*func_specific;
114 };
115 
116 #define MPI_FATAL_ERROR_TABLE_OFFSET_MASK 0xFFFFFF
117 #define MPI_FATAL_ERROR_TABLE_SIZE(value) ((0xFF000000 & value) >> SHIFT24)
118 #define MPI_FATAL_EDUMP_TABLE_LO_OFFSET            0x00     /* HNFBUFL */
119 #define MPI_FATAL_EDUMP_TABLE_HI_OFFSET            0x04     /* HNFBUFH */
120 #define MPI_FATAL_EDUMP_TABLE_LENGTH               0x08     /* HNFBLEN */
121 #define MPI_FATAL_EDUMP_TABLE_HANDSHAKE            0x0C     /* FDDHSHK */
122 #define MPI_FATAL_EDUMP_TABLE_STATUS               0x10     /* FDDTSTAT */
123 #define MPI_FATAL_EDUMP_TABLE_ACCUM_LEN            0x14     /* ACCDDLEN */
124 #define MPI_FATAL_EDUMP_TABLE_TOTAL_LEN		   0x18	    /* TOTALLEN */
125 #define MPI_FATAL_EDUMP_TABLE_SIGNATURE		   0x1C     /* SIGNITURE */
126 #define MPI_FATAL_EDUMP_HANDSHAKE_RDY              0x1
127 #define MPI_FATAL_EDUMP_HANDSHAKE_BUSY             0x0
128 #define MPI_FATAL_EDUMP_TABLE_STAT_RSVD                 0x0
129 #define MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED           0x1
130 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA 0x2
131 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE      0x3
132 #define TYPE_GSM_SPACE        1
133 #define TYPE_QUEUE            2
134 #define TYPE_FATAL            3
135 #define TYPE_NON_FATAL        4
136 #define TYPE_INBOUND          1
137 #define TYPE_OUTBOUND         2
138 struct forensic_data {
139 	u32  data_type;
140 	union {
141 		struct {
142 			u32  direct_len;
143 			u32  direct_offset;
144 			void  *direct_data;
145 		} gsm_buf;
146 		struct {
147 			u16  queue_type;
148 			u16  queue_index;
149 			u32  direct_len;
150 			void  *direct_data;
151 		} queue_buf;
152 		struct {
153 			u32  direct_len;
154 			u32  direct_offset;
155 			u32  read_len;
156 			void  *direct_data;
157 		} data_buf;
158 	};
159 };
160 
161 /* bit31-26 - mask bar */
162 #define SCRATCH_PAD0_BAR_MASK                    0xFC000000
163 /* bit25-0  - offset mask */
164 #define SCRATCH_PAD0_OFFSET_MASK                 0x03FFFFFF
165 /* if AAP error state */
166 #define SCRATCH_PAD0_AAPERR_MASK                 0xFFFFFFFF
167 /* Inbound doorbell bit7 */
168 #define SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP	 0x80
169 /* Inbound doorbell bit7 SPCV */
170 #define SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO  0x80
171 #define MAIN_MERRDCTO_MERRDCES		         0xA0/* DWORD 0x28) */
172 
173 struct pm8001_dispatch {
174 	char *name;
175 	int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
176 	void (*chip_post_init)(struct pm8001_hba_info *pm8001_ha);
177 	int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
178 	void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
179 	int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
180 	void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
181 	irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
182 	u32 (*is_our_interrupt)(struct pm8001_hba_info *pm8001_ha);
183 	int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
184 	void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
185 	void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
186 	void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
187 	int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
188 		struct pm8001_ccb_info *ccb);
189 	int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
190 		struct pm8001_ccb_info *ccb);
191 	int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
192 		struct pm8001_ccb_info *ccb);
193 	int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha,	u8 phy_id);
194 	int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
195 	int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
196 		struct pm8001_device *pm8001_dev, u32 flag);
197 	int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
198 	int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
199 		u32 phy_id, u32 phy_op);
200 	int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
201 		struct pm8001_ccb_info *ccb);
202 	int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
203 		struct pm8001_ccb_info *ccb, struct sas_tmf_task *tmf);
204 	int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
205 	int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
206 	int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
207 		void *payload);
208 	int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
209 		struct pm8001_device *pm8001_dev, u32 state);
210 	int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
211 		u32 state);
212 	int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
213 		u32 state);
214 	int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
215 	int (*fatal_errors)(struct pm8001_hba_info *pm8001_ha);
216 	void (*hw_event_ack_req)(struct pm8001_hba_info *pm8001_ha,
217 		u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0,
218 		u32 param1);
219 };
220 
221 struct pm8001_chip_info {
222 	u32     encrypt;
223 	u32	n_phy;
224 	const struct pm8001_dispatch	*dispatch;
225 };
226 #define PM8001_CHIP_DISP	(pm8001_ha->chip->dispatch)
227 
228 struct pm8001_port {
229 	struct asd_sas_port	sas_port;
230 	u8			port_attached;
231 	u16			wide_port_phymap;
232 	u8			port_state;
233 	u8			port_id;
234 	struct list_head	list;
235 };
236 
237 struct pm8001_phy {
238 	struct pm8001_hba_info	*pm8001_ha;
239 	struct pm8001_port	*port;
240 	struct asd_sas_phy	sas_phy;
241 	struct sas_identify	identify;
242 	struct scsi_device	*sdev;
243 	u64			dev_sas_addr;
244 	u32			phy_type;
245 	struct completion	*enable_completion;
246 	u32			frame_rcvd_size;
247 	u8			frame_rcvd[32];
248 	u8			phy_attached;
249 	u8			phy_state;
250 	enum sas_linkrate	minimum_linkrate;
251 	enum sas_linkrate	maximum_linkrate;
252 	struct completion	*reset_completion;
253 	bool			port_reset_status;
254 	bool			reset_success;
255 };
256 
257 /* port reset status */
258 #define PORT_RESET_SUCCESS	0x00
259 #define PORT_RESET_TMO		0x01
260 
261 struct pm8001_device {
262 	enum sas_device_type	dev_type;
263 	struct domain_device	*sas_device;
264 	u32			attached_phy;
265 	u32			id;
266 	struct completion	*dcompletion;
267 	struct completion	*setds_completion;
268 	u32			device_id;
269 	atomic_t		running_req;
270 };
271 
272 struct pm8001_prd_imt {
273 	__le32			len;
274 	__le32			e;
275 };
276 
277 struct pm8001_prd {
278 	__le64			addr;		/* 64-bit buffer address */
279 	struct pm8001_prd_imt	im_len;		/* 64-bit length */
280 } __attribute__ ((packed));
281 /*
282  * CCB(Command Control Block)
283  */
284 struct pm8001_ccb_info {
285 	struct sas_task		*task;
286 	u32			n_elem;
287 	u32			ccb_tag;
288 	dma_addr_t		ccb_dma_handle;
289 	struct pm8001_device	*device;
290 	struct pm8001_prd	*buf_prd;
291 	struct fw_control_ex	*fw_control_context;
292 	u8			open_retry;
293 };
294 
295 struct mpi_mem {
296 	void			*virt_ptr;
297 	dma_addr_t		phys_addr;
298 	u32			phys_addr_hi;
299 	u32			phys_addr_lo;
300 	u32			total_len;
301 	u32			num_elements;
302 	u32			element_size;
303 	u32			alignment;
304 };
305 
306 struct mpi_mem_req {
307 	/* The number of element in the  mpiMemory array */
308 	u32			count;
309 	/* The array of structures that define memroy regions*/
310 	struct mpi_mem		region[USI_MAX_MEMCNT];
311 };
312 
313 struct encrypt {
314 	u32	cipher_mode;
315 	u32	sec_mode;
316 	u32	status;
317 	u32	flag;
318 };
319 
320 struct sas_phy_attribute_table {
321 	u32	phystart1_16[16];
322 	u32	outbound_hw_event_pid1_16[16];
323 };
324 
325 union main_cfg_table {
326 	struct {
327 	u32			signature;
328 	u32			interface_rev;
329 	u32			firmware_rev;
330 	u32			max_out_io;
331 	u32			max_sgl;
332 	u32			ctrl_cap_flag;
333 	u32			gst_offset;
334 	u32			inbound_queue_offset;
335 	u32			outbound_queue_offset;
336 	u32			inbound_q_nppd_hppd;
337 	u32			outbound_hw_event_pid0_3;
338 	u32			outbound_hw_event_pid4_7;
339 	u32			outbound_ncq_event_pid0_3;
340 	u32			outbound_ncq_event_pid4_7;
341 	u32			outbound_tgt_ITNexus_event_pid0_3;
342 	u32			outbound_tgt_ITNexus_event_pid4_7;
343 	u32			outbound_tgt_ssp_event_pid0_3;
344 	u32			outbound_tgt_ssp_event_pid4_7;
345 	u32			outbound_tgt_smp_event_pid0_3;
346 	u32			outbound_tgt_smp_event_pid4_7;
347 	u32			upper_event_log_addr;
348 	u32			lower_event_log_addr;
349 	u32			event_log_size;
350 	u32			event_log_option;
351 	u32			upper_iop_event_log_addr;
352 	u32			lower_iop_event_log_addr;
353 	u32			iop_event_log_size;
354 	u32			iop_event_log_option;
355 	u32			fatal_err_interrupt;
356 	u32			fatal_err_dump_offset0;
357 	u32			fatal_err_dump_length0;
358 	u32			fatal_err_dump_offset1;
359 	u32			fatal_err_dump_length1;
360 	u32			hda_mode_flag;
361 	u32			anolog_setup_table_offset;
362 	u32			rsvd[4];
363 	} pm8001_tbl;
364 
365 	struct {
366 	u32			signature;
367 	u32			interface_rev;
368 	u32			firmware_rev;
369 	u32			max_out_io;
370 	u32			max_sgl;
371 	u32			ctrl_cap_flag;
372 	u32			gst_offset;
373 	u32			inbound_queue_offset;
374 	u32			outbound_queue_offset;
375 	u32			inbound_q_nppd_hppd;
376 	u32			rsvd[8];
377 	u32			crc_core_dump;
378 	u32			rsvd1;
379 	u32			upper_event_log_addr;
380 	u32			lower_event_log_addr;
381 	u32			event_log_size;
382 	u32			event_log_severity;
383 	u32			upper_pcs_event_log_addr;
384 	u32			lower_pcs_event_log_addr;
385 	u32			pcs_event_log_size;
386 	u32			pcs_event_log_severity;
387 	u32			fatal_err_interrupt;
388 	u32			fatal_err_dump_offset0;
389 	u32			fatal_err_dump_length0;
390 	u32			fatal_err_dump_offset1;
391 	u32			fatal_err_dump_length1;
392 	u32			gpio_led_mapping;
393 	u32			analog_setup_table_offset;
394 	u32			int_vec_table_offset;
395 	u32			phy_attr_table_offset;
396 	u32			port_recovery_timer;
397 	u32			interrupt_reassertion_delay;
398 	u32			fatal_n_non_fatal_dump;	        /* 0x28 */
399 	u32			ila_version;
400 	u32			inc_fw_version;
401 	} pm80xx_tbl;
402 };
403 
404 union general_status_table {
405 	struct {
406 	u32			gst_len_mpistate;
407 	u32			iq_freeze_state0;
408 	u32			iq_freeze_state1;
409 	u32			msgu_tcnt;
410 	u32			iop_tcnt;
411 	u32			rsvd;
412 	u32			phy_state[8];
413 	u32			gpio_input_val;
414 	u32			rsvd1[2];
415 	u32			recover_err_info[8];
416 	} pm8001_tbl;
417 	struct {
418 	u32			gst_len_mpistate;
419 	u32			iq_freeze_state0;
420 	u32			iq_freeze_state1;
421 	u32			msgu_tcnt;
422 	u32			iop_tcnt;
423 	u32			rsvd[9];
424 	u32			gpio_input_val;
425 	u32			rsvd1[2];
426 	u32			recover_err_info[8];
427 	} pm80xx_tbl;
428 };
429 struct inbound_queue_table {
430 	u32			element_pri_size_cnt;
431 	u32			upper_base_addr;
432 	u32			lower_base_addr;
433 	u32			ci_upper_base_addr;
434 	u32			ci_lower_base_addr;
435 	u32			pi_pci_bar;
436 	u32			pi_offset;
437 	u32			total_length;
438 	void			*base_virt;
439 	void			*ci_virt;
440 	u32			reserved;
441 	__le32			consumer_index;
442 	u32			producer_idx;
443 	spinlock_t		iq_lock;
444 };
445 struct outbound_queue_table {
446 	u32			element_size_cnt;
447 	u32			upper_base_addr;
448 	u32			lower_base_addr;
449 	void			*base_virt;
450 	u32			pi_upper_base_addr;
451 	u32			pi_lower_base_addr;
452 	u32			ci_pci_bar;
453 	u32			ci_offset;
454 	u32			total_length;
455 	void			*pi_virt;
456 	u32			interrup_vec_cnt_delay;
457 	u32			dinterrup_to_pci_offset;
458 	__le32			producer_index;
459 	u32			consumer_idx;
460 	spinlock_t		oq_lock;
461 	unsigned long		lock_flags;
462 };
463 struct pm8001_hba_memspace {
464 	void __iomem  		*memvirtaddr;
465 	u64			membase;
466 	u32			memsize;
467 };
468 struct isr_param {
469 	struct pm8001_hba_info *drv_inst;
470 	u32 irq_id;
471 };
472 struct pm8001_hba_info {
473 	char			name[PM8001_NAME_LENGTH];
474 	struct list_head	list;
475 	unsigned long		flags;
476 	spinlock_t		lock;/* host-wide lock */
477 	spinlock_t		bitmap_lock;
478 	struct pci_dev		*pdev;/* our device */
479 	struct device		*dev;
480 	struct pm8001_hba_memspace io_mem[6];
481 	struct mpi_mem_req	memoryMap;
482 	struct encrypt		encrypt_info; /* support encryption */
483 	struct forensic_data	forensic_info;
484 	u32			fatal_bar_loc;
485 	u32			forensic_last_offset;
486 	u32			fatal_forensic_shift_offset;
487 	u32			forensic_fatal_step;
488 	u32			forensic_preserved_accumulated_transfer;
489 	u32			evtlog_ib_offset;
490 	u32			evtlog_ob_offset;
491 	void __iomem	*msg_unit_tbl_addr;/*Message Unit Table Addr*/
492 	void __iomem	*main_cfg_tbl_addr;/*Main Config Table Addr*/
493 	void __iomem	*general_stat_tbl_addr;/*General Status Table Addr*/
494 	void __iomem	*inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
495 	void __iomem	*outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
496 	void __iomem	*pspa_q_tbl_addr;
497 			/*MPI SAS PHY attributes Queue Config Table Addr*/
498 	void __iomem	*ivt_tbl_addr; /*MPI IVT Table Addr */
499 	void __iomem	*fatal_tbl_addr; /*MPI IVT Table Addr */
500 	union main_cfg_table	main_cfg_tbl;
501 	union general_status_table	gs_tbl;
502 	struct inbound_queue_table	inbnd_q_tbl[PM8001_MAX_INB_NUM];
503 	struct outbound_queue_table	outbnd_q_tbl[PM8001_MAX_OUTB_NUM];
504 	struct sas_phy_attribute_table	phy_attr_table;
505 					/* MPI SAS PHY attributes */
506 	u8			sas_addr[SAS_ADDR_SIZE];
507 	struct sas_ha_struct	*sas;/* SCSI/SAS glue */
508 	struct Scsi_Host	*shost;
509 	u32			chip_id;
510 	const struct pm8001_chip_info	*chip;
511 	struct completion	*nvmd_completion;
512 	unsigned long		*rsvd_tags;
513 	struct pm8001_phy	phy[PM8001_MAX_PHYS];
514 	struct pm8001_port	port[PM8001_MAX_PHYS];
515 	u32			id;
516 	u32			irq;
517 	u32			iomb_size; /* SPC and SPCV IOMB size */
518 	struct pm8001_device	*devices;
519 	struct pm8001_ccb_info	*ccb_info;
520 	u32			ccb_count;
521 
522 	bool			use_msix;
523 	int			number_of_intr;/*will be used in remove()*/
524 	char			intr_drvname[PM8001_MAX_MSIX_VEC]
525 				[PM8001_NAME_LENGTH+1+3+1];
526 	struct tasklet_struct	tasklet[PM8001_MAX_MSIX_VEC];
527 	u32			logging_level;
528 	u32			link_rate;
529 	u32			fw_status;
530 	u32			smp_exp_mode;
531 	bool			controller_fatal_error;
532 	const struct firmware 	*fw_image;
533 	struct isr_param irq_vector[PM8001_MAX_MSIX_VEC];
534 	u32			non_fatal_count;
535 	u32			non_fatal_read_length;
536 	u32 max_q_num;
537 	u32 ib_offset;
538 	u32 ob_offset;
539 	u32 ci_offset;
540 	u32 pi_offset;
541 	u32 max_memcnt;
542 };
543 
544 struct pm8001_work {
545 	struct work_struct work;
546 	struct pm8001_hba_info *pm8001_ha;
547 	void *data;
548 	int handler;
549 };
550 
551 struct pm8001_fw_image_header {
552 	u8 vender_id[8];
553 	u8 product_id;
554 	u8 hardware_rev;
555 	u8 dest_partition;
556 	u8 reserved;
557 	u8 fw_rev[4];
558 	__be32  image_length;
559 	__be32 image_crc;
560 	__be32 startup_entry;
561 } __attribute__((packed, aligned(4)));
562 
563 
564 /**
565  * FW Flash Update status values
566  */
567 #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT	0x00
568 #define FLASH_UPDATE_IN_PROGRESS		0x01
569 #define FLASH_UPDATE_HDR_ERR			0x02
570 #define FLASH_UPDATE_OFFSET_ERR			0x03
571 #define FLASH_UPDATE_CRC_ERR			0x04
572 #define FLASH_UPDATE_LENGTH_ERR			0x05
573 #define FLASH_UPDATE_HW_ERR			0x06
574 #define FLASH_UPDATE_DNLD_NOT_SUPPORTED		0x10
575 #define FLASH_UPDATE_DISABLED			0x11
576 
577 /* Device states */
578 #define DS_OPERATIONAL				0x01
579 #define DS_PORT_IN_RESET			0x02
580 #define DS_IN_RECOVERY				0x03
581 #define DS_IN_ERROR				0x04
582 #define DS_NON_OPERATIONAL			0x07
583 
584 /**
585  * brief param structure for firmware flash update.
586  */
587 struct fw_flash_updata_info {
588 	u32			cur_image_offset;
589 	u32			cur_image_len;
590 	u32			total_image_len;
591 	struct pm8001_prd	sgl;
592 };
593 
594 struct fw_control_info {
595 	u32			retcode;/*ret code (status)*/
596 	u32			phase;/*ret code phase*/
597 	u32			phaseCmplt;/*percent complete for the current
598 	update phase */
599 	u32			version;/*Hex encoded firmware version number*/
600 	u32			offset;/*Used for downloading firmware	*/
601 	u32			len; /*len of buffer*/
602 	u32			size;/* Used in OS VPD and Trace get size
603 	operations.*/
604 	u32			reserved;/* padding required for 64 bit
605 	alignment */
606 	u8			buffer[];/* Start of buffer */
607 };
608 struct fw_control_ex {
609 	struct fw_control_info *fw_control;
610 	void			*buffer;/* keep buffer pointer to be
611 	freed when the response comes*/
612 	void			*virtAddr;/* keep virtual address of the data */
613 	void			*usrAddr;/* keep virtual address of the
614 	user data */
615 	dma_addr_t		phys_addr;
616 	u32			len; /* len of buffer  */
617 	void			*payload; /* pointer to IOCTL Payload */
618 	u8			inProgress;/*if 1 - the IOCTL request is in
619 	progress */
620 	void			*param1;
621 	void			*param2;
622 	void			*param3;
623 };
624 
625 /* pm8001 workqueue */
626 extern struct workqueue_struct *pm8001_wq;
627 
628 /******************** function prototype *********************/
629 int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
630 u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
631 void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
632 			  struct pm8001_ccb_info *ccb);
633 int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
634 	void *funcdata);
635 void pm8001_scan_start(struct Scsi_Host *shost);
636 int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
637 int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags);
638 int pm8001_abort_task(struct sas_task *task);
639 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
640 int pm8001_dev_found(struct domain_device *dev);
641 void pm8001_dev_gone(struct domain_device *dev);
642 int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
643 int pm8001_I_T_nexus_reset(struct domain_device *dev);
644 int pm8001_I_T_nexus_event_handler(struct domain_device *dev);
645 int pm8001_query_task(struct sas_task *task);
646 void pm8001_port_formed(struct asd_sas_phy *sas_phy);
647 void pm8001_open_reject_retry(
648 	struct pm8001_hba_info *pm8001_ha,
649 	struct sas_task *task_to_close,
650 	struct pm8001_device *device_to_close);
651 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
652 	dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
653 	u32 mem_size, u32 align);
654 
655 void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
656 int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
657 			u32 q_index, u32 opCode, void *payload, size_t nb,
658 			u32 responseQueue);
659 int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
660 				u16 messageSize, void **messagePtr);
661 u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
662 			struct outbound_queue_table *circularQ, u8 bc);
663 u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
664 			struct outbound_queue_table *circularQ,
665 			void **messagePtr1, u8 *pBC);
666 int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
667 			struct pm8001_device *pm8001_dev, u32 state);
668 int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
669 					void *payload);
670 int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
671 					void *fw_flash_updata_info, u32 tag);
672 int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
673 int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
674 int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
675 				struct pm8001_ccb_info *ccb,
676 				struct sas_tmf_task *tmf);
677 int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
678 				struct pm8001_ccb_info *ccb);
679 int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
680 void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
681 void pm8001_work_fn(struct work_struct *work);
682 int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
683 					void *data, int handler);
684 void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
685 							void *piomb);
686 void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
687 							void *piomb);
688 void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
689 							void *piomb);
690 int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
691 							void *piomb);
692 void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
693 void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
694 void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
695 int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
696 int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
697 int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
698 							void *piomb);
699 int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha, void *piomb);
700 int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
701 void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag);
702 struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
703 					u32 device_id);
704 int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
705 
706 int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
707 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
708 	u32 length, u8 *buf);
709 void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
710 		u32 phy, u32 length, u32 *buf);
711 int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
712 ssize_t pm80xx_get_fatal_dump(struct device *cdev,
713 		struct device_attribute *attr, char *buf);
714 ssize_t pm80xx_get_non_fatal_dump(struct device *cdev,
715 		struct device_attribute *attr, char *buf);
716 ssize_t pm8001_get_gsm_dump(struct device *cdev, u32, char *buf);
717 int pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha);
718 void pm8001_free_dev(struct pm8001_device *pm8001_dev);
719 /* ctl shared API */
720 extern const struct attribute_group *pm8001_host_groups[];
721 extern const struct attribute_group *pm8001_sdev_groups[];
722 
723 #define PM8001_INVALID_TAG	((u32)-1)
724 
725 /*
726  * Allocate a new tag and return the corresponding ccb after initializing it.
727  */
728 static inline struct pm8001_ccb_info *
pm8001_ccb_alloc(struct pm8001_hba_info * pm8001_ha,struct pm8001_device * dev,struct sas_task * task)729 pm8001_ccb_alloc(struct pm8001_hba_info *pm8001_ha,
730 		 struct pm8001_device *dev, struct sas_task *task)
731 {
732 	struct pm8001_ccb_info *ccb;
733 	struct request *rq = NULL;
734 	u32 tag;
735 
736 	if (task)
737 		rq = sas_task_find_rq(task);
738 
739 	if (rq) {
740 		tag = rq->tag + PM8001_RESERVE_SLOT;
741 	} else if (pm8001_tag_alloc(pm8001_ha, &tag)) {
742 		pm8001_dbg(pm8001_ha, FAIL, "Failed to allocate a tag\n");
743 		return NULL;
744 	}
745 
746 	ccb = &pm8001_ha->ccb_info[tag];
747 	ccb->task = task;
748 	ccb->n_elem = 0;
749 	ccb->ccb_tag = tag;
750 	ccb->device = dev;
751 	ccb->fw_control_context = NULL;
752 	ccb->open_retry = 0;
753 
754 	return ccb;
755 }
756 
757 /*
758  * Free the tag of an initialized ccb.
759  */
pm8001_ccb_free(struct pm8001_hba_info * pm8001_ha,struct pm8001_ccb_info * ccb)760 static inline void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha,
761 				   struct pm8001_ccb_info *ccb)
762 {
763 	u32 tag = ccb->ccb_tag;
764 
765 	/*
766 	 * Cleanup the ccb to make sure that a manual scan of the adapter
767 	 * ccb_info array can detect ccb's that are in use.
768 	 * C.f. pm8001_open_reject_retry()
769 	 */
770 	ccb->task = NULL;
771 	ccb->ccb_tag = PM8001_INVALID_TAG;
772 	ccb->device = NULL;
773 	ccb->fw_control_context = NULL;
774 
775 	pm8001_tag_free(pm8001_ha, tag);
776 }
777 
pm8001_ccb_task_free_done(struct pm8001_hba_info * pm8001_ha,struct pm8001_ccb_info * ccb)778 static inline void pm8001_ccb_task_free_done(struct pm8001_hba_info *pm8001_ha,
779 					     struct pm8001_ccb_info *ccb)
780 {
781 	struct sas_task *task = ccb->task;
782 
783 	pm8001_ccb_task_free(pm8001_ha, ccb);
784 	smp_mb(); /*in order to force CPU ordering*/
785 	task->task_done(task);
786 }
787 void pm8001_setds_completion(struct domain_device *dev);
788 void pm8001_tmf_aborted(struct sas_task *task);
789 void pm80xx_show_pending_commands(struct pm8001_hba_info *pm8001_ha,
790 				  struct pm8001_device *dev);
791 
792 #endif
793 
794