1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * opt3001.c - Texas Instruments OPT3001 Light Sensor 4 * 5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Author: Andreas Dannenberg <dannenberg@ti.com> 8 * Based on previous work from: Felipe Balbi <balbi@ti.com> 9 */ 10 11 #include <linux/array_size.h> 12 #include <linux/bits.h> 13 #include <linux/delay.h> 14 #include <linux/dev_printk.h> 15 #include <linux/errno.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/jiffies.h> 19 #include <linux/mod_devicetable.h> 20 #include <linux/module.h> 21 #include <linux/mutex.h> 22 #include <linux/types.h> 23 #include <linux/wait.h> 24 25 #include <linux/iio/events.h> 26 #include <linux/iio/iio.h> 27 #include <linux/iio/sysfs.h> 28 29 #define OPT3001_RESULT 0x00 30 #define OPT3001_CONFIGURATION 0x01 31 #define OPT3001_LOW_LIMIT 0x02 32 #define OPT3001_HIGH_LIMIT 0x03 33 #define OPT3001_MANUFACTURER_ID 0x7e 34 #define OPT3001_DEVICE_ID 0x7f 35 36 #define OPT3001_CONFIGURATION_RN_MASK GENMASK(15, 12) 37 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) 38 39 #define OPT3001_CONFIGURATION_CT BIT(11) 40 41 #define OPT3001_CONFIGURATION_M_MASK GENMASK(10, 9) 42 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) 43 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) 44 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ 45 46 #define OPT3001_CONFIGURATION_CRF BIT(7) 47 #define OPT3001_CONFIGURATION_FH BIT(6) 48 #define OPT3001_CONFIGURATION_FL BIT(5) 49 #define OPT3001_CONFIGURATION_L BIT(4) 50 #define OPT3001_CONFIGURATION_POL BIT(3) 51 #define OPT3001_CONFIGURATION_ME BIT(2) 52 53 #define OPT3001_CONFIGURATION_FC_MASK GENMASK(1, 0) 54 55 /* The end-of-conversion enable is located in the low-limit register */ 56 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 57 58 #define OPT3001_REG_EXPONENT(n) ((n) >> 12) 59 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) 60 61 #define OPT3001_INT_TIME_LONG 800000 62 #define OPT3001_INT_TIME_SHORT 100000 63 64 /* 65 * Time to wait for conversion result to be ready. The device datasheet 66 * sect. 6.5 states results are ready after total integration time plus 3ms. 67 * This results in worst-case max values of 113ms or 883ms, respectively. 68 * Add some slack to be on the safe side. 69 */ 70 #define OPT3001_RESULT_READY_SHORT 150 71 #define OPT3001_RESULT_READY_LONG 1000 72 73 struct opt3001_scale { 74 int val; 75 int val2; 76 }; 77 78 struct opt3001_chip_info { 79 const struct iio_chan_spec (*channels)[2]; 80 enum iio_chan_type chan_type; 81 int num_channels; 82 83 const struct opt3001_scale (*scales)[12]; 84 /* 85 * Factor as specified by conversion equation in datasheet. 86 * eg. 0.01 (scaled to integer 10) for opt3001. 87 */ 88 int factor_whole; 89 /* 90 * Factor to compensate for potentially scaled factor_whole. 91 */ 92 int factor_integer; 93 /* 94 * Factor used to align decimal part of processed value to six decimal 95 * places. 96 */ 97 int factor_decimal; 98 99 bool has_id; 100 }; 101 102 struct opt3001 { 103 struct i2c_client *client; 104 struct device *dev; 105 106 struct mutex lock; 107 bool ok_to_ignore_lock; 108 bool result_ready; 109 wait_queue_head_t result_ready_queue; 110 u16 result; 111 const struct opt3001_chip_info *chip_info; 112 113 u32 int_time; 114 u32 mode; 115 116 u16 high_thresh_mantissa; 117 u16 low_thresh_mantissa; 118 119 u8 high_thresh_exp; 120 u8 low_thresh_exp; 121 122 bool use_irq; 123 }; 124 125 static const struct opt3001_scale opt3001_scales[] = { 126 { 127 .val = 40, 128 .val2 = 950000, 129 }, 130 { 131 .val = 81, 132 .val2 = 900000, 133 }, 134 { 135 .val = 163, 136 .val2 = 800000, 137 }, 138 { 139 .val = 327, 140 .val2 = 600000, 141 }, 142 { 143 .val = 655, 144 .val2 = 200000, 145 }, 146 { 147 .val = 1310, 148 .val2 = 400000, 149 }, 150 { 151 .val = 2620, 152 .val2 = 800000, 153 }, 154 { 155 .val = 5241, 156 .val2 = 600000, 157 }, 158 { 159 .val = 10483, 160 .val2 = 200000, 161 }, 162 { 163 .val = 20966, 164 .val2 = 400000, 165 }, 166 { 167 .val = 41932, 168 .val2 = 800000, 169 }, 170 { 171 .val = 83865, 172 .val2 = 600000, 173 }, 174 }; 175 176 static const struct opt3001_scale opt3002_scales[] = { 177 { 178 .val = 4914, 179 .val2 = 0, 180 }, 181 { 182 .val = 9828, 183 .val2 = 0, 184 }, 185 { 186 .val = 19656, 187 .val2 = 0, 188 }, 189 { 190 .val = 39312, 191 .val2 = 0, 192 }, 193 { 194 .val = 78624, 195 .val2 = 0, 196 }, 197 { 198 .val = 157248, 199 .val2 = 0, 200 }, 201 { 202 .val = 314496, 203 .val2 = 0, 204 }, 205 { 206 .val = 628992, 207 .val2 = 0, 208 }, 209 { 210 .val = 1257984, 211 .val2 = 0, 212 }, 213 { 214 .val = 2515968, 215 .val2 = 0, 216 }, 217 { 218 .val = 5031936, 219 .val2 = 0, 220 }, 221 { 222 .val = 10063872, 223 .val2 = 0, 224 }, 225 }; 226 227 static int opt3001_find_scale(const struct opt3001 *opt, int val, 228 int val2, u8 *exponent) 229 { 230 int i; 231 for (i = 0; i < ARRAY_SIZE(*opt->chip_info->scales); i++) { 232 const struct opt3001_scale *scale = &(*opt->chip_info->scales)[i]; 233 /* 234 * Compare the integer and micro parts to determine value scale. 235 */ 236 if (val < scale->val || 237 (val == scale->val && val2 <= scale->val2)) { 238 *exponent = i; 239 return 0; 240 } 241 } 242 243 return -EINVAL; 244 } 245 246 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, 247 u16 mantissa, int *val, int *val2) 248 { 249 int ret; 250 int whole = opt->chip_info->factor_whole; 251 int integer = opt->chip_info->factor_integer; 252 int decimal = opt->chip_info->factor_decimal; 253 254 ret = whole * (mantissa << exponent); 255 *val = ret / integer; 256 *val2 = (ret - (*val * integer)) * decimal; 257 } 258 259 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) 260 { 261 *reg &= ~OPT3001_CONFIGURATION_M_MASK; 262 *reg |= mode; 263 opt->mode = mode; 264 } 265 266 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); 267 268 static struct attribute *opt3001_attributes[] = { 269 &iio_const_attr_integration_time_available.dev_attr.attr, 270 NULL 271 }; 272 273 static const struct attribute_group opt3001_attribute_group = { 274 .attrs = opt3001_attributes, 275 }; 276 277 static const struct iio_event_spec opt3001_event_spec[] = { 278 { 279 .type = IIO_EV_TYPE_THRESH, 280 .dir = IIO_EV_DIR_RISING, 281 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 282 BIT(IIO_EV_INFO_ENABLE), 283 }, 284 { 285 .type = IIO_EV_TYPE_THRESH, 286 .dir = IIO_EV_DIR_FALLING, 287 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 288 BIT(IIO_EV_INFO_ENABLE), 289 }, 290 }; 291 292 static const struct iio_chan_spec opt3001_channels[] = { 293 { 294 .type = IIO_LIGHT, 295 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 296 BIT(IIO_CHAN_INFO_INT_TIME), 297 .event_spec = opt3001_event_spec, 298 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 299 }, 300 IIO_CHAN_SOFT_TIMESTAMP(1), 301 }; 302 303 static const struct iio_chan_spec opt3002_channels[] = { 304 { 305 .type = IIO_INTENSITY, 306 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 307 BIT(IIO_CHAN_INFO_INT_TIME), 308 .event_spec = opt3001_event_spec, 309 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 310 }, 311 IIO_CHAN_SOFT_TIMESTAMP(1), 312 }; 313 314 static int opt3001_get_processed(struct opt3001 *opt, int *val, int *val2) 315 { 316 int ret; 317 u16 mantissa; 318 u16 reg; 319 u8 exponent; 320 u16 value; 321 long timeout; 322 323 if (opt->use_irq) { 324 /* 325 * Enable the end-of-conversion interrupt mechanism. Note that 326 * doing so will overwrite the low-level limit value however we 327 * will restore this value later on. 328 */ 329 ret = i2c_smbus_write_word_swapped(opt->client, 330 OPT3001_LOW_LIMIT, 331 OPT3001_LOW_LIMIT_EOC_ENABLE); 332 if (ret < 0) { 333 dev_err(opt->dev, "failed to write register %02x\n", 334 OPT3001_LOW_LIMIT); 335 return ret; 336 } 337 338 /* Allow IRQ to access the device despite lock being set */ 339 opt->ok_to_ignore_lock = true; 340 } 341 342 /* Reset data-ready indicator flag */ 343 opt->result_ready = false; 344 345 /* Configure for single-conversion mode and start a new conversion */ 346 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 347 if (ret < 0) { 348 dev_err(opt->dev, "failed to read register %02x\n", 349 OPT3001_CONFIGURATION); 350 goto err; 351 } 352 353 reg = ret; 354 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE); 355 356 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 357 reg); 358 if (ret < 0) { 359 dev_err(opt->dev, "failed to write register %02x\n", 360 OPT3001_CONFIGURATION); 361 goto err; 362 } 363 364 if (opt->use_irq) { 365 /* Wait for the IRQ to indicate the conversion is complete */ 366 ret = wait_event_timeout(opt->result_ready_queue, 367 opt->result_ready, 368 msecs_to_jiffies(OPT3001_RESULT_READY_LONG)); 369 if (ret == 0) { 370 ret = -ETIMEDOUT; 371 goto err; 372 } 373 } else { 374 /* Sleep for result ready time */ 375 timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ? 376 OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG; 377 msleep(timeout); 378 379 /* Check result ready flag */ 380 ret = i2c_smbus_read_word_swapped(opt->client, 381 OPT3001_CONFIGURATION); 382 if (ret < 0) { 383 dev_err(opt->dev, "failed to read register %02x\n", 384 OPT3001_CONFIGURATION); 385 goto err; 386 } 387 388 if (!(ret & OPT3001_CONFIGURATION_CRF)) { 389 ret = -ETIMEDOUT; 390 goto err; 391 } 392 393 /* Obtain value */ 394 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 395 if (ret < 0) { 396 dev_err(opt->dev, "failed to read register %02x\n", 397 OPT3001_RESULT); 398 goto err; 399 } 400 opt->result = ret; 401 opt->result_ready = true; 402 } 403 404 err: 405 if (opt->use_irq) 406 /* Disallow IRQ to access the device while lock is active */ 407 opt->ok_to_ignore_lock = false; 408 409 if (ret < 0) 410 return ret; 411 412 if (opt->use_irq) { 413 /* 414 * Disable the end-of-conversion interrupt mechanism by 415 * restoring the low-level limit value (clearing 416 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing 417 * those enable bits would affect the actual limit value due to 418 * bit-overlap and therefore can't be done. 419 */ 420 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; 421 ret = i2c_smbus_write_word_swapped(opt->client, 422 OPT3001_LOW_LIMIT, 423 value); 424 if (ret < 0) { 425 dev_err(opt->dev, "failed to write register %02x\n", 426 OPT3001_LOW_LIMIT); 427 return ret; 428 } 429 } 430 431 exponent = OPT3001_REG_EXPONENT(opt->result); 432 mantissa = OPT3001_REG_MANTISSA(opt->result); 433 434 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); 435 436 return IIO_VAL_INT_PLUS_MICRO; 437 } 438 439 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) 440 { 441 *val = 0; 442 *val2 = opt->int_time; 443 444 return IIO_VAL_INT_PLUS_MICRO; 445 } 446 447 static int opt3001_set_int_time(struct opt3001 *opt, int time) 448 { 449 int ret; 450 u16 reg; 451 452 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 453 if (ret < 0) { 454 dev_err(opt->dev, "failed to read register %02x\n", 455 OPT3001_CONFIGURATION); 456 return ret; 457 } 458 459 reg = ret; 460 461 switch (time) { 462 case OPT3001_INT_TIME_SHORT: 463 reg &= ~OPT3001_CONFIGURATION_CT; 464 opt->int_time = OPT3001_INT_TIME_SHORT; 465 break; 466 case OPT3001_INT_TIME_LONG: 467 reg |= OPT3001_CONFIGURATION_CT; 468 opt->int_time = OPT3001_INT_TIME_LONG; 469 break; 470 default: 471 return -EINVAL; 472 } 473 474 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 475 reg); 476 } 477 478 static int opt3001_read_raw(struct iio_dev *iio, 479 struct iio_chan_spec const *chan, int *val, int *val2, 480 long mask) 481 { 482 struct opt3001 *opt = iio_priv(iio); 483 int ret; 484 485 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 486 return -EBUSY; 487 488 if (chan->type != opt->chip_info->chan_type) 489 return -EINVAL; 490 491 mutex_lock(&opt->lock); 492 493 switch (mask) { 494 case IIO_CHAN_INFO_RAW: 495 case IIO_CHAN_INFO_PROCESSED: 496 ret = opt3001_get_processed(opt, val, val2); 497 break; 498 case IIO_CHAN_INFO_INT_TIME: 499 ret = opt3001_get_int_time(opt, val, val2); 500 break; 501 default: 502 ret = -EINVAL; 503 } 504 505 mutex_unlock(&opt->lock); 506 507 return ret; 508 } 509 510 static int opt3001_write_raw(struct iio_dev *iio, 511 struct iio_chan_spec const *chan, int val, int val2, 512 long mask) 513 { 514 struct opt3001 *opt = iio_priv(iio); 515 int ret; 516 517 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 518 return -EBUSY; 519 520 if (chan->type != opt->chip_info->chan_type) 521 return -EINVAL; 522 523 if (mask != IIO_CHAN_INFO_INT_TIME) 524 return -EINVAL; 525 526 if (val != 0) 527 return -EINVAL; 528 529 mutex_lock(&opt->lock); 530 ret = opt3001_set_int_time(opt, val2); 531 mutex_unlock(&opt->lock); 532 533 return ret; 534 } 535 536 static int opt3001_read_event_value(struct iio_dev *iio, 537 const struct iio_chan_spec *chan, enum iio_event_type type, 538 enum iio_event_direction dir, enum iio_event_info info, 539 int *val, int *val2) 540 { 541 struct opt3001 *opt = iio_priv(iio); 542 int ret = IIO_VAL_INT_PLUS_MICRO; 543 544 mutex_lock(&opt->lock); 545 546 switch (dir) { 547 case IIO_EV_DIR_RISING: 548 opt3001_to_iio_ret(opt, opt->high_thresh_exp, 549 opt->high_thresh_mantissa, val, val2); 550 break; 551 case IIO_EV_DIR_FALLING: 552 opt3001_to_iio_ret(opt, opt->low_thresh_exp, 553 opt->low_thresh_mantissa, val, val2); 554 break; 555 default: 556 ret = -EINVAL; 557 } 558 559 mutex_unlock(&opt->lock); 560 561 return ret; 562 } 563 564 static int opt3001_write_event_value(struct iio_dev *iio, 565 const struct iio_chan_spec *chan, enum iio_event_type type, 566 enum iio_event_direction dir, enum iio_event_info info, 567 int val, int val2) 568 { 569 struct opt3001 *opt = iio_priv(iio); 570 int ret; 571 int whole; 572 int integer; 573 int decimal; 574 575 u16 mantissa; 576 u16 value; 577 u16 reg; 578 579 u8 exponent; 580 581 if (val < 0) 582 return -EINVAL; 583 584 mutex_lock(&opt->lock); 585 586 ret = opt3001_find_scale(opt, val, val2, &exponent); 587 if (ret < 0) { 588 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2); 589 goto err; 590 } 591 592 whole = opt->chip_info->factor_whole; 593 integer = opt->chip_info->factor_integer; 594 decimal = opt->chip_info->factor_decimal; 595 596 mantissa = (((val * integer) + (val2 / decimal)) / whole) >> exponent; 597 598 value = (exponent << 12) | mantissa; 599 600 switch (dir) { 601 case IIO_EV_DIR_RISING: 602 reg = OPT3001_HIGH_LIMIT; 603 opt->high_thresh_mantissa = mantissa; 604 opt->high_thresh_exp = exponent; 605 break; 606 case IIO_EV_DIR_FALLING: 607 reg = OPT3001_LOW_LIMIT; 608 opt->low_thresh_mantissa = mantissa; 609 opt->low_thresh_exp = exponent; 610 break; 611 default: 612 ret = -EINVAL; 613 goto err; 614 } 615 616 ret = i2c_smbus_write_word_swapped(opt->client, reg, value); 617 if (ret < 0) { 618 dev_err(opt->dev, "failed to write register %02x\n", reg); 619 goto err; 620 } 621 622 err: 623 mutex_unlock(&opt->lock); 624 625 return ret; 626 } 627 628 static int opt3001_read_event_config(struct iio_dev *iio, 629 const struct iio_chan_spec *chan, enum iio_event_type type, 630 enum iio_event_direction dir) 631 { 632 struct opt3001 *opt = iio_priv(iio); 633 634 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; 635 } 636 637 static int opt3001_write_event_config(struct iio_dev *iio, 638 const struct iio_chan_spec *chan, enum iio_event_type type, 639 enum iio_event_direction dir, bool state) 640 { 641 struct opt3001 *opt = iio_priv(iio); 642 int ret; 643 u16 mode; 644 u16 reg; 645 646 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 647 return 0; 648 649 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) 650 return 0; 651 652 mutex_lock(&opt->lock); 653 654 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS 655 : OPT3001_CONFIGURATION_M_SHUTDOWN; 656 657 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 658 if (ret < 0) { 659 dev_err(opt->dev, "failed to read register %02x\n", 660 OPT3001_CONFIGURATION); 661 goto err; 662 } 663 664 reg = ret; 665 opt3001_set_mode(opt, ®, mode); 666 667 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 668 reg); 669 if (ret < 0) { 670 dev_err(opt->dev, "failed to write register %02x\n", 671 OPT3001_CONFIGURATION); 672 goto err; 673 } 674 675 err: 676 mutex_unlock(&opt->lock); 677 678 return ret; 679 } 680 681 static const struct iio_info opt3001_info = { 682 .attrs = &opt3001_attribute_group, 683 .read_raw = opt3001_read_raw, 684 .write_raw = opt3001_write_raw, 685 .read_event_value = opt3001_read_event_value, 686 .write_event_value = opt3001_write_event_value, 687 .read_event_config = opt3001_read_event_config, 688 .write_event_config = opt3001_write_event_config, 689 }; 690 691 static int opt3001_read_id(struct opt3001 *opt) 692 { 693 char manufacturer[2]; 694 u16 device_id; 695 int ret; 696 697 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID); 698 if (ret < 0) { 699 dev_err(opt->dev, "failed to read register %02x\n", 700 OPT3001_MANUFACTURER_ID); 701 return ret; 702 } 703 704 manufacturer[0] = ret >> 8; 705 manufacturer[1] = ret & 0xff; 706 707 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID); 708 if (ret < 0) { 709 dev_err(opt->dev, "failed to read register %02x\n", 710 OPT3001_DEVICE_ID); 711 return ret; 712 } 713 714 device_id = ret; 715 716 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0], 717 manufacturer[1], device_id); 718 719 return 0; 720 } 721 722 static int opt3001_configure(struct opt3001 *opt) 723 { 724 int ret; 725 u16 reg; 726 727 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 728 if (ret < 0) { 729 dev_err(opt->dev, "failed to read register %02x\n", 730 OPT3001_CONFIGURATION); 731 return ret; 732 } 733 734 reg = ret; 735 736 /* Enable automatic full-scale setting mode */ 737 reg &= ~OPT3001_CONFIGURATION_RN_MASK; 738 reg |= OPT3001_CONFIGURATION_RN_AUTO; 739 740 /* Reflect status of the device's integration time setting */ 741 if (reg & OPT3001_CONFIGURATION_CT) 742 opt->int_time = OPT3001_INT_TIME_LONG; 743 else 744 opt->int_time = OPT3001_INT_TIME_SHORT; 745 746 /* Ensure device is in shutdown initially */ 747 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 748 749 /* Configure for latched window-style comparison operation */ 750 reg |= OPT3001_CONFIGURATION_L; 751 reg &= ~OPT3001_CONFIGURATION_POL; 752 reg &= ~OPT3001_CONFIGURATION_ME; 753 reg &= ~OPT3001_CONFIGURATION_FC_MASK; 754 755 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 756 reg); 757 if (ret < 0) { 758 dev_err(opt->dev, "failed to write register %02x\n", 759 OPT3001_CONFIGURATION); 760 return ret; 761 } 762 763 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT); 764 if (ret < 0) { 765 dev_err(opt->dev, "failed to read register %02x\n", 766 OPT3001_LOW_LIMIT); 767 return ret; 768 } 769 770 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 771 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); 772 773 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT); 774 if (ret < 0) { 775 dev_err(opt->dev, "failed to read register %02x\n", 776 OPT3001_HIGH_LIMIT); 777 return ret; 778 } 779 780 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 781 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); 782 783 return 0; 784 } 785 786 static irqreturn_t opt3001_irq(int irq, void *_iio) 787 { 788 struct iio_dev *iio = _iio; 789 struct opt3001 *opt = iio_priv(iio); 790 int ret; 791 bool wake_result_ready_queue = false; 792 enum iio_chan_type chan_type = opt->chip_info->chan_type; 793 bool ok_to_ignore_lock = opt->ok_to_ignore_lock; 794 795 if (!ok_to_ignore_lock) 796 mutex_lock(&opt->lock); 797 798 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 799 if (ret < 0) { 800 dev_err(opt->dev, "failed to read register %02x\n", 801 OPT3001_CONFIGURATION); 802 goto out; 803 } 804 805 if ((ret & OPT3001_CONFIGURATION_M_MASK) == 806 OPT3001_CONFIGURATION_M_CONTINUOUS) { 807 if (ret & OPT3001_CONFIGURATION_FH) 808 iio_push_event(iio, 809 IIO_UNMOD_EVENT_CODE(chan_type, 0, 810 IIO_EV_TYPE_THRESH, 811 IIO_EV_DIR_RISING), 812 iio_get_time_ns(iio)); 813 if (ret & OPT3001_CONFIGURATION_FL) 814 iio_push_event(iio, 815 IIO_UNMOD_EVENT_CODE(chan_type, 0, 816 IIO_EV_TYPE_THRESH, 817 IIO_EV_DIR_FALLING), 818 iio_get_time_ns(iio)); 819 } else if (ret & OPT3001_CONFIGURATION_CRF) { 820 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 821 if (ret < 0) { 822 dev_err(opt->dev, "failed to read register %02x\n", 823 OPT3001_RESULT); 824 goto out; 825 } 826 opt->result = ret; 827 opt->result_ready = true; 828 wake_result_ready_queue = true; 829 } 830 831 out: 832 if (!ok_to_ignore_lock) 833 mutex_unlock(&opt->lock); 834 835 if (wake_result_ready_queue) 836 wake_up(&opt->result_ready_queue); 837 838 return IRQ_HANDLED; 839 } 840 841 static int opt3001_probe(struct i2c_client *client) 842 { 843 struct device *dev = &client->dev; 844 845 struct iio_dev *iio; 846 struct opt3001 *opt; 847 int irq = client->irq; 848 int ret; 849 850 iio = devm_iio_device_alloc(dev, sizeof(*opt)); 851 if (!iio) 852 return -ENOMEM; 853 854 opt = iio_priv(iio); 855 opt->client = client; 856 opt->dev = dev; 857 opt->chip_info = i2c_get_match_data(client); 858 859 mutex_init(&opt->lock); 860 init_waitqueue_head(&opt->result_ready_queue); 861 i2c_set_clientdata(client, iio); 862 863 if (opt->chip_info->has_id) { 864 ret = opt3001_read_id(opt); 865 if (ret) 866 return ret; 867 } 868 869 ret = opt3001_configure(opt); 870 if (ret) 871 return ret; 872 873 iio->name = client->name; 874 iio->channels = *opt->chip_info->channels; 875 iio->num_channels = opt->chip_info->num_channels; 876 iio->modes = INDIO_DIRECT_MODE; 877 iio->info = &opt3001_info; 878 879 ret = devm_iio_device_register(dev, iio); 880 if (ret) { 881 dev_err(dev, "failed to register IIO device\n"); 882 return ret; 883 } 884 885 /* Make use of INT pin only if valid IRQ no. is given */ 886 if (irq > 0) { 887 ret = request_threaded_irq(irq, NULL, opt3001_irq, 888 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 889 "opt3001", iio); 890 if (ret) { 891 dev_err(dev, "failed to request IRQ #%d\n", irq); 892 return ret; 893 } 894 opt->use_irq = true; 895 } else { 896 dev_dbg(opt->dev, "enabling interrupt-less operation\n"); 897 } 898 899 return 0; 900 } 901 902 static void opt3001_remove(struct i2c_client *client) 903 { 904 struct iio_dev *iio = i2c_get_clientdata(client); 905 struct opt3001 *opt = iio_priv(iio); 906 int ret; 907 u16 reg; 908 909 if (opt->use_irq) 910 free_irq(client->irq, iio); 911 912 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 913 if (ret < 0) { 914 dev_err(opt->dev, "failed to read register %02x\n", 915 OPT3001_CONFIGURATION); 916 return; 917 } 918 919 reg = ret; 920 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 921 922 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 923 reg); 924 if (ret < 0) { 925 dev_err(opt->dev, "failed to write register %02x\n", 926 OPT3001_CONFIGURATION); 927 } 928 } 929 930 static const struct opt3001_chip_info opt3001_chip_information = { 931 .channels = &opt3001_channels, 932 .chan_type = IIO_LIGHT, 933 .num_channels = ARRAY_SIZE(opt3001_channels), 934 .scales = &opt3001_scales, 935 .factor_whole = 10, 936 .factor_integer = 1000, 937 .factor_decimal = 1000, 938 .has_id = true, 939 }; 940 941 static const struct opt3001_chip_info opt3002_chip_information = { 942 .channels = &opt3002_channels, 943 .chan_type = IIO_INTENSITY, 944 .num_channels = ARRAY_SIZE(opt3002_channels), 945 .scales = &opt3002_scales, 946 .factor_whole = 12, 947 .factor_integer = 10, 948 .factor_decimal = 100000, 949 .has_id = false, 950 }; 951 952 static const struct i2c_device_id opt3001_id[] = { 953 { .name = "opt3001", .driver_data = (kernel_ulong_t)&opt3001_chip_information }, 954 { .name = "opt3002", .driver_data = (kernel_ulong_t)&opt3002_chip_information }, 955 { } /* Terminating Entry */ 956 }; 957 MODULE_DEVICE_TABLE(i2c, opt3001_id); 958 959 static const struct of_device_id opt3001_of_match[] = { 960 { .compatible = "ti,opt3001", .data = &opt3001_chip_information }, 961 { .compatible = "ti,opt3002", .data = &opt3002_chip_information }, 962 { } 963 }; 964 MODULE_DEVICE_TABLE(of, opt3001_of_match); 965 966 static struct i2c_driver opt3001_driver = { 967 .probe = opt3001_probe, 968 .remove = opt3001_remove, 969 .id_table = opt3001_id, 970 971 .driver = { 972 .name = "opt3001", 973 .of_match_table = opt3001_of_match, 974 }, 975 }; 976 977 module_i2c_driver(opt3001_driver); 978 979 MODULE_LICENSE("GPL v2"); 980 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); 981 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); 982