1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * CZ.NIC's Turris Omnia MCU GPIO and IRQ driver
4 *
5 * 2024 by Marek Behún <kabel@kernel.org>
6 */
7
8 #include <linux/array_size.h>
9 #include <linux/bitfield.h>
10 #include <linux/bitops.h>
11 #include <linux/bug.h>
12 #include <linux/cleanup.h>
13 #include <linux/device.h>
14 #include <linux/devm-helpers.h>
15 #include <linux/errno.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/gpio/driver.h>
18 #include <linux/i2c.h>
19 #include <linux/interrupt.h>
20 #include <linux/mutex.h>
21 #include <linux/sysfs.h>
22 #include <linux/types.h>
23 #include <linux/workqueue.h>
24 #include <linux/unaligned.h>
25
26 #include <linux/turris-omnia-mcu-interface.h>
27 #include "turris-omnia-mcu.h"
28
29 #define OMNIA_CMD_INT_ARG_LEN 8
30 #define FRONT_BUTTON_RELEASE_DELAY_MS 50
31
32 static const char * const omnia_mcu_gpio_names[64] = {
33 /* GPIOs with value read from the 16-bit wide status */
34 [4] = "MiniPCIe0 Card Detect",
35 [5] = "MiniPCIe0 mSATA Indicator",
36 [6] = "Front USB3 port over-current",
37 [7] = "Rear USB3 port over-current",
38 [8] = "Front USB3 port power",
39 [9] = "Rear USB3 port power",
40 [12] = "Front Button",
41
42 /* GPIOs with value read from the 32-bit wide extended status */
43 [16] = "SFP nDET",
44 [28] = "MiniPCIe0 LED",
45 [29] = "MiniPCIe1 LED",
46 [30] = "MiniPCIe2 LED",
47 [31] = "MiniPCIe0 PAN LED",
48 [32] = "MiniPCIe1 PAN LED",
49 [33] = "MiniPCIe2 PAN LED",
50 [34] = "WAN PHY LED0",
51 [35] = "WAN PHY LED1",
52 [36] = "LAN switch p0 LED0",
53 [37] = "LAN switch p0 LED1",
54 [38] = "LAN switch p1 LED0",
55 [39] = "LAN switch p1 LED1",
56 [40] = "LAN switch p2 LED0",
57 [41] = "LAN switch p2 LED1",
58 [42] = "LAN switch p3 LED0",
59 [43] = "LAN switch p3 LED1",
60 [44] = "LAN switch p4 LED0",
61 [45] = "LAN switch p4 LED1",
62 [46] = "LAN switch p5 LED0",
63 [47] = "LAN switch p5 LED1",
64
65 /* GPIOs with value read from the 16-bit wide extended control status */
66 [48] = "eMMC nRESET",
67 [49] = "LAN switch nRESET",
68 [50] = "WAN PHY nRESET",
69 [51] = "MiniPCIe0 nPERST",
70 [52] = "MiniPCIe1 nPERST",
71 [53] = "MiniPCIe2 nPERST",
72 [54] = "WAN PHY SFP mux",
73 [56] = "VHV power disable",
74 };
75
76 struct omnia_gpio {
77 u8 cmd;
78 u8 ctl_cmd;
79 u8 bit;
80 u8 ctl_bit;
81 u8 int_bit;
82 u16 feat;
83 u16 feat_mask;
84 };
85
86 #define OMNIA_GPIO_INVALID_INT_BIT 0xff
87
88 #define _DEF_GPIO(_cmd, _ctl_cmd, _bit, _ctl_bit, _int_bit, _feat, _feat_mask) \
89 { \
90 .cmd = _cmd, \
91 .ctl_cmd = _ctl_cmd, \
92 .bit = _bit, \
93 .ctl_bit = _ctl_bit, \
94 .int_bit = (_int_bit) < 0 ? OMNIA_GPIO_INVALID_INT_BIT \
95 : (_int_bit), \
96 .feat = _feat, \
97 .feat_mask = _feat_mask, \
98 }
99
100 #define _DEF_GPIO_STS(_name) \
101 _DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, 0, __bf_shf(OMNIA_STS_ ## _name), \
102 0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)
103
104 #define _DEF_GPIO_CTL(_name) \
105 _DEF_GPIO(OMNIA_CMD_GET_STATUS_WORD, OMNIA_CMD_GENERAL_CONTROL, \
106 __bf_shf(OMNIA_STS_ ## _name), __bf_shf(OMNIA_CTL_ ## _name), \
107 -1, 0, 0)
108
109 #define _DEF_GPIO_EXT_STS(_name, _feat) \
110 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
111 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
112 __bf_shf(OMNIA_INT_ ## _name), \
113 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \
114 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)
115
116 #define _DEF_GPIO_EXT_STS_LED(_name, _ledext) \
117 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
118 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
119 __bf_shf(OMNIA_INT_ ## _name), \
120 OMNIA_FEAT_LED_STATE_ ## _ledext, \
121 OMNIA_FEAT_LED_STATE_EXT_MASK)
122
123 #define _DEF_GPIO_EXT_STS_LEDALL(_name) \
124 _DEF_GPIO(OMNIA_CMD_GET_EXT_STATUS_DWORD, 0, \
125 __bf_shf(OMNIA_EXT_STS_ ## _name), 0, \
126 __bf_shf(OMNIA_INT_ ## _name), \
127 OMNIA_FEAT_LED_STATE_EXT_MASK, 0)
128
129 #define _DEF_GPIO_EXT_CTL(_name, _feat) \
130 _DEF_GPIO(OMNIA_CMD_GET_EXT_CONTROL_STATUS, OMNIA_CMD_EXT_CONTROL, \
131 __bf_shf(OMNIA_EXT_CTL_ ## _name), \
132 __bf_shf(OMNIA_EXT_CTL_ ## _name), -1, \
133 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS, \
134 OMNIA_FEAT_ ## _feat | OMNIA_FEAT_EXT_CMDS)
135
136 #define _DEF_INT(_name) \
137 _DEF_GPIO(0, 0, 0, 0, __bf_shf(OMNIA_INT_ ## _name), 0, 0)
138
is_int_bit_valid(const struct omnia_gpio * gpio)139 static inline bool is_int_bit_valid(const struct omnia_gpio *gpio)
140 {
141 return gpio->int_bit != OMNIA_GPIO_INVALID_INT_BIT;
142 }
143
144 static const struct omnia_gpio omnia_gpios[64] = {
145 /* GPIOs with value read from the 16-bit wide status */
146 [4] = _DEF_GPIO_STS(CARD_DET),
147 [5] = _DEF_GPIO_STS(MSATA_IND),
148 [6] = _DEF_GPIO_STS(USB30_OVC),
149 [7] = _DEF_GPIO_STS(USB31_OVC),
150 [8] = _DEF_GPIO_CTL(USB30_PWRON),
151 [9] = _DEF_GPIO_CTL(USB31_PWRON),
152
153 /* brightness changed interrupt, no GPIO */
154 [11] = _DEF_INT(BRIGHTNESS_CHANGED),
155
156 [12] = _DEF_GPIO_STS(BUTTON_PRESSED),
157
158 /* TRNG interrupt, no GPIO */
159 [13] = _DEF_INT(TRNG),
160
161 /* MESSAGE_SIGNED interrupt, no GPIO */
162 [14] = _DEF_INT(MESSAGE_SIGNED),
163
164 /* GPIOs with value read from the 32-bit wide extended status */
165 [16] = _DEF_GPIO_EXT_STS(SFP_nDET, PERIPH_MCU),
166 [28] = _DEF_GPIO_EXT_STS_LEDALL(WLAN0_MSATA_LED),
167 [29] = _DEF_GPIO_EXT_STS_LEDALL(WLAN1_LED),
168 [30] = _DEF_GPIO_EXT_STS_LEDALL(WLAN2_LED),
169 [31] = _DEF_GPIO_EXT_STS_LED(WPAN0_LED, EXT),
170 [32] = _DEF_GPIO_EXT_STS_LED(WPAN1_LED, EXT),
171 [33] = _DEF_GPIO_EXT_STS_LED(WPAN2_LED, EXT),
172 [34] = _DEF_GPIO_EXT_STS_LEDALL(WAN_LED0),
173 [35] = _DEF_GPIO_EXT_STS_LED(WAN_LED1, EXT_V32),
174 [36] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED0),
175 [37] = _DEF_GPIO_EXT_STS_LEDALL(LAN0_LED1),
176 [38] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED0),
177 [39] = _DEF_GPIO_EXT_STS_LEDALL(LAN1_LED1),
178 [40] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED0),
179 [41] = _DEF_GPIO_EXT_STS_LEDALL(LAN2_LED1),
180 [42] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED0),
181 [43] = _DEF_GPIO_EXT_STS_LEDALL(LAN3_LED1),
182 [44] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED0),
183 [45] = _DEF_GPIO_EXT_STS_LEDALL(LAN4_LED1),
184 [46] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED0),
185 [47] = _DEF_GPIO_EXT_STS_LEDALL(LAN5_LED1),
186
187 /* GPIOs with value read from the 16-bit wide extended control status */
188 [48] = _DEF_GPIO_EXT_CTL(nRES_MMC, PERIPH_MCU),
189 [49] = _DEF_GPIO_EXT_CTL(nRES_LAN, PERIPH_MCU),
190 [50] = _DEF_GPIO_EXT_CTL(nRES_PHY, PERIPH_MCU),
191 [51] = _DEF_GPIO_EXT_CTL(nPERST0, PERIPH_MCU),
192 [52] = _DEF_GPIO_EXT_CTL(nPERST1, PERIPH_MCU),
193 [53] = _DEF_GPIO_EXT_CTL(nPERST2, PERIPH_MCU),
194 [54] = _DEF_GPIO_EXT_CTL(PHY_SFP, PERIPH_MCU),
195 [56] = _DEF_GPIO_EXT_CTL(nVHV_CTRL, PERIPH_MCU),
196 };
197
198 /* mapping from interrupts to indexes of GPIOs in the omnia_gpios array */
199 static const u8 omnia_int_to_gpio_idx[32] = {
200 [__bf_shf(OMNIA_INT_CARD_DET)] = 4,
201 [__bf_shf(OMNIA_INT_MSATA_IND)] = 5,
202 [__bf_shf(OMNIA_INT_USB30_OVC)] = 6,
203 [__bf_shf(OMNIA_INT_USB31_OVC)] = 7,
204 [__bf_shf(OMNIA_INT_BUTTON_PRESSED)] = 12,
205 [__bf_shf(OMNIA_INT_TRNG)] = 13,
206 [__bf_shf(OMNIA_INT_MESSAGE_SIGNED)] = 14,
207 [__bf_shf(OMNIA_INT_SFP_nDET)] = 16,
208 [__bf_shf(OMNIA_INT_BRIGHTNESS_CHANGED)] = 11,
209 [__bf_shf(OMNIA_INT_WLAN0_MSATA_LED)] = 28,
210 [__bf_shf(OMNIA_INT_WLAN1_LED)] = 29,
211 [__bf_shf(OMNIA_INT_WLAN2_LED)] = 30,
212 [__bf_shf(OMNIA_INT_WPAN0_LED)] = 31,
213 [__bf_shf(OMNIA_INT_WPAN1_LED)] = 32,
214 [__bf_shf(OMNIA_INT_WPAN2_LED)] = 33,
215 [__bf_shf(OMNIA_INT_WAN_LED0)] = 34,
216 [__bf_shf(OMNIA_INT_WAN_LED1)] = 35,
217 [__bf_shf(OMNIA_INT_LAN0_LED0)] = 36,
218 [__bf_shf(OMNIA_INT_LAN0_LED1)] = 37,
219 [__bf_shf(OMNIA_INT_LAN1_LED0)] = 38,
220 [__bf_shf(OMNIA_INT_LAN1_LED1)] = 39,
221 [__bf_shf(OMNIA_INT_LAN2_LED0)] = 40,
222 [__bf_shf(OMNIA_INT_LAN2_LED1)] = 41,
223 [__bf_shf(OMNIA_INT_LAN3_LED0)] = 42,
224 [__bf_shf(OMNIA_INT_LAN3_LED1)] = 43,
225 [__bf_shf(OMNIA_INT_LAN4_LED0)] = 44,
226 [__bf_shf(OMNIA_INT_LAN4_LED1)] = 45,
227 [__bf_shf(OMNIA_INT_LAN5_LED0)] = 46,
228 [__bf_shf(OMNIA_INT_LAN5_LED1)] = 47,
229 };
230
231 /* index of PHY_SFP GPIO in the omnia_gpios array */
232 #define OMNIA_GPIO_PHY_SFP_OFFSET 54
233
omnia_ctl_cmd_locked(struct omnia_mcu * mcu,u8 cmd,u16 val,u16 mask)234 static int omnia_ctl_cmd_locked(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)
235 {
236 unsigned int len;
237 u8 buf[5];
238
239 buf[0] = cmd;
240
241 switch (cmd) {
242 case OMNIA_CMD_GENERAL_CONTROL:
243 buf[1] = val;
244 buf[2] = mask;
245 len = 3;
246 break;
247
248 case OMNIA_CMD_EXT_CONTROL:
249 put_unaligned_le16(val, &buf[1]);
250 put_unaligned_le16(mask, &buf[3]);
251 len = 5;
252 break;
253
254 default:
255 BUG();
256 }
257
258 return omnia_cmd_write(mcu->client, buf, len);
259 }
260
omnia_ctl_cmd(struct omnia_mcu * mcu,u8 cmd,u16 val,u16 mask)261 static int omnia_ctl_cmd(struct omnia_mcu *mcu, u8 cmd, u16 val, u16 mask)
262 {
263 guard(mutex)(&mcu->lock);
264
265 return omnia_ctl_cmd_locked(mcu, cmd, val, mask);
266 }
267
omnia_gpio_request(struct gpio_chip * gc,unsigned int offset)268 static int omnia_gpio_request(struct gpio_chip *gc, unsigned int offset)
269 {
270 if (!omnia_gpios[offset].cmd)
271 return -EINVAL;
272
273 return 0;
274 }
275
omnia_gpio_get_direction(struct gpio_chip * gc,unsigned int offset)276 static int omnia_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
277 {
278 struct omnia_mcu *mcu = gpiochip_get_data(gc);
279
280 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET) {
281 int val;
282
283 scoped_guard(mutex, &mcu->lock) {
284 val = omnia_cmd_read_bit(mcu->client,
285 OMNIA_CMD_GET_EXT_CONTROL_STATUS,
286 OMNIA_EXT_CTL_PHY_SFP_AUTO);
287 if (val < 0)
288 return val;
289 }
290
291 if (val)
292 return GPIO_LINE_DIRECTION_IN;
293
294 return GPIO_LINE_DIRECTION_OUT;
295 }
296
297 if (omnia_gpios[offset].ctl_cmd)
298 return GPIO_LINE_DIRECTION_OUT;
299
300 return GPIO_LINE_DIRECTION_IN;
301 }
302
omnia_gpio_direction_input(struct gpio_chip * gc,unsigned int offset)303 static int omnia_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)
304 {
305 const struct omnia_gpio *gpio = &omnia_gpios[offset];
306 struct omnia_mcu *mcu = gpiochip_get_data(gc);
307
308 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)
309 return omnia_ctl_cmd(mcu, OMNIA_CMD_EXT_CONTROL,
310 OMNIA_EXT_CTL_PHY_SFP_AUTO,
311 OMNIA_EXT_CTL_PHY_SFP_AUTO);
312
313 if (gpio->ctl_cmd)
314 return -ENOTSUPP;
315
316 return 0;
317 }
318
omnia_gpio_direction_output(struct gpio_chip * gc,unsigned int offset,int value)319 static int omnia_gpio_direction_output(struct gpio_chip *gc,
320 unsigned int offset, int value)
321 {
322 const struct omnia_gpio *gpio = &omnia_gpios[offset];
323 struct omnia_mcu *mcu = gpiochip_get_data(gc);
324 u16 val, mask;
325
326 if (!gpio->ctl_cmd)
327 return -ENOTSUPP;
328
329 mask = BIT(gpio->ctl_bit);
330 val = value ? mask : 0;
331
332 if (offset == OMNIA_GPIO_PHY_SFP_OFFSET)
333 mask |= OMNIA_EXT_CTL_PHY_SFP_AUTO;
334
335 return omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);
336 }
337
omnia_gpio_get(struct gpio_chip * gc,unsigned int offset)338 static int omnia_gpio_get(struct gpio_chip *gc, unsigned int offset)
339 {
340 const struct omnia_gpio *gpio = &omnia_gpios[offset];
341 struct omnia_mcu *mcu = gpiochip_get_data(gc);
342
343 /*
344 * If firmware does not support the new interrupt API, we are informed
345 * of every change of the status word by an interrupt from MCU and save
346 * its value in the interrupt service routine. Simply return the saved
347 * value.
348 */
349 if (gpio->cmd == OMNIA_CMD_GET_STATUS_WORD &&
350 !(mcu->features & OMNIA_FEAT_NEW_INT_API))
351 return test_bit(gpio->bit, &mcu->last_status);
352
353 guard(mutex)(&mcu->lock);
354
355 /*
356 * If firmware does support the new interrupt API, we may have cached
357 * the value of a GPIO in the interrupt service routine. If not, read
358 * the relevant bit now.
359 */
360 if (is_int_bit_valid(gpio) && test_bit(gpio->int_bit, &mcu->is_cached))
361 return test_bit(gpio->int_bit, &mcu->cached);
362
363 return omnia_cmd_read_bit(mcu->client, gpio->cmd, BIT(gpio->bit));
364 }
365
366 static unsigned long *
_relevant_field_for_sts_cmd(u8 cmd,unsigned long * sts,unsigned long * ext_sts,unsigned long * ext_ctl)367 _relevant_field_for_sts_cmd(u8 cmd, unsigned long *sts, unsigned long *ext_sts,
368 unsigned long *ext_ctl)
369 {
370 switch (cmd) {
371 case OMNIA_CMD_GET_STATUS_WORD:
372 return sts;
373 case OMNIA_CMD_GET_EXT_STATUS_DWORD:
374 return ext_sts;
375 case OMNIA_CMD_GET_EXT_CONTROL_STATUS:
376 return ext_ctl;
377 default:
378 return NULL;
379 }
380 }
381
omnia_gpio_get_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)382 static int omnia_gpio_get_multiple(struct gpio_chip *gc, unsigned long *mask,
383 unsigned long *bits)
384 {
385 unsigned long sts = 0, ext_sts = 0, ext_ctl = 0, *field;
386 struct omnia_mcu *mcu = gpiochip_get_data(gc);
387 struct i2c_client *client = mcu->client;
388 unsigned int i;
389 int err;
390
391 /* determine which bits to read from the 3 possible commands */
392 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
393 field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,
394 &sts, &ext_sts, &ext_ctl);
395 if (!field)
396 continue;
397
398 __set_bit(omnia_gpios[i].bit, field);
399 }
400
401 guard(mutex)(&mcu->lock);
402
403 if (mcu->features & OMNIA_FEAT_NEW_INT_API) {
404 /* read relevant bits from status */
405 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_STATUS_WORD,
406 sts, &sts);
407 if (err)
408 return err;
409 } else {
410 /*
411 * Use status word value cached in the interrupt service routine
412 * if firmware does not support the new interrupt API.
413 */
414 sts = mcu->last_status;
415 }
416
417 /* read relevant bits from extended status */
418 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_STATUS_DWORD,
419 ext_sts, &ext_sts);
420 if (err)
421 return err;
422
423 /* read relevant bits from extended control */
424 err = omnia_cmd_read_bits(client, OMNIA_CMD_GET_EXT_CONTROL_STATUS,
425 ext_ctl, &ext_ctl);
426 if (err)
427 return err;
428
429 /* assign relevant bits in result */
430 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
431 field = _relevant_field_for_sts_cmd(omnia_gpios[i].cmd,
432 &sts, &ext_sts, &ext_ctl);
433 if (!field)
434 continue;
435
436 __assign_bit(i, bits, test_bit(omnia_gpios[i].bit, field));
437 }
438
439 return 0;
440 }
441
omnia_gpio_set(struct gpio_chip * gc,unsigned int offset,int value)442 static int omnia_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
443 {
444 const struct omnia_gpio *gpio = &omnia_gpios[offset];
445 struct omnia_mcu *mcu = gpiochip_get_data(gc);
446 u16 val, mask;
447
448 if (!gpio->ctl_cmd)
449 return -EINVAL;
450
451 mask = BIT(gpio->ctl_bit);
452 val = value ? mask : 0;
453
454 return omnia_ctl_cmd(mcu, gpio->ctl_cmd, val, mask);
455 }
456
omnia_gpio_set_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)457 static int omnia_gpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
458 unsigned long *bits)
459 {
460 unsigned long ctl = 0, ctl_mask = 0, ext_ctl = 0, ext_ctl_mask = 0;
461 struct omnia_mcu *mcu = gpiochip_get_data(gc);
462 unsigned int i;
463 int err;
464
465 for_each_set_bit(i, mask, ARRAY_SIZE(omnia_gpios)) {
466 unsigned long *field, *field_mask;
467 u8 bit = omnia_gpios[i].ctl_bit;
468
469 switch (omnia_gpios[i].ctl_cmd) {
470 case OMNIA_CMD_GENERAL_CONTROL:
471 field = &ctl;
472 field_mask = &ctl_mask;
473 break;
474 case OMNIA_CMD_EXT_CONTROL:
475 field = &ext_ctl;
476 field_mask = &ext_ctl_mask;
477 break;
478 default:
479 field = field_mask = NULL;
480 break;
481 }
482
483 if (!field)
484 continue;
485
486 __set_bit(bit, field_mask);
487 __assign_bit(bit, field, test_bit(i, bits));
488 }
489
490 guard(mutex)(&mcu->lock);
491
492 if (ctl_mask) {
493 err = omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,
494 ctl, ctl_mask);
495 if (err)
496 return err;
497 }
498
499 if (ext_ctl_mask) {
500 err = omnia_ctl_cmd_locked(mcu, OMNIA_CMD_EXT_CONTROL,
501 ext_ctl, ext_ctl_mask);
502 if (err)
503 return err;
504 }
505
506 return 0;
507 }
508
omnia_gpio_available(struct omnia_mcu * mcu,const struct omnia_gpio * gpio)509 static bool omnia_gpio_available(struct omnia_mcu *mcu,
510 const struct omnia_gpio *gpio)
511 {
512 if (gpio->feat_mask)
513 return (mcu->features & gpio->feat_mask) == gpio->feat;
514
515 if (gpio->feat)
516 return mcu->features & gpio->feat;
517
518 return true;
519 }
520
omnia_gpio_init_valid_mask(struct gpio_chip * gc,unsigned long * valid_mask,unsigned int ngpios)521 static int omnia_gpio_init_valid_mask(struct gpio_chip *gc,
522 unsigned long *valid_mask,
523 unsigned int ngpios)
524 {
525 struct omnia_mcu *mcu = gpiochip_get_data(gc);
526
527 for (unsigned int i = 0; i < ngpios; i++) {
528 const struct omnia_gpio *gpio = &omnia_gpios[i];
529
530 if (gpio->cmd || is_int_bit_valid(gpio))
531 __assign_bit(i, valid_mask,
532 omnia_gpio_available(mcu, gpio));
533 else
534 __clear_bit(i, valid_mask);
535 }
536
537 return 0;
538 }
539
omnia_gpio_of_xlate(struct gpio_chip * gc,const struct of_phandle_args * gpiospec,u32 * flags)540 static int omnia_gpio_of_xlate(struct gpio_chip *gc,
541 const struct of_phandle_args *gpiospec,
542 u32 *flags)
543 {
544 u32 bank, gpio;
545
546 if (WARN_ON(gpiospec->args_count != 3))
547 return -EINVAL;
548
549 if (flags)
550 *flags = gpiospec->args[2];
551
552 bank = gpiospec->args[0];
553 gpio = gpiospec->args[1];
554
555 switch (bank) {
556 case 0:
557 return gpio < 16 ? gpio : -EINVAL;
558 case 1:
559 return gpio < 32 ? 16 + gpio : -EINVAL;
560 case 2:
561 return gpio < 16 ? 48 + gpio : -EINVAL;
562 default:
563 return -EINVAL;
564 }
565 }
566
omnia_irq_shutdown(struct irq_data * d)567 static void omnia_irq_shutdown(struct irq_data *d)
568 {
569 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
570 struct omnia_mcu *mcu = gpiochip_get_data(gc);
571 irq_hw_number_t hwirq = irqd_to_hwirq(d);
572 u8 bit = omnia_gpios[hwirq].int_bit;
573
574 __clear_bit(bit, &mcu->rising);
575 __clear_bit(bit, &mcu->falling);
576 }
577
omnia_irq_mask(struct irq_data * d)578 static void omnia_irq_mask(struct irq_data *d)
579 {
580 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
581 struct omnia_mcu *mcu = gpiochip_get_data(gc);
582 irq_hw_number_t hwirq = irqd_to_hwirq(d);
583 u8 bit = omnia_gpios[hwirq].int_bit;
584
585 if (!omnia_gpios[hwirq].cmd)
586 __clear_bit(bit, &mcu->rising);
587 __clear_bit(bit, &mcu->mask);
588 gpiochip_disable_irq(gc, hwirq);
589 }
590
omnia_irq_unmask(struct irq_data * d)591 static void omnia_irq_unmask(struct irq_data *d)
592 {
593 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
594 struct omnia_mcu *mcu = gpiochip_get_data(gc);
595 irq_hw_number_t hwirq = irqd_to_hwirq(d);
596 u8 bit = omnia_gpios[hwirq].int_bit;
597
598 gpiochip_enable_irq(gc, hwirq);
599 __set_bit(bit, &mcu->mask);
600 if (!omnia_gpios[hwirq].cmd)
601 __set_bit(bit, &mcu->rising);
602 }
603
omnia_irq_set_type(struct irq_data * d,unsigned int type)604 static int omnia_irq_set_type(struct irq_data *d, unsigned int type)
605 {
606 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
607 struct omnia_mcu *mcu = gpiochip_get_data(gc);
608 irq_hw_number_t hwirq = irqd_to_hwirq(d);
609 struct device *dev = &mcu->client->dev;
610 u8 bit = omnia_gpios[hwirq].int_bit;
611
612 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
613 dev_err(dev, "irq %u: unsupported type %u\n", d->irq, type);
614 return -EINVAL;
615 }
616
617 __assign_bit(bit, &mcu->rising, type & IRQ_TYPE_EDGE_RISING);
618 __assign_bit(bit, &mcu->falling, type & IRQ_TYPE_EDGE_FALLING);
619
620 return 0;
621 }
622
omnia_irq_bus_lock(struct irq_data * d)623 static void omnia_irq_bus_lock(struct irq_data *d)
624 {
625 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
626 struct omnia_mcu *mcu = gpiochip_get_data(gc);
627
628 /* nothing to do if MCU firmware does not support new interrupt API */
629 if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))
630 return;
631
632 mutex_lock(&mcu->lock);
633 }
634
635 /**
636 * omnia_mask_interleave - Interleaves the bytes from @rising and @falling
637 * @dst: the destination u8 array of interleaved bytes
638 * @rising: rising mask
639 * @falling: falling mask
640 *
641 * Interleaves the little-endian bytes from @rising and @falling words.
642 *
643 * If @rising = (r0, r1, r2, r3) and @falling = (f0, f1, f2, f3), the result is
644 * @dst = (r0, f0, r1, f1, r2, f2, r3, f3).
645 *
646 * The MCU receives an interrupt mask and reports a pending interrupt bitmap in
647 * this interleaved format. The rationale behind this is that the low-indexed
648 * bits are more important - in many cases, the user will be interested only in
649 * interrupts with indexes 0 to 7, and so the system can stop reading after
650 * first 2 bytes (r0, f0), to save time on the slow I2C bus.
651 *
652 * Feel free to remove this function and its inverse, omnia_mask_deinterleave,
653 * and use an appropriate bitmap_*() function once such a function exists.
654 */
655 static void
omnia_mask_interleave(u8 * dst,unsigned long rising,unsigned long falling)656 omnia_mask_interleave(u8 *dst, unsigned long rising, unsigned long falling)
657 {
658 for (unsigned int i = 0; i < sizeof(u32); i++) {
659 dst[2 * i] = rising >> (8 * i);
660 dst[2 * i + 1] = falling >> (8 * i);
661 }
662 }
663
664 /**
665 * omnia_mask_deinterleave - Deinterleaves the bytes into @rising and @falling
666 * @src: the source u8 array containing the interleaved bytes
667 * @rising: pointer where to store the rising mask gathered from @src
668 * @falling: pointer where to store the falling mask gathered from @src
669 *
670 * This is the inverse function to omnia_mask_interleave.
671 */
omnia_mask_deinterleave(const u8 * src,unsigned long * rising,unsigned long * falling)672 static void omnia_mask_deinterleave(const u8 *src, unsigned long *rising,
673 unsigned long *falling)
674 {
675 *rising = *falling = 0;
676
677 for (unsigned int i = 0; i < sizeof(u32); i++) {
678 *rising |= src[2 * i] << (8 * i);
679 *falling |= src[2 * i + 1] << (8 * i);
680 }
681 }
682
omnia_irq_bus_sync_unlock(struct irq_data * d)683 static void omnia_irq_bus_sync_unlock(struct irq_data *d)
684 {
685 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
686 struct omnia_mcu *mcu = gpiochip_get_data(gc);
687 struct device *dev = &mcu->client->dev;
688 u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN];
689 unsigned long rising, falling;
690 int err;
691
692 /* nothing to do if MCU firmware does not support new interrupt API */
693 if (!(mcu->features & OMNIA_FEAT_NEW_INT_API))
694 return;
695
696 cmd[0] = OMNIA_CMD_SET_INT_MASK;
697
698 rising = mcu->rising & mcu->mask;
699 falling = mcu->falling & mcu->mask;
700
701 /* interleave the rising and falling bytes into the command arguments */
702 omnia_mask_interleave(&cmd[1], rising, falling);
703
704 dev_dbg(dev, "set int mask %8ph\n", &cmd[1]);
705
706 err = omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
707 if (err) {
708 dev_err(dev, "Cannot set mask: %d\n", err);
709 goto unlock;
710 }
711
712 /*
713 * Remember which GPIOs have both rising and falling interrupts enabled.
714 * For those we will cache their value so that .get() method is faster.
715 * We also need to forget cached values of GPIOs that aren't cached
716 * anymore.
717 */
718 mcu->both = rising & falling;
719 mcu->is_cached &= mcu->both;
720
721 unlock:
722 mutex_unlock(&mcu->lock);
723 }
724
725 static const struct irq_chip omnia_mcu_irq_chip = {
726 .name = "Turris Omnia MCU interrupts",
727 .irq_shutdown = omnia_irq_shutdown,
728 .irq_mask = omnia_irq_mask,
729 .irq_unmask = omnia_irq_unmask,
730 .irq_set_type = omnia_irq_set_type,
731 .irq_bus_lock = omnia_irq_bus_lock,
732 .irq_bus_sync_unlock = omnia_irq_bus_sync_unlock,
733 .flags = IRQCHIP_IMMUTABLE,
734 GPIOCHIP_IRQ_RESOURCE_HELPERS,
735 };
736
omnia_irq_init_valid_mask(struct gpio_chip * gc,unsigned long * valid_mask,unsigned int ngpios)737 static void omnia_irq_init_valid_mask(struct gpio_chip *gc,
738 unsigned long *valid_mask,
739 unsigned int ngpios)
740 {
741 struct omnia_mcu *mcu = gpiochip_get_data(gc);
742
743 for (unsigned int i = 0; i < ngpios; i++) {
744 const struct omnia_gpio *gpio = &omnia_gpios[i];
745
746 if (is_int_bit_valid(gpio))
747 __assign_bit(i, valid_mask,
748 omnia_gpio_available(mcu, gpio));
749 else
750 __clear_bit(i, valid_mask);
751 }
752 }
753
omnia_irq_init_hw(struct gpio_chip * gc)754 static int omnia_irq_init_hw(struct gpio_chip *gc)
755 {
756 struct omnia_mcu *mcu = gpiochip_get_data(gc);
757 u8 cmd[1 + OMNIA_CMD_INT_ARG_LEN] = {};
758
759 cmd[0] = OMNIA_CMD_SET_INT_MASK;
760
761 return omnia_cmd_write(mcu->client, cmd, sizeof(cmd));
762 }
763
764 /*
765 * Determine how many bytes we need to read from the reply to the
766 * OMNIA_CMD_GET_INT_AND_CLEAR command in order to retrieve all unmasked
767 * interrupts.
768 */
769 static unsigned int
omnia_irq_compute_pending_length(unsigned long rising,unsigned long falling)770 omnia_irq_compute_pending_length(unsigned long rising, unsigned long falling)
771 {
772 return max(omnia_compute_reply_length(rising, true, 0),
773 omnia_compute_reply_length(falling, true, 1));
774 }
775
omnia_irq_read_pending_new(struct omnia_mcu * mcu,unsigned long * pending)776 static bool omnia_irq_read_pending_new(struct omnia_mcu *mcu,
777 unsigned long *pending)
778 {
779 struct device *dev = &mcu->client->dev;
780 u8 reply[OMNIA_CMD_INT_ARG_LEN] = {};
781 unsigned long rising, falling;
782 unsigned int len;
783 int err;
784
785 len = omnia_irq_compute_pending_length(mcu->rising & mcu->mask,
786 mcu->falling & mcu->mask);
787 if (!len)
788 return false;
789
790 guard(mutex)(&mcu->lock);
791
792 err = omnia_cmd_read(mcu->client, OMNIA_CMD_GET_INT_AND_CLEAR, reply,
793 len);
794 if (err) {
795 dev_err(dev, "Cannot read pending IRQs: %d\n", err);
796 return false;
797 }
798
799 /* deinterleave the reply bytes into rising and falling */
800 omnia_mask_deinterleave(reply, &rising, &falling);
801
802 rising &= mcu->mask;
803 falling &= mcu->mask;
804 *pending = rising | falling;
805
806 /* cache values for GPIOs that have both edges enabled */
807 mcu->is_cached &= ~(rising & falling);
808 mcu->is_cached |= mcu->both & (rising ^ falling);
809 mcu->cached = (mcu->cached | rising) & ~falling;
810
811 return true;
812 }
813
omnia_read_status_word_old_fw(struct omnia_mcu * mcu,unsigned long * status)814 static int omnia_read_status_word_old_fw(struct omnia_mcu *mcu,
815 unsigned long *status)
816 {
817 u16 raw_status;
818 int err;
819
820 err = omnia_cmd_read_u16(mcu->client, OMNIA_CMD_GET_STATUS_WORD,
821 &raw_status);
822 if (err)
823 return err;
824
825 /*
826 * Old firmware has a bug wherein it never resets the USB port
827 * overcurrent bits back to zero. Ignore them.
828 */
829 *status = raw_status & ~(OMNIA_STS_USB30_OVC | OMNIA_STS_USB31_OVC);
830
831 return 0;
832 }
833
button_release_emul_fn(struct work_struct * work)834 static void button_release_emul_fn(struct work_struct *work)
835 {
836 struct omnia_mcu *mcu = container_of(to_delayed_work(work),
837 struct omnia_mcu,
838 button_release_emul_work);
839
840 mcu->button_pressed_emul = false;
841 generic_handle_irq_safe(mcu->client->irq);
842 }
843
844 static void
fill_int_from_sts(unsigned long * rising,unsigned long * falling,unsigned long rising_sts,unsigned long falling_sts,unsigned long sts_bit,unsigned long int_bit)845 fill_int_from_sts(unsigned long *rising, unsigned long *falling,
846 unsigned long rising_sts, unsigned long falling_sts,
847 unsigned long sts_bit, unsigned long int_bit)
848 {
849 if (rising_sts & sts_bit)
850 *rising |= int_bit;
851 if (falling_sts & sts_bit)
852 *falling |= int_bit;
853 }
854
omnia_irq_read_pending_old(struct omnia_mcu * mcu,unsigned long * pending)855 static bool omnia_irq_read_pending_old(struct omnia_mcu *mcu,
856 unsigned long *pending)
857 {
858 unsigned long status, rising_sts, falling_sts, rising, falling;
859 struct device *dev = &mcu->client->dev;
860 int err;
861
862 guard(mutex)(&mcu->lock);
863
864 err = omnia_read_status_word_old_fw(mcu, &status);
865 if (err) {
866 dev_err(dev, "Cannot read pending IRQs: %d\n", err);
867 return false;
868 }
869
870 /*
871 * The old firmware triggers an interrupt whenever status word changes,
872 * but does not inform about which bits rose or fell. We need to compute
873 * this here by comparing with the last status word value.
874 *
875 * The OMNIA_STS_BUTTON_PRESSED bit needs special handling, because the
876 * old firmware clears the OMNIA_STS_BUTTON_PRESSED bit on successful
877 * completion of the OMNIA_CMD_GET_STATUS_WORD command, resulting in
878 * another interrupt:
879 * - first we get an interrupt, we read the status word where
880 * OMNIA_STS_BUTTON_PRESSED is present,
881 * - MCU clears the OMNIA_STS_BUTTON_PRESSED bit because we read the
882 * status word,
883 * - we get another interrupt because the status word changed again
884 * (the OMNIA_STS_BUTTON_PRESSED bit was cleared).
885 *
886 * The gpiolib-cdev, gpiolib-sysfs and gpio-keys input driver all call
887 * the gpiochip's .get() method after an edge event on a requested GPIO
888 * occurs.
889 *
890 * We ensure that the .get() method reads 1 for the button GPIO for some
891 * time.
892 */
893
894 if (status & OMNIA_STS_BUTTON_PRESSED) {
895 mcu->button_pressed_emul = true;
896 mod_delayed_work(system_wq, &mcu->button_release_emul_work,
897 msecs_to_jiffies(FRONT_BUTTON_RELEASE_DELAY_MS));
898 } else if (mcu->button_pressed_emul) {
899 status |= OMNIA_STS_BUTTON_PRESSED;
900 }
901
902 rising_sts = ~mcu->last_status & status;
903 falling_sts = mcu->last_status & ~status;
904
905 mcu->last_status = status;
906
907 /*
908 * Fill in the relevant interrupt bits from status bits for CARD_DET,
909 * MSATA_IND and BUTTON_PRESSED.
910 */
911 rising = 0;
912 falling = 0;
913 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
914 OMNIA_STS_CARD_DET, OMNIA_INT_CARD_DET);
915 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
916 OMNIA_STS_MSATA_IND, OMNIA_INT_MSATA_IND);
917 fill_int_from_sts(&rising, &falling, rising_sts, falling_sts,
918 OMNIA_STS_BUTTON_PRESSED, OMNIA_INT_BUTTON_PRESSED);
919
920 /* Use only bits that are enabled */
921 rising &= mcu->rising & mcu->mask;
922 falling &= mcu->falling & mcu->mask;
923 *pending = rising | falling;
924
925 return true;
926 }
927
omnia_irq_read_pending(struct omnia_mcu * mcu,unsigned long * pending)928 static bool omnia_irq_read_pending(struct omnia_mcu *mcu,
929 unsigned long *pending)
930 {
931 if (mcu->features & OMNIA_FEAT_NEW_INT_API)
932 return omnia_irq_read_pending_new(mcu, pending);
933 else
934 return omnia_irq_read_pending_old(mcu, pending);
935 }
936
omnia_irq_thread_handler(int irq,void * dev_id)937 static irqreturn_t omnia_irq_thread_handler(int irq, void *dev_id)
938 {
939 struct omnia_mcu *mcu = dev_id;
940 struct irq_domain *domain;
941 unsigned long pending;
942 unsigned int i;
943
944 if (!omnia_irq_read_pending(mcu, &pending))
945 return IRQ_NONE;
946
947 domain = mcu->gc.irq.domain;
948
949 for_each_set_bit(i, &pending, 32) {
950 unsigned int nested_irq;
951
952 nested_irq = irq_find_mapping(domain, omnia_int_to_gpio_idx[i]);
953
954 handle_nested_irq(nested_irq);
955 }
956
957 return IRQ_RETVAL(pending);
958 }
959
960 static const char * const front_button_modes[] = { "mcu", "cpu" };
961
front_button_mode_show(struct device * dev,struct device_attribute * a,char * buf)962 static ssize_t front_button_mode_show(struct device *dev,
963 struct device_attribute *a, char *buf)
964 {
965 struct omnia_mcu *mcu = dev_get_drvdata(dev);
966 int val;
967
968 if (mcu->features & OMNIA_FEAT_NEW_INT_API) {
969 val = omnia_cmd_read_bit(mcu->client, OMNIA_CMD_GET_STATUS_WORD,
970 OMNIA_STS_BUTTON_MODE);
971 if (val < 0)
972 return val;
973 } else {
974 val = !!(mcu->last_status & OMNIA_STS_BUTTON_MODE);
975 }
976
977 return sysfs_emit(buf, "%s\n", front_button_modes[val]);
978 }
979
front_button_mode_store(struct device * dev,struct device_attribute * a,const char * buf,size_t count)980 static ssize_t front_button_mode_store(struct device *dev,
981 struct device_attribute *a,
982 const char *buf, size_t count)
983 {
984 struct omnia_mcu *mcu = dev_get_drvdata(dev);
985 int err, i;
986
987 i = sysfs_match_string(front_button_modes, buf);
988 if (i < 0)
989 return i;
990
991 err = omnia_ctl_cmd_locked(mcu, OMNIA_CMD_GENERAL_CONTROL,
992 i ? OMNIA_CTL_BUTTON_MODE : 0,
993 OMNIA_CTL_BUTTON_MODE);
994 if (err)
995 return err;
996
997 return count;
998 }
999 static DEVICE_ATTR_RW(front_button_mode);
1000
1001 static struct attribute *omnia_mcu_gpio_attrs[] = {
1002 &dev_attr_front_button_mode.attr,
1003 NULL
1004 };
1005
1006 const struct attribute_group omnia_mcu_gpio_group = {
1007 .attrs = omnia_mcu_gpio_attrs,
1008 };
1009
omnia_mcu_register_gpiochip(struct omnia_mcu * mcu)1010 int omnia_mcu_register_gpiochip(struct omnia_mcu *mcu)
1011 {
1012 bool new_api = mcu->features & OMNIA_FEAT_NEW_INT_API;
1013 struct device *dev = &mcu->client->dev;
1014 unsigned long irqflags;
1015 int err;
1016
1017 err = devm_mutex_init(dev, &mcu->lock);
1018 if (err)
1019 return err;
1020
1021 mcu->gc.request = omnia_gpio_request;
1022 mcu->gc.get_direction = omnia_gpio_get_direction;
1023 mcu->gc.direction_input = omnia_gpio_direction_input;
1024 mcu->gc.direction_output = omnia_gpio_direction_output;
1025 mcu->gc.get = omnia_gpio_get;
1026 mcu->gc.get_multiple = omnia_gpio_get_multiple;
1027 mcu->gc.set_rv = omnia_gpio_set;
1028 mcu->gc.set_multiple_rv = omnia_gpio_set_multiple;
1029 mcu->gc.init_valid_mask = omnia_gpio_init_valid_mask;
1030 mcu->gc.can_sleep = true;
1031 mcu->gc.names = omnia_mcu_gpio_names;
1032 mcu->gc.base = -1;
1033 mcu->gc.ngpio = ARRAY_SIZE(omnia_gpios);
1034 mcu->gc.label = "Turris Omnia MCU GPIOs";
1035 mcu->gc.parent = dev;
1036 mcu->gc.owner = THIS_MODULE;
1037 mcu->gc.of_gpio_n_cells = 3;
1038 mcu->gc.of_xlate = omnia_gpio_of_xlate;
1039
1040 gpio_irq_chip_set_chip(&mcu->gc.irq, &omnia_mcu_irq_chip);
1041 /* This will let us handle the parent IRQ in the driver */
1042 mcu->gc.irq.parent_handler = NULL;
1043 mcu->gc.irq.num_parents = 0;
1044 mcu->gc.irq.parents = NULL;
1045 mcu->gc.irq.default_type = IRQ_TYPE_NONE;
1046 mcu->gc.irq.handler = handle_bad_irq;
1047 mcu->gc.irq.threaded = true;
1048 if (new_api)
1049 mcu->gc.irq.init_hw = omnia_irq_init_hw;
1050 mcu->gc.irq.init_valid_mask = omnia_irq_init_valid_mask;
1051
1052 err = devm_gpiochip_add_data(dev, &mcu->gc, mcu);
1053 if (err)
1054 return dev_err_probe(dev, err, "Cannot add GPIO chip\n");
1055
1056 /*
1057 * Before requesting the interrupt, if firmware does not support the new
1058 * interrupt API, we need to cache the value of the status word, so that
1059 * when it changes, we may compare the new value with the cached one in
1060 * the interrupt handler.
1061 */
1062 if (!new_api) {
1063 err = omnia_read_status_word_old_fw(mcu, &mcu->last_status);
1064 if (err)
1065 return dev_err_probe(dev, err,
1066 "Cannot read status word\n");
1067
1068 INIT_DELAYED_WORK(&mcu->button_release_emul_work,
1069 button_release_emul_fn);
1070 }
1071
1072 irqflags = IRQF_ONESHOT;
1073 if (new_api)
1074 irqflags |= IRQF_TRIGGER_LOW;
1075 else
1076 irqflags |= IRQF_TRIGGER_FALLING;
1077
1078 err = devm_request_threaded_irq(dev, mcu->client->irq, NULL,
1079 omnia_irq_thread_handler, irqflags,
1080 "turris-omnia-mcu", mcu);
1081 if (err)
1082 return dev_err_probe(dev, err, "Cannot request IRQ\n");
1083
1084 if (!new_api) {
1085 /*
1086 * The button_release_emul_work has to be initialized before the
1087 * thread is requested, and on driver remove it needs to be
1088 * canceled before the thread is freed. Therefore we can't use
1089 * devm_delayed_work_autocancel() directly, because the order
1090 * devm_delayed_work_autocancel();
1091 * devm_request_threaded_irq();
1092 * would cause improper release order:
1093 * free_irq();
1094 * cancel_delayed_work_sync();
1095 * Instead we first initialize the work above, and only now
1096 * after IRQ is requested we add the work devm action.
1097 */
1098 err = devm_add_action(dev, devm_delayed_work_drop,
1099 &mcu->button_release_emul_work);
1100 if (err)
1101 return err;
1102 }
1103
1104 return 0;
1105 }
1106
omnia_mcu_request_irq(struct omnia_mcu * mcu,u32 spec,irq_handler_t thread_fn,const char * devname)1107 int omnia_mcu_request_irq(struct omnia_mcu *mcu, u32 spec,
1108 irq_handler_t thread_fn, const char *devname)
1109 {
1110 u8 irq_idx;
1111 int irq;
1112
1113 if (!spec)
1114 return -EINVAL;
1115
1116 irq_idx = omnia_int_to_gpio_idx[ffs(spec) - 1];
1117 irq = gpiod_to_irq(gpio_device_get_desc(mcu->gc.gpiodev, irq_idx));
1118 if (irq < 0)
1119 return irq;
1120
1121 return devm_request_threaded_irq(&mcu->client->dev, irq, NULL,
1122 thread_fn, IRQF_ONESHOT, devname, mcu);
1123 }
1124