1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2012-2014, 2018-2019, 2021-2026 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #include <linux/firmware.h>
8 #include <linux/rtnetlink.h>
9 #include "iwl-trans.h"
10 #include "iwl-csr.h"
11 #include "mvm.h"
12 #include "iwl-nvm-utils.h"
13 #include "iwl-nvm-parse.h"
14 #include "iwl-prph.h"
15 #include "fw/acpi.h"
16
17 /* Default NVM size to read */
18 #define IWL_NVM_DEFAULT_CHUNK_SIZE (2 * 1024)
19
20 #define NVM_WRITE_OPCODE 1
21 #define NVM_READ_OPCODE 0
22
23 /* load nvm chunk response */
24 enum {
25 READ_NVM_CHUNK_SUCCEED = 0,
26 READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
27 };
28
29 /*
30 * prepare the NVM host command w/ the pointers to the nvm buffer
31 * and send it to fw
32 */
iwl_nvm_write_chunk(struct iwl_mvm * mvm,u16 section,u16 offset,u16 length,const u8 * data)33 static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
34 u16 offset, u16 length, const u8 *data)
35 {
36 struct iwl_nvm_access_cmd nvm_access_cmd = {
37 .offset = cpu_to_le16(offset),
38 .length = cpu_to_le16(length),
39 .type = cpu_to_le16(section),
40 .op_code = NVM_WRITE_OPCODE,
41 };
42 struct iwl_host_cmd cmd = {
43 .id = NVM_ACCESS_CMD,
44 .len = { sizeof(struct iwl_nvm_access_cmd), length },
45 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
46 .data = { &nvm_access_cmd, data },
47 /* data may come from vmalloc, so use _DUP */
48 .dataflags = { 0, IWL_HCMD_DFL_DUP },
49 };
50 struct iwl_rx_packet *pkt;
51 struct iwl_nvm_access_resp *nvm_resp;
52 int ret;
53
54 ret = iwl_mvm_send_cmd(mvm, &cmd);
55 if (ret)
56 return ret;
57
58 pkt = cmd.resp_pkt;
59 /* Extract & check NVM write response */
60 nvm_resp = (void *)pkt->data;
61 if (le16_to_cpu(nvm_resp->status) != READ_NVM_CHUNK_SUCCEED) {
62 IWL_ERR(mvm,
63 "NVM access write command failed for section %u (status = 0x%x)\n",
64 section, le16_to_cpu(nvm_resp->status));
65 ret = -EIO;
66 }
67
68 iwl_free_resp(&cmd);
69 return ret;
70 }
71
iwl_nvm_read_chunk(struct iwl_mvm * mvm,u16 section,u16 offset,u16 length,u8 * data)72 static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
73 u16 offset, u16 length, u8 *data)
74 {
75 struct iwl_nvm_access_cmd nvm_access_cmd = {
76 .offset = cpu_to_le16(offset),
77 .length = cpu_to_le16(length),
78 .type = cpu_to_le16(section),
79 .op_code = NVM_READ_OPCODE,
80 };
81 struct iwl_nvm_access_resp *nvm_resp;
82 struct iwl_rx_packet *pkt;
83 struct iwl_host_cmd cmd = {
84 .id = NVM_ACCESS_CMD,
85 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
86 .data = { &nvm_access_cmd, },
87 };
88 int ret, bytes_read, offset_read;
89 u8 *resp_data;
90
91 cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
92
93 ret = iwl_mvm_send_cmd(mvm, &cmd);
94 if (ret)
95 return ret;
96
97 pkt = cmd.resp_pkt;
98
99 /* Extract NVM response */
100 nvm_resp = (void *)pkt->data;
101 ret = le16_to_cpu(nvm_resp->status);
102 bytes_read = le16_to_cpu(nvm_resp->length);
103 offset_read = le16_to_cpu(nvm_resp->offset);
104 resp_data = nvm_resp->data;
105 if (ret) {
106 if ((offset != 0) &&
107 (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
108 /*
109 * meaning of NOT_VALID_ADDRESS:
110 * driver try to read chunk from address that is
111 * multiple of 2K and got an error since addr is empty.
112 * meaning of (offset != 0): driver already
113 * read valid data from another chunk so this case
114 * is not an error.
115 */
116 IWL_DEBUG_EEPROM(mvm->trans->dev,
117 "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
118 offset);
119 ret = 0;
120 } else {
121 IWL_DEBUG_EEPROM(mvm->trans->dev,
122 "NVM access command failed with status %d (device: %s)\n",
123 ret, mvm->trans->info.name);
124 ret = -ENODATA;
125 }
126 goto exit;
127 }
128
129 if (offset_read != offset) {
130 IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
131 offset_read);
132 ret = -EINVAL;
133 goto exit;
134 }
135
136 /* Write data to NVM */
137 memcpy(data + offset, resp_data, bytes_read);
138 ret = bytes_read;
139
140 exit:
141 iwl_free_resp(&cmd);
142 return ret;
143 }
144
iwl_nvm_write_section(struct iwl_mvm * mvm,u16 section,const u8 * data,u16 length)145 static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
146 const u8 *data, u16 length)
147 {
148 int offset = 0;
149
150 /* copy data in chunks of 2k (and remainder if any) */
151
152 while (offset < length) {
153 int chunk_size, ret;
154
155 chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
156 length - offset);
157
158 ret = iwl_nvm_write_chunk(mvm, section, offset,
159 chunk_size, data + offset);
160 if (ret < 0)
161 return ret;
162
163 offset += chunk_size;
164 }
165
166 return 0;
167 }
168
169 /*
170 * Reads an NVM section completely.
171 * NICs prior to 7000 family doesn't have a real NVM, but just read
172 * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
173 * by uCode, we need to manually check in this case that we don't
174 * overflow and try to read more than the EEPROM size.
175 * For 7000 family NICs, we supply the maximal size we can read, and
176 * the uCode fills the response with as much data as we can,
177 * without overflowing, so no check is needed.
178 */
iwl_nvm_read_section(struct iwl_mvm * mvm,u16 section,u8 * data,u32 size_read)179 static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
180 u8 *data, u32 size_read)
181 {
182 u16 length, offset = 0;
183 int ret;
184
185 /* Set nvm section read length */
186 length = IWL_NVM_DEFAULT_CHUNK_SIZE;
187
188 ret = length;
189
190 /* Read the NVM until exhausted (reading less than requested) */
191 while (ret == length) {
192 /* Check no memory assumptions fail and cause an overflow */
193 if ((size_read + offset + length) >
194 mvm->trans->mac_cfg->base->eeprom_size) {
195 IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
196 return -ENOBUFS;
197 }
198
199 ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
200 if (ret < 0) {
201 IWL_DEBUG_EEPROM(mvm->trans->dev,
202 "Cannot read NVM from section %d offset %d, length %d\n",
203 section, offset, length);
204 return ret;
205 }
206 offset += ret;
207 }
208
209 iwl_nvm_fixups(mvm->trans->info.hw_id, section, data, offset);
210
211 IWL_DEBUG_EEPROM(mvm->trans->dev,
212 "NVM section %d read completed\n", section);
213 return offset;
214 }
215
216 static struct iwl_nvm_data *
iwl_parse_nvm_sections(struct iwl_mvm * mvm)217 iwl_parse_nvm_sections(struct iwl_mvm *mvm)
218 {
219 struct iwl_nvm_section *sections = mvm->nvm_sections;
220 const __be16 *hw;
221 const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
222 u8 tx_ant = mvm->fw->valid_tx_ant;
223 u8 rx_ant = mvm->fw->valid_rx_ant;
224 int regulatory_type;
225
226 /* Checking for required sections */
227 if (mvm->trans->cfg->nvm_type == IWL_NVM) {
228 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
229 !mvm->nvm_sections[mvm->trans->mac_cfg->base->nvm_hw_section_num].data) {
230 IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
231 return NULL;
232 }
233 } else {
234 if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
235 regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
236 else
237 regulatory_type = NVM_SECTION_TYPE_REGULATORY;
238
239 /* SW and REGULATORY sections are mandatory */
240 if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
241 !mvm->nvm_sections[regulatory_type].data) {
242 IWL_ERR(mvm,
243 "Can't parse empty family 8000 OTP/NVM sections\n");
244 return NULL;
245 }
246 /* MAC_OVERRIDE or at least HW section must exist */
247 if (!mvm->nvm_sections[mvm->trans->mac_cfg->base->nvm_hw_section_num].data &&
248 !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
249 IWL_ERR(mvm,
250 "Can't parse mac_address, empty sections\n");
251 return NULL;
252 }
253
254 /* PHY_SKU section is mandatory in B0 */
255 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT &&
256 !mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
257 IWL_ERR(mvm,
258 "Can't parse phy_sku in B0, empty sections\n");
259 return NULL;
260 }
261 }
262
263 hw = (const __be16 *)sections[mvm->trans->mac_cfg->base->nvm_hw_section_num].data;
264 sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
265 calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
266 mac_override =
267 (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
268 phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
269
270 regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
271 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
272 (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
273
274 if (mvm->set_tx_ant)
275 tx_ant &= mvm->set_tx_ant;
276
277 if (mvm->set_rx_ant)
278 rx_ant &= mvm->set_rx_ant;
279
280 return iwl_parse_nvm_data(mvm->trans, mvm->cfg, mvm->fw, hw, sw, calib,
281 regulatory, mac_override, phy_sku,
282 tx_ant, rx_ant);
283 }
284
285 /* Loads the NVM data stored in mvm->nvm_sections into the NIC */
iwl_mvm_load_nvm_to_nic(struct iwl_mvm * mvm)286 int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
287 {
288 int i, ret = 0;
289 struct iwl_nvm_section *sections = mvm->nvm_sections;
290
291 IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
292
293 for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
294 if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
295 continue;
296 ret = iwl_nvm_write_section(mvm, i, sections[i].data,
297 sections[i].length);
298 if (ret < 0) {
299 IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
300 break;
301 }
302 }
303 return ret;
304 }
305
iwl_nvm_init(struct iwl_mvm * mvm)306 int iwl_nvm_init(struct iwl_mvm *mvm)
307 {
308 int ret, section;
309 u32 size_read = 0;
310 u8 *nvm_buffer, *temp;
311
312 if (WARN_ON_ONCE(mvm->trans->mac_cfg->base->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
313 return -EINVAL;
314
315 /* load NVM values from nic */
316 /* Read From FW NVM */
317 IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
318
319 nvm_buffer = kmalloc(mvm->trans->mac_cfg->base->eeprom_size,
320 GFP_KERNEL);
321 if (!nvm_buffer)
322 return -ENOMEM;
323 for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
324 /* we override the constness for initial read */
325 ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
326 size_read);
327 if (ret == -ENODATA) {
328 ret = 0;
329 continue;
330 }
331 if (ret < 0)
332 break;
333 size_read += ret;
334 temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
335 if (!temp) {
336 ret = -ENOMEM;
337 break;
338 }
339
340 iwl_nvm_fixups(mvm->trans->info.hw_id, section, temp, ret);
341
342 mvm->nvm_sections[section].data = temp;
343 mvm->nvm_sections[section].length = ret;
344
345 #ifdef CONFIG_IWLWIFI_DEBUGFS
346 switch (section) {
347 case NVM_SECTION_TYPE_SW:
348 mvm->nvm_sw_blob.data = temp;
349 mvm->nvm_sw_blob.size = ret;
350 break;
351 case NVM_SECTION_TYPE_CALIBRATION:
352 mvm->nvm_calib_blob.data = temp;
353 mvm->nvm_calib_blob.size = ret;
354 break;
355 case NVM_SECTION_TYPE_PRODUCTION:
356 mvm->nvm_prod_blob.data = temp;
357 mvm->nvm_prod_blob.size = ret;
358 break;
359 case NVM_SECTION_TYPE_PHY_SKU:
360 mvm->nvm_phy_sku_blob.data = temp;
361 mvm->nvm_phy_sku_blob.size = ret;
362 break;
363 case NVM_SECTION_TYPE_REGULATORY_SDP:
364 case NVM_SECTION_TYPE_REGULATORY:
365 mvm->nvm_reg_blob.data = temp;
366 mvm->nvm_reg_blob.size = ret;
367 break;
368 default:
369 if (section == mvm->trans->mac_cfg->base->nvm_hw_section_num) {
370 mvm->nvm_hw_blob.data = temp;
371 mvm->nvm_hw_blob.size = ret;
372 break;
373 }
374 }
375 #endif
376 }
377 if (!size_read)
378 IWL_ERR(mvm, "OTP is blank\n");
379 kfree(nvm_buffer);
380
381 /* Only if PNVM selected in the mod param - load external NVM */
382 if (mvm->nvm_file_name) {
383 /* read External NVM file from the mod param */
384 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
385 mvm->nvm_sections);
386 if (ret)
387 return ret;
388 }
389
390 /* parse the relevant nvm sections */
391 mvm->nvm_data = iwl_parse_nvm_sections(mvm);
392 if (!mvm->nvm_data)
393 return -ENODATA;
394 IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
395 mvm->nvm_data->nvm_version);
396
397 return ret < 0 ? ret : 0;
398 }
399
400 struct iwl_mcc_update_resp_v8 *
iwl_mvm_update_mcc(struct iwl_mvm * mvm,const char * alpha2,enum iwl_mcc_source src_id)401 iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
402 enum iwl_mcc_source src_id)
403 {
404 struct iwl_mcc_update_cmd mcc_update_cmd = {
405 .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
406 .source_id = (u8)src_id,
407 };
408 struct iwl_mcc_update_resp_v8 *resp_cp;
409 struct iwl_rx_packet *pkt;
410 struct iwl_host_cmd cmd = {
411 .id = MCC_UPDATE_CMD,
412 .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
413 .data = { &mcc_update_cmd },
414 };
415
416 int ret, resp_ver;
417 u32 status;
418 int resp_len, n_channels;
419 unsigned int pkt_len;
420 u16 mcc;
421
422 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
423 return ERR_PTR(-EOPNOTSUPP);
424
425 cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
426
427 IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
428 alpha2[0], alpha2[1], src_id);
429
430 ret = iwl_mvm_send_cmd(mvm, &cmd);
431 if (ret)
432 return ERR_PTR(ret);
433
434 pkt = cmd.resp_pkt;
435 pkt_len = iwl_rx_packet_payload_len(pkt);
436
437 resp_ver = iwl_fw_lookup_notif_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP,
438 MCC_UPDATE_CMD, 0);
439
440 /* Extract MCC response */
441 if (resp_ver >= 8) {
442 struct iwl_mcc_update_resp_v8 *mcc_resp_v8 = (void *)pkt->data;
443
444 if (IWL_FW_CHECK(mvm, pkt_len < sizeof(*mcc_resp_v8),
445 "MCC v8 response too short: %u\n", pkt_len)) {
446 resp_cp = ERR_PTR(-EINVAL);
447 goto exit;
448 }
449
450 n_channels = __le32_to_cpu(mcc_resp_v8->n_channels);
451 if (IWL_FW_CHECK(mvm,
452 pkt_len !=
453 struct_size(mcc_resp_v8, channels, n_channels),
454 "invalid MCC v8 response size: %u (n_channels=%d)\n",
455 pkt_len, n_channels)) {
456 resp_cp = ERR_PTR(-EINVAL);
457 goto exit;
458 }
459 resp_len = struct_size(resp_cp, channels, n_channels);
460 resp_cp = kzalloc(resp_len, GFP_KERNEL);
461 if (!resp_cp) {
462 resp_cp = ERR_PTR(-ENOMEM);
463 goto exit;
464 }
465 resp_cp->status = mcc_resp_v8->status;
466 resp_cp->mcc = mcc_resp_v8->mcc;
467 resp_cp->cap = mcc_resp_v8->cap;
468 resp_cp->source_id = mcc_resp_v8->source_id;
469 resp_cp->time = mcc_resp_v8->time;
470 resp_cp->geo_info = mcc_resp_v8->geo_info;
471 resp_cp->n_channels = mcc_resp_v8->n_channels;
472 memcpy(resp_cp->channels, mcc_resp_v8->channels,
473 n_channels * sizeof(__le32));
474 } else if (fw_has_capa(&mvm->fw->ucode_capa,
475 IWL_UCODE_TLV_CAPA_MCC_UPDATE_11AX_SUPPORT)) {
476 struct iwl_mcc_update_resp_v4 *mcc_resp_v4 = (void *)pkt->data;
477
478 if (IWL_FW_CHECK(mvm, pkt_len < sizeof(*mcc_resp_v4),
479 "MCC v4 response too short: %u\n", pkt_len)) {
480 resp_cp = ERR_PTR(-EINVAL);
481 goto exit;
482 }
483
484 n_channels = __le32_to_cpu(mcc_resp_v4->n_channels);
485 if (IWL_FW_CHECK(mvm,
486 pkt_len !=
487 struct_size(mcc_resp_v4, channels, n_channels),
488 "invalid MCC v4 response size: %u (n_channels=%d)\n",
489 pkt_len, n_channels)) {
490 resp_cp = ERR_PTR(-EINVAL);
491 goto exit;
492 }
493 resp_len = struct_size(resp_cp, channels, n_channels);
494 resp_cp = kzalloc(resp_len, GFP_KERNEL);
495 if (!resp_cp) {
496 resp_cp = ERR_PTR(-ENOMEM);
497 goto exit;
498 }
499
500 resp_cp->status = mcc_resp_v4->status;
501 resp_cp->mcc = mcc_resp_v4->mcc;
502 resp_cp->cap = cpu_to_le32(le16_to_cpu(mcc_resp_v4->cap));
503 resp_cp->source_id = mcc_resp_v4->source_id;
504 resp_cp->time = mcc_resp_v4->time;
505 resp_cp->geo_info = mcc_resp_v4->geo_info;
506 resp_cp->n_channels = mcc_resp_v4->n_channels;
507 memcpy(resp_cp->channels, mcc_resp_v4->channels,
508 n_channels * sizeof(__le32));
509 } else {
510 struct iwl_mcc_update_resp_v3 *mcc_resp_v3 = (void *)pkt->data;
511
512 if (IWL_FW_CHECK(mvm, pkt_len < sizeof(*mcc_resp_v3),
513 "MCC v3 response too short: %u\n", pkt_len)) {
514 resp_cp = ERR_PTR(-EINVAL);
515 goto exit;
516 }
517
518 n_channels = __le32_to_cpu(mcc_resp_v3->n_channels);
519 if (IWL_FW_CHECK(mvm,
520 pkt_len !=
521 struct_size(mcc_resp_v3, channels, n_channels),
522 "invalid MCC v3 response size: %u (n_channels=%d)\n",
523 pkt_len, n_channels)) {
524 resp_cp = ERR_PTR(-EINVAL);
525 goto exit;
526 }
527 resp_len = struct_size(resp_cp, channels, n_channels);
528 resp_cp = kzalloc(resp_len, GFP_KERNEL);
529 if (!resp_cp) {
530 resp_cp = ERR_PTR(-ENOMEM);
531 goto exit;
532 }
533
534 resp_cp->status = mcc_resp_v3->status;
535 resp_cp->mcc = mcc_resp_v3->mcc;
536 resp_cp->cap = cpu_to_le32(mcc_resp_v3->cap);
537 resp_cp->source_id = mcc_resp_v3->source_id;
538 resp_cp->time = mcc_resp_v3->time;
539 resp_cp->geo_info = mcc_resp_v3->geo_info;
540 resp_cp->n_channels = mcc_resp_v3->n_channels;
541 memcpy(resp_cp->channels, mcc_resp_v3->channels,
542 n_channels * sizeof(__le32));
543 }
544
545 status = le32_to_cpu(resp_cp->status);
546
547 mcc = le16_to_cpu(resp_cp->mcc);
548
549 /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
550 if (mcc == 0) {
551 mcc = 0x3030; /* "00" - world */
552 resp_cp->mcc = cpu_to_le16(mcc);
553 }
554
555 IWL_DEBUG_LAR(mvm,
556 "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') n_chans: %d\n",
557 status, mcc, mcc >> 8, mcc & 0xff, n_channels);
558
559 exit:
560 iwl_free_resp(&cmd);
561 return resp_cp;
562 }
563
iwl_mvm_init_mcc(struct iwl_mvm * mvm)564 int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
565 {
566 bool tlv_lar;
567 bool nvm_lar;
568 int retval;
569 struct ieee80211_regdomain *regd;
570 char mcc[3];
571
572 if (mvm->trans->cfg->nvm_type == IWL_NVM_EXT) {
573 tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
574 IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
575 nvm_lar = mvm->nvm_data->lar_enabled;
576 if (tlv_lar != nvm_lar)
577 IWL_INFO(mvm,
578 "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
579 tlv_lar ? "enabled" : "disabled",
580 nvm_lar ? "enabled" : "disabled");
581 }
582
583 if (!iwl_mvm_is_lar_supported(mvm))
584 return 0;
585
586 /*
587 * try to replay the last set MCC to FW. If it doesn't exist,
588 * queue an update to cfg80211 to retrieve the default alpha2 from FW.
589 */
590 retval = iwl_mvm_init_fw_regd(mvm, true);
591 if (retval != -ENOENT)
592 return retval;
593
594 /*
595 * Driver regulatory hint for initial update, this also informs the
596 * firmware we support wifi location updates.
597 * Disallow scans that might crash the FW while the LAR regdomain
598 * is not set.
599 */
600 mvm->lar_regdom_set = false;
601
602 regd = iwl_mvm_get_current_regdomain(mvm, NULL);
603 if (IS_ERR_OR_NULL(regd))
604 return -EIO;
605
606 if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
607 !iwl_bios_get_mcc(&mvm->fwrt, mcc)) {
608 kfree(regd);
609 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
610 MCC_SOURCE_BIOS, NULL);
611 if (IS_ERR_OR_NULL(regd))
612 return -EIO;
613 }
614
615 retval = regulatory_set_wiphy_regd_sync(mvm->hw->wiphy, regd);
616 kfree(regd);
617 return retval;
618 }
619
iwl_mvm_rx_chub_update_mcc(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)620 void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
621 struct iwl_rx_cmd_buffer *rxb)
622 {
623 struct iwl_rx_packet *pkt = rxb_addr(rxb);
624 struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
625 enum iwl_mcc_source src;
626 char mcc[3];
627 struct ieee80211_regdomain *regd;
628 int wgds_tbl_idx;
629 bool changed = false;
630
631 lockdep_assert_held(&mvm->mutex);
632
633 if (iwl_mvm_is_vif_assoc(mvm) && notif->source_id == MCC_SOURCE_WIFI) {
634 IWL_DEBUG_LAR(mvm, "Ignore mcc update while associated\n");
635 return;
636 }
637
638 if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
639 return;
640
641 mcc[0] = le16_to_cpu(notif->mcc) >> 8;
642 mcc[1] = le16_to_cpu(notif->mcc) & 0xff;
643 mcc[2] = '\0';
644 src = notif->source_id;
645
646 IWL_DEBUG_LAR(mvm,
647 "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
648 mcc, src);
649 regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, &changed);
650 if (IS_ERR_OR_NULL(regd))
651 return;
652
653 if (!changed) {
654 IWL_DEBUG_LAR(mvm, "RX: No change in the regulatory data\n");
655 goto out;
656 }
657
658 wgds_tbl_idx = iwl_mvm_get_sar_geo_profile(mvm);
659 if (wgds_tbl_idx < 1)
660 IWL_DEBUG_INFO(mvm,
661 "SAR WGDS is disabled or error received (%d)\n",
662 wgds_tbl_idx);
663 else
664 IWL_DEBUG_INFO(mvm, "SAR WGDS: geo profile %d is configured\n",
665 wgds_tbl_idx);
666
667 regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
668
669 out:
670 kfree(regd);
671 }
672