1 // SPDX-License-Identifier: GPL-2.0
2 /* Marvell Octeon EP (EndPoint) Ethernet Driver
3 *
4 * Copyright (C) 2020 Marvell.
5 *
6 */
7
8 #include <linux/types.h>
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/netdevice.h>
12 #include <linux/etherdevice.h>
13 #include <linux/rtnetlink.h>
14 #include <linux/vmalloc.h>
15
16 #include "octep_config.h"
17 #include "octep_main.h"
18 #include "octep_ctrl_net.h"
19 #include "octep_pfvf_mbox.h"
20
21 #define OCTEP_INTR_POLL_TIME_MSECS 100
22 struct workqueue_struct *octep_wq;
23
24 /* Supported Devices */
25 static const struct pci_device_id octep_pci_id_tbl[] = {
26 {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN98_PF)},
27 {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN93_PF)},
28 {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF95N_PF)},
29 {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN10KA_PF)},
30 {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF10KA_PF)},
31 {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CNF10KB_PF)},
32 {PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, OCTEP_PCI_DEVICE_ID_CN10KB_PF)},
33 {0, },
34 };
35 MODULE_DEVICE_TABLE(pci, octep_pci_id_tbl);
36
37 MODULE_AUTHOR("Veerasenareddy Burru <vburru@marvell.com>");
38 MODULE_DESCRIPTION(OCTEP_DRV_STRING);
39 MODULE_LICENSE("GPL");
40
41 /**
42 * octep_alloc_ioq_vectors() - Allocate Tx/Rx Queue interrupt info.
43 *
44 * @oct: Octeon device private data structure.
45 *
46 * Allocate resources to hold per Tx/Rx queue interrupt info.
47 * This is the information passed to interrupt handler, from which napi poll
48 * is scheduled and includes quick access to private data of Tx/Rx queue
49 * corresponding to the interrupt being handled.
50 *
51 * Return: 0, on successful allocation of resources for all queue interrupts.
52 * -1, if failed to allocate any resource.
53 */
octep_alloc_ioq_vectors(struct octep_device * oct)54 static int octep_alloc_ioq_vectors(struct octep_device *oct)
55 {
56 int i;
57 struct octep_ioq_vector *ioq_vector;
58
59 for (i = 0; i < oct->num_oqs; i++) {
60 oct->ioq_vector[i] = vzalloc(sizeof(*oct->ioq_vector[i]));
61 if (!oct->ioq_vector[i])
62 goto free_ioq_vector;
63
64 ioq_vector = oct->ioq_vector[i];
65 ioq_vector->iq = oct->iq[i];
66 ioq_vector->oq = oct->oq[i];
67 ioq_vector->octep_dev = oct;
68 }
69
70 dev_info(&oct->pdev->dev, "Allocated %d IOQ vectors\n", oct->num_oqs);
71 return 0;
72
73 free_ioq_vector:
74 while (i) {
75 i--;
76 vfree(oct->ioq_vector[i]);
77 oct->ioq_vector[i] = NULL;
78 }
79 return -1;
80 }
81
82 /**
83 * octep_free_ioq_vectors() - Free Tx/Rx Queue interrupt vector info.
84 *
85 * @oct: Octeon device private data structure.
86 */
octep_free_ioq_vectors(struct octep_device * oct)87 static void octep_free_ioq_vectors(struct octep_device *oct)
88 {
89 int i;
90
91 for (i = 0; i < oct->num_oqs; i++) {
92 if (oct->ioq_vector[i]) {
93 vfree(oct->ioq_vector[i]);
94 oct->ioq_vector[i] = NULL;
95 }
96 }
97 netdev_info(oct->netdev, "Freed IOQ Vectors\n");
98 }
99
100 /**
101 * octep_enable_msix_range() - enable MSI-x interrupts.
102 *
103 * @oct: Octeon device private data structure.
104 *
105 * Allocate and enable all MSI-x interrupts (queue and non-queue interrupts)
106 * for the Octeon device.
107 *
108 * Return: 0, on successfully enabling all MSI-x interrupts.
109 * -1, if failed to enable any MSI-x interrupt.
110 */
octep_enable_msix_range(struct octep_device * oct)111 static int octep_enable_msix_range(struct octep_device *oct)
112 {
113 int num_msix, msix_allocated;
114 int i;
115
116 /* Generic interrupts apart from input/output queues */
117 num_msix = oct->num_oqs + CFG_GET_NON_IOQ_MSIX(oct->conf);
118 oct->msix_entries = kzalloc_objs(struct msix_entry, num_msix);
119 if (!oct->msix_entries)
120 goto msix_alloc_err;
121
122 for (i = 0; i < num_msix; i++)
123 oct->msix_entries[i].entry = i;
124
125 msix_allocated = pci_enable_msix_range(oct->pdev, oct->msix_entries,
126 num_msix, num_msix);
127 if (msix_allocated != num_msix) {
128 dev_err(&oct->pdev->dev,
129 "Failed to enable %d msix irqs; got only %d\n",
130 num_msix, msix_allocated);
131 goto enable_msix_err;
132 }
133 oct->num_irqs = msix_allocated;
134 dev_info(&oct->pdev->dev, "MSI-X enabled successfully\n");
135
136 return 0;
137
138 enable_msix_err:
139 if (msix_allocated > 0)
140 pci_disable_msix(oct->pdev);
141 kfree(oct->msix_entries);
142 oct->msix_entries = NULL;
143 msix_alloc_err:
144 return -1;
145 }
146
147 /**
148 * octep_disable_msix() - disable MSI-x interrupts.
149 *
150 * @oct: Octeon device private data structure.
151 *
152 * Disable MSI-x on the Octeon device.
153 */
octep_disable_msix(struct octep_device * oct)154 static void octep_disable_msix(struct octep_device *oct)
155 {
156 pci_disable_msix(oct->pdev);
157 kfree(oct->msix_entries);
158 oct->msix_entries = NULL;
159 dev_info(&oct->pdev->dev, "Disabled MSI-X\n");
160 }
161
162 /**
163 * octep_mbox_intr_handler() - common handler for pfvf mbox interrupts.
164 *
165 * @irq: Interrupt number.
166 * @data: interrupt data.
167 *
168 * this is common handler for pfvf mbox interrupts.
169 */
octep_mbox_intr_handler(int irq,void * data)170 static irqreturn_t octep_mbox_intr_handler(int irq, void *data)
171 {
172 struct octep_device *oct = data;
173
174 return oct->hw_ops.mbox_intr_handler(oct);
175 }
176
177 /**
178 * octep_oei_intr_handler() - common handler for output endpoint interrupts.
179 *
180 * @irq: Interrupt number.
181 * @data: interrupt data.
182 *
183 * this is common handler for all output endpoint interrupts.
184 */
octep_oei_intr_handler(int irq,void * data)185 static irqreturn_t octep_oei_intr_handler(int irq, void *data)
186 {
187 struct octep_device *oct = data;
188
189 return oct->hw_ops.oei_intr_handler(oct);
190 }
191
192 /**
193 * octep_ire_intr_handler() - common handler for input ring error interrupts.
194 *
195 * @irq: Interrupt number.
196 * @data: interrupt data.
197 *
198 * this is common handler for input ring error interrupts.
199 */
octep_ire_intr_handler(int irq,void * data)200 static irqreturn_t octep_ire_intr_handler(int irq, void *data)
201 {
202 struct octep_device *oct = data;
203
204 return oct->hw_ops.ire_intr_handler(oct);
205 }
206
207 /**
208 * octep_ore_intr_handler() - common handler for output ring error interrupts.
209 *
210 * @irq: Interrupt number.
211 * @data: interrupt data.
212 *
213 * this is common handler for output ring error interrupts.
214 */
octep_ore_intr_handler(int irq,void * data)215 static irqreturn_t octep_ore_intr_handler(int irq, void *data)
216 {
217 struct octep_device *oct = data;
218
219 return oct->hw_ops.ore_intr_handler(oct);
220 }
221
222 /**
223 * octep_vfire_intr_handler() - common handler for vf input ring error interrupts.
224 *
225 * @irq: Interrupt number.
226 * @data: interrupt data.
227 *
228 * this is common handler for vf input ring error interrupts.
229 */
octep_vfire_intr_handler(int irq,void * data)230 static irqreturn_t octep_vfire_intr_handler(int irq, void *data)
231 {
232 struct octep_device *oct = data;
233
234 return oct->hw_ops.vfire_intr_handler(oct);
235 }
236
237 /**
238 * octep_vfore_intr_handler() - common handler for vf output ring error interrupts.
239 *
240 * @irq: Interrupt number.
241 * @data: interrupt data.
242 *
243 * this is common handler for vf output ring error interrupts.
244 */
octep_vfore_intr_handler(int irq,void * data)245 static irqreturn_t octep_vfore_intr_handler(int irq, void *data)
246 {
247 struct octep_device *oct = data;
248
249 return oct->hw_ops.vfore_intr_handler(oct);
250 }
251
252 /**
253 * octep_dma_intr_handler() - common handler for dpi dma related interrupts.
254 *
255 * @irq: Interrupt number.
256 * @data: interrupt data.
257 *
258 * this is common handler for dpi dma related interrupts.
259 */
octep_dma_intr_handler(int irq,void * data)260 static irqreturn_t octep_dma_intr_handler(int irq, void *data)
261 {
262 struct octep_device *oct = data;
263
264 return oct->hw_ops.dma_intr_handler(oct);
265 }
266
267 /**
268 * octep_dma_vf_intr_handler() - common handler for dpi dma transaction error interrupts for VFs.
269 *
270 * @irq: Interrupt number.
271 * @data: interrupt data.
272 *
273 * this is common handler for dpi dma transaction error interrupts for VFs.
274 */
octep_dma_vf_intr_handler(int irq,void * data)275 static irqreturn_t octep_dma_vf_intr_handler(int irq, void *data)
276 {
277 struct octep_device *oct = data;
278
279 return oct->hw_ops.dma_vf_intr_handler(oct);
280 }
281
282 /**
283 * octep_pp_vf_intr_handler() - common handler for pp transaction error interrupts for VFs.
284 *
285 * @irq: Interrupt number.
286 * @data: interrupt data.
287 *
288 * this is common handler for pp transaction error interrupts for VFs.
289 */
octep_pp_vf_intr_handler(int irq,void * data)290 static irqreturn_t octep_pp_vf_intr_handler(int irq, void *data)
291 {
292 struct octep_device *oct = data;
293
294 return oct->hw_ops.pp_vf_intr_handler(oct);
295 }
296
297 /**
298 * octep_misc_intr_handler() - common handler for mac related interrupts.
299 *
300 * @irq: Interrupt number.
301 * @data: interrupt data.
302 *
303 * this is common handler for mac related interrupts.
304 */
octep_misc_intr_handler(int irq,void * data)305 static irqreturn_t octep_misc_intr_handler(int irq, void *data)
306 {
307 struct octep_device *oct = data;
308
309 return oct->hw_ops.misc_intr_handler(oct);
310 }
311
312 /**
313 * octep_rsvd_intr_handler() - common handler for reserved interrupts (future use).
314 *
315 * @irq: Interrupt number.
316 * @data: interrupt data.
317 *
318 * this is common handler for all reserved interrupts.
319 */
octep_rsvd_intr_handler(int irq,void * data)320 static irqreturn_t octep_rsvd_intr_handler(int irq, void *data)
321 {
322 struct octep_device *oct = data;
323
324 return oct->hw_ops.rsvd_intr_handler(oct);
325 }
326
327 /**
328 * octep_ioq_intr_handler() - handler for all Tx/Rx queue interrupts.
329 *
330 * @irq: Interrupt number.
331 * @data: interrupt data contains pointers to Tx/Rx queue private data
332 * and correspong NAPI context.
333 *
334 * this is common handler for all non-queue (generic) interrupts.
335 */
octep_ioq_intr_handler(int irq,void * data)336 static irqreturn_t octep_ioq_intr_handler(int irq, void *data)
337 {
338 struct octep_ioq_vector *ioq_vector = data;
339 struct octep_device *oct = ioq_vector->octep_dev;
340
341 return oct->hw_ops.ioq_intr_handler(ioq_vector);
342 }
343
344 /**
345 * octep_request_irqs() - Register interrupt handlers.
346 *
347 * @oct: Octeon device private data structure.
348 *
349 * Register handlers for all queue and non-queue interrupts.
350 *
351 * Return: 0, on successful registration of all interrupt handlers.
352 * -1, on any error.
353 */
octep_request_irqs(struct octep_device * oct)354 static int octep_request_irqs(struct octep_device *oct)
355 {
356 struct net_device *netdev = oct->netdev;
357 struct octep_ioq_vector *ioq_vector;
358 struct msix_entry *msix_entry;
359 char **non_ioq_msix_names;
360 int num_non_ioq_msix;
361 int ret, i, j;
362
363 num_non_ioq_msix = CFG_GET_NON_IOQ_MSIX(oct->conf);
364 non_ioq_msix_names = CFG_GET_NON_IOQ_MSIX_NAMES(oct->conf);
365
366 oct->non_ioq_irq_names = kcalloc(num_non_ioq_msix,
367 OCTEP_MSIX_NAME_SIZE, GFP_KERNEL);
368 if (!oct->non_ioq_irq_names)
369 goto alloc_err;
370
371 /* First few MSI-X interrupts are non-queue interrupts */
372 for (i = 0; i < num_non_ioq_msix; i++) {
373 char *irq_name;
374
375 irq_name = &oct->non_ioq_irq_names[i * OCTEP_MSIX_NAME_SIZE];
376 msix_entry = &oct->msix_entries[i];
377
378 snprintf(irq_name, OCTEP_MSIX_NAME_SIZE,
379 "%s-%s", netdev->name, non_ioq_msix_names[i]);
380 if (!strncmp(non_ioq_msix_names[i], "epf_mbox_rint", strlen("epf_mbox_rint"))) {
381 ret = request_irq(msix_entry->vector,
382 octep_mbox_intr_handler, 0,
383 irq_name, oct);
384 } else if (!strncmp(non_ioq_msix_names[i], "epf_oei_rint",
385 strlen("epf_oei_rint"))) {
386 ret = request_irq(msix_entry->vector,
387 octep_oei_intr_handler, 0,
388 irq_name, oct);
389 } else if (!strncmp(non_ioq_msix_names[i], "epf_ire_rint",
390 strlen("epf_ire_rint"))) {
391 ret = request_irq(msix_entry->vector,
392 octep_ire_intr_handler, 0,
393 irq_name, oct);
394 } else if (!strncmp(non_ioq_msix_names[i], "epf_ore_rint",
395 strlen("epf_ore_rint"))) {
396 ret = request_irq(msix_entry->vector,
397 octep_ore_intr_handler, 0,
398 irq_name, oct);
399 } else if (!strncmp(non_ioq_msix_names[i], "epf_vfire_rint",
400 strlen("epf_vfire_rint"))) {
401 ret = request_irq(msix_entry->vector,
402 octep_vfire_intr_handler, 0,
403 irq_name, oct);
404 } else if (!strncmp(non_ioq_msix_names[i], "epf_vfore_rint",
405 strlen("epf_vfore_rint"))) {
406 ret = request_irq(msix_entry->vector,
407 octep_vfore_intr_handler, 0,
408 irq_name, oct);
409 } else if (!strncmp(non_ioq_msix_names[i], "epf_dma_rint",
410 strlen("epf_dma_rint"))) {
411 ret = request_irq(msix_entry->vector,
412 octep_dma_intr_handler, 0,
413 irq_name, oct);
414 } else if (!strncmp(non_ioq_msix_names[i], "epf_dma_vf_rint",
415 strlen("epf_dma_vf_rint"))) {
416 ret = request_irq(msix_entry->vector,
417 octep_dma_vf_intr_handler, 0,
418 irq_name, oct);
419 } else if (!strncmp(non_ioq_msix_names[i], "epf_pp_vf_rint",
420 strlen("epf_pp_vf_rint"))) {
421 ret = request_irq(msix_entry->vector,
422 octep_pp_vf_intr_handler, 0,
423 irq_name, oct);
424 } else if (!strncmp(non_ioq_msix_names[i], "epf_misc_rint",
425 strlen("epf_misc_rint"))) {
426 ret = request_irq(msix_entry->vector,
427 octep_misc_intr_handler, 0,
428 irq_name, oct);
429 } else {
430 ret = request_irq(msix_entry->vector,
431 octep_rsvd_intr_handler, 0,
432 irq_name, oct);
433 }
434
435 if (ret) {
436 netdev_err(netdev,
437 "request_irq failed for %s; err=%d",
438 irq_name, ret);
439 goto non_ioq_irq_err;
440 }
441 }
442
443 /* Request IRQs for Tx/Rx queues */
444 for (j = 0; j < oct->num_oqs; j++) {
445 ioq_vector = oct->ioq_vector[j];
446 msix_entry = &oct->msix_entries[j + num_non_ioq_msix];
447
448 snprintf(ioq_vector->name, sizeof(ioq_vector->name),
449 "%s-q%d", netdev->name, j);
450 ret = request_irq(msix_entry->vector,
451 octep_ioq_intr_handler, 0,
452 ioq_vector->name, ioq_vector);
453 if (ret) {
454 netdev_err(netdev,
455 "request_irq failed for Q-%d; err=%d",
456 j, ret);
457 goto ioq_irq_err;
458 }
459
460 cpumask_set_cpu(j % num_online_cpus(),
461 &ioq_vector->affinity_mask);
462 irq_set_affinity_hint(msix_entry->vector,
463 &ioq_vector->affinity_mask);
464 }
465
466 return 0;
467 ioq_irq_err:
468 while (j) {
469 --j;
470 ioq_vector = oct->ioq_vector[j];
471 msix_entry = &oct->msix_entries[j + num_non_ioq_msix];
472
473 irq_set_affinity_hint(msix_entry->vector, NULL);
474 free_irq(msix_entry->vector, ioq_vector);
475 }
476 non_ioq_irq_err:
477 while (i) {
478 --i;
479 free_irq(oct->msix_entries[i].vector, oct);
480 }
481 kfree(oct->non_ioq_irq_names);
482 oct->non_ioq_irq_names = NULL;
483 alloc_err:
484 return -1;
485 }
486
487 /**
488 * octep_free_irqs() - free all registered interrupts.
489 *
490 * @oct: Octeon device private data structure.
491 *
492 * Free all queue and non-queue interrupts of the Octeon device.
493 */
octep_free_irqs(struct octep_device * oct)494 static void octep_free_irqs(struct octep_device *oct)
495 {
496 int i;
497
498 /* First few MSI-X interrupts are non queue interrupts; free them */
499 for (i = 0; i < CFG_GET_NON_IOQ_MSIX(oct->conf); i++)
500 free_irq(oct->msix_entries[i].vector, oct);
501 kfree(oct->non_ioq_irq_names);
502
503 /* Free IRQs for Input/Output (Tx/Rx) queues */
504 for (i = CFG_GET_NON_IOQ_MSIX(oct->conf); i < oct->num_irqs; i++) {
505 irq_set_affinity_hint(oct->msix_entries[i].vector, NULL);
506 free_irq(oct->msix_entries[i].vector,
507 oct->ioq_vector[i - CFG_GET_NON_IOQ_MSIX(oct->conf)]);
508 }
509 netdev_info(oct->netdev, "IRQs freed\n");
510 }
511
512 /**
513 * octep_setup_irqs() - setup interrupts for the Octeon device.
514 *
515 * @oct: Octeon device private data structure.
516 *
517 * Allocate data structures to hold per interrupt information, allocate/enable
518 * MSI-x interrupt and register interrupt handlers.
519 *
520 * Return: 0, on successful allocation and registration of all interrupts.
521 * -1, on any error.
522 */
octep_setup_irqs(struct octep_device * oct)523 static int octep_setup_irqs(struct octep_device *oct)
524 {
525 if (octep_alloc_ioq_vectors(oct))
526 goto ioq_vector_err;
527
528 if (octep_enable_msix_range(oct))
529 goto enable_msix_err;
530
531 if (octep_request_irqs(oct))
532 goto request_irq_err;
533
534 return 0;
535
536 request_irq_err:
537 octep_disable_msix(oct);
538 enable_msix_err:
539 octep_free_ioq_vectors(oct);
540 ioq_vector_err:
541 return -1;
542 }
543
544 /**
545 * octep_clean_irqs() - free all interrupts and its resources.
546 *
547 * @oct: Octeon device private data structure.
548 */
octep_clean_irqs(struct octep_device * oct)549 static void octep_clean_irqs(struct octep_device *oct)
550 {
551 octep_free_irqs(oct);
552 octep_disable_msix(oct);
553 octep_free_ioq_vectors(oct);
554 }
555
556 /**
557 * octep_enable_ioq_irq() - Enable MSI-x interrupt of a Tx/Rx queue.
558 *
559 * @iq: Octeon Tx queue data structure.
560 * @oq: Octeon Rx queue data structure.
561 */
octep_enable_ioq_irq(struct octep_iq * iq,struct octep_oq * oq)562 static void octep_enable_ioq_irq(struct octep_iq *iq, struct octep_oq *oq)
563 {
564 u32 pkts_pend = oq->pkts_pending;
565
566 netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no);
567 if (iq->pkts_processed) {
568 writel(iq->pkts_processed, iq->inst_cnt_reg);
569 iq->pkt_in_done -= iq->pkts_processed;
570 iq->pkts_processed = 0;
571 }
572 if (oq->last_pkt_count - pkts_pend) {
573 writel(oq->last_pkt_count - pkts_pend, oq->pkts_sent_reg);
574 oq->last_pkt_count = pkts_pend;
575 }
576
577 /* Flush the previous wrties before writing to RESEND bit */
578 wmb();
579 writeq(1UL << OCTEP_OQ_INTR_RESEND_BIT, oq->pkts_sent_reg);
580 writeq(1UL << OCTEP_IQ_INTR_RESEND_BIT, iq->inst_cnt_reg);
581 }
582
583 /**
584 * octep_napi_poll() - NAPI poll function for Tx/Rx.
585 *
586 * @napi: pointer to napi context.
587 * @budget: max number of packets to be processed in single invocation.
588 */
octep_napi_poll(struct napi_struct * napi,int budget)589 static int octep_napi_poll(struct napi_struct *napi, int budget)
590 {
591 struct octep_ioq_vector *ioq_vector =
592 container_of(napi, struct octep_ioq_vector, napi);
593 u32 tx_pending, rx_done;
594
595 tx_pending = octep_iq_process_completions(ioq_vector->iq, budget);
596 rx_done = octep_oq_process_rx(ioq_vector->oq, budget);
597
598 /* need more polling if tx completion processing is still pending or
599 * processed at least 'budget' number of rx packets.
600 */
601 if (tx_pending || rx_done >= budget)
602 return budget;
603
604 napi_complete(napi);
605 octep_enable_ioq_irq(ioq_vector->iq, ioq_vector->oq);
606 return rx_done;
607 }
608
609 /**
610 * octep_napi_add() - Add NAPI poll for all Tx/Rx queues.
611 *
612 * @oct: Octeon device private data structure.
613 */
octep_napi_add(struct octep_device * oct)614 static void octep_napi_add(struct octep_device *oct)
615 {
616 int i;
617
618 for (i = 0; i < oct->num_oqs; i++) {
619 netdev_dbg(oct->netdev, "Adding NAPI on Q-%d\n", i);
620 netif_napi_add(oct->netdev, &oct->ioq_vector[i]->napi,
621 octep_napi_poll);
622 oct->oq[i]->napi = &oct->ioq_vector[i]->napi;
623 }
624 }
625
626 /**
627 * octep_napi_delete() - delete NAPI poll callback for all Tx/Rx queues.
628 *
629 * @oct: Octeon device private data structure.
630 */
octep_napi_delete(struct octep_device * oct)631 static void octep_napi_delete(struct octep_device *oct)
632 {
633 int i;
634
635 for (i = 0; i < oct->num_oqs; i++) {
636 netdev_dbg(oct->netdev, "Deleting NAPI on Q-%d\n", i);
637 netif_napi_del(&oct->ioq_vector[i]->napi);
638 oct->oq[i]->napi = NULL;
639 }
640 }
641
642 /**
643 * octep_napi_enable() - enable NAPI for all Tx/Rx queues.
644 *
645 * @oct: Octeon device private data structure.
646 */
octep_napi_enable(struct octep_device * oct)647 static void octep_napi_enable(struct octep_device *oct)
648 {
649 int i;
650
651 for (i = 0; i < oct->num_oqs; i++) {
652 netdev_dbg(oct->netdev, "Enabling NAPI on Q-%d\n", i);
653 napi_enable(&oct->ioq_vector[i]->napi);
654 }
655 }
656
657 /**
658 * octep_napi_disable() - disable NAPI for all Tx/Rx queues.
659 *
660 * @oct: Octeon device private data structure.
661 */
octep_napi_disable(struct octep_device * oct)662 static void octep_napi_disable(struct octep_device *oct)
663 {
664 int i;
665
666 for (i = 0; i < oct->num_oqs; i++) {
667 netdev_dbg(oct->netdev, "Disabling NAPI on Q-%d\n", i);
668 napi_disable(&oct->ioq_vector[i]->napi);
669 }
670 }
671
octep_link_up(struct net_device * netdev)672 static void octep_link_up(struct net_device *netdev)
673 {
674 netif_carrier_on(netdev);
675 netif_tx_start_all_queues(netdev);
676 }
677
678 /**
679 * octep_open() - start the octeon network device.
680 *
681 * @netdev: pointer to kernel network device.
682 *
683 * setup Tx/Rx queues, interrupts and enable hardware operation of Tx/Rx queues
684 * and interrupts..
685 *
686 * Return: 0, on successfully setting up device and bring it up.
687 * -1, on any error.
688 */
octep_open(struct net_device * netdev)689 static int octep_open(struct net_device *netdev)
690 {
691 struct octep_device *oct = netdev_priv(netdev);
692 int err, ret;
693
694 netdev_info(netdev, "Starting netdev ...\n");
695 netif_carrier_off(netdev);
696
697 oct->hw_ops.reset_io_queues(oct);
698
699 if (octep_setup_iqs(oct))
700 goto setup_iq_err;
701 if (octep_setup_oqs(oct))
702 goto setup_oq_err;
703 if (octep_setup_irqs(oct))
704 goto setup_irq_err;
705
706 err = netif_set_real_num_tx_queues(netdev, oct->num_oqs);
707 if (err)
708 goto set_queues_err;
709 err = netif_set_real_num_rx_queues(netdev, oct->num_iqs);
710 if (err)
711 goto set_queues_err;
712
713 octep_napi_add(oct);
714 octep_napi_enable(oct);
715
716 oct->link_info.admin_up = 1;
717 octep_ctrl_net_set_rx_state(oct, OCTEP_CTRL_NET_INVALID_VFID, true,
718 false);
719 octep_ctrl_net_set_link_status(oct, OCTEP_CTRL_NET_INVALID_VFID, true,
720 false);
721 oct->poll_non_ioq_intr = false;
722
723 /* Enable the input and output queues for this Octeon device */
724 oct->hw_ops.enable_io_queues(oct);
725
726 /* Enable Octeon device interrupts */
727 oct->hw_ops.enable_interrupts(oct);
728
729 octep_oq_dbell_init(oct);
730
731 ret = octep_ctrl_net_get_link_status(oct, OCTEP_CTRL_NET_INVALID_VFID);
732 if (ret > 0)
733 octep_link_up(netdev);
734
735 return 0;
736
737 set_queues_err:
738 octep_clean_irqs(oct);
739 setup_irq_err:
740 octep_free_oqs(oct);
741 setup_oq_err:
742 octep_free_iqs(oct);
743 setup_iq_err:
744 return -1;
745 }
746
747 /**
748 * octep_stop() - stop the octeon network device.
749 *
750 * @netdev: pointer to kernel network device.
751 *
752 * stop the device Tx/Rx operations, bring down the link and
753 * free up all resources allocated for Tx/Rx queues and interrupts.
754 */
octep_stop(struct net_device * netdev)755 static int octep_stop(struct net_device *netdev)
756 {
757 struct octep_device *oct = netdev_priv(netdev);
758
759 netdev_info(netdev, "Stopping the device ...\n");
760
761 octep_ctrl_net_set_link_status(oct, OCTEP_CTRL_NET_INVALID_VFID, false,
762 false);
763 octep_ctrl_net_set_rx_state(oct, OCTEP_CTRL_NET_INVALID_VFID, false,
764 false);
765
766 /* Stop Tx from stack */
767 netif_tx_stop_all_queues(netdev);
768 netif_carrier_off(netdev);
769 netif_tx_disable(netdev);
770
771 oct->link_info.admin_up = 0;
772 oct->link_info.oper_up = 0;
773
774 oct->hw_ops.disable_interrupts(oct);
775 octep_napi_disable(oct);
776 octep_napi_delete(oct);
777
778 octep_clean_irqs(oct);
779 octep_clean_iqs(oct);
780
781 oct->hw_ops.disable_io_queues(oct);
782 oct->hw_ops.reset_io_queues(oct);
783 octep_free_oqs(oct);
784 octep_free_iqs(oct);
785
786 oct->poll_non_ioq_intr = true;
787 queue_delayed_work(octep_wq, &oct->intr_poll_task,
788 msecs_to_jiffies(OCTEP_INTR_POLL_TIME_MSECS));
789
790 netdev_info(netdev, "Device stopped !!\n");
791 return 0;
792 }
793
794 /**
795 * octep_iq_full_check() - check if a Tx queue is full.
796 *
797 * @iq: Octeon Tx queue data structure.
798 *
799 * Return: 0, if the Tx queue is not full.
800 * 1, if the Tx queue is full.
801 */
octep_iq_full_check(struct octep_iq * iq)802 static inline int octep_iq_full_check(struct octep_iq *iq)
803 {
804 if (likely((IQ_INSTR_SPACE(iq)) >
805 OCTEP_WAKE_QUEUE_THRESHOLD))
806 return 0;
807
808 /* Stop the queue if unable to send */
809 netif_stop_subqueue(iq->netdev, iq->q_no);
810
811 /* Allow for pending updates in write index
812 * from iq_process_completion in other cpus
813 * to reflect, in case queue gets free
814 * entries.
815 */
816 smp_mb();
817
818 /* check again and restart the queue, in case NAPI has just freed
819 * enough Tx ring entries.
820 */
821 if (unlikely(IQ_INSTR_SPACE(iq) >
822 OCTEP_WAKE_QUEUE_THRESHOLD)) {
823 netif_start_subqueue(iq->netdev, iq->q_no);
824 iq->stats->restart_cnt++;
825 return 0;
826 }
827
828 return 1;
829 }
830
831 /**
832 * octep_start_xmit() - Enqueue packet to Octoen hardware Tx Queue.
833 *
834 * @skb: packet skbuff pointer.
835 * @netdev: kernel network device.
836 *
837 * Return: NETDEV_TX_BUSY, if Tx Queue is full.
838 * NETDEV_TX_OK, if successfully enqueued to hardware Tx queue.
839 */
octep_start_xmit(struct sk_buff * skb,struct net_device * netdev)840 static netdev_tx_t octep_start_xmit(struct sk_buff *skb,
841 struct net_device *netdev)
842 {
843 struct octep_device *oct = netdev_priv(netdev);
844 netdev_features_t feat = netdev->features;
845 struct octep_tx_sglist_desc *sglist;
846 struct octep_tx_buffer *tx_buffer;
847 struct octep_tx_desc_hw *hw_desc;
848 struct skb_shared_info *shinfo;
849 struct octep_instr_hdr *ih;
850 struct octep_iq *iq;
851 skb_frag_t *frag;
852 u16 nr_frags, si;
853 int xmit_more;
854 u16 q_no, wi;
855
856 if (skb_put_padto(skb, ETH_ZLEN))
857 return NETDEV_TX_OK;
858
859 q_no = skb_get_queue_mapping(skb);
860 if (q_no >= oct->num_iqs) {
861 netdev_err(netdev, "Invalid Tx skb->queue_mapping=%d\n", q_no);
862 q_no = q_no % oct->num_iqs;
863 }
864
865 iq = oct->iq[q_no];
866
867 shinfo = skb_shinfo(skb);
868 nr_frags = shinfo->nr_frags;
869
870 wi = iq->host_write_index;
871 hw_desc = &iq->desc_ring[wi];
872 hw_desc->ih64 = 0;
873
874 tx_buffer = iq->buff_info + wi;
875 tx_buffer->skb = skb;
876
877 ih = &hw_desc->ih;
878 ih->pkind = oct->conf->fw_info.pkind;
879 ih->fsz = oct->conf->fw_info.fsz;
880 ih->tlen = skb->len + ih->fsz;
881
882 if (!nr_frags) {
883 tx_buffer->gather = 0;
884 tx_buffer->dma = dma_map_single(iq->dev, skb->data,
885 skb->len, DMA_TO_DEVICE);
886 if (dma_mapping_error(iq->dev, tx_buffer->dma))
887 goto dma_map_err;
888 hw_desc->dptr = tx_buffer->dma;
889 } else {
890 /* Scatter/Gather */
891 dma_addr_t dma;
892 u16 len;
893
894 sglist = tx_buffer->sglist;
895
896 ih->gsz = nr_frags + 1;
897 ih->gather = 1;
898 tx_buffer->gather = 1;
899
900 len = skb_headlen(skb);
901 dma = dma_map_single(iq->dev, skb->data, len, DMA_TO_DEVICE);
902 if (dma_mapping_error(iq->dev, dma))
903 goto dma_map_err;
904
905 memset(sglist, 0, OCTEP_SGLIST_SIZE_PER_PKT);
906 sglist[0].len[3] = len;
907 sglist[0].dma_ptr[0] = dma;
908
909 si = 1; /* entry 0 is main skb, mapped above */
910 frag = &shinfo->frags[0];
911 while (nr_frags--) {
912 len = skb_frag_size(frag);
913 dma = skb_frag_dma_map(iq->dev, frag, 0,
914 len, DMA_TO_DEVICE);
915 if (dma_mapping_error(iq->dev, dma))
916 goto dma_map_sg_err;
917
918 sglist[si >> 2].len[3 - (si & 3)] = len;
919 sglist[si >> 2].dma_ptr[si & 3] = dma;
920
921 frag++;
922 si++;
923 }
924 hw_desc->dptr = tx_buffer->sglist_dma;
925 }
926
927 if (oct->conf->fw_info.tx_ol_flags) {
928 if ((feat & (NETIF_F_TSO)) && (skb_is_gso(skb))) {
929 hw_desc->txm.ol_flags = OCTEP_TX_OFFLOAD_CKSUM;
930 hw_desc->txm.ol_flags |= OCTEP_TX_OFFLOAD_TSO;
931 hw_desc->txm.gso_size = skb_shinfo(skb)->gso_size;
932 hw_desc->txm.gso_segs = skb_shinfo(skb)->gso_segs;
933 } else if (feat & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) {
934 hw_desc->txm.ol_flags = OCTEP_TX_OFFLOAD_CKSUM;
935 }
936 /* due to ESR txm will be swapped by hw */
937 hw_desc->txm64[0] = (__force u64)cpu_to_be64(hw_desc->txm64[0]);
938 }
939
940 xmit_more = netdev_xmit_more();
941
942 __netdev_tx_sent_queue(iq->netdev_q, skb->len, xmit_more);
943
944 skb_tx_timestamp(skb);
945 iq->fill_cnt++;
946 wi++;
947 iq->host_write_index = wi & iq->ring_size_mask;
948
949 /* octep_iq_full_check stops the queue and returns
950 * true if so, in case the queue has become full
951 * by inserting current packet. If so, we can
952 * go ahead and ring doorbell.
953 */
954 if (!octep_iq_full_check(iq) && xmit_more &&
955 iq->fill_cnt < iq->fill_threshold)
956 return NETDEV_TX_OK;
957
958 /* Flush the hw descriptor before writing to doorbell */
959 wmb();
960 /* Ring Doorbell to notify the NIC of new packets */
961 writel(iq->fill_cnt, iq->doorbell_reg);
962 iq->stats->instr_posted += iq->fill_cnt;
963 iq->fill_cnt = 0;
964 return NETDEV_TX_OK;
965
966 dma_map_sg_err:
967 if (si > 0) {
968 dma_unmap_single(iq->dev, sglist[0].dma_ptr[0],
969 sglist[0].len[3], DMA_TO_DEVICE);
970 sglist[0].len[3] = 0;
971 }
972 while (si > 1) {
973 dma_unmap_page(iq->dev, sglist[si >> 2].dma_ptr[si & 3],
974 sglist[si >> 2].len[3 - (si & 3)], DMA_TO_DEVICE);
975 sglist[si >> 2].len[3 - (si & 3)] = 0;
976 si--;
977 }
978 tx_buffer->gather = 0;
979 dma_map_err:
980 dev_kfree_skb_any(skb);
981 return NETDEV_TX_OK;
982 }
983
984 /**
985 * octep_get_stats64() - Get Octeon network device statistics.
986 *
987 * @netdev: kernel network device.
988 * @stats: pointer to stats structure to be filled in.
989 */
octep_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)990 static void octep_get_stats64(struct net_device *netdev,
991 struct rtnl_link_stats64 *stats)
992 {
993 struct octep_device *oct = netdev_priv(netdev);
994 u64 tx_packets, tx_bytes, rx_packets, rx_bytes;
995 int q;
996
997 tx_packets = 0;
998 tx_bytes = 0;
999 rx_packets = 0;
1000 rx_bytes = 0;
1001 for (q = 0; q < OCTEP_MAX_QUEUES; q++) {
1002 tx_packets += oct->stats_iq[q].instr_completed;
1003 tx_bytes += oct->stats_iq[q].bytes_sent;
1004 rx_packets += oct->stats_oq[q].packets;
1005 rx_bytes += oct->stats_oq[q].bytes;
1006 }
1007 stats->tx_packets = tx_packets;
1008 stats->tx_bytes = tx_bytes;
1009 stats->rx_packets = rx_packets;
1010 stats->rx_bytes = rx_bytes;
1011 }
1012
1013 /**
1014 * octep_tx_timeout_task - work queue task to Handle Tx queue timeout.
1015 *
1016 * @work: pointer to Tx queue timeout work_struct
1017 *
1018 * Stop and start the device so that it frees up all queue resources
1019 * and restarts the queues, that potentially clears a Tx queue timeout
1020 * condition.
1021 **/
octep_tx_timeout_task(struct work_struct * work)1022 static void octep_tx_timeout_task(struct work_struct *work)
1023 {
1024 struct octep_device *oct = container_of(work, struct octep_device,
1025 tx_timeout_task);
1026 struct net_device *netdev = oct->netdev;
1027
1028 rtnl_lock();
1029 if (netif_running(netdev)) {
1030 octep_stop(netdev);
1031 octep_open(netdev);
1032 }
1033 rtnl_unlock();
1034 }
1035
1036 /**
1037 * octep_tx_timeout() - Handle Tx Queue timeout.
1038 *
1039 * @netdev: pointer to kernel network device.
1040 * @txqueue: Timed out Tx queue number.
1041 *
1042 * Schedule a work to handle Tx queue timeout.
1043 */
octep_tx_timeout(struct net_device * netdev,unsigned int txqueue)1044 static void octep_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1045 {
1046 struct octep_device *oct = netdev_priv(netdev);
1047
1048 queue_work(octep_wq, &oct->tx_timeout_task);
1049 }
1050
octep_set_mac(struct net_device * netdev,void * p)1051 static int octep_set_mac(struct net_device *netdev, void *p)
1052 {
1053 struct octep_device *oct = netdev_priv(netdev);
1054 struct sockaddr *addr = (struct sockaddr *)p;
1055 int err;
1056
1057 if (!is_valid_ether_addr(addr->sa_data))
1058 return -EADDRNOTAVAIL;
1059
1060 err = octep_ctrl_net_set_mac_addr(oct, OCTEP_CTRL_NET_INVALID_VFID,
1061 addr->sa_data, true);
1062 if (err)
1063 return err;
1064
1065 memcpy(oct->mac_addr, addr->sa_data, ETH_ALEN);
1066 eth_hw_addr_set(netdev, addr->sa_data);
1067
1068 return 0;
1069 }
1070
octep_change_mtu(struct net_device * netdev,int new_mtu)1071 static int octep_change_mtu(struct net_device *netdev, int new_mtu)
1072 {
1073 struct octep_device *oct = netdev_priv(netdev);
1074 struct octep_iface_link_info *link_info;
1075 int err = 0;
1076
1077 link_info = &oct->link_info;
1078 if (link_info->mtu == new_mtu)
1079 return 0;
1080
1081 err = octep_ctrl_net_set_mtu(oct, OCTEP_CTRL_NET_INVALID_VFID, new_mtu,
1082 true);
1083 if (!err) {
1084 oct->link_info.mtu = new_mtu;
1085 WRITE_ONCE(netdev->mtu, new_mtu);
1086 }
1087
1088 return err;
1089 }
1090
octep_set_features(struct net_device * dev,netdev_features_t features)1091 static int octep_set_features(struct net_device *dev, netdev_features_t features)
1092 {
1093 struct octep_ctrl_net_offloads offloads = { 0 };
1094 struct octep_device *oct = netdev_priv(dev);
1095 int err;
1096
1097 /* We only support features received from firmware */
1098 if ((features & dev->hw_features) != features)
1099 return -EINVAL;
1100
1101 if (features & NETIF_F_TSO)
1102 offloads.tx_offloads |= OCTEP_TX_OFFLOAD_TSO;
1103
1104 if (features & NETIF_F_TSO6)
1105 offloads.tx_offloads |= OCTEP_TX_OFFLOAD_TSO;
1106
1107 if (features & NETIF_F_IP_CSUM)
1108 offloads.tx_offloads |= OCTEP_TX_OFFLOAD_CKSUM;
1109
1110 if (features & NETIF_F_IPV6_CSUM)
1111 offloads.tx_offloads |= OCTEP_TX_OFFLOAD_CKSUM;
1112
1113 if (features & NETIF_F_RXCSUM)
1114 offloads.rx_offloads |= OCTEP_RX_OFFLOAD_CKSUM;
1115
1116 err = octep_ctrl_net_set_offloads(oct,
1117 OCTEP_CTRL_NET_INVALID_VFID,
1118 &offloads,
1119 true);
1120 if (!err)
1121 dev->features = features;
1122
1123 return err;
1124 }
1125
octep_is_vf_valid(struct octep_device * oct,int vf)1126 static bool octep_is_vf_valid(struct octep_device *oct, int vf)
1127 {
1128 if (vf >= CFG_GET_ACTIVE_VFS(oct->conf)) {
1129 netdev_err(oct->netdev, "Invalid VF ID %d\n", vf);
1130 return false;
1131 }
1132
1133 return true;
1134 }
1135
octep_get_vf_config(struct net_device * dev,int vf,struct ifla_vf_info * ivi)1136 static int octep_get_vf_config(struct net_device *dev, int vf,
1137 struct ifla_vf_info *ivi)
1138 {
1139 struct octep_device *oct = netdev_priv(dev);
1140
1141 if (!octep_is_vf_valid(oct, vf))
1142 return -EINVAL;
1143
1144 ivi->vf = vf;
1145 ether_addr_copy(ivi->mac, oct->vf_info[vf].mac_addr);
1146 ivi->spoofchk = true;
1147 ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
1148 ivi->trusted = false;
1149
1150 return 0;
1151 }
1152
octep_set_vf_mac(struct net_device * dev,int vf,u8 * mac)1153 static int octep_set_vf_mac(struct net_device *dev, int vf, u8 *mac)
1154 {
1155 struct octep_device *oct = netdev_priv(dev);
1156 int err;
1157
1158 if (!octep_is_vf_valid(oct, vf))
1159 return -EINVAL;
1160
1161 if (!is_valid_ether_addr(mac)) {
1162 dev_err(&oct->pdev->dev, "Invalid MAC Address %pM\n", mac);
1163 return -EADDRNOTAVAIL;
1164 }
1165
1166 dev_dbg(&oct->pdev->dev, "set vf-%d mac to %pM\n", vf, mac);
1167 ether_addr_copy(oct->vf_info[vf].mac_addr, mac);
1168 oct->vf_info[vf].flags |= OCTEON_PFVF_FLAG_MAC_SET_BY_PF;
1169
1170 err = octep_ctrl_net_set_mac_addr(oct, vf, mac, true);
1171 if (err)
1172 dev_err(&oct->pdev->dev,
1173 "Set VF%d MAC address failed via host control Mbox\n",
1174 vf);
1175
1176 return err;
1177 }
1178
1179 static const struct net_device_ops octep_netdev_ops = {
1180 .ndo_open = octep_open,
1181 .ndo_stop = octep_stop,
1182 .ndo_start_xmit = octep_start_xmit,
1183 .ndo_get_stats64 = octep_get_stats64,
1184 .ndo_tx_timeout = octep_tx_timeout,
1185 .ndo_set_mac_address = octep_set_mac,
1186 .ndo_change_mtu = octep_change_mtu,
1187 .ndo_set_features = octep_set_features,
1188 .ndo_get_vf_config = octep_get_vf_config,
1189 .ndo_set_vf_mac = octep_set_vf_mac
1190 };
1191
1192 /**
1193 * octep_intr_poll_task - work queue task to process non-ioq interrupts.
1194 *
1195 * @work: pointer to mbox work_struct
1196 *
1197 * Process non-ioq interrupts to handle control mailbox, pfvf mailbox.
1198 **/
octep_intr_poll_task(struct work_struct * work)1199 static void octep_intr_poll_task(struct work_struct *work)
1200 {
1201 struct octep_device *oct = container_of(work, struct octep_device,
1202 intr_poll_task.work);
1203
1204 if (!oct->poll_non_ioq_intr) {
1205 dev_info(&oct->pdev->dev, "Interrupt poll task stopped.\n");
1206 return;
1207 }
1208
1209 oct->hw_ops.poll_non_ioq_interrupts(oct);
1210 queue_delayed_work(octep_wq, &oct->intr_poll_task,
1211 msecs_to_jiffies(OCTEP_INTR_POLL_TIME_MSECS));
1212 }
1213
1214 /**
1215 * octep_hb_timeout_task - work queue task to check firmware heartbeat.
1216 *
1217 * @work: pointer to hb work_struct
1218 *
1219 * Check for heartbeat miss count. Uninitialize oct device if miss count
1220 * exceeds configured max heartbeat miss count.
1221 *
1222 **/
octep_hb_timeout_task(struct work_struct * work)1223 static void octep_hb_timeout_task(struct work_struct *work)
1224 {
1225 struct octep_device *oct = container_of(work, struct octep_device,
1226 hb_task.work);
1227
1228 int miss_cnt;
1229
1230 miss_cnt = atomic_inc_return(&oct->hb_miss_cnt);
1231 if (miss_cnt < oct->conf->fw_info.hb_miss_count) {
1232 queue_delayed_work(octep_wq, &oct->hb_task,
1233 msecs_to_jiffies(oct->conf->fw_info.hb_interval));
1234 return;
1235 }
1236
1237 dev_err(&oct->pdev->dev, "Missed %u heartbeats. Uninitializing\n",
1238 miss_cnt);
1239 rtnl_lock();
1240 if (netif_running(oct->netdev))
1241 dev_close(oct->netdev);
1242 rtnl_unlock();
1243 }
1244
1245 /**
1246 * octep_ctrl_mbox_task - work queue task to handle ctrl mbox messages.
1247 *
1248 * @work: pointer to ctrl mbox work_struct
1249 *
1250 * Poll ctrl mbox message queue and handle control messages from firmware.
1251 **/
octep_ctrl_mbox_task(struct work_struct * work)1252 static void octep_ctrl_mbox_task(struct work_struct *work)
1253 {
1254 struct octep_device *oct = container_of(work, struct octep_device,
1255 ctrl_mbox_task);
1256
1257 octep_ctrl_net_recv_fw_messages(oct);
1258 }
1259
octep_devid_to_str(struct octep_device * oct)1260 static const char *octep_devid_to_str(struct octep_device *oct)
1261 {
1262 switch (oct->chip_id) {
1263 case OCTEP_PCI_DEVICE_ID_CN98_PF:
1264 return "CN98XX";
1265 case OCTEP_PCI_DEVICE_ID_CN93_PF:
1266 return "CN93XX";
1267 case OCTEP_PCI_DEVICE_ID_CNF95N_PF:
1268 return "CNF95N";
1269 case OCTEP_PCI_DEVICE_ID_CN10KA_PF:
1270 return "CN10KA";
1271 case OCTEP_PCI_DEVICE_ID_CNF10KA_PF:
1272 return "CNF10KA";
1273 case OCTEP_PCI_DEVICE_ID_CNF10KB_PF:
1274 return "CNF10KB";
1275 case OCTEP_PCI_DEVICE_ID_CN10KB_PF:
1276 return "CN10KB";
1277 default:
1278 return "Unsupported";
1279 }
1280 }
1281
1282 /**
1283 * octep_device_setup() - Setup Octeon Device.
1284 *
1285 * @oct: Octeon device private data structure.
1286 *
1287 * Setup Octeon device hardware operations, configuration, etc ...
1288 */
octep_device_setup(struct octep_device * oct)1289 int octep_device_setup(struct octep_device *oct)
1290 {
1291 struct pci_dev *pdev = oct->pdev;
1292 int i, ret;
1293
1294 /* allocate memory for oct->conf */
1295 oct->conf = kzalloc_obj(*oct->conf);
1296 if (!oct->conf)
1297 return -ENOMEM;
1298
1299 /* Map BAR regions */
1300 for (i = 0; i < OCTEP_MMIO_REGIONS; i++) {
1301 oct->mmio[i].hw_addr =
1302 ioremap(pci_resource_start(oct->pdev, i * 2),
1303 pci_resource_len(oct->pdev, i * 2));
1304 if (!oct->mmio[i].hw_addr)
1305 goto unmap_prev;
1306
1307 oct->mmio[i].mapped = 1;
1308 }
1309
1310 oct->chip_id = pdev->device;
1311 oct->rev_id = pdev->revision;
1312 dev_info(&pdev->dev, "chip_id = 0x%x\n", pdev->device);
1313
1314 switch (oct->chip_id) {
1315 case OCTEP_PCI_DEVICE_ID_CN98_PF:
1316 case OCTEP_PCI_DEVICE_ID_CN93_PF:
1317 case OCTEP_PCI_DEVICE_ID_CNF95N_PF:
1318 dev_info(&pdev->dev, "Setting up OCTEON %s PF PASS%d.%d\n",
1319 octep_devid_to_str(oct), OCTEP_MAJOR_REV(oct),
1320 OCTEP_MINOR_REV(oct));
1321 octep_device_setup_cn93_pf(oct);
1322 break;
1323 case OCTEP_PCI_DEVICE_ID_CNF10KA_PF:
1324 case OCTEP_PCI_DEVICE_ID_CN10KA_PF:
1325 case OCTEP_PCI_DEVICE_ID_CNF10KB_PF:
1326 case OCTEP_PCI_DEVICE_ID_CN10KB_PF:
1327 dev_info(&pdev->dev, "Setting up OCTEON %s PF PASS%d.%d\n",
1328 octep_devid_to_str(oct), OCTEP_MAJOR_REV(oct), OCTEP_MINOR_REV(oct));
1329 octep_device_setup_cnxk_pf(oct);
1330 break;
1331 default:
1332 dev_err(&pdev->dev,
1333 "%s: unsupported device\n", __func__);
1334 goto unsupported_dev;
1335 }
1336
1337
1338 ret = octep_ctrl_net_init(oct);
1339 if (ret)
1340 goto unsupported_dev;
1341
1342 INIT_WORK(&oct->tx_timeout_task, octep_tx_timeout_task);
1343 INIT_WORK(&oct->ctrl_mbox_task, octep_ctrl_mbox_task);
1344 INIT_DELAYED_WORK(&oct->intr_poll_task, octep_intr_poll_task);
1345 oct->poll_non_ioq_intr = true;
1346 queue_delayed_work(octep_wq, &oct->intr_poll_task,
1347 msecs_to_jiffies(OCTEP_INTR_POLL_TIME_MSECS));
1348
1349 atomic_set(&oct->hb_miss_cnt, 0);
1350 INIT_DELAYED_WORK(&oct->hb_task, octep_hb_timeout_task);
1351
1352 return 0;
1353
1354 unsupported_dev:
1355 i = OCTEP_MMIO_REGIONS;
1356 unmap_prev:
1357 while (i--)
1358 iounmap(oct->mmio[i].hw_addr);
1359
1360 kfree(oct->conf);
1361 return -1;
1362 }
1363
1364 /**
1365 * octep_device_cleanup() - Cleanup Octeon Device.
1366 *
1367 * @oct: Octeon device private data structure.
1368 *
1369 * Cleanup Octeon device allocated resources.
1370 */
octep_device_cleanup(struct octep_device * oct)1371 static void octep_device_cleanup(struct octep_device *oct)
1372 {
1373 int i;
1374
1375 oct->poll_non_ioq_intr = false;
1376 cancel_delayed_work_sync(&oct->intr_poll_task);
1377 cancel_work_sync(&oct->ctrl_mbox_task);
1378
1379 dev_info(&oct->pdev->dev, "Cleaning up Octeon Device ...\n");
1380
1381 for (i = 0; i < OCTEP_MAX_VF; i++) {
1382 vfree(oct->mbox[i]);
1383 oct->mbox[i] = NULL;
1384 }
1385
1386 octep_delete_pfvf_mbox(oct);
1387 octep_ctrl_net_uninit(oct);
1388 cancel_delayed_work_sync(&oct->hb_task);
1389
1390 oct->hw_ops.soft_reset(oct);
1391 for (i = 0; i < OCTEP_MMIO_REGIONS; i++) {
1392 if (oct->mmio[i].mapped)
1393 iounmap(oct->mmio[i].hw_addr);
1394 }
1395
1396 kfree(oct->conf);
1397 oct->conf = NULL;
1398 }
1399
get_fw_ready_status(struct pci_dev * pdev)1400 static bool get_fw_ready_status(struct pci_dev *pdev)
1401 {
1402 u32 pos = 0;
1403 u16 vsec_id;
1404 u8 status;
1405
1406 while ((pos = pci_find_next_ext_capability(pdev, pos,
1407 PCI_EXT_CAP_ID_VNDR))) {
1408 pci_read_config_word(pdev, pos + 4, &vsec_id);
1409 #define FW_STATUS_VSEC_ID 0xA3
1410 if (vsec_id != FW_STATUS_VSEC_ID)
1411 continue;
1412
1413 pci_read_config_byte(pdev, (pos + 8), &status);
1414 dev_info(&pdev->dev, "Firmware ready status = %u\n", status);
1415 #define FW_STATUS_READY 1ULL
1416 return status == FW_STATUS_READY;
1417 }
1418 return false;
1419 }
1420
1421 /**
1422 * octep_probe() - Octeon PCI device probe handler.
1423 *
1424 * @pdev: PCI device structure.
1425 * @ent: entry in Octeon PCI device ID table.
1426 *
1427 * Initializes and enables the Octeon PCI device for network operations.
1428 * Initializes Octeon private data structure and registers a network device.
1429 */
octep_probe(struct pci_dev * pdev,const struct pci_device_id * ent)1430 static int octep_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1431 {
1432 struct octep_device *octep_dev = NULL;
1433 struct net_device *netdev;
1434 int max_rx_pktlen;
1435 int err;
1436
1437 err = pci_enable_device(pdev);
1438 if (err) {
1439 dev_err(&pdev->dev, "Failed to enable PCI device\n");
1440 return err;
1441 }
1442
1443 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
1444 if (err) {
1445 dev_err(&pdev->dev, "Failed to set DMA mask !!\n");
1446 goto err_dma_mask;
1447 }
1448
1449 err = pci_request_mem_regions(pdev, OCTEP_DRV_NAME);
1450 if (err) {
1451 dev_err(&pdev->dev, "Failed to map PCI memory regions\n");
1452 goto err_pci_regions;
1453 }
1454
1455 pci_set_master(pdev);
1456
1457 if (!get_fw_ready_status(pdev)) {
1458 dev_notice(&pdev->dev, "Firmware not ready; defer probe.\n");
1459 err = -EPROBE_DEFER;
1460 goto err_alloc_netdev;
1461 }
1462
1463 netdev = alloc_etherdev_mq(sizeof(struct octep_device),
1464 OCTEP_MAX_QUEUES);
1465 if (!netdev) {
1466 dev_err(&pdev->dev, "Failed to allocate netdev\n");
1467 err = -ENOMEM;
1468 goto err_alloc_netdev;
1469 }
1470 SET_NETDEV_DEV(netdev, &pdev->dev);
1471
1472 octep_dev = netdev_priv(netdev);
1473 octep_dev->netdev = netdev;
1474 octep_dev->pdev = pdev;
1475 octep_dev->dev = &pdev->dev;
1476 pci_set_drvdata(pdev, octep_dev);
1477
1478 err = octep_device_setup(octep_dev);
1479 if (err) {
1480 dev_err(&pdev->dev, "Device setup failed\n");
1481 goto err_octep_config;
1482 }
1483
1484 err = octep_setup_pfvf_mbox(octep_dev);
1485 if (err) {
1486 dev_err(&pdev->dev, "PF-VF mailbox setup failed\n");
1487 goto register_dev_err;
1488 }
1489
1490 err = octep_ctrl_net_get_info(octep_dev, OCTEP_CTRL_NET_INVALID_VFID,
1491 &octep_dev->conf->fw_info);
1492 if (err) {
1493 dev_err(&pdev->dev, "Failed to get firmware info\n");
1494 goto register_dev_err;
1495 }
1496 dev_info(&octep_dev->pdev->dev, "Heartbeat interval %u msecs Heartbeat miss count %u\n",
1497 octep_dev->conf->fw_info.hb_interval,
1498 octep_dev->conf->fw_info.hb_miss_count);
1499 queue_delayed_work(octep_wq, &octep_dev->hb_task,
1500 msecs_to_jiffies(octep_dev->conf->fw_info.hb_interval));
1501
1502 netdev->netdev_ops = &octep_netdev_ops;
1503 octep_set_ethtool_ops(netdev);
1504 netif_carrier_off(netdev);
1505
1506 netdev->hw_features = NETIF_F_SG;
1507 if (OCTEP_TX_IP_CSUM(octep_dev->conf->fw_info.tx_ol_flags))
1508 netdev->hw_features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
1509
1510 if (OCTEP_RX_IP_CSUM(octep_dev->conf->fw_info.rx_ol_flags))
1511 netdev->hw_features |= NETIF_F_RXCSUM;
1512
1513 max_rx_pktlen = octep_ctrl_net_get_mtu(octep_dev, OCTEP_CTRL_NET_INVALID_VFID);
1514 if (max_rx_pktlen < 0) {
1515 dev_err(&octep_dev->pdev->dev,
1516 "Failed to get max receive packet size; err = %d\n", max_rx_pktlen);
1517 err = max_rx_pktlen;
1518 goto register_dev_err;
1519 }
1520 netdev->min_mtu = OCTEP_MIN_MTU;
1521 netdev->max_mtu = max_rx_pktlen - (ETH_HLEN + ETH_FCS_LEN);
1522 netdev->mtu = OCTEP_DEFAULT_MTU;
1523
1524 if (OCTEP_TX_TSO(octep_dev->conf->fw_info.tx_ol_flags)) {
1525 netdev->hw_features |= NETIF_F_TSO;
1526 netif_set_tso_max_size(netdev, netdev->max_mtu);
1527 }
1528
1529 netdev->features |= netdev->hw_features;
1530 err = octep_ctrl_net_get_mac_addr(octep_dev, OCTEP_CTRL_NET_INVALID_VFID,
1531 octep_dev->mac_addr);
1532 if (err) {
1533 dev_err(&pdev->dev, "Failed to get mac address\n");
1534 goto register_dev_err;
1535 }
1536 eth_hw_addr_set(netdev, octep_dev->mac_addr);
1537
1538 err = register_netdev(netdev);
1539 if (err) {
1540 dev_err(&pdev->dev, "Failed to register netdev\n");
1541 goto register_dev_err;
1542 }
1543 dev_info(&pdev->dev, "Device probe successful\n");
1544 return 0;
1545
1546 register_dev_err:
1547 octep_device_cleanup(octep_dev);
1548 err_octep_config:
1549 free_netdev(netdev);
1550 err_alloc_netdev:
1551 pci_release_mem_regions(pdev);
1552 err_pci_regions:
1553 err_dma_mask:
1554 pci_disable_device(pdev);
1555 return err;
1556 }
1557
octep_sriov_disable(struct octep_device * oct)1558 static int octep_sriov_disable(struct octep_device *oct)
1559 {
1560 struct pci_dev *pdev = oct->pdev;
1561
1562 if (pci_vfs_assigned(oct->pdev)) {
1563 dev_warn(&pdev->dev, "Can't disable SRIOV while VFs are assigned\n");
1564 return -EPERM;
1565 }
1566
1567 pci_disable_sriov(pdev);
1568 CFG_GET_ACTIVE_VFS(oct->conf) = 0;
1569
1570 return 0;
1571 }
1572
1573 /**
1574 * octep_remove() - Remove Octeon PCI device from driver control.
1575 *
1576 * @pdev: PCI device structure of the Octeon device.
1577 *
1578 * Cleanup all resources allocated for the Octeon device.
1579 * Unregister from network device and disable the PCI device.
1580 */
octep_remove(struct pci_dev * pdev)1581 static void octep_remove(struct pci_dev *pdev)
1582 {
1583 struct octep_device *oct = pci_get_drvdata(pdev);
1584 struct net_device *netdev;
1585
1586 if (!oct)
1587 return;
1588
1589 netdev = oct->netdev;
1590 octep_sriov_disable(oct);
1591 if (netdev->reg_state == NETREG_REGISTERED)
1592 unregister_netdev(netdev);
1593
1594 cancel_work_sync(&oct->tx_timeout_task);
1595 octep_device_cleanup(oct);
1596 pci_release_mem_regions(pdev);
1597 free_netdev(netdev);
1598 pci_disable_device(pdev);
1599 }
1600
octep_sriov_enable(struct octep_device * oct,int num_vfs)1601 static int octep_sriov_enable(struct octep_device *oct, int num_vfs)
1602 {
1603 struct pci_dev *pdev = oct->pdev;
1604 int err;
1605
1606 CFG_GET_ACTIVE_VFS(oct->conf) = num_vfs;
1607 err = pci_enable_sriov(pdev, num_vfs);
1608 if (err) {
1609 dev_warn(&pdev->dev, "Failed to enable SRIOV err=%d\n", err);
1610 CFG_GET_ACTIVE_VFS(oct->conf) = 0;
1611 return err;
1612 }
1613
1614 return num_vfs;
1615 }
1616
octep_sriov_configure(struct pci_dev * pdev,int num_vfs)1617 static int octep_sriov_configure(struct pci_dev *pdev, int num_vfs)
1618 {
1619 struct octep_device *oct = pci_get_drvdata(pdev);
1620 int max_nvfs;
1621
1622 if (num_vfs == 0)
1623 return octep_sriov_disable(oct);
1624
1625 max_nvfs = CFG_GET_MAX_VFS(oct->conf);
1626
1627 if (num_vfs > max_nvfs) {
1628 dev_err(&pdev->dev, "Invalid VF count Max supported VFs = %d\n",
1629 max_nvfs);
1630 return -EINVAL;
1631 }
1632
1633 return octep_sriov_enable(oct, num_vfs);
1634 }
1635
1636 static struct pci_driver octep_driver = {
1637 .name = OCTEP_DRV_NAME,
1638 .id_table = octep_pci_id_tbl,
1639 .probe = octep_probe,
1640 .remove = octep_remove,
1641 .sriov_configure = octep_sriov_configure,
1642 };
1643
1644 /**
1645 * octep_init_module() - Module initialiation.
1646 *
1647 * create common resource for the driver and register PCI driver.
1648 */
octep_init_module(void)1649 static int __init octep_init_module(void)
1650 {
1651 int ret;
1652
1653 pr_info("%s: Loading %s ...\n", OCTEP_DRV_NAME, OCTEP_DRV_STRING);
1654
1655 /* work queue for all deferred tasks */
1656 octep_wq = create_singlethread_workqueue(OCTEP_DRV_NAME);
1657 if (!octep_wq) {
1658 pr_err("%s: Failed to create common workqueue\n",
1659 OCTEP_DRV_NAME);
1660 return -ENOMEM;
1661 }
1662
1663 ret = pci_register_driver(&octep_driver);
1664 if (ret < 0) {
1665 pr_err("%s: Failed to register PCI driver; err=%d\n",
1666 OCTEP_DRV_NAME, ret);
1667 destroy_workqueue(octep_wq);
1668 return ret;
1669 }
1670
1671 pr_info("%s: Loaded successfully !\n", OCTEP_DRV_NAME);
1672
1673 return ret;
1674 }
1675
1676 /**
1677 * octep_exit_module() - Module exit routine.
1678 *
1679 * unregister the driver with PCI subsystem and cleanup common resources.
1680 */
octep_exit_module(void)1681 static void __exit octep_exit_module(void)
1682 {
1683 pr_info("%s: Unloading ...\n", OCTEP_DRV_NAME);
1684
1685 pci_unregister_driver(&octep_driver);
1686 destroy_workqueue(octep_wq);
1687
1688 pr_info("%s: Unloading complete\n", OCTEP_DRV_NAME);
1689 }
1690
1691 module_init(octep_init_module);
1692 module_exit(octep_exit_module);
1693