1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2019 - 2022 Beijing WangXun Technology Co., Ltd. */
3
4 #include <linux/types.h>
5 #include <linux/module.h>
6 #include <linux/pci.h>
7 #include <linux/netdevice.h>
8 #include <linux/string.h>
9 #include <linux/etherdevice.h>
10 #include <net/ip.h>
11 #include <linux/phy.h>
12 #include <linux/if_vlan.h>
13
14 #include "../libwx/wx_type.h"
15 #include "../libwx/wx_hw.h"
16 #include "../libwx/wx_lib.h"
17 #include "../libwx/wx_err.h"
18 #include "../libwx/wx_ptp.h"
19 #include "../libwx/wx_mbx.h"
20 #include "../libwx/wx_sriov.h"
21 #include "ngbe_type.h"
22 #include "ngbe_mdio.h"
23 #include "ngbe_hw.h"
24 #include "ngbe_ethtool.h"
25
26 char ngbe_driver_name[] = "ngbe";
27
28 /* ngbe_pci_tbl - PCI Device ID Table
29 *
30 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
31 * Class, Class Mask, private data (not used) }
32 */
33 static const struct pci_device_id ngbe_pci_tbl[] = {
34 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL_W) },
35 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A2) },
36 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A2S) },
37 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A4) },
38 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A4S) },
39 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL2) },
40 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL2S) },
41 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL4) },
42 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860AL4S) },
43 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860LC) },
44 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A1) },
45 { PCI_VDEVICE(WANGXUN, NGBE_DEV_ID_EM_WX1860A1L) },
46 /* required last entry */
47 { }
48 };
49
ngbe_down_suspend(struct wx * wx)50 static void ngbe_down_suspend(struct wx *wx)
51 {
52 if (test_and_set_bit(WX_STATE_RES_FREED, wx->state))
53 return;
54
55 phylink_stop(wx->phylink);
56 phylink_disconnect_phy(wx->phylink);
57 wx_clean_all_tx_rings(wx);
58 wx_clean_all_rx_rings(wx);
59 wx_free_irq(wx);
60 wx_free_isb_resources(wx);
61 wx_free_resources(wx);
62 }
63
64 /**
65 * ngbe_init_type_code - Initialize the shared code
66 * @wx: pointer to hardware structure
67 **/
ngbe_init_type_code(struct wx * wx)68 static void ngbe_init_type_code(struct wx *wx)
69 {
70 int wol_mask = 0, ncsi_mask = 0;
71 u16 type_mask = 0, val;
72
73 wx->mac.type = wx_mac_em;
74 type_mask = (u16)(wx->subsystem_device_id & NGBE_OEM_MASK);
75 ncsi_mask = wx->subsystem_device_id & WX_NCSI_MASK;
76 wol_mask = wx->subsystem_device_id & WX_WOL_MASK;
77
78 val = rd32(wx, WX_CFG_PORT_ST);
79 wx->mac_type = (val & BIT(7)) >> 7 ?
80 em_mac_type_rgmii :
81 em_mac_type_mdi;
82
83 wx->wol_hw_supported = (wol_mask == WX_WOL_SUP) ? 1 : 0;
84 wx->ncsi_enabled = (ncsi_mask == WX_NCSI_SUP ||
85 type_mask == NGBE_SUBID_OCP_CARD) ? 1 : 0;
86
87 switch (type_mask) {
88 case NGBE_SUBID_LY_YT8521S_SFP:
89 case NGBE_SUBID_LY_M88E1512_SFP:
90 case NGBE_SUBID_YT8521S_SFP_GPIO:
91 case NGBE_SUBID_INTERNAL_YT8521S_SFP_GPIO:
92 wx->gpio_ctrl = 1;
93 break;
94 default:
95 wx->gpio_ctrl = 0;
96 break;
97 }
98 }
99
100 /**
101 * ngbe_sw_init - Initialize general software structures
102 * @wx: board private structure to initialize
103 **/
ngbe_sw_init(struct wx * wx)104 static int ngbe_sw_init(struct wx *wx)
105 {
106 struct pci_dev *pdev = wx->pdev;
107 u16 msix_count = 0;
108 int err = 0;
109
110 wx->mac.num_rar_entries = NGBE_RAR_ENTRIES;
111 wx->mac.max_rx_queues = NGBE_MAX_RX_QUEUES;
112 wx->mac.max_tx_queues = NGBE_MAX_TX_QUEUES;
113 wx->mac.mcft_size = NGBE_MC_TBL_SIZE;
114 wx->mac.vft_size = NGBE_SP_VFT_TBL_SIZE;
115 wx->mac.rx_pb_size = NGBE_RX_PB_SIZE;
116 wx->mac.tx_pb_size = NGBE_TDB_PB_SZ;
117
118 /* PCI config space info */
119 err = wx_sw_init(wx);
120 if (err < 0)
121 return err;
122
123 /* mac type, phy type , oem type */
124 ngbe_init_type_code(wx);
125
126 /* Set common capability flags and settings */
127 wx->max_q_vectors = NGBE_MAX_MSIX_VECTORS;
128 err = wx_get_pcie_msix_counts(wx, &msix_count, NGBE_MAX_MSIX_VECTORS);
129 if (err)
130 dev_err(&pdev->dev, "Do not support MSI-X\n");
131 wx->mac.max_msix_vectors = msix_count;
132
133 wx->ring_feature[RING_F_RSS].limit = min_t(int, NGBE_MAX_RSS_INDICES,
134 num_online_cpus());
135 wx->rss_enabled = true;
136
137 wx->adaptive_itr = false;
138 wx->rx_itr_setting = WX_7K_ITR;
139 wx->tx_itr_setting = WX_7K_ITR;
140
141 /* set default ring sizes */
142 wx->tx_ring_count = NGBE_DEFAULT_TXD;
143 wx->rx_ring_count = NGBE_DEFAULT_RXD;
144
145 /* set default work limits */
146 wx->tx_work_limit = NGBE_DEFAULT_TX_WORK;
147 wx->rx_work_limit = NGBE_DEFAULT_RX_WORK;
148
149 wx->mbx.size = WX_VXMAILBOX_SIZE;
150 wx->setup_tc = ngbe_setup_tc;
151 wx->do_reset = ngbe_do_reset;
152 wx->down_suspend = ngbe_down_suspend;
153 set_bit(0, &wx->fwd_bitmask);
154
155 return 0;
156 }
157
158 /**
159 * ngbe_service_task - manages and runs subtasks
160 * @work: pointer to work_struct containing our data
161 **/
ngbe_service_task(struct work_struct * work)162 static void ngbe_service_task(struct work_struct *work)
163 {
164 struct wx *wx = container_of(work, struct wx, service_task);
165
166 wx_update_stats(wx);
167 wx_check_hang_subtask(wx);
168 wx_check_err_subtask(wx);
169
170 wx_service_event_complete(wx);
171 }
172
ngbe_init_service(struct wx * wx)173 static void ngbe_init_service(struct wx *wx)
174 {
175 timer_setup(&wx->service_timer, wx_service_timer, 0);
176 INIT_WORK(&wx->service_task, ngbe_service_task);
177 clear_bit(WX_STATE_SERVICE_SCHED, wx->state);
178 }
179
180 /**
181 * ngbe_irq_enable - Enable default interrupt generation settings
182 * @wx: board private structure
183 * @queues: enable all queues interrupts
184 **/
ngbe_irq_enable(struct wx * wx,bool queues)185 static void ngbe_irq_enable(struct wx *wx, bool queues)
186 {
187 u32 mask;
188
189 /* enable misc interrupt */
190 mask = NGBE_PX_MISC_IEN_MASK;
191
192 wr32(wx, WX_GPIO_DDR, WX_GPIO_DDR_0);
193 wr32(wx, WX_GPIO_INTEN, WX_GPIO_INTEN_0 | WX_GPIO_INTEN_1);
194 wr32(wx, WX_GPIO_INTTYPE_LEVEL, 0x0);
195 wr32(wx, WX_GPIO_POLARITY, wx->gpio_ctrl ? 0 : 0x3);
196
197 wr32(wx, WX_PX_MISC_IEN, mask);
198
199 /* unmask interrupt */
200 if (queues)
201 wx_intr_enable(wx, NGBE_INTR_ALL);
202 else if (wx->pdev->msix_enabled)
203 wx_intr_enable(wx, NGBE_INTR_MISC(wx));
204 else
205 wx_intr_enable(wx, BIT(0));
206 }
207
208 /**
209 * ngbe_intr - msi/legacy mode Interrupt Handler
210 * @irq: interrupt number
211 * @data: pointer to a network interface device structure
212 **/
ngbe_intr(int __always_unused irq,void * data)213 static irqreturn_t ngbe_intr(int __always_unused irq, void *data)
214 {
215 struct wx_q_vector *q_vector;
216 struct wx *wx = data;
217 struct pci_dev *pdev;
218 u32 eicr, eicr_misc;
219
220 q_vector = wx->q_vector[0];
221 pdev = wx->pdev;
222
223 eicr = wx_misc_isb(wx, WX_ISB_VEC0);
224 if (!eicr) {
225 /* shared interrupt alert!
226 * the interrupt that we masked before the EICR read.
227 */
228 if (!test_bit(WX_STATE_DOWN, wx->state))
229 ngbe_irq_enable(wx, true);
230 return IRQ_NONE; /* Not our interrupt */
231 }
232 wx->isb_mem[WX_ISB_VEC0] = 0;
233 if (!(pdev->msi_enabled))
234 wr32(wx, WX_PX_INTA, 1);
235
236 eicr_misc = wx_misc_isb(wx, WX_ISB_MISC);
237 if (unlikely(eicr_misc & NGBE_PX_MISC_IC_TIMESYNC))
238 wx_ptp_check_pps_event(wx);
239
240 wx->isb_mem[WX_ISB_MISC] = 0;
241 /* would disable interrupts here but it is auto disabled */
242 napi_schedule_irqoff(&q_vector->napi);
243
244 if (!test_bit(WX_STATE_DOWN, wx->state))
245 ngbe_irq_enable(wx, false);
246
247 return IRQ_HANDLED;
248 }
249
__ngbe_msix_misc(struct wx * wx,u32 eicr)250 static irqreturn_t __ngbe_msix_misc(struct wx *wx, u32 eicr)
251 {
252 if (eicr & NGBE_PX_MISC_IC_VF_MBOX)
253 wx_msg_task(wx);
254
255 if (unlikely(eicr & NGBE_PX_MISC_IC_TIMESYNC))
256 wx_ptp_check_pps_event(wx);
257
258 /* re-enable the original interrupt state, no lsc, no queues */
259 if (!test_bit(WX_STATE_DOWN, wx->state))
260 ngbe_irq_enable(wx, false);
261
262 return IRQ_HANDLED;
263 }
264
ngbe_msix_misc(int __always_unused irq,void * data)265 static irqreturn_t ngbe_msix_misc(int __always_unused irq, void *data)
266 {
267 struct wx *wx = data;
268 u32 eicr;
269
270 eicr = wx_misc_isb(wx, WX_ISB_MISC);
271
272 return __ngbe_msix_misc(wx, eicr);
273 }
274
ngbe_misc_and_queue(int __always_unused irq,void * data)275 static irqreturn_t ngbe_misc_and_queue(int __always_unused irq, void *data)
276 {
277 struct wx_q_vector *q_vector;
278 struct wx *wx = data;
279 u32 eicr;
280
281 eicr = wx_misc_isb(wx, WX_ISB_MISC);
282 if (!eicr) {
283 /* queue */
284 q_vector = wx->q_vector[0];
285 napi_schedule_irqoff(&q_vector->napi);
286 if (!test_bit(WX_STATE_DOWN, wx->state))
287 ngbe_irq_enable(wx, true);
288 return IRQ_HANDLED;
289 }
290
291 return __ngbe_msix_misc(wx, eicr);
292 }
293
294 /**
295 * ngbe_request_msix_irqs - Initialize MSI-X interrupts
296 * @wx: board private structure
297 *
298 * ngbe_request_msix_irqs allocates MSI-X vectors and requests
299 * interrupts from the kernel.
300 **/
ngbe_request_msix_irqs(struct wx * wx)301 static int ngbe_request_msix_irqs(struct wx *wx)
302 {
303 struct net_device *netdev = wx->netdev;
304 int vector, err;
305
306 for (vector = 0; vector < wx->num_q_vectors; vector++) {
307 struct wx_q_vector *q_vector = wx->q_vector[vector];
308 struct msix_entry *entry = &wx->msix_q_entries[vector];
309
310 if (q_vector->tx.ring && q_vector->rx.ring)
311 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
312 "%s-TxRx-%d", netdev->name, entry->entry);
313 else
314 /* skip this unused q_vector */
315 continue;
316
317 err = request_irq(entry->vector, wx_msix_clean_rings, 0,
318 q_vector->name, q_vector);
319 if (err) {
320 wx_err(wx, "request_irq failed for MSIX interrupt %s Error: %d\n",
321 q_vector->name, err);
322 goto free_queue_irqs;
323 }
324 }
325
326 /* Due to hardware design, when num_vfs < 7, pf can use 0 for misc and 1
327 * for queue. But when num_vfs == 7, vector[1] is assigned to vf6.
328 * Misc and queue should reuse interrupt vector[0].
329 */
330 if (test_bit(WX_FLAG_IRQ_VECTOR_SHARED, wx->flags))
331 err = request_irq(wx->msix_entry->vector,
332 ngbe_misc_and_queue, 0, netdev->name, wx);
333 else
334 err = request_irq(wx->msix_entry->vector,
335 ngbe_msix_misc, 0, netdev->name, wx);
336
337 if (err) {
338 wx_err(wx, "request_irq for msix_other failed: %d\n", err);
339 goto free_queue_irqs;
340 }
341
342 return 0;
343
344 free_queue_irqs:
345 while (vector) {
346 vector--;
347 free_irq(wx->msix_q_entries[vector].vector,
348 wx->q_vector[vector]);
349 }
350 wx_reset_interrupt_capability(wx);
351 return err;
352 }
353
354 /**
355 * ngbe_request_irq - initialize interrupts
356 * @wx: board private structure
357 *
358 * Attempts to configure interrupts using the best available
359 * capabilities of the hardware and kernel.
360 **/
ngbe_request_irq(struct wx * wx)361 static int ngbe_request_irq(struct wx *wx)
362 {
363 struct net_device *netdev = wx->netdev;
364 struct pci_dev *pdev = wx->pdev;
365 int err;
366
367 if (pdev->msix_enabled)
368 err = ngbe_request_msix_irqs(wx);
369 else if (pdev->msi_enabled)
370 err = request_irq(pdev->irq, ngbe_intr, 0,
371 netdev->name, wx);
372 else
373 err = request_irq(pdev->irq, ngbe_intr, IRQF_SHARED,
374 netdev->name, wx);
375
376 if (err)
377 wx_err(wx, "request_irq failed, Error %d\n", err);
378
379 return err;
380 }
381
ngbe_disable_device(struct wx * wx)382 static void ngbe_disable_device(struct wx *wx)
383 {
384 struct net_device *netdev = wx->netdev;
385 u32 i;
386
387 if (test_and_set_bit(WX_STATE_DOWN, wx->state))
388 return;
389
390 if (wx->num_vfs) {
391 /* Clear EITR Select mapping */
392 wr32(wx, WX_PX_ITRSEL, 0);
393
394 /* Mark all the VFs as inactive */
395 for (i = 0; i < wx->num_vfs; i++)
396 wx->vfinfo[i].clear_to_send = 0;
397 wx->notify_down = true;
398 /* ping all the active vfs to let them know we are going down */
399 wx_ping_all_vfs_with_link_status(wx, false);
400 wx->notify_down = false;
401
402 /* Disable all VFTE/VFRE TX/RX */
403 wx_disable_vf_rx_tx(wx);
404 }
405
406 /* disable all enabled rx queues */
407 for (i = 0; i < wx->num_rx_queues; i++)
408 /* this call also flushes the previous write */
409 wx_disable_rx_queue(wx, wx->rx_ring[i]);
410 /* disable receives */
411 wx_disable_rx(wx);
412 wx_napi_disable_all(wx);
413 netif_tx_stop_all_queues(netdev);
414 netif_tx_disable(netdev);
415
416 clear_bit(WX_FLAG_NEED_DO_RESET, wx->flags);
417 timer_delete_sync(&wx->service_timer);
418 cancel_work_sync(&wx->service_task);
419
420 if (wx->gpio_ctrl)
421 ngbe_sfp_modules_txrx_powerctl(wx, false);
422 wx_irq_disable(wx);
423 /* disable transmits in the hardware now that interrupts are off */
424 for (i = 0; i < wx->num_tx_queues; i++) {
425 u8 reg_idx = wx->tx_ring[i]->reg_idx;
426
427 wr32(wx, WX_PX_TR_CFG(reg_idx), WX_PX_TR_CFG_SWFLSH);
428 }
429 }
430
ngbe_reset(struct wx * wx)431 static void ngbe_reset(struct wx *wx)
432 {
433 if (test_bit(WX_FLAG_NEED_PCIE_RECOVERY, wx->flags))
434 return;
435
436 wx_flush_sw_mac_table(wx);
437 wx_mac_set_default_filter(wx, wx->mac.addr);
438 if (test_bit(WX_STATE_PTP_RUNNING, wx->state))
439 wx_ptp_reset(wx);
440 }
441
ngbe_down(struct wx * wx)442 void ngbe_down(struct wx *wx)
443 {
444 phylink_stop(wx->phylink);
445 ngbe_disable_device(wx);
446 ngbe_reset(wx);
447 wx_clean_all_tx_rings(wx);
448 wx_clean_all_rx_rings(wx);
449 }
450
ngbe_up_complete(struct wx * wx)451 static void ngbe_up_complete(struct wx *wx)
452 {
453 wx_configure_vectors(wx);
454
455 /* make sure to complete pre-operations */
456 smp_mb__before_atomic();
457 clear_bit(WX_STATE_DOWN, wx->state);
458 clear_bit(WX_STATE_RES_FREED, wx->state);
459 wx_napi_enable_all(wx);
460 /* enable transmits */
461 netif_tx_start_all_queues(wx->netdev);
462 mod_timer(&wx->service_timer, jiffies);
463
464 /* clear any pending interrupts, may auto mask */
465 rd32(wx, WX_PX_IC(0));
466 rd32(wx, WX_PX_MISC_IC);
467 ngbe_irq_enable(wx, true);
468 if (wx->gpio_ctrl)
469 ngbe_sfp_modules_txrx_powerctl(wx, true);
470
471 phylink_start(wx->phylink);
472 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
473 wr32m(wx, WX_CFG_PORT_CTL,
474 WX_CFG_PORT_CTL_PFRSTD, WX_CFG_PORT_CTL_PFRSTD);
475 if (wx->num_vfs)
476 wx_ping_all_vfs_with_link_status(wx, false);
477 }
478
479 /**
480 * ngbe_open - Called when a network interface is made active
481 * @netdev: network interface device structure
482 *
483 * Returns 0 on success, negative value on failure
484 *
485 * The open entry point is called when a network interface is made
486 * active by the system (IFF_UP).
487 **/
ngbe_open(struct net_device * netdev)488 static int ngbe_open(struct net_device *netdev)
489 {
490 struct wx *wx = netdev_priv(netdev);
491 int err;
492
493 wx_control_hw(wx, true);
494
495 err = wx_setup_resources(wx);
496 if (err)
497 return err;
498
499 wx_configure(wx);
500
501 err = ngbe_request_irq(wx);
502 if (err)
503 goto err_free_resources;
504
505 err = phylink_connect_phy(wx->phylink, wx->phydev);
506 if (err)
507 goto err_free_irq;
508
509 err = netif_set_real_num_tx_queues(netdev, wx->num_tx_queues);
510 if (err)
511 goto err_dis_phy;
512
513 err = netif_set_real_num_rx_queues(netdev, wx->num_rx_queues);
514 if (err)
515 goto err_dis_phy;
516
517 wx_ptp_init(wx);
518
519 ngbe_up_complete(wx);
520
521 return 0;
522 err_dis_phy:
523 phylink_disconnect_phy(wx->phylink);
524 err_free_irq:
525 wx_free_irq(wx);
526 err_free_resources:
527 wx_free_isb_resources(wx);
528 wx_free_resources(wx);
529 return err;
530 }
531
ngbe_up(struct wx * wx)532 void ngbe_up(struct wx *wx)
533 {
534 wx_configure(wx);
535 ngbe_up_complete(wx);
536 }
537
538 /**
539 * ngbe_close - Disables a network interface
540 * @netdev: network interface device structure
541 *
542 * Returns 0, this is not allowed to fail
543 *
544 * The close entry point is called when an interface is de-activated
545 * by the OS. The hardware is still under the drivers control, but
546 * needs to be disabled. A global MAC reset is issued to stop the
547 * hardware, and all transmit and receive resources are freed.
548 **/
ngbe_close(struct net_device * netdev)549 static int ngbe_close(struct net_device *netdev)
550 {
551 struct wx *wx = netdev_priv(netdev);
552
553 if (test_bit(WX_STATE_RES_FREED, wx->state))
554 goto out;
555
556 wx_ptp_stop(wx);
557 ngbe_down(wx);
558 wx_free_irq(wx);
559 wx_free_isb_resources(wx);
560 wx_free_resources(wx);
561 phylink_disconnect_phy(wx->phylink);
562 out:
563 wx_control_hw(wx, false);
564
565 return 0;
566 }
567
ngbe_dev_shutdown(struct pci_dev * pdev,bool * enable_wake)568 static void ngbe_dev_shutdown(struct pci_dev *pdev, bool *enable_wake)
569 {
570 struct wx *wx = pci_get_drvdata(pdev);
571 struct net_device *netdev;
572 u32 wufc = wx->wol;
573
574 netdev = wx->netdev;
575 rtnl_lock();
576 netif_device_detach(netdev);
577
578 if (netif_running(netdev))
579 ngbe_close(netdev);
580 wx_clear_interrupt_scheme(wx);
581 rtnl_unlock();
582
583 if (wufc) {
584 wx_set_rx_mode(netdev);
585 wx_configure_rx(wx);
586 wr32(wx, WX_PSR_WKUP_CTL, wufc);
587 } else {
588 wr32(wx, WX_PSR_WKUP_CTL, 0);
589 }
590 pci_wake_from_d3(pdev, !!wufc);
591 *enable_wake = !!wufc;
592 wx_control_hw(wx, false);
593
594 if (!test_and_set_bit(WX_STATE_DISABLED, wx->state))
595 pci_disable_device(pdev);
596 }
597
ngbe_shutdown(struct pci_dev * pdev)598 static void ngbe_shutdown(struct pci_dev *pdev)
599 {
600 struct wx *wx = pci_get_drvdata(pdev);
601 bool wake;
602
603 wake = !!wx->wol;
604
605 ngbe_dev_shutdown(pdev, &wake);
606
607 if (system_state == SYSTEM_POWER_OFF) {
608 pci_wake_from_d3(pdev, wake);
609 pci_set_power_state(pdev, PCI_D3hot);
610 }
611 }
612
613 /**
614 * ngbe_setup_tc - routine to configure net_device for multiple traffic
615 * classes.
616 *
617 * @dev: net device to configure
618 * @tc: number of traffic classes to enable
619 */
ngbe_setup_tc(struct net_device * dev,u8 tc)620 int ngbe_setup_tc(struct net_device *dev, u8 tc)
621 {
622 struct wx *wx = netdev_priv(dev);
623
624 /* Hardware has to reinitialize queues and interrupts to
625 * match packet buffer alignment. Unfortunately, the
626 * hardware is not flexible enough to do this dynamically.
627 */
628 if (netif_running(dev))
629 ngbe_close(dev);
630 else
631 ngbe_reset(wx);
632
633 wx_clear_interrupt_scheme(wx);
634
635 if (tc)
636 netdev_set_num_tc(dev, tc);
637 else
638 netdev_reset_tc(dev);
639
640 wx_init_interrupt_scheme(wx);
641
642 if (netif_running(dev))
643 ngbe_open(dev);
644
645 return 0;
646 }
647
ngbe_reinit_locked(struct wx * wx)648 static void ngbe_reinit_locked(struct wx *wx)
649 {
650 netif_trans_update(wx->netdev);
651
652 mutex_lock(&wx->reset_lock);
653 set_bit(WX_STATE_RESETTING, wx->state);
654
655 ngbe_down(wx);
656 ngbe_up(wx);
657
658 clear_bit(WX_STATE_RESETTING, wx->state);
659 mutex_unlock(&wx->reset_lock);
660 }
661
ngbe_do_reset(struct net_device * netdev,bool reinit)662 void ngbe_do_reset(struct net_device *netdev, bool reinit)
663 {
664 struct wx *wx = netdev_priv(netdev);
665
666 if (netif_running(netdev) && reinit)
667 ngbe_reinit_locked(wx);
668 else
669 ngbe_reset(wx);
670 }
671
672 static const struct net_device_ops ngbe_netdev_ops = {
673 .ndo_open = ngbe_open,
674 .ndo_stop = ngbe_close,
675 .ndo_change_mtu = wx_change_mtu,
676 .ndo_start_xmit = wx_xmit_frame,
677 .ndo_tx_timeout = wx_tx_timeout,
678 .ndo_set_rx_mode = wx_set_rx_mode,
679 .ndo_set_features = wx_set_features,
680 .ndo_fix_features = wx_fix_features,
681 .ndo_features_check = wx_features_check,
682 .ndo_validate_addr = eth_validate_addr,
683 .ndo_set_mac_address = wx_set_mac,
684 .ndo_get_stats64 = wx_get_stats64,
685 .ndo_vlan_rx_add_vid = wx_vlan_rx_add_vid,
686 .ndo_vlan_rx_kill_vid = wx_vlan_rx_kill_vid,
687 .ndo_hwtstamp_set = wx_hwtstamp_set,
688 .ndo_hwtstamp_get = wx_hwtstamp_get,
689 };
690
691 /**
692 * ngbe_probe - Device Initialization Routine
693 * @pdev: PCI device information struct
694 * @ent: entry in ngbe_pci_tbl
695 *
696 * Returns 0 on success, negative on failure
697 *
698 * ngbe_probe initializes an wx identified by a pci_dev structure.
699 * The OS initialization, configuring of the wx private structure,
700 * and a hardware reset occur.
701 **/
ngbe_probe(struct pci_dev * pdev,const struct pci_device_id __always_unused * ent)702 static int ngbe_probe(struct pci_dev *pdev,
703 const struct pci_device_id __always_unused *ent)
704 {
705 struct net_device *netdev;
706 u32 e2rom_cksum_cap = 0;
707 struct wx *wx = NULL;
708 static int func_nums;
709 u16 e2rom_ver = 0;
710 u32 etrack_id = 0;
711 u32 saved_ver = 0;
712 int err;
713
714 err = pci_enable_device_mem(pdev);
715 if (err)
716 return err;
717
718 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
719 if (err) {
720 dev_err(&pdev->dev,
721 "No usable DMA configuration, aborting\n");
722 goto err_pci_disable_dev;
723 }
724
725 err = pci_request_selected_regions(pdev,
726 pci_select_bars(pdev, IORESOURCE_MEM),
727 ngbe_driver_name);
728 if (err) {
729 dev_err(&pdev->dev,
730 "pci_request_selected_regions failed %d\n", err);
731 goto err_pci_disable_dev;
732 }
733
734 pci_set_master(pdev);
735
736 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
737 sizeof(struct wx),
738 NGBE_MAX_TX_QUEUES,
739 NGBE_MAX_RX_QUEUES);
740 if (!netdev) {
741 err = -ENOMEM;
742 goto err_pci_release_regions;
743 }
744
745 SET_NETDEV_DEV(netdev, &pdev->dev);
746
747 wx = netdev_priv(netdev);
748 wx->netdev = netdev;
749 wx->pdev = pdev;
750 wx->msg_enable = BIT(3) - 1;
751
752 wx->hw_addr = devm_ioremap(&pdev->dev,
753 pci_resource_start(pdev, 0),
754 pci_resource_len(pdev, 0));
755 if (!wx->hw_addr) {
756 err = -EIO;
757 goto err_pci_release_regions;
758 }
759
760 /* The emerald supports up to 8 VFs per pf, but physical
761 * function also need one pool for basic networking.
762 */
763 pci_sriov_set_totalvfs(pdev, NGBE_MAX_VFS_DRV_LIMIT);
764 wx->driver_name = ngbe_driver_name;
765 ngbe_set_ethtool_ops(netdev);
766 netdev->netdev_ops = &ngbe_netdev_ops;
767
768 netdev->features = NETIF_F_SG | NETIF_F_IP_CSUM |
769 NETIF_F_TSO | NETIF_F_TSO6 |
770 NETIF_F_RXHASH | NETIF_F_RXCSUM;
771 netdev->features |= NETIF_F_SCTP_CRC | NETIF_F_TSO_MANGLEID;
772 netdev->vlan_features |= netdev->features;
773 netdev->features |= NETIF_F_IPV6_CSUM | NETIF_F_VLAN_FEATURES;
774 /* copy netdev features into list of user selectable features */
775 netdev->hw_features |= netdev->features | NETIF_F_RXALL;
776 netdev->hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
777 netdev->features |= NETIF_F_HIGHDMA;
778 netdev->hw_features |= NETIF_F_GRO;
779 netdev->features |= NETIF_F_GRO;
780
781 netdev->priv_flags |= IFF_UNICAST_FLT;
782 netdev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
783
784 netdev->min_mtu = ETH_MIN_MTU;
785 netdev->max_mtu = WX_MAX_JUMBO_FRAME_SIZE -
786 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
787
788 wx->bd_number = func_nums;
789 /* setup the private structure */
790 err = ngbe_sw_init(wx);
791 if (err)
792 goto err_pci_release_regions;
793
794 /* check if flash load is done after hw power up */
795 err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PERST);
796 if (err)
797 goto err_free_mac_table;
798 err = wx_check_flash_load(wx, NGBE_SPI_ILDR_STATUS_PWRRST);
799 if (err)
800 goto err_free_mac_table;
801
802 err = wx_mng_present(wx);
803 if (err) {
804 dev_err(&pdev->dev, "Management capability is not present\n");
805 goto err_free_mac_table;
806 }
807
808 err = ngbe_reset_hw(wx);
809 if (err) {
810 dev_err(&pdev->dev, "HW Init failed: %d\n", err);
811 goto err_free_mac_table;
812 }
813
814 if (wx->bus.func == 0) {
815 wr32(wx, NGBE_CALSUM_CAP_STATUS, 0x0);
816 wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, 0x0);
817 } else {
818 e2rom_cksum_cap = rd32(wx, NGBE_CALSUM_CAP_STATUS);
819 saved_ver = rd32(wx, NGBE_EEPROM_VERSION_STORE_REG);
820 }
821
822 wx_init_eeprom_params(wx);
823 if (wx->bus.func == 0 || e2rom_cksum_cap == 0) {
824 /* make sure the EEPROM is ready */
825 err = ngbe_eeprom_chksum_hostif(wx);
826 if (err) {
827 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
828 err = -EIO;
829 goto err_free_mac_table;
830 }
831 }
832
833 wx->wol = 0;
834 if (wx->wol_hw_supported)
835 wx->wol = WX_PSR_WKUP_CTL_MAG;
836
837 netdev->ethtool->wol_enabled = !!(wx->wol);
838 wr32(wx, WX_PSR_WKUP_CTL, wx->wol);
839 device_set_wakeup_enable(&pdev->dev, wx->wol);
840
841 /* Save off EEPROM version number and Option Rom version which
842 * together make a unique identify for the eeprom
843 */
844 if (saved_ver) {
845 etrack_id = saved_ver;
846 } else {
847 wx_read_ee_hostif(wx,
848 wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_H,
849 &e2rom_ver);
850 etrack_id = e2rom_ver << 16;
851 wx_read_ee_hostif(wx,
852 wx->eeprom.sw_region_offset + NGBE_EEPROM_VERSION_L,
853 &e2rom_ver);
854 etrack_id |= e2rom_ver;
855 wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, etrack_id);
856 }
857 snprintf(wx->eeprom_id, sizeof(wx->eeprom_id),
858 "0x%08x", etrack_id);
859
860 eth_hw_addr_set(netdev, wx->mac.perm_addr);
861 wx_mac_set_default_filter(wx, wx->mac.perm_addr);
862
863 err = wx_init_err_task(wx);
864 if (err)
865 goto err_free_mac_table;
866
867 ngbe_init_service(wx);
868
869 err = wx_init_interrupt_scheme(wx);
870 if (err)
871 goto err_cancel_service;
872
873 /* phy Interface Configuration */
874 err = ngbe_mdio_init(wx);
875 if (err)
876 goto err_clear_interrupt_scheme;
877
878 err = register_netdev(netdev);
879 if (err)
880 goto err_register;
881
882 pci_set_drvdata(pdev, wx);
883 pci_save_state(pdev);
884
885 return 0;
886
887 err_register:
888 phylink_destroy(wx->phylink);
889 wx_control_hw(wx, false);
890 err_clear_interrupt_scheme:
891 wx_clear_interrupt_scheme(wx);
892 err_cancel_service:
893 timer_delete_sync(&wx->service_timer);
894 cancel_work_sync(&wx->service_task);
895 cancel_work_sync(&wx->reset_task);
896 destroy_workqueue(wx->reset_wq);
897 err_free_mac_table:
898 kfree(wx->rss_key);
899 kfree(wx->mac_table);
900 err_pci_release_regions:
901 pci_release_selected_regions(pdev,
902 pci_select_bars(pdev, IORESOURCE_MEM));
903 err_pci_disable_dev:
904 pci_disable_device(pdev);
905 return err;
906 }
907
908 /**
909 * ngbe_remove - Device Removal Routine
910 * @pdev: PCI device information struct
911 *
912 * ngbe_remove is called by the PCI subsystem to alert the driver
913 * that it should release a PCI device. The could be caused by a
914 * Hot-Plug event, or because the driver is going to be removed from
915 * memory.
916 **/
ngbe_remove(struct pci_dev * pdev)917 static void ngbe_remove(struct pci_dev *pdev)
918 {
919 struct wx *wx = pci_get_drvdata(pdev);
920 struct net_device *netdev;
921
922 netdev = wx->netdev;
923 wx_disable_sriov(wx);
924 unregister_netdev(netdev);
925
926 timer_shutdown_sync(&wx->service_timer);
927 cancel_work_sync(&wx->service_task);
928 cancel_work_sync(&wx->reset_task);
929 destroy_workqueue(wx->reset_wq);
930
931 phylink_destroy(wx->phylink);
932 pci_release_selected_regions(pdev,
933 pci_select_bars(pdev, IORESOURCE_MEM));
934
935 kfree(wx->rss_key);
936 kfree(wx->mac_table);
937 wx_clear_interrupt_scheme(wx);
938
939 if (!test_and_set_bit(WX_STATE_DISABLED, wx->state))
940 pci_disable_device(pdev);
941 }
942
ngbe_suspend(struct pci_dev * pdev,pm_message_t state)943 static int ngbe_suspend(struct pci_dev *pdev, pm_message_t state)
944 {
945 bool wake;
946
947 ngbe_dev_shutdown(pdev, &wake);
948 device_set_wakeup_enable(&pdev->dev, wake);
949
950 return 0;
951 }
952
ngbe_resume(struct pci_dev * pdev)953 static int ngbe_resume(struct pci_dev *pdev)
954 {
955 struct net_device *netdev;
956 struct wx *wx;
957 u32 err;
958
959 wx = pci_get_drvdata(pdev);
960 netdev = wx->netdev;
961
962 err = pci_enable_device_mem(pdev);
963 if (err) {
964 wx_err(wx, "Cannot enable PCI device from suspend\n");
965 return err;
966 }
967 clear_bit(WX_STATE_DISABLED, wx->state);
968 pci_set_master(pdev);
969 device_wakeup_disable(&pdev->dev);
970
971 ngbe_reset_hw(wx);
972 rtnl_lock();
973 err = wx_init_interrupt_scheme(wx);
974 if (!err && netif_running(netdev))
975 err = ngbe_open(netdev);
976 if (!err)
977 netif_device_attach(netdev);
978 rtnl_unlock();
979
980 return 0;
981 }
982
983 static struct pci_driver ngbe_driver = {
984 .name = ngbe_driver_name,
985 .id_table = ngbe_pci_tbl,
986 .probe = ngbe_probe,
987 .remove = ngbe_remove,
988 .suspend = ngbe_suspend,
989 .resume = ngbe_resume,
990 .shutdown = ngbe_shutdown,
991 .sriov_configure = wx_pci_sriov_configure,
992 .err_handler = &wx_err_handler,
993 };
994
995 module_pci_driver(ngbe_driver);
996
997 MODULE_DEVICE_TABLE(pci, ngbe_pci_tbl);
998 MODULE_AUTHOR("Beijing WangXun Technology Co., Ltd, <software@net-swift.com>");
999 MODULE_DESCRIPTION("WangXun(R) Gigabit PCI Express Network Driver");
1000 MODULE_LICENSE("GPL");
1001