1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * libnvdimm - Non-volatile-memory Devices Subsystem
4 *
5 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
6 */
7 #ifndef __LIBNVDIMM_H__
8 #define __LIBNVDIMM_H__
9
10 #include <linux/io.h>
11 #include <linux/sizes.h>
12 #include <linux/spinlock.h>
13 #include <linux/types.h>
14 #include <linux/uuid.h>
15
16 struct badrange_entry {
17 u64 start;
18 u64 length;
19 struct list_head list;
20 };
21
22 struct badrange {
23 struct list_head list;
24 spinlock_t lock;
25 };
26
27 enum {
28 /* unarmed memory devices may not persist writes */
29 NDD_UNARMED = 1,
30 /* locked memory devices should not be accessed */
31 NDD_LOCKED = 2,
32 /* memory under security wipes should not be accessed */
33 NDD_SECURITY_OVERWRITE = 3,
34 /* tracking whether or not there is a pending device reference */
35 NDD_WORK_PENDING = 4,
36 /* dimm supports namespace labels */
37 NDD_LABELING = 6,
38 /*
39 * dimm contents have changed requiring invalidation of CPU caches prior
40 * to activation of a region that includes this device
41 */
42 NDD_INCOHERENT = 7,
43
44 /* dimm provider wants synchronous registration by __nvdimm_create() */
45 NDD_REGISTER_SYNC = 8,
46
47 /* need to set a limit somewhere, but yes, this is likely overkill */
48 ND_IOCTL_MAX_BUFLEN = SZ_4M,
49 ND_CMD_MAX_ELEM = 5,
50 ND_CMD_MAX_ENVELOPE = 256,
51 ND_MAX_MAPPINGS = 32,
52
53 /* region flag indicating to direct-map persistent memory by default */
54 ND_REGION_PAGEMAP = 0,
55 /*
56 * Platform ensures entire CPU store data path is flushed to pmem on
57 * system power loss.
58 */
59 ND_REGION_PERSIST_CACHE = 1,
60 /*
61 * Platform provides mechanisms to automatically flush outstanding
62 * write data from memory controler to pmem on system power loss.
63 * (ADR)
64 */
65 ND_REGION_PERSIST_MEMCTRL = 2,
66
67 /* Platform provides asynchronous flush mechanism */
68 ND_REGION_ASYNC = 3,
69
70 /* Region was created by CXL subsystem */
71 ND_REGION_CXL = 4,
72
73 /* mark newly adjusted resources as requiring a label update */
74 DPA_RESOURCE_ADJUSTED = 1 << 0,
75 };
76
77 struct nvdimm;
78 struct nvdimm_bus_descriptor;
79 typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc,
80 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
81 unsigned int buf_len, int *cmd_rc);
82
83 struct attribute_group;
84 struct device_node;
85 struct module;
86 struct nvdimm_bus_descriptor {
87 const struct attribute_group **attr_groups;
88 unsigned long cmd_mask;
89 unsigned long dimm_family_mask;
90 unsigned long bus_family_mask;
91 struct module *module;
92 char *provider_name;
93 struct device_node *of_node;
94 ndctl_fn ndctl;
95 int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc);
96 int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc,
97 struct nvdimm *nvdimm, unsigned int cmd, void *data);
98 const struct nvdimm_bus_fw_ops *fw_ops;
99 };
100
101 struct nd_cmd_desc {
102 int in_num;
103 int out_num;
104 u32 in_sizes[ND_CMD_MAX_ELEM];
105 int out_sizes[ND_CMD_MAX_ELEM];
106 };
107
108 struct nd_interleave_set {
109 /* v1.1 definition of the interleave-set-cookie algorithm */
110 u64 cookie1;
111 /* v1.2 definition of the interleave-set-cookie algorithm */
112 u64 cookie2;
113 /* compatibility with initial buggy Linux implementation */
114 u64 altcookie;
115
116 guid_t type_guid;
117 };
118
119 struct nd_mapping_desc {
120 struct nvdimm *nvdimm;
121 u64 start;
122 u64 size;
123 int position;
124 };
125
126 struct bio;
127 struct resource;
128 struct nd_region;
129
130 /*
131 * Provider flush callback return values:
132 * 0: flush completed synchronously
133 * <0: flush failed
134 * >0: flush completion was queued and @bio will be completed later
135 */
136 #define NVDIMM_FLUSH_ASYNC 1
137
138 struct nd_region_desc {
139 struct resource *res;
140 struct nd_mapping_desc *mapping;
141 u16 num_mappings;
142 const struct attribute_group **attr_groups;
143 struct nd_interleave_set *nd_set;
144 void *provider_data;
145 int num_lanes;
146 int numa_node;
147 int target_node;
148 unsigned long flags;
149 int memregion;
150 struct device_node *of_node;
151 int (*flush)(struct nd_region *nd_region, struct bio *bio);
152 };
153
154 struct device;
155 void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset,
156 size_t size, unsigned long flags);
devm_nvdimm_ioremap(struct device * dev,resource_size_t offset,size_t size)157 static inline void __iomem *devm_nvdimm_ioremap(struct device *dev,
158 resource_size_t offset, size_t size)
159 {
160 return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0);
161 }
162
163 /*
164 * Note that separate bits for locked + unlocked are defined so that
165 * 'flags == 0' corresponds to an error / not-supported state.
166 */
167 enum nvdimm_security_bits {
168 NVDIMM_SECURITY_DISABLED,
169 NVDIMM_SECURITY_UNLOCKED,
170 NVDIMM_SECURITY_LOCKED,
171 NVDIMM_SECURITY_FROZEN,
172 NVDIMM_SECURITY_OVERWRITE,
173 };
174
175 #define NVDIMM_PASSPHRASE_LEN 32
176 #define NVDIMM_KEY_DESC_LEN 22
177
178 struct nvdimm_key_data {
179 u8 data[NVDIMM_PASSPHRASE_LEN];
180 };
181
182 enum nvdimm_passphrase_type {
183 NVDIMM_USER,
184 NVDIMM_MASTER,
185 };
186
187 struct nvdimm_security_ops {
188 unsigned long (*get_flags)(struct nvdimm *nvdimm,
189 enum nvdimm_passphrase_type pass_type);
190 int (*freeze)(struct nvdimm *nvdimm);
191 int (*change_key)(struct nvdimm *nvdimm,
192 const struct nvdimm_key_data *old_data,
193 const struct nvdimm_key_data *new_data,
194 enum nvdimm_passphrase_type pass_type);
195 int (*unlock)(struct nvdimm *nvdimm,
196 const struct nvdimm_key_data *key_data);
197 int (*disable)(struct nvdimm *nvdimm,
198 const struct nvdimm_key_data *key_data);
199 int (*erase)(struct nvdimm *nvdimm,
200 const struct nvdimm_key_data *key_data,
201 enum nvdimm_passphrase_type pass_type);
202 int (*overwrite)(struct nvdimm *nvdimm,
203 const struct nvdimm_key_data *key_data);
204 int (*query_overwrite)(struct nvdimm *nvdimm);
205 int (*disable_master)(struct nvdimm *nvdimm,
206 const struct nvdimm_key_data *key_data);
207 };
208
209 enum nvdimm_fwa_state {
210 NVDIMM_FWA_INVALID,
211 NVDIMM_FWA_IDLE,
212 NVDIMM_FWA_ARMED,
213 NVDIMM_FWA_BUSY,
214 NVDIMM_FWA_ARM_OVERFLOW,
215 };
216
217 enum nvdimm_fwa_trigger {
218 NVDIMM_FWA_ARM,
219 NVDIMM_FWA_DISARM,
220 };
221
222 enum nvdimm_fwa_capability {
223 NVDIMM_FWA_CAP_INVALID,
224 NVDIMM_FWA_CAP_NONE,
225 NVDIMM_FWA_CAP_QUIESCE,
226 NVDIMM_FWA_CAP_LIVE,
227 };
228
229 enum nvdimm_fwa_result {
230 NVDIMM_FWA_RESULT_INVALID,
231 NVDIMM_FWA_RESULT_NONE,
232 NVDIMM_FWA_RESULT_SUCCESS,
233 NVDIMM_FWA_RESULT_NOTSTAGED,
234 NVDIMM_FWA_RESULT_NEEDRESET,
235 NVDIMM_FWA_RESULT_FAIL,
236 };
237
238 struct nvdimm_bus_fw_ops {
239 enum nvdimm_fwa_state (*activate_state)
240 (struct nvdimm_bus_descriptor *nd_desc);
241 enum nvdimm_fwa_capability (*capability)
242 (struct nvdimm_bus_descriptor *nd_desc);
243 int (*activate)(struct nvdimm_bus_descriptor *nd_desc);
244 };
245
246 struct nvdimm_fw_ops {
247 enum nvdimm_fwa_state (*activate_state)(struct nvdimm *nvdimm);
248 enum nvdimm_fwa_result (*activate_result)(struct nvdimm *nvdimm);
249 int (*arm)(struct nvdimm *nvdimm, enum nvdimm_fwa_trigger arg);
250 };
251
252 struct kobject;
253 struct nvdimm_bus;
254
255 void badrange_init(struct badrange *badrange);
256 int badrange_add(struct badrange *badrange, u64 addr, u64 length);
257 void badrange_forget(struct badrange *badrange, phys_addr_t start,
258 unsigned int len);
259 int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr,
260 u64 length);
261 struct nvdimm_bus *nvdimm_bus_register(struct device *parent,
262 struct nvdimm_bus_descriptor *nfit_desc);
263 void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus);
264 struct nvdimm_bus *to_nvdimm_bus(struct device *dev);
265 struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm);
266 struct nvdimm *to_nvdimm(struct device *dev);
267 struct nd_region *to_nd_region(struct device *dev);
268 struct device *nd_region_dev(struct nd_region *nd_region);
269 struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus);
270 struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus);
271 const char *nvdimm_name(struct nvdimm *nvdimm);
272 struct kobject *nvdimm_kobj(struct nvdimm *nvdimm);
273 unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm);
274 void *nvdimm_provider_data(struct nvdimm *nvdimm);
275 struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus,
276 void *provider_data, const struct attribute_group **groups,
277 unsigned long flags, unsigned long cmd_mask, int num_flush,
278 struct resource *flush_wpq, const char *dimm_id,
279 const struct nvdimm_security_ops *sec_ops,
280 const struct nvdimm_fw_ops *fw_ops);
nvdimm_create(struct nvdimm_bus * nvdimm_bus,void * provider_data,const struct attribute_group ** groups,unsigned long flags,unsigned long cmd_mask,int num_flush,struct resource * flush_wpq)281 static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus,
282 void *provider_data, const struct attribute_group **groups,
283 unsigned long flags, unsigned long cmd_mask, int num_flush,
284 struct resource *flush_wpq)
285 {
286 return __nvdimm_create(nvdimm_bus, provider_data, groups, flags,
287 cmd_mask, num_flush, flush_wpq, NULL, NULL, NULL);
288 }
289 void nvdimm_delete(struct nvdimm *nvdimm);
290 void nvdimm_region_delete(struct nd_region *nd_region);
291
292 const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd);
293 const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd);
294 u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd,
295 const struct nd_cmd_desc *desc, int idx, void *buf);
296 u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd,
297 const struct nd_cmd_desc *desc, int idx, const u32 *in_field,
298 const u32 *out_field, unsigned long remainder);
299 int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count);
300 struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
301 struct nd_region_desc *ndr_desc);
302 struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
303 struct nd_region_desc *ndr_desc);
304 struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
305 struct nd_region_desc *ndr_desc);
306 void *nd_region_provider_data(struct nd_region *nd_region);
307 unsigned int nd_region_acquire_lane(struct nd_region *nd_region);
308 void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane);
309 u64 nd_fletcher64(void *addr, size_t len, bool le);
310 int nvdimm_flush(struct nd_region *nd_region, struct bio *bio);
311 int generic_nvdimm_flush(struct nd_region *nd_region);
312 int nvdimm_has_flush(struct nd_region *nd_region);
313 int nvdimm_has_cache(struct nd_region *nd_region);
314 int nvdimm_in_overwrite(struct nvdimm *nvdimm);
315 bool is_nvdimm_sync(struct nd_region *nd_region);
316
nvdimm_ctl(struct nvdimm * nvdimm,unsigned int cmd,void * buf,unsigned int buf_len,int * cmd_rc)317 static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf,
318 unsigned int buf_len, int *cmd_rc)
319 {
320 struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm);
321 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
322
323 return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc);
324 }
325
326 #ifdef CONFIG_ARCH_HAS_PMEM_API
327 #define ARCH_MEMREMAP_PMEM MEMREMAP_WB
328 void arch_wb_cache_pmem(void *addr, size_t size);
329 void arch_invalidate_pmem(void *addr, size_t size);
330 #else
331 #define ARCH_MEMREMAP_PMEM MEMREMAP_WT
arch_wb_cache_pmem(void * addr,size_t size)332 static inline void arch_wb_cache_pmem(void *addr, size_t size)
333 {
334 }
arch_invalidate_pmem(void * addr,size_t size)335 static inline void arch_invalidate_pmem(void *addr, size_t size)
336 {
337 }
338 #endif
339
340 #endif /* __LIBNVDIMM_H__ */
341