1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * VMX control MSR test
4 *
5 * Copyright (C) 2022 Google LLC.
6 *
7 * Tests for KVM ownership of bits in the VMX entry/exit control MSRs. Checks
8 * that KVM will set owned bits where appropriate, and will not if
9 * KVM_X86_QUIRK_TWEAK_VMX_CTRL_MSRS is disabled.
10 */
11 #include <linux/bitmap.h>
12 #include "kvm_util.h"
13 #include "vmx.h"
14
vmx_fixed1_msr_test(struct kvm_vcpu * vcpu,u32 msr_index,u64 mask)15 static void vmx_fixed1_msr_test(struct kvm_vcpu *vcpu, u32 msr_index, u64 mask)
16 {
17 u64 val = vcpu_get_msr(vcpu, msr_index);
18 u64 bit;
19
20 mask &= val;
21
22 for_each_set_bit(bit, &mask, 64) {
23 vcpu_set_msr(vcpu, msr_index, val & ~BIT_ULL(bit));
24 vcpu_set_msr(vcpu, msr_index, val);
25 }
26 }
27
vmx_fixed0_msr_test(struct kvm_vcpu * vcpu,u32 msr_index,u64 mask)28 static void vmx_fixed0_msr_test(struct kvm_vcpu *vcpu, u32 msr_index, u64 mask)
29 {
30 u64 val = vcpu_get_msr(vcpu, msr_index);
31 u64 bit;
32
33 mask = ~mask | val;
34
35 for_each_clear_bit(bit, &mask, 64) {
36 vcpu_set_msr(vcpu, msr_index, val | BIT_ULL(bit));
37 vcpu_set_msr(vcpu, msr_index, val);
38 }
39 }
40
vmx_fixed0and1_msr_test(struct kvm_vcpu * vcpu,u32 msr_index)41 static void vmx_fixed0and1_msr_test(struct kvm_vcpu *vcpu, u32 msr_index)
42 {
43 vmx_fixed0_msr_test(vcpu, msr_index, GENMASK_ULL(31, 0));
44 vmx_fixed1_msr_test(vcpu, msr_index, GENMASK_ULL(63, 32));
45 }
46
vmx_save_restore_msrs_test(struct kvm_vcpu * vcpu)47 static void vmx_save_restore_msrs_test(struct kvm_vcpu *vcpu)
48 {
49 vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, 0);
50 vcpu_set_msr(vcpu, MSR_IA32_VMX_VMCS_ENUM, -1ull);
51
52 vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_BASIC,
53 BIT_ULL(49) | BIT_ULL(54) | BIT_ULL(55));
54
55 vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_MISC,
56 BIT_ULL(5) | GENMASK_ULL(8, 6) | BIT_ULL(14) |
57 BIT_ULL(15) | BIT_ULL(28) | BIT_ULL(29) | BIT_ULL(30));
58
59 vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_PROCBASED_CTLS2);
60 vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_EPT_VPID_CAP, -1ull);
61 vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_PINBASED_CTLS);
62 vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_PROCBASED_CTLS);
63 vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_EXIT_CTLS);
64 vmx_fixed0and1_msr_test(vcpu, MSR_IA32_VMX_TRUE_ENTRY_CTLS);
65 vmx_fixed1_msr_test(vcpu, MSR_IA32_VMX_VMFUNC, -1ull);
66 }
67
__ia32_feature_control_msr_test(struct kvm_vcpu * vcpu,u64 msr_bit,struct kvm_x86_cpu_feature feature)68 static void __ia32_feature_control_msr_test(struct kvm_vcpu *vcpu,
69 u64 msr_bit,
70 struct kvm_x86_cpu_feature feature)
71 {
72 u64 val;
73
74 vcpu_clear_cpuid_feature(vcpu, feature);
75
76 val = vcpu_get_msr(vcpu, MSR_IA32_FEAT_CTL);
77 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED);
78 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, (val & ~msr_bit) | FEAT_CTL_LOCKED);
79 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val | msr_bit | FEAT_CTL_LOCKED);
80 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, (val & ~msr_bit) | FEAT_CTL_LOCKED);
81 vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, val);
82
83 if (!kvm_cpu_has(feature))
84 return;
85
86 vcpu_set_cpuid_feature(vcpu, feature);
87 }
88
ia32_feature_control_msr_test(struct kvm_vcpu * vcpu)89 static void ia32_feature_control_msr_test(struct kvm_vcpu *vcpu)
90 {
91 u64 supported_bits = FEAT_CTL_LOCKED |
92 FEAT_CTL_VMX_ENABLED_INSIDE_SMX |
93 FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX |
94 FEAT_CTL_SGX_LC_ENABLED |
95 FEAT_CTL_SGX_ENABLED |
96 FEAT_CTL_LMCE_ENABLED;
97 int bit, r;
98
99 __ia32_feature_control_msr_test(vcpu, FEAT_CTL_VMX_ENABLED_INSIDE_SMX, X86_FEATURE_SMX);
100 __ia32_feature_control_msr_test(vcpu, FEAT_CTL_VMX_ENABLED_INSIDE_SMX, X86_FEATURE_VMX);
101 __ia32_feature_control_msr_test(vcpu, FEAT_CTL_VMX_ENABLED_OUTSIDE_SMX, X86_FEATURE_VMX);
102 __ia32_feature_control_msr_test(vcpu, FEAT_CTL_SGX_LC_ENABLED, X86_FEATURE_SGX_LC);
103 __ia32_feature_control_msr_test(vcpu, FEAT_CTL_SGX_LC_ENABLED, X86_FEATURE_SGX);
104 __ia32_feature_control_msr_test(vcpu, FEAT_CTL_SGX_ENABLED, X86_FEATURE_SGX);
105 __ia32_feature_control_msr_test(vcpu, FEAT_CTL_LMCE_ENABLED, X86_FEATURE_MCE);
106
107 for_each_clear_bit(bit, &supported_bits, 64) {
108 r = _vcpu_set_msr(vcpu, MSR_IA32_FEAT_CTL, BIT(bit));
109 TEST_ASSERT(r == 0,
110 "Setting reserved bit %d in IA32_FEATURE_CONTROL should fail", bit);
111 }
112 }
113
main(void)114 int main(void)
115 {
116 struct kvm_vcpu *vcpu;
117 struct kvm_vm *vm;
118
119 TEST_REQUIRE(kvm_has_cap(KVM_CAP_DISABLE_QUIRKS2));
120 TEST_REQUIRE(kvm_cpu_has(X86_FEATURE_VMX));
121
122 /* No need to actually do KVM_RUN, thus no guest code. */
123 vm = vm_create_with_one_vcpu(&vcpu, NULL);
124
125 vmx_save_restore_msrs_test(vcpu);
126 ia32_feature_control_msr_test(vcpu);
127
128 kvm_vm_free(vm);
129 }
130