1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 */
4
5 /*
6 * 2002-07 Benny Sjostrand benny@hostmobility.com
7 */
8
9
10 #include <linux/io.h>
11 #include <linux/delay.h>
12 #include <linux/pm.h>
13 #include <linux/init.h>
14 #include <linux/slab.h>
15 #include <linux/vmalloc.h>
16 #include <linux/mutex.h>
17
18 #include <sound/core.h>
19 #include <sound/control.h>
20 #include <sound/info.h>
21 #include <sound/asoundef.h>
22 #include "cs46xx.h"
23
24 #include "cs46xx_lib.h"
25 #include "dsp_spos.h"
26
27 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
28 struct dsp_scb_descriptor * fg_entry);
29
30 static const enum wide_opcode wide_opcodes[] = {
31 WIDE_FOR_BEGIN_LOOP,
32 WIDE_FOR_BEGIN_LOOP2,
33 WIDE_COND_GOTO_ADDR,
34 WIDE_COND_GOTO_CALL,
35 WIDE_TBEQ_COND_GOTO_ADDR,
36 WIDE_TBEQ_COND_CALL_ADDR,
37 WIDE_TBEQ_NCOND_GOTO_ADDR,
38 WIDE_TBEQ_NCOND_CALL_ADDR,
39 WIDE_TBEQ_COND_GOTO1_ADDR,
40 WIDE_TBEQ_COND_CALL1_ADDR,
41 WIDE_TBEQ_NCOND_GOTOI_ADDR,
42 WIDE_TBEQ_NCOND_CALL1_ADDR
43 };
44
shadow_and_reallocate_code(struct snd_cs46xx * chip,u32 * data,u32 size,u32 overlay_begin_address)45 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
46 u32 overlay_begin_address)
47 {
48 unsigned int i = 0, j, nreallocated = 0;
49 u32 hival,loval,address;
50 u32 mop_operands,mop_type,wide_op;
51 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
52
53 if (snd_BUG_ON(size %2))
54 return -EINVAL;
55
56 while (i < size) {
57 loval = data[i++];
58 hival = data[i++];
59
60 if (ins->code.offset > 0) {
61 mop_operands = (hival >> 6) & 0x03fff;
62 mop_type = mop_operands >> 10;
63
64 /* check for wide type instruction */
65 if (mop_type == 0 &&
66 (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
67 (mop_operands & WIDE_INSTR_MASK) != 0) {
68 wide_op = loval & 0x7f;
69 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
70 if (wide_opcodes[j] == wide_op) {
71 /* need to reallocate instruction */
72 address = (hival & 0x00FFF) << 5;
73 address |= loval >> 15;
74
75 dev_dbg(chip->card->dev,
76 "handle_wideop[1]: %05x:%05x addr %04x\n",
77 hival, loval, address);
78
79 if ( !(address & 0x8000) ) {
80 address += (ins->code.offset / 2) - overlay_begin_address;
81 } else {
82 dev_dbg(chip->card->dev,
83 "handle_wideop[1]: ROM symbol not reallocated\n");
84 }
85
86 hival &= 0xFF000;
87 loval &= 0x07FFF;
88
89 hival |= ( (address >> 5) & 0x00FFF);
90 loval |= ( (address << 15) & 0xF8000);
91
92 address = (hival & 0x00FFF) << 5;
93 address |= loval >> 15;
94
95 dev_dbg(chip->card->dev,
96 "handle_wideop:[2] %05x:%05x addr %04x\n",
97 hival, loval, address);
98 nreallocated++;
99 } /* wide_opcodes[j] == wide_op */
100 } /* for */
101 } /* mod_type == 0 ... */
102 } /* ins->code.offset > 0 */
103
104 ins->code.data[ins->code.size++] = loval;
105 ins->code.data[ins->code.size++] = hival;
106 }
107
108 dev_dbg(chip->card->dev,
109 "dsp_spos: %d instructions reallocated\n", nreallocated);
110 return nreallocated;
111 }
112
get_segment_desc(struct dsp_module_desc * module,int seg_type)113 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
114 {
115 int i;
116 for (i = 0;i < module->nsegments; ++i) {
117 if (module->segments[i].segment_type == seg_type) {
118 return (module->segments + i);
119 }
120 }
121
122 return NULL;
123 };
124
find_free_symbol_index(struct dsp_spos_instance * ins)125 static int find_free_symbol_index (struct dsp_spos_instance * ins)
126 {
127 int index = ins->symbol_table.nsymbols,i;
128
129 for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
130 if (ins->symbol_table.symbols[i].deleted) {
131 index = i;
132 break;
133 }
134 }
135
136 return index;
137 }
138
add_symbols(struct snd_cs46xx * chip,struct dsp_module_desc * module)139 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
140 {
141 int i;
142 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
143
144 if (module->symbol_table.nsymbols > 0) {
145 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
146 module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
147 module->overlay_begin_address = module->symbol_table.symbols[0].address;
148 }
149 }
150
151 for (i = 0;i < module->symbol_table.nsymbols; ++i) {
152 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
153 dev_err(chip->card->dev,
154 "dsp_spos: symbol table is full\n");
155 return -ENOMEM;
156 }
157
158
159 if (cs46xx_dsp_lookup_symbol(chip,
160 module->symbol_table.symbols[i].symbol_name,
161 module->symbol_table.symbols[i].symbol_type) == NULL) {
162
163 ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
164 ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
165 ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
166 ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
167
168 if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
169 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
170
171 ins->symbol_table.nsymbols++;
172 } else {
173 #if 0
174 dev_dbg(chip->card->dev,
175 "dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
176 module->symbol_table.symbols[i].symbol_name); */
177 #endif
178 }
179 }
180
181 return 0;
182 }
183
184 static struct dsp_symbol_entry *
add_symbol(struct snd_cs46xx * chip,char * symbol_name,u32 address,int type)185 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
186 {
187 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
188 struct dsp_symbol_entry * symbol = NULL;
189 int index;
190
191 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
192 dev_err(chip->card->dev, "dsp_spos: symbol table is full\n");
193 return NULL;
194 }
195
196 if (cs46xx_dsp_lookup_symbol(chip,
197 symbol_name,
198 type) != NULL) {
199 dev_err(chip->card->dev,
200 "dsp_spos: symbol <%s> duplicated\n", symbol_name);
201 return NULL;
202 }
203
204 index = find_free_symbol_index (ins);
205
206 strscpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
207 ins->symbol_table.symbols[index].address = address;
208 ins->symbol_table.symbols[index].symbol_type = type;
209 ins->symbol_table.symbols[index].module = NULL;
210 ins->symbol_table.symbols[index].deleted = 0;
211 symbol = (ins->symbol_table.symbols + index);
212
213 if (index > ins->symbol_table.highest_frag_index)
214 ins->symbol_table.highest_frag_index = index;
215
216 if (index == ins->symbol_table.nsymbols)
217 ins->symbol_table.nsymbols++; /* no frag. in list */
218
219 return symbol;
220 }
221
cs46xx_dsp_spos_create(struct snd_cs46xx * chip)222 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
223 {
224 struct dsp_spos_instance * ins = kzalloc_obj(struct dsp_spos_instance);
225
226 if (ins == NULL)
227 return NULL;
228
229 /* better to use vmalloc for this big table */
230 ins->symbol_table.symbols =
231 vmalloc(array_size(DSP_MAX_SYMBOLS,
232 sizeof(struct dsp_symbol_entry)));
233 ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
234 ins->modules = kmalloc_objs(struct dsp_module_desc, DSP_MAX_MODULES);
235 if (!ins->symbol_table.symbols || !ins->code.data || !ins->modules) {
236 cs46xx_dsp_spos_destroy(chip);
237 goto error;
238 }
239 ins->symbol_table.nsymbols = 0;
240 ins->symbol_table.highest_frag_index = 0;
241 ins->code.offset = 0;
242 ins->code.size = 0;
243 ins->nscb = 0;
244 ins->ntask = 0;
245 ins->nmodules = 0;
246
247 /* default SPDIF input sample rate
248 to 48000 khz */
249 ins->spdif_in_sample_rate = 48000;
250
251 /* maximize volume */
252 ins->dac_volume_right = 0x8000;
253 ins->dac_volume_left = 0x8000;
254 ins->spdif_input_volume_right = 0x8000;
255 ins->spdif_input_volume_left = 0x8000;
256
257 /* set left and right validity bits and
258 default channel status */
259 ins->spdif_csuv_default =
260 ins->spdif_csuv_stream =
261 /* byte 0 */ ((unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF & 0xff)) << 24) |
262 /* byte 1 */ ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
263 /* byte 3 */ (unsigned int)_wrap_all_bits( (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
264 /* left and right validity bits */ (1 << 13) | (1 << 12);
265
266 return ins;
267
268 error:
269 kfree(ins->modules);
270 kfree(ins->code.data);
271 vfree(ins->symbol_table.symbols);
272 kfree(ins);
273 return NULL;
274 }
275
cs46xx_dsp_spos_destroy(struct snd_cs46xx * chip)276 void cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
277 {
278 int i;
279 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
280
281 if (snd_BUG_ON(!ins))
282 return;
283
284 guard(mutex)(&chip->spos_mutex);
285 for (i = 0; i < ins->nscb; ++i) {
286 if (ins->scbs[i].deleted) continue;
287
288 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
289 #ifdef CONFIG_PM_SLEEP
290 kfree(ins->scbs[i].data);
291 #endif
292 }
293
294 kfree(ins->code.data);
295 vfree(ins->symbol_table.symbols);
296 kfree(ins->modules);
297 kfree(ins);
298 }
299
dsp_load_parameter(struct snd_cs46xx * chip,struct dsp_segment_desc * parameter)300 static int dsp_load_parameter(struct snd_cs46xx *chip,
301 struct dsp_segment_desc *parameter)
302 {
303 u32 doffset, dsize;
304
305 if (!parameter) {
306 dev_dbg(chip->card->dev,
307 "dsp_spos: module got no parameter segment\n");
308 return 0;
309 }
310
311 doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
312 dsize = parameter->size * 4;
313
314 dev_dbg(chip->card->dev,
315 "dsp_spos: downloading parameter data to chip (%08x-%08x)\n",
316 doffset,doffset + dsize);
317 if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
318 dev_err(chip->card->dev,
319 "dsp_spos: failed to download parameter data to DSP\n");
320 return -EINVAL;
321 }
322 return 0;
323 }
324
dsp_load_sample(struct snd_cs46xx * chip,struct dsp_segment_desc * sample)325 static int dsp_load_sample(struct snd_cs46xx *chip,
326 struct dsp_segment_desc *sample)
327 {
328 u32 doffset, dsize;
329
330 if (!sample) {
331 dev_dbg(chip->card->dev,
332 "dsp_spos: module got no sample segment\n");
333 return 0;
334 }
335
336 doffset = (sample->offset * 4 + DSP_SAMPLE_BYTE_OFFSET);
337 dsize = sample->size * 4;
338
339 dev_dbg(chip->card->dev,
340 "dsp_spos: downloading sample data to chip (%08x-%08x)\n",
341 doffset,doffset + dsize);
342
343 if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
344 dev_err(chip->card->dev,
345 "dsp_spos: failed to sample data to DSP\n");
346 return -EINVAL;
347 }
348 return 0;
349 }
350
cs46xx_dsp_load_module(struct snd_cs46xx * chip,struct dsp_module_desc * module)351 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
352 {
353 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
354 struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
355 u32 doffset, dsize;
356 int err;
357
358 if (ins->nmodules == DSP_MAX_MODULES - 1) {
359 dev_err(chip->card->dev,
360 "dsp_spos: to many modules loaded into DSP\n");
361 return -ENOMEM;
362 }
363
364 dev_dbg(chip->card->dev,
365 "dsp_spos: loading module %s into DSP\n", module->module_name);
366
367 if (ins->nmodules == 0) {
368 dev_dbg(chip->card->dev, "dsp_spos: clearing parameter area\n");
369 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
370 }
371
372 err = dsp_load_parameter(chip, get_segment_desc(module,
373 SEGTYPE_SP_PARAMETER));
374 if (err < 0)
375 return err;
376
377 if (ins->nmodules == 0) {
378 dev_dbg(chip->card->dev, "dsp_spos: clearing sample area\n");
379 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
380 }
381
382 err = dsp_load_sample(chip, get_segment_desc(module,
383 SEGTYPE_SP_SAMPLE));
384 if (err < 0)
385 return err;
386
387 if (ins->nmodules == 0) {
388 dev_dbg(chip->card->dev, "dsp_spos: clearing code area\n");
389 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
390 }
391
392 if (code == NULL) {
393 dev_dbg(chip->card->dev,
394 "dsp_spos: module got no code segment\n");
395 } else {
396 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
397 dev_err(chip->card->dev,
398 "dsp_spos: no space available in DSP\n");
399 return -ENOMEM;
400 }
401
402 module->load_address = ins->code.offset;
403 module->overlay_begin_address = 0x000;
404
405 /* if module has a code segment it must have
406 symbol table */
407 if (snd_BUG_ON(!module->symbol_table.symbols))
408 return -ENOMEM;
409 if (add_symbols(chip,module)) {
410 dev_err(chip->card->dev,
411 "dsp_spos: failed to load symbol table\n");
412 return -ENOMEM;
413 }
414
415 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
416 dsize = code->size * 4;
417 dev_dbg(chip->card->dev,
418 "dsp_spos: downloading code to chip (%08x-%08x)\n",
419 doffset,doffset + dsize);
420
421 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
422
423 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
424 dev_err(chip->card->dev,
425 "dsp_spos: failed to download code to DSP\n");
426 return -EINVAL;
427 }
428
429 ins->code.offset += code->size;
430 }
431
432 /* NOTE: module segments and symbol table must be
433 statically allocated. Case that module data is
434 not generated by the ospparser */
435 ins->modules[ins->nmodules] = *module;
436 ins->nmodules++;
437
438 return 0;
439 }
440
441 struct dsp_symbol_entry *
cs46xx_dsp_lookup_symbol(struct snd_cs46xx * chip,char * symbol_name,int symbol_type)442 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
443 {
444 int i;
445 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
446
447 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
448
449 if (ins->symbol_table.symbols[i].deleted)
450 continue;
451
452 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
453 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
454 return (ins->symbol_table.symbols + i);
455 }
456 }
457
458 #if 0
459 dev_err(chip->card->dev, "dsp_spos: symbol <%s> type %02x not found\n",
460 symbol_name,symbol_type);
461 #endif
462
463 return NULL;
464 }
465
466
467 #ifdef CONFIG_SND_PROC_FS
468 static struct dsp_symbol_entry *
cs46xx_dsp_lookup_symbol_addr(struct snd_cs46xx * chip,u32 address,int symbol_type)469 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
470 {
471 int i;
472 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
473
474 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
475
476 if (ins->symbol_table.symbols[i].deleted)
477 continue;
478
479 if (ins->symbol_table.symbols[i].address == address &&
480 ins->symbol_table.symbols[i].symbol_type == symbol_type) {
481 return (ins->symbol_table.symbols + i);
482 }
483 }
484
485
486 return NULL;
487 }
488
489
cs46xx_dsp_proc_symbol_table_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)490 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
491 struct snd_info_buffer *buffer)
492 {
493 struct snd_cs46xx *chip = entry->private_data;
494 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
495 int i;
496
497 snd_iprintf(buffer, "SYMBOLS:\n");
498 for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
499 char *module_str = "system";
500
501 if (ins->symbol_table.symbols[i].deleted)
502 continue;
503
504 if (ins->symbol_table.symbols[i].module != NULL) {
505 module_str = ins->symbol_table.symbols[i].module->module_name;
506 }
507
508
509 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
510 ins->symbol_table.symbols[i].address,
511 ins->symbol_table.symbols[i].symbol_type,
512 ins->symbol_table.symbols[i].symbol_name,
513 module_str);
514 }
515 }
516
517
cs46xx_dsp_proc_modules_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)518 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
519 struct snd_info_buffer *buffer)
520 {
521 struct snd_cs46xx *chip = entry->private_data;
522 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
523 int i,j;
524
525 guard(mutex)(&chip->spos_mutex);
526 snd_iprintf(buffer, "MODULES:\n");
527 for ( i = 0; i < ins->nmodules; ++i ) {
528 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
529 snd_iprintf(buffer, " %d symbols\n", ins->modules[i].symbol_table.nsymbols);
530 snd_iprintf(buffer, " %d fixups\n", ins->modules[i].nfixups);
531
532 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
533 struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
534 snd_iprintf(buffer, " segment %02x offset %08x size %08x\n",
535 desc->segment_type,desc->offset, desc->size);
536 }
537 }
538 }
539
cs46xx_dsp_proc_task_tree_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)540 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
541 struct snd_info_buffer *buffer)
542 {
543 struct snd_cs46xx *chip = entry->private_data;
544 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
545 int i, j, col;
546 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
547
548 guard(mutex)(&chip->spos_mutex);
549 snd_iprintf(buffer, "TASK TREES:\n");
550 for ( i = 0; i < ins->ntask; ++i) {
551 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
552
553 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
554 u32 val;
555 if (col == 4) {
556 snd_iprintf(buffer,"\n");
557 col = 0;
558 }
559 val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
560 snd_iprintf(buffer,"%08x ",val);
561 }
562 }
563
564 snd_iprintf(buffer,"\n");
565 }
566
cs46xx_dsp_proc_scb_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)567 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
568 struct snd_info_buffer *buffer)
569 {
570 struct snd_cs46xx *chip = entry->private_data;
571 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
572 int i;
573
574 guard(mutex)(&chip->spos_mutex);
575 snd_iprintf(buffer, "SCB's:\n");
576 for ( i = 0; i < ins->nscb; ++i) {
577 if (ins->scbs[i].deleted)
578 continue;
579 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
580
581 if (ins->scbs[i].parent_scb_ptr != NULL) {
582 snd_iprintf(buffer,"parent [%s:%04x] ",
583 ins->scbs[i].parent_scb_ptr->scb_name,
584 ins->scbs[i].parent_scb_ptr->address);
585 } else snd_iprintf(buffer,"parent [none] ");
586
587 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x] task_entry [%s:%04x]\n",
588 ins->scbs[i].sub_list_ptr->scb_name,
589 ins->scbs[i].sub_list_ptr->address,
590 ins->scbs[i].next_scb_ptr->scb_name,
591 ins->scbs[i].next_scb_ptr->address,
592 ins->scbs[i].task_entry->symbol_name,
593 ins->scbs[i].task_entry->address);
594 }
595
596 snd_iprintf(buffer,"\n");
597 }
598
cs46xx_dsp_proc_parameter_dump_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)599 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
600 struct snd_info_buffer *buffer)
601 {
602 struct snd_cs46xx *chip = entry->private_data;
603 /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
604 unsigned int i, col = 0;
605 void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
606 struct dsp_symbol_entry * symbol;
607
608 for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
609 if (col == 4) {
610 snd_iprintf(buffer,"\n");
611 col = 0;
612 }
613
614 symbol = cs46xx_dsp_lookup_symbol_addr(chip, i / sizeof(u32), SYMBOL_PARAMETER);
615 if (symbol) {
616 col = 0;
617 snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
618 }
619
620 if (col == 0) {
621 snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
622 }
623
624 snd_iprintf(buffer,"%08X ",readl(dst + i));
625 }
626 }
627
cs46xx_dsp_proc_sample_dump_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)628 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
629 struct snd_info_buffer *buffer)
630 {
631 struct snd_cs46xx *chip = entry->private_data;
632 int i,col = 0;
633 void __iomem *dst = chip->region.idx[2].remap_addr;
634
635 snd_iprintf(buffer,"PCMREADER:\n");
636 for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
637 if (col == 4) {
638 snd_iprintf(buffer,"\n");
639 col = 0;
640 }
641
642 if (col == 0) {
643 snd_iprintf(buffer, "%04X ",i);
644 }
645
646 snd_iprintf(buffer,"%08X ",readl(dst + i));
647 }
648
649 snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
650
651 col = 0;
652 for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
653 if (col == 4) {
654 snd_iprintf(buffer,"\n");
655 col = 0;
656 }
657
658 if (col == 0) {
659 snd_iprintf(buffer, "%04X ",i);
660 }
661
662 snd_iprintf(buffer,"%08X ",readl(dst + i));
663 }
664
665 snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
666 col = 0;
667 for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
668 if (col == 4) {
669 snd_iprintf(buffer,"\n");
670 col = 0;
671 }
672
673 if (col == 0) {
674 snd_iprintf(buffer, "%04X ",i);
675 }
676
677 snd_iprintf(buffer,"%08X ",readl(dst + i));
678 }
679
680
681 snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
682 col = 0;
683 for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
684 if (col == 4) {
685 snd_iprintf(buffer,"\n");
686 col = 0;
687 }
688
689 if (col == 0) {
690 snd_iprintf(buffer, "%04X ",i);
691 }
692
693 snd_iprintf(buffer,"%08X ",readl(dst + i));
694 }
695
696 snd_iprintf(buffer,"\n...\n");
697 col = 0;
698
699 for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
700 if (col == 4) {
701 snd_iprintf(buffer,"\n");
702 col = 0;
703 }
704
705 if (col == 0) {
706 snd_iprintf(buffer, "%04X ",i);
707 }
708
709 snd_iprintf(buffer,"%08X ",readl(dst + i));
710 }
711
712
713 snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
714 col = 0;
715 for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
716 if (col == 4) {
717 snd_iprintf(buffer,"\n");
718 col = 0;
719 }
720
721 if (col == 0) {
722 snd_iprintf(buffer, "%04X ",i);
723 }
724
725 snd_iprintf(buffer,"%08X ",readl(dst + i));
726 }
727
728 snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
729 col = 0;
730 for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
731 if (col == 4) {
732 snd_iprintf(buffer,"\n");
733 col = 0;
734 }
735
736 if (col == 0) {
737 snd_iprintf(buffer, "%04X ",i);
738 }
739
740 snd_iprintf(buffer,"%08X ",readl(dst + i));
741 }
742 #if 0
743 snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
744 col = 0;
745 for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
746 if (col == 4) {
747 snd_iprintf(buffer,"\n");
748 col = 0;
749 }
750
751 if (col == 0) {
752 snd_iprintf(buffer, "%04X ",i);
753 }
754
755 snd_iprintf(buffer,"%08X ",readl(dst + i));
756 }
757 #endif
758
759 snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
760 col = 0;
761 for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
762 if (col == 4) {
763 snd_iprintf(buffer,"\n");
764 col = 0;
765 }
766
767 if (col == 0) {
768 snd_iprintf(buffer, "%04X ",i);
769 }
770
771 snd_iprintf(buffer,"%08X ",readl(dst + i));
772 }
773 snd_iprintf(buffer,"\n");
774 }
775
cs46xx_dsp_proc_init(struct snd_card * card,struct snd_cs46xx * chip)776 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
777 {
778 struct snd_info_entry *entry;
779 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
780 int i;
781
782 ins->snd_card = card;
783
784 entry = snd_info_create_card_entry(card, "dsp", card->proc_root);
785 if (entry)
786 entry->mode = S_IFDIR | 0555;
787 ins->proc_dsp_dir = entry;
788
789 if (!ins->proc_dsp_dir)
790 return -ENOMEM;
791
792 entry = snd_info_create_card_entry(card, "spos_symbols",
793 ins->proc_dsp_dir);
794 if (entry)
795 snd_info_set_text_ops(entry, chip,
796 cs46xx_dsp_proc_symbol_table_read);
797
798 entry = snd_info_create_card_entry(card, "spos_modules",
799 ins->proc_dsp_dir);
800 if (entry)
801 snd_info_set_text_ops(entry, chip,
802 cs46xx_dsp_proc_modules_read);
803
804 entry = snd_info_create_card_entry(card, "parameter",
805 ins->proc_dsp_dir);
806 if (entry)
807 snd_info_set_text_ops(entry, chip,
808 cs46xx_dsp_proc_parameter_dump_read);
809
810 entry = snd_info_create_card_entry(card, "sample",
811 ins->proc_dsp_dir);
812 if (entry)
813 snd_info_set_text_ops(entry, chip,
814 cs46xx_dsp_proc_sample_dump_read);
815
816 entry = snd_info_create_card_entry(card, "task_tree",
817 ins->proc_dsp_dir);
818 if (entry)
819 snd_info_set_text_ops(entry, chip,
820 cs46xx_dsp_proc_task_tree_read);
821
822 entry = snd_info_create_card_entry(card, "scb_info",
823 ins->proc_dsp_dir);
824 if (entry)
825 snd_info_set_text_ops(entry, chip,
826 cs46xx_dsp_proc_scb_read);
827
828 guard(mutex)(&chip->spos_mutex);
829 /* register/update SCB's entries on proc */
830 for (i = 0; i < ins->nscb; ++i) {
831 if (ins->scbs[i].deleted) continue;
832
833 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
834 }
835
836 return 0;
837 }
838
cs46xx_dsp_proc_done(struct snd_cs46xx * chip)839 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
840 {
841 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
842 int i;
843
844 if (!ins)
845 return 0;
846
847 scoped_guard(mutex, &chip->spos_mutex) {
848 for (i = 0; i < ins->nscb; ++i) {
849 if (ins->scbs[i].deleted)
850 continue;
851 cs46xx_dsp_proc_free_scb_desc((ins->scbs + i));
852 }
853 }
854
855 snd_info_free_entry(ins->proc_dsp_dir);
856 ins->proc_dsp_dir = NULL;
857
858 return 0;
859 }
860 #endif /* CONFIG_SND_PROC_FS */
861
_dsp_create_task_tree(struct snd_cs46xx * chip,u32 * task_data,u32 dest,int size)862 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
863 u32 dest, int size)
864 {
865 void __iomem *spdst = chip->region.idx[1].remap_addr +
866 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
867 int i;
868
869 for (i = 0; i < size; ++i) {
870 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
871 spdst, task_data[i]);
872 writel(task_data[i],spdst);
873 spdst += sizeof(u32);
874 }
875 }
876
_dsp_create_scb(struct snd_cs46xx * chip,u32 * scb_data,u32 dest)877 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
878 {
879 void __iomem *spdst = chip->region.idx[1].remap_addr +
880 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
881 int i;
882
883 for (i = 0; i < 0x10; ++i) {
884 dev_dbg(chip->card->dev, "addr %p, val %08x\n",
885 spdst, scb_data[i]);
886 writel(scb_data[i],spdst);
887 spdst += sizeof(u32);
888 }
889 }
890
find_free_scb_index(struct dsp_spos_instance * ins)891 static int find_free_scb_index (struct dsp_spos_instance * ins)
892 {
893 int index = ins->nscb, i;
894
895 for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
896 if (ins->scbs[i].deleted) {
897 index = i;
898 break;
899 }
900 }
901
902 return index;
903 }
904
_map_scb(struct snd_cs46xx * chip,char * name,u32 dest)905 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
906 {
907 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
908 struct dsp_scb_descriptor * desc = NULL;
909 int index;
910
911 if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
912 dev_err(chip->card->dev,
913 "dsp_spos: got no place for other SCB\n");
914 return NULL;
915 }
916
917 index = find_free_scb_index (ins);
918
919 memset(&ins->scbs[index], 0, sizeof(ins->scbs[index]));
920 strscpy(ins->scbs[index].scb_name, name);
921 ins->scbs[index].address = dest;
922 ins->scbs[index].index = index;
923 ins->scbs[index].ref_count = 1;
924
925 desc = (ins->scbs + index);
926 ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
927
928 if (index > ins->scb_highest_frag_index)
929 ins->scb_highest_frag_index = index;
930
931 if (index == ins->nscb)
932 ins->nscb++;
933
934 return desc;
935 }
936
937 static struct dsp_task_descriptor *
_map_task_tree(struct snd_cs46xx * chip,char * name,u32 dest,u32 size)938 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
939 {
940 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
941 struct dsp_task_descriptor * desc = NULL;
942
943 if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
944 dev_err(chip->card->dev,
945 "dsp_spos: got no place for other TASK\n");
946 return NULL;
947 }
948
949 if (name)
950 strscpy(ins->tasks[ins->ntask].task_name, name);
951 else
952 strscpy(ins->tasks[ins->ntask].task_name, "(NULL)");
953 ins->tasks[ins->ntask].address = dest;
954 ins->tasks[ins->ntask].size = size;
955
956 /* quick find in list */
957 ins->tasks[ins->ntask].index = ins->ntask;
958 desc = (ins->tasks + ins->ntask);
959 ins->ntask++;
960
961 if (name)
962 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
963 return desc;
964 }
965
966 #define SCB_BYTES (0x10 * 4)
967
968 struct dsp_scb_descriptor *
cs46xx_dsp_create_scb(struct snd_cs46xx * chip,char * name,u32 * scb_data,u32 dest)969 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
970 {
971 struct dsp_scb_descriptor * desc;
972
973 #ifdef CONFIG_PM_SLEEP
974 /* copy the data for resume */
975 scb_data = kmemdup(scb_data, SCB_BYTES, GFP_KERNEL);
976 if (!scb_data)
977 return NULL;
978 #endif
979
980 desc = _map_scb (chip,name,dest);
981 if (desc) {
982 desc->data = scb_data;
983 _dsp_create_scb(chip,scb_data,dest);
984 } else {
985 dev_err(chip->card->dev, "dsp_spos: failed to map SCB\n");
986 #ifdef CONFIG_PM_SLEEP
987 kfree(scb_data);
988 #endif
989 }
990
991 return desc;
992 }
993
994
995 static struct dsp_task_descriptor *
cs46xx_dsp_create_task_tree(struct snd_cs46xx * chip,char * name,u32 * task_data,u32 dest,int size)996 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
997 u32 dest, int size)
998 {
999 struct dsp_task_descriptor * desc;
1000
1001 desc = _map_task_tree (chip,name,dest,size);
1002 if (desc) {
1003 desc->data = task_data;
1004 _dsp_create_task_tree(chip,task_data,dest,size);
1005 } else {
1006 dev_err(chip->card->dev, "dsp_spos: failed to map TASK\n");
1007 }
1008
1009 return desc;
1010 }
1011
cs46xx_dsp_scb_and_task_init(struct snd_cs46xx * chip)1012 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1013 {
1014 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1015 struct dsp_symbol_entry * fg_task_tree_header_code;
1016 struct dsp_symbol_entry * task_tree_header_code;
1017 struct dsp_symbol_entry * task_tree_thread;
1018 struct dsp_symbol_entry * null_algorithm;
1019 struct dsp_symbol_entry * magic_snoop_task;
1020
1021 struct dsp_scb_descriptor * timing_master_scb;
1022 struct dsp_scb_descriptor * codec_out_scb;
1023 struct dsp_scb_descriptor * codec_in_scb;
1024 struct dsp_scb_descriptor * src_task_scb;
1025 struct dsp_scb_descriptor * master_mix_scb;
1026 struct dsp_scb_descriptor * rear_mix_scb;
1027 struct dsp_scb_descriptor * record_mix_scb;
1028 struct dsp_scb_descriptor * write_back_scb;
1029 struct dsp_scb_descriptor * vari_decimate_scb;
1030 struct dsp_scb_descriptor * rear_codec_out_scb;
1031 struct dsp_scb_descriptor * clfe_codec_out_scb;
1032 struct dsp_scb_descriptor * magic_snoop_scb;
1033
1034 int fifo_addr, fifo_span, valid_slots;
1035
1036 static const struct dsp_spos_control_block sposcb = {
1037 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1038 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1039 /* 2 */ DSP_SPOS_DC,0,
1040 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1041 /* 4 */ 0,0,
1042 /* 5 */ DSP_SPOS_UU,0,
1043 /* 6 */ FG_TASK_HEADER_ADDR,0,
1044 /* 7 */ 0,0,
1045 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1046 /* 9 */ 0,
1047 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1048 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1049 /* C */ DSP_SPOS_DC_DC,
1050 /* D */ DSP_SPOS_DC_DC,
1051 /* E */ DSP_SPOS_DC_DC,
1052 /* F */ DSP_SPOS_DC_DC
1053 };
1054
1055 cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1056
1057 null_algorithm = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1058 if (null_algorithm == NULL) {
1059 dev_err(chip->card->dev,
1060 "dsp_spos: symbol NULLALGORITHM not found\n");
1061 return -EIO;
1062 }
1063
1064 fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1065 if (fg_task_tree_header_code == NULL) {
1066 dev_err(chip->card->dev,
1067 "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1068 return -EIO;
1069 }
1070
1071 task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1072 if (task_tree_header_code == NULL) {
1073 dev_err(chip->card->dev,
1074 "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1075 return -EIO;
1076 }
1077
1078 task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1079 if (task_tree_thread == NULL) {
1080 dev_err(chip->card->dev,
1081 "dsp_spos: symbol TASKTREETHREAD not found\n");
1082 return -EIO;
1083 }
1084
1085 magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1086 if (magic_snoop_task == NULL) {
1087 dev_err(chip->card->dev,
1088 "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1089 return -EIO;
1090 }
1091
1092 {
1093 /* create the null SCB */
1094 static struct dsp_generic_scb null_scb = {
1095 { 0, 0, 0, 0 },
1096 { 0, 0, 0, 0, 0 },
1097 NULL_SCB_ADDR, NULL_SCB_ADDR,
1098 0, 0, 0, 0, 0,
1099 {
1100 0,0,
1101 0,0,
1102 }
1103 };
1104
1105 null_scb.entry_point = null_algorithm->address;
1106 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1107 ins->the_null_scb->task_entry = null_algorithm;
1108 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1109 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1110 ins->the_null_scb->parent_scb_ptr = NULL;
1111 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1112 }
1113
1114 {
1115 /* setup foreground task tree */
1116 static struct dsp_task_tree_control_block fg_task_tree_hdr = {
1117 { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1118 DSP_SPOS_DC_DC,
1119 DSP_SPOS_DC_DC,
1120 0x0000,DSP_SPOS_DC,
1121 DSP_SPOS_DC, DSP_SPOS_DC,
1122 DSP_SPOS_DC_DC,
1123 DSP_SPOS_DC_DC,
1124 DSP_SPOS_DC_DC,
1125 DSP_SPOS_DC,DSP_SPOS_DC },
1126
1127 {
1128 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1129 0,
1130 FG_TASK_HEADER_ADDR + TCBData,
1131 },
1132
1133 {
1134 4,0,
1135 1,0,
1136 2,SPOSCB_ADDR + HFGFlags,
1137 0,0,
1138 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1139 },
1140
1141 {
1142 DSP_SPOS_DC,0,
1143 DSP_SPOS_DC,DSP_SPOS_DC,
1144 DSP_SPOS_DC,DSP_SPOS_DC,
1145 DSP_SPOS_DC,DSP_SPOS_DC,
1146 DSP_SPOS_DC,DSP_SPOS_DC,
1147 DSP_SPOS_DCDC,
1148 DSP_SPOS_UU,1,
1149 DSP_SPOS_DCDC,
1150 DSP_SPOS_DCDC,
1151 DSP_SPOS_DCDC,
1152 DSP_SPOS_DCDC,
1153 DSP_SPOS_DCDC,
1154 DSP_SPOS_DCDC,
1155 DSP_SPOS_DCDC,
1156 DSP_SPOS_DCDC,
1157 DSP_SPOS_DCDC,
1158 DSP_SPOS_DCDC,
1159 DSP_SPOS_DCDC,
1160 DSP_SPOS_DCDC,
1161 DSP_SPOS_DCDC,
1162 DSP_SPOS_DCDC,
1163 DSP_SPOS_DCDC,
1164 DSP_SPOS_DCDC,
1165 DSP_SPOS_DCDC,
1166 DSP_SPOS_DCDC,
1167 DSP_SPOS_DCDC,
1168 DSP_SPOS_DCDC,
1169 DSP_SPOS_DCDC,
1170 DSP_SPOS_DCDC,
1171 DSP_SPOS_DCDC,
1172 DSP_SPOS_DCDC,
1173 DSP_SPOS_DCDC,
1174 DSP_SPOS_DCDC,
1175 DSP_SPOS_DCDC,
1176 DSP_SPOS_DCDC
1177 },
1178 {
1179 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1180 0,0
1181 }
1182 };
1183
1184 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1185 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1186 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1187 }
1188
1189
1190 {
1191 /* setup foreground task tree */
1192 static struct dsp_task_tree_control_block bg_task_tree_hdr = {
1193 { DSP_SPOS_DC_DC,
1194 DSP_SPOS_DC_DC,
1195 DSP_SPOS_DC_DC,
1196 DSP_SPOS_DC, DSP_SPOS_DC,
1197 DSP_SPOS_DC, DSP_SPOS_DC,
1198 DSP_SPOS_DC_DC,
1199 DSP_SPOS_DC_DC,
1200 DSP_SPOS_DC_DC,
1201 DSP_SPOS_DC,DSP_SPOS_DC },
1202
1203 {
1204 NULL_SCB_ADDR,NULL_SCB_ADDR, /* Set up the background to do nothing */
1205 0,
1206 BG_TREE_SCB_ADDR + TCBData,
1207 },
1208
1209 {
1210 9999,0,
1211 0,1,
1212 0,SPOSCB_ADDR + HFGFlags,
1213 0,0,
1214 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1215 },
1216
1217 {
1218 DSP_SPOS_DC,0,
1219 DSP_SPOS_DC,DSP_SPOS_DC,
1220 DSP_SPOS_DC,DSP_SPOS_DC,
1221 DSP_SPOS_DC,DSP_SPOS_DC,
1222 DSP_SPOS_DC,DSP_SPOS_DC,
1223 DSP_SPOS_DCDC,
1224 DSP_SPOS_UU,1,
1225 DSP_SPOS_DCDC,
1226 DSP_SPOS_DCDC,
1227 DSP_SPOS_DCDC,
1228 DSP_SPOS_DCDC,
1229 DSP_SPOS_DCDC,
1230 DSP_SPOS_DCDC,
1231 DSP_SPOS_DCDC,
1232 DSP_SPOS_DCDC,
1233 DSP_SPOS_DCDC,
1234 DSP_SPOS_DCDC,
1235 DSP_SPOS_DCDC,
1236 DSP_SPOS_DCDC,
1237 DSP_SPOS_DCDC,
1238 DSP_SPOS_DCDC,
1239 DSP_SPOS_DCDC,
1240 DSP_SPOS_DCDC,
1241 DSP_SPOS_DCDC,
1242 DSP_SPOS_DCDC,
1243 DSP_SPOS_DCDC,
1244 DSP_SPOS_DCDC,
1245 DSP_SPOS_DCDC,
1246 DSP_SPOS_DCDC,
1247 DSP_SPOS_DCDC,
1248 DSP_SPOS_DCDC,
1249 DSP_SPOS_DCDC,
1250 DSP_SPOS_DCDC,
1251 DSP_SPOS_DCDC,
1252 DSP_SPOS_DCDC
1253 },
1254 {
1255 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1256 0,0
1257 }
1258 };
1259
1260 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1261 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1262 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1263 }
1264
1265 /* create timing master SCB */
1266 timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1267
1268 /* create the CODEC output task */
1269 codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1270 MASTERMIX_SCB_ADDR,
1271 CODECOUT_SCB_ADDR,timing_master_scb,
1272 SCB_ON_PARENT_SUBLIST_SCB);
1273
1274 if (!codec_out_scb) goto _fail_end;
1275 /* create the master mix SCB */
1276 master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1277 MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1278 codec_out_scb,
1279 SCB_ON_PARENT_SUBLIST_SCB);
1280 ins->master_mix_scb = master_mix_scb;
1281
1282 if (!master_mix_scb) goto _fail_end;
1283
1284 /* create codec in */
1285 codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1286 CODEC_INPUT_BUF1,
1287 CODECIN_SCB_ADDR,codec_out_scb,
1288 SCB_ON_PARENT_NEXT_SCB);
1289 if (!codec_in_scb) goto _fail_end;
1290 ins->codec_in_scb = codec_in_scb;
1291
1292 /* create write back scb */
1293 write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1294 WRITE_BACK_BUF1,WRITE_BACK_SPB,
1295 WRITEBACK_SCB_ADDR,
1296 timing_master_scb,
1297 SCB_ON_PARENT_NEXT_SCB);
1298 if (!write_back_scb) goto _fail_end;
1299
1300 {
1301 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1302 0x00020000,
1303 0x0000ffff
1304 };
1305
1306 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1307 (u32 *)&mix2_ostream_spb,
1308 WRITE_BACK_SPB, 2))
1309 goto _fail_end;
1310 }
1311
1312 /* input sample converter */
1313 vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1314 VARI_DECIMATE_BUF0,
1315 VARI_DECIMATE_BUF1,
1316 VARIDECIMATE_SCB_ADDR,
1317 write_back_scb,
1318 SCB_ON_PARENT_SUBLIST_SCB);
1319 if (!vari_decimate_scb) goto _fail_end;
1320
1321 /* create the record mixer SCB */
1322 record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1323 MIX_SAMPLE_BUF2,
1324 RECORD_MIXER_SCB_ADDR,
1325 vari_decimate_scb,
1326 SCB_ON_PARENT_SUBLIST_SCB);
1327 ins->record_mixer_scb = record_mix_scb;
1328
1329 if (!record_mix_scb) goto _fail_end;
1330
1331 valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1332
1333 if (snd_BUG_ON(chip->nr_ac97_codecs != 1 && chip->nr_ac97_codecs != 2))
1334 goto _fail_end;
1335
1336 if (chip->nr_ac97_codecs == 1) {
1337 /* output on slot 5 and 11
1338 on primary CODEC */
1339 fifo_addr = 0x20;
1340 fifo_span = 0x60;
1341
1342 /* enable slot 5 and 11 */
1343 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1344 } else {
1345 /* output on slot 7 and 8
1346 on secondary CODEC */
1347 fifo_addr = 0x40;
1348 fifo_span = 0x10;
1349
1350 /* enable slot 7 and 8 */
1351 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1352 }
1353 /* create CODEC tasklet for rear speakers output*/
1354 rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1355 REAR_MIXER_SCB_ADDR,
1356 REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1357 SCB_ON_PARENT_NEXT_SCB);
1358 if (!rear_codec_out_scb) goto _fail_end;
1359
1360
1361 /* create the rear PCM channel mixer SCB */
1362 rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1363 MIX_SAMPLE_BUF3,
1364 REAR_MIXER_SCB_ADDR,
1365 rear_codec_out_scb,
1366 SCB_ON_PARENT_SUBLIST_SCB);
1367 ins->rear_mix_scb = rear_mix_scb;
1368 if (!rear_mix_scb) goto _fail_end;
1369
1370 if (chip->nr_ac97_codecs == 2) {
1371 /* create CODEC tasklet for rear Center/LFE output
1372 slot 6 and 9 on secondary CODEC */
1373 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1374 CLFE_MIXER_SCB_ADDR,
1375 CLFE_CODEC_SCB_ADDR,
1376 rear_codec_out_scb,
1377 SCB_ON_PARENT_NEXT_SCB);
1378 if (!clfe_codec_out_scb) goto _fail_end;
1379
1380
1381 /* create the rear PCM channel mixer SCB */
1382 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1383 MIX_SAMPLE_BUF4,
1384 CLFE_MIXER_SCB_ADDR,
1385 clfe_codec_out_scb,
1386 SCB_ON_PARENT_SUBLIST_SCB);
1387 if (!ins->center_lfe_mix_scb) goto _fail_end;
1388
1389 /* enable slot 6 and 9 */
1390 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1391 } else {
1392 clfe_codec_out_scb = rear_codec_out_scb;
1393 ins->center_lfe_mix_scb = rear_mix_scb;
1394 }
1395
1396 /* enable slots depending on CODEC configuration */
1397 snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1398
1399 /* the magic snooper */
1400 magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1401 OUTPUT_SNOOP_BUFFER,
1402 codec_out_scb,
1403 clfe_codec_out_scb,
1404 SCB_ON_PARENT_NEXT_SCB);
1405
1406
1407 if (!magic_snoop_scb) goto _fail_end;
1408 ins->ref_snoop_scb = magic_snoop_scb;
1409
1410 /* SP IO access */
1411 if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1412 magic_snoop_scb,
1413 SCB_ON_PARENT_NEXT_SCB))
1414 goto _fail_end;
1415
1416 /* SPDIF input sampel rate converter */
1417 src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1418 ins->spdif_in_sample_rate,
1419 SRC_OUTPUT_BUF1,
1420 SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1421 master_mix_scb,
1422 SCB_ON_PARENT_SUBLIST_SCB,1);
1423
1424 if (!src_task_scb) goto _fail_end;
1425 cs46xx_src_unlink(chip,src_task_scb);
1426
1427 /* NOTE: when we now how to detect the SPDIF input
1428 sample rate we will use this SRC to adjust it */
1429 ins->spdif_in_src = src_task_scb;
1430
1431 cs46xx_dsp_async_init(chip,timing_master_scb);
1432 return 0;
1433
1434 _fail_end:
1435 dev_err(chip->card->dev, "dsp_spos: failed to setup SCB's in DSP\n");
1436 return -EINVAL;
1437 }
1438
cs46xx_dsp_async_init(struct snd_cs46xx * chip,struct dsp_scb_descriptor * fg_entry)1439 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1440 struct dsp_scb_descriptor * fg_entry)
1441 {
1442 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1443 struct dsp_symbol_entry * s16_async_codec_input_task;
1444 struct dsp_symbol_entry * spdifo_task;
1445 struct dsp_symbol_entry * spdifi_task;
1446 struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1447
1448 s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1449 if (s16_async_codec_input_task == NULL) {
1450 dev_err(chip->card->dev,
1451 "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1452 return -EIO;
1453 }
1454 spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1455 if (spdifo_task == NULL) {
1456 dev_err(chip->card->dev,
1457 "dsp_spos: symbol SPDIFOTASK not found\n");
1458 return -EIO;
1459 }
1460
1461 spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1462 if (spdifi_task == NULL) {
1463 dev_err(chip->card->dev,
1464 "dsp_spos: symbol SPDIFITASK not found\n");
1465 return -EIO;
1466 }
1467
1468 {
1469 /* 0xBC0 */
1470 struct dsp_spdifoscb spdifo_scb = {
1471 /* 0 */ DSP_SPOS_UUUU,
1472 {
1473 /* 1 */ 0xb0,
1474 /* 2 */ 0,
1475 /* 3 */ 0,
1476 /* 4 */ 0,
1477 },
1478 /* NOTE: the SPDIF output task read samples in mono
1479 format, the AsynchFGTxSCB task writes to buffer
1480 in stereo format
1481 */
1482 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1483 /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 ) | 0xFFFC,
1484 /* 7 */ 0,0,
1485 /* 8 */ 0,
1486 /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1487 /* A */ spdifo_task->address,
1488 SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1489 {
1490 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1491 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1492 },
1493 /* D */ 0x804c,0, /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1494 /* E */ 0x0108,0x0001, /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1495 /* F */ DSP_SPOS_UUUU /* SPDIFOFree; */
1496 };
1497
1498 /* 0xBB0 */
1499 struct dsp_spdifiscb spdifi_scb = {
1500 /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1501 /* 1 */ 0,
1502 /* 2 */ 0,
1503 /* 3 */ 1,4000, /* SPDIFICountLimit SPDIFICount */
1504 /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1505 /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1506 /* 6 */ DSP_SPOS_UUUU, /* Free3 */
1507 /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC, /* Free2 BitCount*/
1508 /* 8 */ DSP_SPOS_UUUU, /* TempStatus */
1509 /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1510 /* A */ spdifi_task->address,
1511 SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1512 /* NOTE: The SPDIF input task write the sample in mono
1513 format from the HW FIFO, the AsynchFGRxSCB task reads
1514 them in stereo
1515 */
1516 /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1517 /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1518 /* D */ 0x8048,0,
1519 /* E */ 0x01f0,0x0001,
1520 /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1521 };
1522
1523 /* 0xBA0 */
1524 struct dsp_async_codec_input_scb async_codec_input_scb = {
1525 /* 0 */ DSP_SPOS_UUUU,
1526 /* 1 */ 0,
1527 /* 2 */ 0,
1528 /* 3 */ 1,4000,
1529 /* 4 */ 0x0118,0x0001,
1530 /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1531 /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1532 /* 7 */ DSP_SPOS_UU,0x3,
1533 /* 8 */ DSP_SPOS_UUUU,
1534 /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1535 /* A */ s16_async_codec_input_task->address,
1536 HFG_TREE_SCB + AsyncCIOFIFOPointer,
1537
1538 /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1539 /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10), /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1540
1541 #ifdef UseASER1Input
1542 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1543 Init. 0000:8042: for ASER1
1544 0000:8044: for ASER2 */
1545 /* D */ 0x8042,0,
1546
1547 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1548 Init 1 stero:8050 ASER1
1549 Init 0 mono:8070 ASER2
1550 Init 1 Stereo : 0100 ASER1 (Set by script) */
1551 /* E */ 0x0100,0x0001,
1552
1553 #endif
1554
1555 #ifdef UseASER2Input
1556 /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1557 Init. 0000:8042: for ASER1
1558 0000:8044: for ASER2 */
1559 /* D */ 0x8044,0,
1560
1561 /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1562 Init 1 stero:8050 ASER1
1563 Init 0 mono:8070 ASER2
1564 Init 1 Stereo : 0100 ASER1 (Set by script) */
1565 /* E */ 0x0110,0x0001,
1566
1567 #endif
1568
1569 /* short AsyncCIOutputBufModulo:AsyncCIFree;
1570 AsyncCIOutputBufModulo: The modulo size for
1571 the output buffer of this task */
1572 /* F */ 0, /* DSP_SPOS_UUUU */
1573 };
1574
1575 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1576
1577 if (snd_BUG_ON(!spdifo_scb_desc))
1578 return -EIO;
1579 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1580 if (snd_BUG_ON(!spdifi_scb_desc))
1581 return -EIO;
1582 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1583 if (snd_BUG_ON(!async_codec_scb_desc))
1584 return -EIO;
1585
1586 async_codec_scb_desc->parent_scb_ptr = NULL;
1587 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1588 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1589 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1590
1591 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1592 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1593 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1594 spdifi_scb_desc->task_entry = spdifi_task;
1595
1596 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1597 spdifo_scb_desc->next_scb_ptr = fg_entry;
1598 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1599 spdifo_scb_desc->task_entry = spdifo_task;
1600
1601 /* this one is faked, as the parnet of SPDIFO task
1602 is the FG task tree */
1603 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1604
1605 /* for proc fs */
1606 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1607 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1608 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1609
1610 /* Async MASTER ENABLE, affects both SPDIF input and output */
1611 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1612 }
1613
1614 return 0;
1615 }
1616
cs46xx_dsp_disable_spdif_hw(struct snd_cs46xx * chip)1617 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1618 {
1619 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1620
1621 /* set SPDIF output FIFO slot */
1622 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1623
1624 /* SPDIF output MASTER ENABLE */
1625 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1626
1627 /* right and left validate bit */
1628 /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1629 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1630
1631 /* clear fifo pointer */
1632 cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1633
1634 /* monitor state */
1635 ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1636 }
1637
cs46xx_dsp_enable_spdif_hw(struct snd_cs46xx * chip)1638 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1639 {
1640 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1641
1642 /* if hw-ctrl already enabled, turn off to reset logic ... */
1643 cs46xx_dsp_disable_spdif_hw (chip);
1644 udelay(50);
1645
1646 /* set SPDIF output FIFO slot */
1647 snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1648
1649 /* SPDIF output MASTER ENABLE */
1650 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1651
1652 /* right and left validate bit */
1653 cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1654
1655 /* monitor state */
1656 ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1657
1658 return 0;
1659 }
1660
cs46xx_dsp_enable_spdif_in(struct snd_cs46xx * chip)1661 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1662 {
1663 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1664
1665 /* turn on amplifier */
1666 chip->active_ctrl(chip, 1);
1667 chip->amplifier_ctrl(chip, 1);
1668
1669 if (snd_BUG_ON(ins->asynch_rx_scb))
1670 return -EINVAL;
1671 if (snd_BUG_ON(!ins->spdif_in_src))
1672 return -EINVAL;
1673
1674 guard(mutex)(&chip->spos_mutex);
1675
1676 if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1677 /* time countdown enable */
1678 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1679 /* NOTE: 80000005 value is just magic. With all values
1680 that I've tested this one seem to give the best result.
1681 Got no explication why. (Benny) */
1682
1683 /* SPDIF input MASTER ENABLE */
1684 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1685
1686 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1687 }
1688
1689 /* create and start the asynchronous receiver SCB */
1690 ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1691 ASYNCRX_SCB_ADDR,
1692 SPDIFI_SCB_INST,
1693 SPDIFI_IP_OUTPUT_BUFFER1,
1694 ins->spdif_in_src,
1695 SCB_ON_PARENT_SUBLIST_SCB);
1696
1697 guard(spinlock_irq)(&chip->reg_lock);
1698
1699 /* reset SPDIF input sample buffer pointer */
1700 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1701 (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1702
1703 /* reset FIFO ptr */
1704 /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1705 cs46xx_src_link(chip,ins->spdif_in_src);
1706
1707 /* unmute SRC volume */
1708 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1709
1710 /* set SPDIF input sample rate and unmute
1711 NOTE: only 48khz support for SPDIF input this time */
1712 /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1713
1714 /* monitor state */
1715 ins->spdif_status_in = 1;
1716
1717 return 0;
1718 }
1719
cs46xx_dsp_disable_spdif_in(struct snd_cs46xx * chip)1720 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1721 {
1722 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1723
1724 if (snd_BUG_ON(!ins->asynch_rx_scb))
1725 return -EINVAL;
1726 if (snd_BUG_ON(!ins->spdif_in_src))
1727 return -EINVAL;
1728
1729 scoped_guard(mutex, &chip->spos_mutex) {
1730 /* Remove the asynchronous receiver SCB */
1731 cs46xx_dsp_remove_scb(chip, ins->asynch_rx_scb);
1732 ins->asynch_rx_scb = NULL;
1733
1734 cs46xx_src_unlink(chip, ins->spdif_in_src);
1735
1736 /* monitor state */
1737 ins->spdif_status_in = 0;
1738 }
1739
1740 /* restore amplifier */
1741 chip->active_ctrl(chip, -1);
1742 chip->amplifier_ctrl(chip, -1);
1743
1744 return 0;
1745 }
1746
cs46xx_dsp_enable_pcm_capture(struct snd_cs46xx * chip)1747 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1748 {
1749 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1750
1751 if (snd_BUG_ON(ins->pcm_input))
1752 return -EINVAL;
1753 if (snd_BUG_ON(!ins->ref_snoop_scb))
1754 return -EINVAL;
1755
1756 guard(mutex)(&chip->spos_mutex);
1757 ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1758 "PCMSerialInput_Wave");
1759
1760 return 0;
1761 }
1762
cs46xx_dsp_disable_pcm_capture(struct snd_cs46xx * chip)1763 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1764 {
1765 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1766
1767 if (snd_BUG_ON(!ins->pcm_input))
1768 return -EINVAL;
1769
1770 guard(mutex)(&chip->spos_mutex);
1771 cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1772 ins->pcm_input = NULL;
1773
1774 return 0;
1775 }
1776
cs46xx_dsp_enable_adc_capture(struct snd_cs46xx * chip)1777 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1778 {
1779 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1780
1781 if (snd_BUG_ON(ins->adc_input))
1782 return -EINVAL;
1783 if (snd_BUG_ON(!ins->codec_in_scb))
1784 return -EINVAL;
1785
1786 guard(mutex)(&chip->spos_mutex);
1787 ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1788 "PCMSerialInput_ADC");
1789
1790 return 0;
1791 }
1792
cs46xx_dsp_disable_adc_capture(struct snd_cs46xx * chip)1793 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1794 {
1795 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1796
1797 if (snd_BUG_ON(!ins->adc_input))
1798 return -EINVAL;
1799
1800 guard(mutex)(&chip->spos_mutex);
1801 cs46xx_dsp_remove_scb (chip,ins->adc_input);
1802 ins->adc_input = NULL;
1803
1804 return 0;
1805 }
1806
cs46xx_poke_via_dsp(struct snd_cs46xx * chip,u32 address,u32 data)1807 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1808 {
1809 u32 temp;
1810 int i;
1811
1812 /* santiy check the parameters. (These numbers are not 100% correct. They are
1813 a rough guess from looking at the controller spec.) */
1814 if (address < 0x8000 || address >= 0x9000)
1815 return -EINVAL;
1816
1817 /* initialize the SP_IO_WRITE SCB with the data. */
1818 temp = ( address << 16 ) | ( address & 0x0000FFFF); /* offset 0 <-- address2 : address1 */
1819
1820 snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR << 2), temp);
1821 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1822 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1823
1824 /* Poke this location to tell the task to start */
1825 snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1826
1827 /* Verify that the task ran */
1828 for (i=0; i<25; i++) {
1829 udelay(125);
1830
1831 temp = snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1832 if (temp == 0x00000000)
1833 break;
1834 }
1835
1836 if (i == 25) {
1837 dev_err(chip->card->dev,
1838 "dsp_spos: SPIOWriteTask not responding\n");
1839 return -EBUSY;
1840 }
1841
1842 return 0;
1843 }
1844
cs46xx_dsp_set_dac_volume(struct snd_cs46xx * chip,u16 left,u16 right)1845 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1846 {
1847 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1848 struct dsp_scb_descriptor * scb;
1849
1850 guard(mutex)(&chip->spos_mutex);
1851
1852 /* main output */
1853 scb = ins->master_mix_scb->sub_list_ptr;
1854 while (scb != ins->the_null_scb) {
1855 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1856 scb = scb->next_scb_ptr;
1857 }
1858
1859 /* rear output */
1860 scb = ins->rear_mix_scb->sub_list_ptr;
1861 while (scb != ins->the_null_scb) {
1862 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1863 scb = scb->next_scb_ptr;
1864 }
1865
1866 ins->dac_volume_left = left;
1867 ins->dac_volume_right = right;
1868
1869 return 0;
1870 }
1871
cs46xx_dsp_set_iec958_volume(struct snd_cs46xx * chip,u16 left,u16 right)1872 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1873 {
1874 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1875
1876 guard(mutex)(&chip->spos_mutex);
1877
1878 if (ins->asynch_rx_scb != NULL)
1879 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1880 left,right);
1881
1882 ins->spdif_input_volume_left = left;
1883 ins->spdif_input_volume_right = right;
1884
1885 return 0;
1886 }
1887
1888 #ifdef CONFIG_PM_SLEEP
cs46xx_dsp_resume(struct snd_cs46xx * chip)1889 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1890 {
1891 struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1892 int i, err;
1893
1894 /* clear parameter, sample and code areas */
1895 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1896 DSP_PARAMETER_BYTE_SIZE);
1897 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1898 DSP_SAMPLE_BYTE_SIZE);
1899 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1900
1901 for (i = 0; i < ins->nmodules; i++) {
1902 struct dsp_module_desc *module = &ins->modules[i];
1903 struct dsp_segment_desc *seg;
1904 u32 doffset, dsize;
1905
1906 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1907 err = dsp_load_parameter(chip, seg);
1908 if (err < 0)
1909 return err;
1910
1911 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
1912 err = dsp_load_sample(chip, seg);
1913 if (err < 0)
1914 return err;
1915
1916 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
1917 if (!seg)
1918 continue;
1919
1920 doffset = seg->offset * 4 + module->load_address * 4
1921 + DSP_CODE_BYTE_OFFSET;
1922 dsize = seg->size * 4;
1923 err = snd_cs46xx_download(chip,
1924 ins->code.data + module->load_address,
1925 doffset, dsize);
1926 if (err < 0)
1927 return err;
1928 }
1929
1930 for (i = 0; i < ins->ntask; i++) {
1931 struct dsp_task_descriptor *t = &ins->tasks[i];
1932 _dsp_create_task_tree(chip, t->data, t->address, t->size);
1933 }
1934
1935 for (i = 0; i < ins->nscb; i++) {
1936 struct dsp_scb_descriptor *s = &ins->scbs[i];
1937 if (s->deleted)
1938 continue;
1939 _dsp_create_scb(chip, s->data, s->address);
1940 }
1941 for (i = 0; i < ins->nscb; i++) {
1942 struct dsp_scb_descriptor *s = &ins->scbs[i];
1943 if (s->deleted)
1944 continue;
1945 if (s->updated)
1946 cs46xx_dsp_spos_update_scb(chip, s);
1947 if (s->volume_set)
1948 cs46xx_dsp_scb_set_volume(chip, s,
1949 s->volume[0], s->volume[1]);
1950 }
1951 if (ins->spdif_status_out & DSP_SPDIF_STATUS_HW_ENABLED) {
1952 cs46xx_dsp_enable_spdif_hw(chip);
1953 snd_cs46xx_poke(chip, (ins->ref_snoop_scb->address + 2) << 2,
1954 (OUTPUT_SNOOP_BUFFER + 0x10) << 0x10);
1955 if (ins->spdif_status_out & DSP_SPDIF_STATUS_PLAYBACK_OPEN)
1956 cs46xx_poke_via_dsp(chip, SP_SPDOUT_CSUV,
1957 ins->spdif_csuv_stream);
1958 }
1959 if (chip->dsp_spos_instance->spdif_status_in) {
1960 cs46xx_poke_via_dsp(chip, SP_ASER_COUNTDOWN, 0x80000005);
1961 cs46xx_poke_via_dsp(chip, SP_SPDIN_CONTROL, 0x800003ff);
1962 }
1963 return 0;
1964 }
1965 #endif
1966