xref: /linux/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi (revision 115e74a29b530d121891238e9551c4bcdf7b04b5)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2023 MediaTek Inc.
4 * Author: Chris Chen <chris-qj.chen@mediatek.com>
5 *         Pablo Sun <pablo.sun@mediatek.com>
6 *         Macpaul Lin <macpaul.lin@mediatek.com>
7 *
8 * Copyright (C) 2025 Collabora Ltd.
9 *                    Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
10 *                    AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 */
12
13#include "mt6359.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15#include <dt-bindings/input/input.h>
16#include <dt-bindings/interrupt-controller/irq.h>
17#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h>
18#include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
19#include <dt-bindings/spmi/spmi.h>
20#include <dt-bindings/usb/pd.h>
21
22/ {
23	aliases {
24		dsi0 = &disp_dsi0;
25		ethernet0 = &eth;
26		i2c0 = &i2c0;
27		i2c1 = &i2c1;
28		i2c2 = &i2c2;
29		i2c3 = &i2c3;
30		i2c4 = &i2c4;
31		i2c5 = &i2c5;
32		i2c6 = &i2c6;
33		mmc0 = &mmc0;
34		mmc1 = &mmc1;
35		serial0 = &uart0;
36	};
37
38	backlight_lcm1: backlight-lcm1 {
39		compatible = "pwm-backlight";
40		brightness-levels = <0 1023>;
41		default-brightness-level = <576>;
42		num-interpolated-steps = <1023>;
43		power-supply = <&reg_vsys>;
44		pwms = <&disp_pwm1 0 500000>;
45	};
46
47	chosen {
48		stdout-path = "serial0:921600n8";
49	};
50
51	dmic_codec: dmic-codec {
52		#sound-dai-cells = <0>;
53		compatible = "dmic-codec";
54		num-channels = <2>;
55		wakeup-delay-ms = <30>;
56	};
57
58	firmware {
59		optee {
60			compatible = "linaro,optee-tz";
61			method = "smc";
62		};
63	};
64	reserved-memory {
65		#address-cells = <2>;
66		#size-cells = <2>;
67		ranges;
68
69		/*
70		 * 12 MiB reserved for OP-TEE (BL32)
71		 * +-----------------------+ 0x43e0_0000
72		 * |      SHMEM 2MiB       |
73		 * +-----------------------+ 0x43c0_0000
74		 * |        | TA_RAM  8MiB |
75		 * + TZDRAM +--------------+ 0x4340_0000
76		 * |        | TEE_RAM 2MiB |
77		 * +-----------------------+ 0x4320_0000
78		 */
79		optee_reserved: optee@43200000 {
80			no-map;
81			reg = <0 0x43200000 0 0x00c00000>;
82		};
83
84		scp_mem: memory@50000000 {
85			compatible = "shared-dma-pool";
86			reg = <0 0x50000000 0 0x2900000>;
87			no-map;
88		};
89
90		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
91		bl31_secmon_reserved: memory@54600000 {
92			no-map;
93			reg = <0 0x54600000 0x0 0x200000>;
94		};
95
96		apu_mem: memory@55000000 {
97			compatible = "shared-dma-pool";
98			reg = <0 0x55000000 0 0x1400000>; /* 20 MB */
99		};
100
101		vpu_mem: memory@57000000 {
102			compatible = "shared-dma-pool";
103			reg = <0 0x57000000 0 0x1400000>; /* 20 MB */
104		};
105
106		adsp_mem: memory@60000000 {
107			compatible = "shared-dma-pool";
108			reg = <0 0x60000000 0 0xf00000>;
109			no-map;
110		};
111
112		afe_dma_mem: memory@60f00000 {
113			compatible = "shared-dma-pool";
114			reg = <0 0x60f00000 0 0x100000>;
115			no-map;
116		};
117
118		adsp_dma_mem: memory@61000000 {
119			compatible = "shared-dma-pool";
120			reg = <0 0x61000000 0 0x100000>;
121			no-map;
122		};
123	};
124
125	common_fixed_5v: regulator-0 {
126		compatible = "regulator-fixed";
127		regulator-name = "vdd_5v";
128		regulator-min-microvolt = <5000000>;
129		regulator-max-microvolt = <5000000>;
130		gpio = <&pio 10 GPIO_ACTIVE_HIGH>;
131		enable-active-high;
132		regulator-always-on;
133		vin-supply = <&reg_vsys>;
134	};
135
136	edp_panel_fixed_3v3: regulator-1 {
137		compatible = "regulator-fixed";
138		regulator-name = "vedp_3v3";
139		regulator-min-microvolt = <3300000>;
140		regulator-max-microvolt = <3300000>;
141		enable-active-high;
142		gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
143		pinctrl-names = "default";
144		pinctrl-0 = <&edp_panel_3v3_en_pins>;
145		vin-supply = <&reg_vsys>;
146	};
147
148	gpio_fixed_3v3: regulator-2 {
149		compatible = "regulator-fixed";
150		regulator-name = "ext_3v3";
151		regulator-min-microvolt = <3300000>;
152		regulator-max-microvolt = <3300000>;
153		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
154		enable-active-high;
155		regulator-always-on;
156		vin-supply = <&reg_vsys>;
157	};
158
159	/* system wide 4.2V power rail from charger */
160	reg_vsys: regulator-vsys {
161		compatible = "regulator-fixed";
162		regulator-name = "vsys";
163		regulator-always-on;
164		regulator-boot-on;
165	};
166
167	/* used by mmc2 */
168	sdio_fixed_1v8: regulator-3 {
169		compatible = "regulator-fixed";
170		regulator-name = "vio18_conn";
171		regulator-min-microvolt = <1800000>;
172		regulator-max-microvolt = <1800000>;
173		enable-active-high;
174		regulator-always-on;
175	};
176
177	/* used by mmc2 */
178	sdio_fixed_3v3: regulator-4 {
179		compatible = "regulator-fixed";
180		regulator-name = "wifi_3v3";
181		regulator-min-microvolt = <3300000>;
182		regulator-max-microvolt = <3300000>;
183		gpio = <&pio 74 GPIO_ACTIVE_HIGH>;
184		enable-active-high;
185		regulator-always-on;
186		vin-supply = <&reg_vsys>;
187	};
188
189	touch0_fixed_3v3: regulator-5 {
190		compatible = "regulator-fixed";
191		regulator-name = "vio33_tp1";
192		regulator-min-microvolt = <3300000>;
193		regulator-max-microvolt = <3300000>;
194		gpio = <&pio 119 GPIO_ACTIVE_HIGH>;
195		enable-active-high;
196		vin-supply = <&reg_vsys>;
197		pinctrl-names = "default";
198		pinctrl-0 = <&touch_vreg_pins>;
199	};
200
201	usb_hub_fixed_3v3: regulator-6 {
202		compatible = "regulator-fixed";
203		regulator-name = "vhub_3v3";
204		regulator-min-microvolt = <3300000>;
205		regulator-max-microvolt = <3300000>;
206		gpio = <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */
207		startup-delay-us = <10000>;
208		enable-active-high;
209		vin-supply = <&reg_vsys>;
210	};
211
212	usb_p0_vbus: regulator-7 {
213		compatible = "regulator-fixed";
214		regulator-name = "vbus_p0";
215		regulator-min-microvolt = <5000000>;
216		regulator-max-microvolt = <5000000>;
217		gpio = <&pio 84 GPIO_ACTIVE_HIGH>;
218		enable-active-high;
219		vin-supply = <&reg_vsys>;
220	};
221
222	usb_p1_vbus: regulator-8 {
223		compatible = "regulator-fixed";
224		regulator-name = "vbus_p1";
225		regulator-min-microvolt = <5000000>;
226		regulator-max-microvolt = <5000000>;
227		gpio = <&pio 87 GPIO_ACTIVE_HIGH>;
228		enable-active-high;
229		vin-supply = <&reg_vsys>;
230	};
231
232	/* used by ssusb2 */
233	usb_p2_vbus: regulator-9 {
234		compatible = "regulator-fixed";
235		regulator-name = "vbus_p2";
236		regulator-min-microvolt = <5000000>;
237		regulator-max-microvolt = <5000000>;
238		enable-active-high;
239	};
240
241	lcm1_iovcc: regulator-vio18-lcm1 {
242		compatible = "regulator-fixed";
243		regulator-name = "vio18_lcm1";
244		regulator-min-microvolt = <1800000>;
245		regulator-max-microvolt = <1800000>;
246		enable-active-high;
247		gpio = <&pio 111 GPIO_ACTIVE_HIGH>;
248		pinctrl-names = "default";
249		pinctrl-0 = <&dsi0_vreg_en_pins>;
250		vin-supply = <&reg_vsys>;
251	};
252
253	lcm1_vddp: regulator-vsys-lcm1 {
254		compatible = "regulator-fixed";
255		regulator-name = "vsys_lcm1";
256		regulator-min-microvolt = <4200000>;
257		regulator-max-microvolt = <4200000>;
258		regulator-always-on;
259		regulator-boot-on;
260		vin-supply = <&reg_vsys>;
261	};
262};
263
264&adsp {
265	memory-region = <&adsp_dma_mem>, <&adsp_mem>;
266	status = "okay";
267};
268
269&afe {
270	memory-region = <&afe_dma_mem>;
271	status = "okay";
272};
273
274&disp_dsi0 {
275	#address-cells = <1>;
276	#size-cells = <0>;
277	status = "okay";
278
279	panel@0 {
280		compatible = "startek,kd070fhfid078", "himax,hx8279";
281		reg = <0>;
282		backlight = <&backlight_lcm1>;
283		enable-gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
284		reset-gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
285		iovcc-supply = <&lcm1_iovcc>;
286		vdd-supply = <&lcm1_vddp>;
287		pinctrl-names = "default";
288		pinctrl-0 = <&panel_default_pins>;
289
290		port {
291			dsi_panel_in: endpoint {
292				remote-endpoint = <&dsi0_out>;
293			};
294		};
295	};
296
297	ports {
298		#address-cells = <1>;
299		#size-cells = <0>;
300
301		port@0 {
302			reg = <0>;
303			dsi0_in: endpoint {
304				remote-endpoint = <&dither0_out>;
305			};
306		};
307
308		port@1 {
309			reg = <1>;
310			dsi0_out: endpoint {
311				remote-endpoint = <&dsi_panel_in>;
312			};
313		};
314	};
315};
316
317&disp_pwm1 {
318	pinctrl-names = "default";
319	pinctrl-0 = <&disp_pwm1_pins>;
320	status = "okay";
321};
322
323&dither0_in {
324	remote-endpoint = <&postmask0_out>;
325};
326
327&dither0_out {
328	remote-endpoint = <&dsi0_in>;
329};
330
331&gamma0_out {
332	remote-endpoint = <&postmask0_in>;
333};
334
335&gpu {
336	mali-supply = <&mt6359_vproc2_buck_reg>;
337	status = "okay";
338};
339
340&i2c0 {
341	pinctrl-names = "default";
342	pinctrl-0 = <&i2c0_pins>;
343	clock-frequency = <400000>;
344	status = "okay";
345
346	touchscreen@5d {
347		compatible = "goodix,gt9271";
348		reg = <0x5d>;
349		interrupt-parent = <&pio>;
350		interrupts-extended = <&pio 6 IRQ_TYPE_EDGE_RISING>;
351		irq-gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
352		reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
353		AVDD28-supply = <&touch0_fixed_3v3>;
354		VDDIO-supply = <&mt6359_vio18_ldo_reg>;
355		pinctrl-names = "default";
356		pinctrl-0 = <&touch_pins>;
357	};
358};
359
360&i2c1 {
361	pinctrl-names = "default";
362	pinctrl-0 = <&i2c1_pins>;
363	clock-frequency = <400000>;
364	status = "okay";
365
366	typec-mux@48 {
367		compatible = "ite,it5205";
368		reg = <0x48>;
369
370		mode-switch;
371		orientation-switch;
372
373		vcc-supply = <&mt6359_vcn33_1_bt_ldo_reg>;
374
375		port {
376			it5205_sbu_mux: endpoint {
377				remote-endpoint = <&typec_sbu_out>;
378			};
379		};
380	};
381};
382
383&i2c2 {
384	pinctrl-names = "default";
385	pinctrl-0 = <&i2c2_pins>;
386	clock-frequency = <400000>;
387	status = "okay";
388};
389
390&i2c3 {
391	pinctrl-names = "default";
392	pinctrl-0 = <&i2c3_pins>;
393	clock-frequency = <400000>;
394	status = "okay";
395};
396
397&i2c4 {
398	pinctrl-names = "default";
399	pinctrl-0 = <&i2c4_pins>;
400	clock-frequency = <1000000>;
401	status = "okay";
402
403	rt1715@4e {
404		compatible = "richtek,rt1715";
405		reg = <0x4e>;
406		interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>;
407		pinctrl-names = "default";
408		pinctrl-0 = <&tcpci_int_pins>;
409		vbus-supply = <&usb_p1_vbus>;
410
411		connector {
412			compatible = "usb-c-connector";
413			label = "USB-C";
414			data-role = "dual";
415			op-sink-microwatt = <10000000>;
416			power-role = "dual";
417			try-power-role  = "sink";
418			pd-revision = /bits/ 8 <0x03 0x00 0x01 0x08>;
419
420			sink-pdos = <PDO_FIXED(5000, 2000,
421					       PDO_FIXED_DUAL_ROLE |
422					       PDO_FIXED_DATA_SWAP)>;
423			source-pdos = <PDO_FIXED(5000, 2000,
424						 PDO_FIXED_DUAL_ROLE |
425						 PDO_FIXED_DATA_SWAP)>;
426
427			altmodes {
428				displayport {
429					svid = /bits/ 16 <0xff01>;
430					vdo = <0x001c1c47>;
431				};
432			};
433
434			ports {
435				#address-cells = <1>;
436				#size-cells = <0>;
437
438				port@0 {
439					reg = <0>;
440					typec_con_hs: endpoint {
441						remote-endpoint = <&mtu3_hs1_role_sw>;
442					};
443				};
444
445				port@1 {
446					reg = <1>;
447					typec_con_ss: endpoint {
448						remote-endpoint = <&xhci_ss_ep>;
449					};
450				};
451
452				port@2 {
453					reg = <2>;
454					typec_sbu_out: endpoint {
455						remote-endpoint = <&it5205_sbu_mux>;
456					};
457
458				};
459			};
460		};
461	};
462};
463
464&i2c5 {
465	pinctrl-names = "default";
466	pinctrl-0 = <&i2c5_pins>;
467	clock-frequency = <400000>;
468	status = "okay";
469};
470
471&i2c6 {
472	pinctrl-names = "default";
473	pinctrl-0 = <&i2c6_pins>;
474	clock-frequency = <400000>;
475	status = "okay";
476};
477
478&mfg0 {
479	domain-supply = <&mt6359_vproc2_buck_reg>;
480};
481
482&mfg1 {
483	domain-supply = <&mt6359_vsram_others_ldo_reg>;
484};
485
486&mipi_tx_config0 {
487	status = "okay";
488};
489
490&mmc0 {
491	status = "okay";
492	pinctrl-names = "default", "state_uhs";
493	pinctrl-0 = <&mmc0_default_pins>;
494	pinctrl-1 = <&mmc0_uhs_pins>;
495	bus-width = <8>;
496	max-frequency = <200000000>;
497	cap-mmc-highspeed;
498	mmc-hs200-1_8v;
499	mmc-hs400-1_8v;
500	supports-cqe;
501	cap-mmc-hw-reset;
502	no-sdio;
503	no-sd;
504	hs400-ds-delay = <0x1481b>;
505	vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
506	vqmmc-supply = <&mt6359_vufs_ldo_reg>;
507	non-removable;
508};
509
510&mmc1 {
511	status = "okay";
512	pinctrl-names = "default", "state_uhs";
513	pinctrl-0 = <&mmc1_default_pins>;
514	pinctrl-1 = <&mmc1_uhs_pins>;
515	bus-width = <4>;
516	max-frequency = <200000000>;
517	cap-sd-highspeed;
518	sd-uhs-sdr50;
519	sd-uhs-sdr104;
520	no-mmc;
521	no-sdio;
522	cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>;
523	vmmc-supply = <&mt6359_vpa_buck_reg>;
524	vqmmc-supply = <&mt6359_vsim1_ldo_reg>;
525};
526
527&mt6359_vbbck_ldo_reg {
528	regulator-always-on;
529};
530
531&mt6359_vcn18_ldo_reg {
532	regulator-name = "vcn18_pmu";
533	regulator-always-on;
534};
535
536&mt6359_vcn33_2_bt_ldo_reg {
537	regulator-name = "vcn33_2_pmu";
538	regulator-always-on;
539};
540
541&mt6359_vcore_buck_reg {
542	regulator-name = "dvdd_proc_l";
543	regulator-always-on;
544};
545
546&mt6359_vgpu11_buck_reg {
547	regulator-name = "dvdd_core";
548	regulator-always-on;
549};
550
551&mt6359_vpa_buck_reg {
552	regulator-name = "vpa_pmu";
553	regulator-max-microvolt = <3100000>;
554};
555
556&mt6359_vproc2_buck_reg {
557	/* The name "vgpu" is required by mtk-regulator-coupler */
558	regulator-name = "vgpu";
559	regulator-min-microvolt = <550000>;
560	regulator-max-microvolt = <800000>;
561	regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
562	regulator-coupled-max-spread = <6250>;
563};
564
565&mt6359_vpu_buck_reg {
566	regulator-name = "dvdd_adsp";
567	regulator-always-on;
568};
569
570&mt6359_vrf12_ldo_reg {
571	regulator-name = "va12_abb2_pmu";
572	regulator-always-on;
573};
574
575&mt6359_vsim1_ldo_reg {
576	regulator-name = "vsim1_pmu";
577	regulator-enable-ramp-delay = <480>;
578};
579
580&mt6359_vsram_others_ldo_reg {
581	/* The name "vsram_gpu" is required by mtk-regulator-coupler */
582	regulator-name = "vsram_gpu";
583	regulator-min-microvolt = <750000>;
584	regulator-max-microvolt = <800000>;
585	regulator-coupled-with = <&mt6359_vproc2_buck_reg>;
586	regulator-coupled-max-spread = <6250>;
587};
588
589&mt6359_vufs_ldo_reg {
590	regulator-name = "vufs18_pmu";
591	regulator-always-on;
592};
593
594&mt6359codec {
595	mediatek,mic-type-0 = <1>; /* ACC */
596	mediatek,mic-type-1 = <3>; /* DCC */
597};
598
599&ovl0_in {
600	remote-endpoint = <&vdosys0_ep_main>;
601};
602
603&pcie {
604	pinctrl-names = "default";
605	pinctrl-0 = <&pcie_default_pins>;
606	status = "okay";
607};
608
609&pciephy {
610	status = "okay";
611};
612
613&pio {
614	audio_default_pins: audio-default-pins {
615		pins-cmd-dat {
616			pinmux = <PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI>,
617				 <PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI>,
618				 <PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0>,
619				 <PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1>,
620				 <PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0>,
621				 <PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1>,
622				 <PINMUX_GPIO107__FUNC_B0_I2SIN_MCK>,
623				 <PINMUX_GPIO108__FUNC_B0_I2SIN_BCK>,
624				 <PINMUX_GPIO109__FUNC_B0_I2SIN_WS>,
625				 <PINMUX_GPIO110__FUNC_I0_I2SIN_D0>,
626				 <PINMUX_GPIO114__FUNC_O_I2SO2_MCK>,
627				 <PINMUX_GPIO115__FUNC_B0_I2SO2_BCK>,
628				 <PINMUX_GPIO116__FUNC_B0_I2SO2_WS>,
629				 <PINMUX_GPIO117__FUNC_O_I2SO2_D0>,
630				 <PINMUX_GPIO118__FUNC_O_I2SO2_D1>,
631				 <PINMUX_GPIO121__FUNC_B0_PCM_CLK>,
632				 <PINMUX_GPIO122__FUNC_B0_PCM_SYNC>,
633				 <PINMUX_GPIO124__FUNC_I0_PCM_DI>,
634				 <PINMUX_GPIO125__FUNC_O_DMIC1_CLK>,
635				 <PINMUX_GPIO126__FUNC_I0_DMIC1_DAT>,
636				 <PINMUX_GPIO128__FUNC_O_DMIC2_CLK>,
637				 <PINMUX_GPIO129__FUNC_I0_DMIC2_DAT>;
638		};
639	};
640
641	disp_pwm1_pins: disp-pwm1-pins {
642		pins-pwm {
643			pinmux = <PINMUX_GPIO30__FUNC_O_DISP_PWM1>;
644		};
645	};
646
647	dptx_pins: dptx-pins {
648		pins-cmd-dat {
649			pinmux = <PINMUX_GPIO46__FUNC_I0_DP_TX_HPD>;
650			bias-pull-up;
651		};
652	};
653
654	edp_panel_3v3_en_pins: edp-panel-3v3-en-pins {
655		pins1 {
656			pinmux = <PINMUX_GPIO15__FUNC_B_GPIO15>;
657			output-high;
658		};
659	};
660
661	eth_default_pins: eth-default-pins {
662		pins-cc {
663			pinmux = <PINMUX_GPIO139__FUNC_B0_GBE_TXC>,
664				 <PINMUX_GPIO140__FUNC_I0_GBE_RXC>,
665				 <PINMUX_GPIO141__FUNC_I0_GBE_RXDV>,
666				 <PINMUX_GPIO142__FUNC_O_GBE_TXEN>;
667			drive-strength = <8>;
668		};
669
670		pins-mdio {
671			pinmux = <PINMUX_GPIO143__FUNC_O_GBE_MDC>,
672				 <PINMUX_GPIO144__FUNC_B1_GBE_MDIO>;
673			drive-strength = <8>;
674			input-enable;
675		};
676
677		pins-power {
678			pinmux = <PINMUX_GPIO145__FUNC_B_GPIO145>,
679				 <PINMUX_GPIO146__FUNC_B_GPIO146>;
680			output-high;
681		};
682
683		pins-rxd {
684			pinmux = <PINMUX_GPIO135__FUNC_I0_GBE_RXD3>,
685				 <PINMUX_GPIO136__FUNC_I0_GBE_RXD2>,
686				 <PINMUX_GPIO137__FUNC_I0_GBE_RXD1>,
687				 <PINMUX_GPIO138__FUNC_I0_GBE_RXD0>;
688			drive-strength = <8>;
689		};
690
691		pins-txd {
692			pinmux = <PINMUX_GPIO131__FUNC_O_GBE_TXD3>,
693				 <PINMUX_GPIO132__FUNC_O_GBE_TXD2>,
694				 <PINMUX_GPIO133__FUNC_O_GBE_TXD1>,
695				 <PINMUX_GPIO134__FUNC_O_GBE_TXD0>;
696			drive-strength = <8>;
697		};
698	};
699
700	eth_sleep_pins: eth-sleep-pins {
701		pins-cc {
702			pinmux = <PINMUX_GPIO139__FUNC_B_GPIO139>,
703				 <PINMUX_GPIO140__FUNC_B_GPIO140>,
704				 <PINMUX_GPIO141__FUNC_B_GPIO141>,
705				 <PINMUX_GPIO142__FUNC_B_GPIO142>;
706		};
707
708		pins-mdio {
709			pinmux = <PINMUX_GPIO143__FUNC_B_GPIO143>,
710				 <PINMUX_GPIO144__FUNC_B_GPIO144>;
711			input-disable;
712			bias-disable;
713		};
714
715		pins-rxd {
716			pinmux = <PINMUX_GPIO135__FUNC_B_GPIO135>,
717				 <PINMUX_GPIO136__FUNC_B_GPIO136>,
718				 <PINMUX_GPIO137__FUNC_B_GPIO137>,
719				 <PINMUX_GPIO138__FUNC_B_GPIO138>;
720		};
721
722		pins-txd {
723			pinmux = <PINMUX_GPIO131__FUNC_B_GPIO131>,
724				 <PINMUX_GPIO132__FUNC_B_GPIO132>,
725				 <PINMUX_GPIO133__FUNC_B_GPIO133>,
726				 <PINMUX_GPIO134__FUNC_B_GPIO134>;
727		};
728	};
729
730	i2c0_pins: i2c0-pins {
731		pins {
732			pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>,
733				 <PINMUX_GPIO55__FUNC_B1_SCL0>;
734			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
735			drive-strength-microamp = <1000>;
736		};
737	};
738
739	i2c1_pins: i2c1-pins {
740		pins {
741			pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>,
742				 <PINMUX_GPIO57__FUNC_B1_SCL1>;
743			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
744			drive-strength-microamp = <1000>;
745		};
746	};
747
748	i2c2_pins: i2c2-pins {
749		pins {
750			pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>,
751				 <PINMUX_GPIO59__FUNC_B1_SCL2>;
752			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
753			drive-strength-microamp = <1000>;
754		};
755	};
756
757	i2c3_pins: i2c3-pins {
758		pins {
759			pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>,
760				 <PINMUX_GPIO61__FUNC_B1_SCL3>;
761			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
762			drive-strength-microamp = <1000>;
763		};
764	};
765
766	i2c4_pins: i2c4-pins {
767		pins {
768			pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>,
769				 <PINMUX_GPIO63__FUNC_B1_SCL4>;
770			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
771			drive-strength-microamp = <1000>;
772		};
773	};
774
775	i2c5_pins: i2c5-pins {
776		pins {
777			pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>,
778				 <PINMUX_GPIO65__FUNC_B1_SCL5>;
779			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
780			drive-strength-microamp = <1000>;
781		};
782	};
783
784	i2c6_pins: i2c6-pins {
785		pins {
786			pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>,
787				 <PINMUX_GPIO67__FUNC_B1_SCL6>;
788			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
789			drive-strength-microamp = <1000>;
790		};
791	};
792
793	gpio_key_pins: gpio-key-pins {
794		pins {
795			pinmux = <PINMUX_GPIO42__FUNC_B1_KPCOL0>,
796				 <PINMUX_GPIO43__FUNC_B1_KPCOL1>,
797				 <PINMUX_GPIO44__FUNC_B1_KPROW0>;
798		};
799	};
800
801	mmc0_default_pins: mmc0-default-pins {
802		pins-clk {
803			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
804			drive-strength = <6>;
805			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
806		};
807
808		pins-cmd-dat {
809			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
810				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
811				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
812				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
813				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
814				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
815				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
816				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
817				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
818			input-enable;
819			drive-strength = <6>;
820			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
821		};
822
823		pins-rst {
824			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
825			drive-strength = <6>;
826			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
827		};
828	};
829
830	mmc0_uhs_pins: mmc0-uhs-pins {
831		pins-clk {
832			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
833			drive-strength = <8>;
834			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
835		};
836
837		pins-cmd-dat {
838			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
839				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
840				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
841				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
842				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
843				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
844				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
845				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
846				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
847			input-enable;
848			drive-strength = <8>;
849			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
850		};
851
852		pins-ds {
853			pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>;
854			drive-strength = <8>;
855			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
856		};
857
858		pins-rst {
859			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
860			drive-strength = <8>;
861			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
862		};
863	};
864
865	mmc1_default_pins: mmc1-default-pins {
866		pins-clk {
867			pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>;
868			drive-strength = <6>;
869			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
870		};
871
872		pins-cmd-dat {
873			pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>,
874				 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>,
875				 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>,
876				 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>,
877				 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>;
878			input-enable;
879			drive-strength = <6>;
880			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
881		};
882
883		pins-insert {
884			pinmux = <PINMUX_GPIO2__FUNC_B_GPIO2>;
885			bias-pull-up;
886		};
887	};
888
889	mmc1_uhs_pins: mmc1-uhs-pins {
890		pins-clk {
891			pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>;
892			drive-strength = <6>;
893			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
894		};
895
896		pins-cmd-dat {
897			pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>,
898				 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>,
899				 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>,
900				 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>,
901				 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>;
902			input-enable;
903			drive-strength = <6>;
904			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
905		};
906	};
907
908	mmc2_default_pins: mmc2-default-pins {
909		pins-clk {
910			pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>;
911			drive-strength = <4>;
912			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
913		};
914
915		pins-cmd-dat {
916			pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>,
917				 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>,
918				 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>,
919				 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>,
920				 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>;
921			input-enable;
922			drive-strength = <6>;
923			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
924		};
925
926		pins-pcm {
927			pinmux = <PINMUX_GPIO123__FUNC_O_PCM_DO>;
928		};
929	};
930
931	mmc2_uhs_pins: mmc2-uhs-pins {
932		pins-clk {
933			pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>;
934			drive-strength = <4>;
935			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
936		};
937
938		pins-cmd-dat {
939			pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>,
940				 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>,
941				 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>,
942				 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>,
943				 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>;
944			input-enable;
945			drive-strength = <6>;
946			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
947		};
948	};
949
950	mmc2_eint_pins: mmc2-eint-pins {
951		pins-dat1 {
952			pinmux = <PINMUX_GPIO172__FUNC_B_GPIO172>;
953			input-enable;
954			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
955		};
956	};
957
958	mmc2_dat1_pins: mmc2-dat1-pins {
959		pins-dat1 {
960			pinmux = <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>;
961			input-enable;
962			drive-strength = <6>;
963			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
964		};
965	};
966
967	dsi0_vreg_en_pins: dsi0-vreg-en-pins {
968		pins-pwr-en {
969			pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>;
970			output-low;
971		};
972	};
973
974	panel_default_pins: panel-default-pins {
975		pins-rst {
976			pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>;
977			output-low;
978		};
979
980		pins-en {
981			pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>;
982			output-low;
983		};
984	};
985
986	pcie_default_pins: pcie-default-pins {
987		pins {
988			pinmux = <PINMUX_GPIO47__FUNC_I1_WAKEN>,
989				 <PINMUX_GPIO48__FUNC_O_PERSTN>,
990				 <PINMUX_GPIO49__FUNC_B1_CLKREQN>;
991			bias-pull-up;
992		};
993	};
994
995	rt1715_int_pins: rt1715-int-pins {
996		pins_cmd0_dat {
997			pinmux = <PINMUX_GPIO12__FUNC_B_GPIO12>;
998			bias-pull-up;
999			input-enable;
1000		};
1001	};
1002
1003	spi0_pins: spi0-pins {
1004		pins-spi {
1005			pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>,
1006				<PINMUX_GPIO70__FUNC_O_SPIM0_CLK>,
1007				<PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>,
1008				<PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>;
1009			bias-disable;
1010		};
1011	};
1012
1013	spi1_pins: spi1-pins {
1014		pins-spi {
1015			pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>,
1016				<PINMUX_GPIO76__FUNC_O_SPIM1_CLK>,
1017				<PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>,
1018				<PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>;
1019			bias-disable;
1020		};
1021	};
1022
1023	spi2_pins: spi2-pins {
1024		pins-spi {
1025			pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>,
1026				<PINMUX_GPIO80__FUNC_O_SPIM2_CLK>,
1027				<PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>,
1028				<PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>;
1029			bias-disable;
1030		};
1031	};
1032
1033	touch_vreg_pins: touch-avdd-pins {
1034		pins-power {
1035			pinmux = <PINMUX_GPIO120__FUNC_B_GPIO120>;
1036			output-high;
1037		};
1038	};
1039
1040	touch_pins: touch-pins {
1041		pins-irq {
1042			pinmux = <PINMUX_GPIO6__FUNC_B_GPIO6>;
1043			input-enable;
1044			bias-disable;
1045		};
1046
1047		pins-reset {
1048			pinmux = <PINMUX_GPIO5__FUNC_B_GPIO5>;
1049			output-high;
1050		};
1051	};
1052
1053	tcpci_int_pins: tcpci-int-pins {
1054		pins-int-n {
1055			pinmux = <PINMUX_GPIO12__FUNC_B_GPIO12>;
1056			bias-pull-up;
1057			input-enable;
1058		};
1059	};
1060
1061	uart0_pins: uart0-pins {
1062		pins {
1063			pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>,
1064				 <PINMUX_GPIO32__FUNC_I1_URXD0>;
1065			bias-pull-up;
1066		};
1067	};
1068
1069	uart1_pins: uart1-pins {
1070		pins {
1071			pinmux = <PINMUX_GPIO33__FUNC_O_UTXD1>,
1072				 <PINMUX_GPIO34__FUNC_I1_URXD1>;
1073			bias-pull-up;
1074		};
1075	};
1076
1077	uart2_pins: uart2-pins {
1078		pins {
1079			pinmux = <PINMUX_GPIO35__FUNC_O_UTXD2>,
1080				 <PINMUX_GPIO36__FUNC_I1_URXD2>;
1081			bias-pull-up;
1082		};
1083	};
1084
1085	usb_default_pins: usb-default-pins {
1086		pins-iddig {
1087			pinmux = <PINMUX_GPIO83__FUNC_B_GPIO83>;
1088			input-enable;
1089			bias-pull-up;
1090		};
1091
1092		pins-valid {
1093			pinmux = <PINMUX_GPIO85__FUNC_I0_VBUSVALID>;
1094			input-enable;
1095		};
1096
1097		pins-vbus {
1098			pinmux = <PINMUX_GPIO84__FUNC_O_USB_DRVVBUS>;
1099			output-high;
1100		};
1101
1102	};
1103
1104	usb1_default_pins: usb1-default-pins {
1105		pins-valid {
1106			pinmux = <PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P>;
1107			input-enable;
1108		};
1109
1110		pins-usb-hub-3v3-en {
1111			pinmux = <PINMUX_GPIO112__FUNC_B_GPIO112>;
1112			output-high;
1113		};
1114	};
1115
1116	usb2_default_pins: usb2-default-pins {
1117		pins-iddig {
1118			pinmux = <PINMUX_GPIO89__FUNC_B_GPIO89>;
1119			input-enable;
1120			bias-pull-up;
1121		};
1122	};
1123
1124	wifi_pwrseq_pins: wifi-pwrseq-pins {
1125		pins-wifi-enable {
1126			pinmux = <PINMUX_GPIO127__FUNC_B_GPIO127>;
1127			output-low;
1128		};
1129	};
1130};
1131
1132&eth {
1133	phy-mode ="rgmii-id";
1134	phy-handle = <&ethernet_phy0>;
1135	pinctrl-names = "default", "sleep";
1136	pinctrl-0 = <&eth_default_pins>;
1137	pinctrl-1 = <&eth_sleep_pins>;
1138	mediatek,mac-wol;
1139	snps,reset-gpio = <&pio 147 GPIO_ACTIVE_HIGH>;
1140	snps,reset-delays-us = <0 10000 10000>;
1141	status = "okay";
1142};
1143
1144&eth_mdio {
1145	ethernet_phy0: ethernet-phy@1 {
1146		compatible = "ethernet-phy-id001c.c916";
1147		reg = <0x1>;
1148	};
1149};
1150
1151&pmic {
1152	interrupt-parent = <&pio>;
1153	interrupts = <222 IRQ_TYPE_LEVEL_HIGH>;
1154
1155	mt6359keys: keys {
1156		compatible = "mediatek,mt6359-keys";
1157		mediatek,long-press-mode = <1>;
1158		power-off-time-sec = <0>;
1159
1160		power-key {
1161			linux,keycodes = <KEY_POWER>;
1162			wakeup-source;
1163		};
1164
1165		home {
1166			linux,keycodes = <KEY_HOME>;
1167		};
1168	};
1169};
1170
1171&postmask0_in {
1172	remote-endpoint = <&gamma0_out>;
1173};
1174
1175&postmask0_out {
1176	remote-endpoint = <&dither0_in>;
1177};
1178
1179&scp_cluster {
1180	status = "okay";
1181};
1182
1183&scp_c0 {
1184	memory-region = <&scp_mem>;
1185	status = "okay";
1186};
1187
1188&sound {
1189	compatible = "mediatek,mt8390-mt6359-evk", "mediatek,mt8188-mt6359-evb";
1190	model = "mt8390-evk";
1191	pinctrl-names = "default";
1192	pinctrl-0 = <&audio_default_pins>;
1193	audio-routing =
1194		"Headphone", "Headphone L",
1195		"Headphone", "Headphone R",
1196		"DMIC_INPUT", "AP DMIC",
1197		"AP DMIC", "AUDGLB",
1198		"AP DMIC", "MIC_BIAS_0",
1199		"AP DMIC", "MIC_BIAS_2";
1200	mediatek,adsp = <&adsp>;
1201	status = "okay";
1202
1203	dai-link-0 {
1204		link-name = "DL_SRC_BE";
1205
1206		codec {
1207			sound-dai = <&pmic 0>;
1208		};
1209	};
1210
1211	dai-link-1 {
1212		link-name = "DMIC_BE";
1213
1214		codec {
1215			sound-dai = <&dmic_codec>;
1216		};
1217	};
1218};
1219
1220&spi2 {
1221	pinctrl-0 = <&spi2_pins>;
1222	pinctrl-names = "default";
1223	mediatek,pad-select = <0>;
1224	#address-cells = <1>;
1225	#size-cells = <0>;
1226	status = "okay";
1227};
1228
1229&uart0 {
1230	pinctrl-0 = <&uart0_pins>;
1231	pinctrl-names = "default";
1232	status = "okay";
1233};
1234
1235&uart1 {
1236	pinctrl-0 = <&uart1_pins>;
1237	pinctrl-names = "default";
1238	status = "okay";
1239};
1240
1241&uart2 {
1242	pinctrl-0 = <&uart2_pins>;
1243	pinctrl-names = "default";
1244	status = "okay";
1245};
1246
1247&vdosys0 {
1248	port {
1249		#address-cells = <1>;
1250		#size-cells = <0>;
1251
1252		vdosys0_ep_main: endpoint@0 {
1253			reg = <0>;
1254			remote-endpoint = <&ovl0_in>;
1255		};
1256	};
1257};
1258
1259&u3phy0 {
1260	status = "okay";
1261};
1262
1263&u3phy1 {
1264	status = "okay";
1265};
1266
1267&u3phy2 {
1268	status = "okay";
1269};
1270
1271&ssusb0 {
1272	dr_mode = "otg";
1273	maximum-speed = "high-speed";
1274	usb-role-switch;
1275	wakeup-source;
1276	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1277	pinctrl-0 = <&usb_default_pins>;
1278	pinctrl-names = "default";
1279	status = "okay";
1280
1281	connector {
1282		compatible = "gpio-usb-b-connector", "usb-b-connector";
1283		type = "micro";
1284		id-gpios = <&pio 83 GPIO_ACTIVE_HIGH>;
1285		vbus-supply = <&usb_p0_vbus>;
1286	};
1287};
1288
1289&xhci0 {
1290	status = "okay";
1291};
1292
1293&ssusb1 {
1294	dr_mode = "otg";
1295	usb-role-switch;
1296	wakeup-source;
1297	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1298	pinctrl-0 = <&usb1_default_pins>;
1299	pinctrl-names = "default";
1300	status = "okay";
1301
1302	port {
1303		mtu3_hs1_role_sw: endpoint {
1304			remote-endpoint = <&typec_con_hs>;
1305		};
1306	};
1307};
1308
1309&xhci1 {
1310	status = "okay";
1311	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1312	#address-cells = <1>;
1313	#size-cells = <0>;
1314
1315	hub_2_0: hub@1 {
1316		compatible = "usb451,8025";
1317		reg = <1>;
1318		peer-hub = <&hub_3_0>;
1319		reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
1320		vdd-supply = <&usb_hub_fixed_3v3>;
1321	};
1322
1323	hub_3_0: hub@2 {
1324		compatible = "usb451,8027";
1325		reg = <2>;
1326		peer-hub = <&hub_2_0>;
1327		reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
1328		vdd-supply = <&usb_hub_fixed_3v3>;
1329	};
1330
1331	port {
1332		xhci_ss_ep: endpoint {
1333			remote-endpoint = <&typec_con_ss>;
1334		};
1335	};
1336};
1337
1338&ssusb2 {
1339	/*
1340	 * the ssusb2 controller is one but we got two ports : one is routed
1341	 * to the M.2 slot, the other is on the RPi header who does support
1342	 * full OTG.
1343	 * As the controller is shared between them, the role switch default
1344	 * mode is set to host to make any peripheral inserted in the M.2
1345	 * slot (i.e BT/WIFI module) be detected when the other port is
1346	 * unused.
1347	 */
1348	dr_mode = "otg";
1349	maximum-speed = "high-speed";
1350	role-switch-default-mode = "host";
1351	usb-role-switch;
1352	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1353	wakeup-source;
1354	pinctrl-names = "default";
1355	pinctrl-0 = <&usb2_default_pins>;
1356	status = "okay";
1357
1358	connector {
1359		compatible = "gpio-usb-b-connector", "usb-b-connector";
1360		type = "micro";
1361		id-gpios = <&pio 89 GPIO_ACTIVE_LOW>;
1362		vbus-supply = <&usb_p2_vbus>;
1363	};
1364};
1365
1366&xhci2 {
1367	vusb33-supply = <&mt6359_vusb_ldo_reg>;
1368	vbus-supply = <&sdio_fixed_3v3>; /* wifi_3v3 */
1369	status = "okay";
1370};
1371