1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019 Mellanox Technologies */
3
4 #include <devlink.h>
5
6 #include "mlx5_core.h"
7 #include "fw_reset.h"
8 #include "fs_core.h"
9 #include "eswitch.h"
10 #include "esw/qos.h"
11 #include "sf/dev/dev.h"
12 #include "sf/sf.h"
13
mlx5_devlink_flash_update(struct devlink * devlink,struct devlink_flash_update_params * params,struct netlink_ext_ack * extack)14 static int mlx5_devlink_flash_update(struct devlink *devlink,
15 struct devlink_flash_update_params *params,
16 struct netlink_ext_ack *extack)
17 {
18 struct mlx5_core_dev *dev = devlink_priv(devlink);
19
20 return mlx5_firmware_flash(dev, params->fw, extack);
21 }
22
mlx5_fw_ver_major(u32 version)23 static u8 mlx5_fw_ver_major(u32 version)
24 {
25 return (version >> 24) & 0xff;
26 }
27
mlx5_fw_ver_minor(u32 version)28 static u8 mlx5_fw_ver_minor(u32 version)
29 {
30 return (version >> 16) & 0xff;
31 }
32
mlx5_fw_ver_subminor(u32 version)33 static u16 mlx5_fw_ver_subminor(u32 version)
34 {
35 return version & 0xffff;
36 }
37
mlx5_devlink_serial_numbers_put(struct mlx5_core_dev * dev,struct devlink_info_req * req,struct netlink_ext_ack * extack)38 static int mlx5_devlink_serial_numbers_put(struct mlx5_core_dev *dev,
39 struct devlink_info_req *req,
40 struct netlink_ext_ack *extack)
41 {
42 struct pci_dev *pdev = dev->pdev;
43 unsigned int vpd_size, kw_len;
44 char *str, *end;
45 u8 *vpd_data;
46 int err = 0;
47 int start;
48
49 vpd_data = pci_vpd_alloc(pdev, &vpd_size);
50 if (IS_ERR(vpd_data))
51 return 0;
52
53 start = pci_vpd_find_ro_info_keyword(vpd_data, vpd_size,
54 PCI_VPD_RO_KEYWORD_SERIALNO, &kw_len);
55 if (start >= 0) {
56 str = kstrndup(vpd_data + start, kw_len, GFP_KERNEL);
57 if (!str) {
58 err = -ENOMEM;
59 goto end;
60 }
61 end = strchrnul(str, ' ');
62 *end = '\0';
63 err = devlink_info_board_serial_number_put(req, str);
64 kfree(str);
65 if (err)
66 goto end;
67 }
68
69 start = pci_vpd_find_ro_info_keyword(vpd_data, vpd_size, "V3", &kw_len);
70 if (start >= 0) {
71 str = kstrndup(vpd_data + start, kw_len, GFP_KERNEL);
72 if (!str) {
73 err = -ENOMEM;
74 goto end;
75 }
76 err = devlink_info_serial_number_put(req, str);
77 kfree(str);
78 if (err)
79 goto end;
80 }
81
82 end:
83 kfree(vpd_data);
84 return err;
85 }
86
87 #define DEVLINK_FW_STRING_LEN 32
88
89 static int
mlx5_devlink_info_get(struct devlink * devlink,struct devlink_info_req * req,struct netlink_ext_ack * extack)90 mlx5_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
91 struct netlink_ext_ack *extack)
92 {
93 struct mlx5_core_dev *dev = devlink_priv(devlink);
94 char version_str[DEVLINK_FW_STRING_LEN];
95 u32 running_fw, stored_fw;
96 int err;
97
98 if (!mlx5_core_is_pf(dev))
99 return 0;
100
101 err = mlx5_devlink_serial_numbers_put(dev, req, extack);
102 if (err)
103 return err;
104
105 err = devlink_info_version_fixed_put(req, "fw.psid", dev->board_id);
106 if (err)
107 return err;
108
109 err = mlx5_fw_version_query(dev, &running_fw, &stored_fw);
110 if (err)
111 return err;
112
113 snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
114 mlx5_fw_ver_major(running_fw), mlx5_fw_ver_minor(running_fw),
115 mlx5_fw_ver_subminor(running_fw));
116 err = devlink_info_version_running_put(req, "fw.version", version_str);
117 if (err)
118 return err;
119 err = devlink_info_version_running_put(req,
120 DEVLINK_INFO_VERSION_GENERIC_FW,
121 version_str);
122 if (err)
123 return err;
124
125 /* no pending version, return running (stored) version */
126 if (stored_fw == 0)
127 stored_fw = running_fw;
128
129 snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
130 mlx5_fw_ver_major(stored_fw), mlx5_fw_ver_minor(stored_fw),
131 mlx5_fw_ver_subminor(stored_fw));
132 err = devlink_info_version_stored_put(req, "fw.version", version_str);
133 if (err)
134 return err;
135 return devlink_info_version_stored_put(req,
136 DEVLINK_INFO_VERSION_GENERIC_FW,
137 version_str);
138 }
139
mlx5_devlink_reload_fw_activate(struct devlink * devlink,struct netlink_ext_ack * extack)140 static int mlx5_devlink_reload_fw_activate(struct devlink *devlink, struct netlink_ext_ack *extack)
141 {
142 struct mlx5_core_dev *dev = devlink_priv(devlink);
143 u8 reset_level, reset_type, net_port_alive;
144 int err;
145
146 err = mlx5_fw_reset_query(dev, &reset_level, &reset_type);
147 if (err)
148 return err;
149 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL3)) {
150 NL_SET_ERR_MSG_MOD(extack, "FW activate requires reboot");
151 return -EINVAL;
152 }
153
154 net_port_alive = !!(reset_type & MLX5_MFRL_REG_RESET_TYPE_NET_PORT_ALIVE);
155 err = mlx5_fw_reset_set_reset_sync(dev, net_port_alive, extack);
156 if (err)
157 return err;
158
159 err = mlx5_fw_reset_wait_reset_done(dev);
160 if (err)
161 return err;
162
163 mlx5_unload_one_devl_locked(dev, true);
164 err = mlx5_health_wait_pci_up(dev);
165 if (err)
166 NL_SET_ERR_MSG_MOD(extack, "FW activate aborted, PCI reads fail after reset");
167
168 return err;
169 }
170
mlx5_devlink_trigger_fw_live_patch(struct devlink * devlink,struct netlink_ext_ack * extack)171 static int mlx5_devlink_trigger_fw_live_patch(struct devlink *devlink,
172 struct netlink_ext_ack *extack)
173 {
174 struct mlx5_core_dev *dev = devlink_priv(devlink);
175 u8 reset_level;
176 int err;
177
178 err = mlx5_fw_reset_query(dev, &reset_level, NULL);
179 if (err)
180 return err;
181 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL0)) {
182 NL_SET_ERR_MSG_MOD(extack,
183 "FW upgrade to the stored FW can't be done by FW live patching");
184 return -EINVAL;
185 }
186
187 return mlx5_fw_reset_set_live_patch(dev);
188 }
189
mlx5_devlink_reload_down(struct devlink * devlink,bool netns_change,enum devlink_reload_action action,enum devlink_reload_limit limit,struct netlink_ext_ack * extack)190 static int mlx5_devlink_reload_down(struct devlink *devlink, bool netns_change,
191 enum devlink_reload_action action,
192 enum devlink_reload_limit limit,
193 struct netlink_ext_ack *extack)
194 {
195 struct mlx5_core_dev *dev = devlink_priv(devlink);
196 struct pci_dev *pdev = dev->pdev;
197 int ret = 0;
198
199 if (mlx5_dev_is_lightweight(dev)) {
200 if (action != DEVLINK_RELOAD_ACTION_DRIVER_REINIT)
201 return -EOPNOTSUPP;
202 mlx5_unload_one_light(dev);
203 return 0;
204 }
205
206 if (mlx5_lag_is_active(dev)) {
207 NL_SET_ERR_MSG_MOD(extack, "reload is unsupported in Lag mode");
208 return -EOPNOTSUPP;
209 }
210
211 if (mlx5_core_is_mp_slave(dev)) {
212 NL_SET_ERR_MSG_MOD(extack, "reload is unsupported for multi port slave");
213 return -EOPNOTSUPP;
214 }
215
216 if (action == DEVLINK_RELOAD_ACTION_FW_ACTIVATE &&
217 !dev->priv.fw_reset) {
218 NL_SET_ERR_MSG_MOD(extack, "FW activate is unsupported for this function");
219 return -EOPNOTSUPP;
220 }
221
222 if (mlx5_core_is_pf(dev) && pci_num_vf(pdev))
223 NL_SET_ERR_MSG_MOD(extack, "reload while VFs are present is unfavorable");
224
225 switch (action) {
226 case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
227 mlx5_unload_one_devl_locked(dev, false);
228 break;
229 case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
230 if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
231 ret = mlx5_devlink_trigger_fw_live_patch(devlink, extack);
232 else
233 ret = mlx5_devlink_reload_fw_activate(devlink, extack);
234 break;
235 default:
236 /* Unsupported action should not get to this function */
237 WARN_ON(1);
238 ret = -EOPNOTSUPP;
239 }
240
241 return ret;
242 }
243
mlx5_devlink_reload_up(struct devlink * devlink,enum devlink_reload_action action,enum devlink_reload_limit limit,u32 * actions_performed,struct netlink_ext_ack * extack)244 static int mlx5_devlink_reload_up(struct devlink *devlink, enum devlink_reload_action action,
245 enum devlink_reload_limit limit, u32 *actions_performed,
246 struct netlink_ext_ack *extack)
247 {
248 struct mlx5_core_dev *dev = devlink_priv(devlink);
249 int ret = 0;
250
251 *actions_performed = BIT(action);
252 switch (action) {
253 case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
254 if (mlx5_dev_is_lightweight(dev)) {
255 mlx5_fw_reporters_create(dev);
256 return mlx5_init_one_devl_locked(dev);
257 }
258 ret = mlx5_load_one_devl_locked(dev, false);
259 break;
260 case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
261 if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
262 break;
263 /* On fw_activate action, also driver is reloaded and reinit performed */
264 *actions_performed |= BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);
265 ret = mlx5_load_one_devl_locked(dev, true);
266 if (ret)
267 return ret;
268 ret = mlx5_fw_reset_verify_fw_complete(dev, extack);
269 break;
270 default:
271 /* Unsupported action should not get to this function */
272 WARN_ON(1);
273 ret = -EOPNOTSUPP;
274 }
275
276 return ret;
277 }
278
mlx5_find_trap_by_id(struct mlx5_core_dev * dev,int trap_id)279 static struct mlx5_devlink_trap *mlx5_find_trap_by_id(struct mlx5_core_dev *dev, int trap_id)
280 {
281 struct mlx5_devlink_trap *dl_trap;
282
283 list_for_each_entry(dl_trap, &dev->priv.traps, list)
284 if (dl_trap->trap.id == trap_id)
285 return dl_trap;
286
287 return NULL;
288 }
289
mlx5_devlink_trap_init(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)290 static int mlx5_devlink_trap_init(struct devlink *devlink, const struct devlink_trap *trap,
291 void *trap_ctx)
292 {
293 struct mlx5_core_dev *dev = devlink_priv(devlink);
294 struct mlx5_devlink_trap *dl_trap;
295
296 dl_trap = kzalloc(sizeof(*dl_trap), GFP_KERNEL);
297 if (!dl_trap)
298 return -ENOMEM;
299
300 dl_trap->trap.id = trap->id;
301 dl_trap->trap.action = DEVLINK_TRAP_ACTION_DROP;
302 dl_trap->item = trap_ctx;
303
304 if (mlx5_find_trap_by_id(dev, trap->id)) {
305 kfree(dl_trap);
306 mlx5_core_err(dev, "Devlink trap: Trap 0x%x already found", trap->id);
307 return -EEXIST;
308 }
309
310 list_add_tail(&dl_trap->list, &dev->priv.traps);
311 return 0;
312 }
313
mlx5_devlink_trap_fini(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)314 static void mlx5_devlink_trap_fini(struct devlink *devlink, const struct devlink_trap *trap,
315 void *trap_ctx)
316 {
317 struct mlx5_core_dev *dev = devlink_priv(devlink);
318 struct mlx5_devlink_trap *dl_trap;
319
320 dl_trap = mlx5_find_trap_by_id(dev, trap->id);
321 if (!dl_trap) {
322 mlx5_core_err(dev, "Devlink trap: Missing trap id 0x%x", trap->id);
323 return;
324 }
325 list_del(&dl_trap->list);
326 kfree(dl_trap);
327 }
328
mlx5_devlink_trap_action_set(struct devlink * devlink,const struct devlink_trap * trap,enum devlink_trap_action action,struct netlink_ext_ack * extack)329 static int mlx5_devlink_trap_action_set(struct devlink *devlink,
330 const struct devlink_trap *trap,
331 enum devlink_trap_action action,
332 struct netlink_ext_ack *extack)
333 {
334 struct mlx5_core_dev *dev = devlink_priv(devlink);
335 struct mlx5_devlink_trap_event_ctx trap_event_ctx;
336 enum devlink_trap_action action_orig;
337 struct mlx5_devlink_trap *dl_trap;
338 int err;
339
340 if (is_mdev_switchdev_mode(dev)) {
341 NL_SET_ERR_MSG_MOD(extack, "Devlink traps can't be set in switchdev mode");
342 return -EOPNOTSUPP;
343 }
344
345 dl_trap = mlx5_find_trap_by_id(dev, trap->id);
346 if (!dl_trap) {
347 mlx5_core_err(dev, "Devlink trap: Set action on invalid trap id 0x%x", trap->id);
348 return -EINVAL;
349 }
350
351 if (action != DEVLINK_TRAP_ACTION_DROP && action != DEVLINK_TRAP_ACTION_TRAP)
352 return -EOPNOTSUPP;
353
354 if (action == dl_trap->trap.action)
355 return 0;
356
357 action_orig = dl_trap->trap.action;
358 dl_trap->trap.action = action;
359 trap_event_ctx.trap = &dl_trap->trap;
360 trap_event_ctx.err = 0;
361 err = mlx5_blocking_notifier_call_chain(dev, MLX5_DRIVER_EVENT_TYPE_TRAP,
362 &trap_event_ctx);
363 if (err == NOTIFY_BAD)
364 dl_trap->trap.action = action_orig;
365
366 return trap_event_ctx.err;
367 }
368
369 static const struct devlink_ops mlx5_devlink_ops = {
370 #ifdef CONFIG_MLX5_ESWITCH
371 .eswitch_mode_set = mlx5_devlink_eswitch_mode_set,
372 .eswitch_mode_get = mlx5_devlink_eswitch_mode_get,
373 .eswitch_inline_mode_set = mlx5_devlink_eswitch_inline_mode_set,
374 .eswitch_inline_mode_get = mlx5_devlink_eswitch_inline_mode_get,
375 .eswitch_encap_mode_set = mlx5_devlink_eswitch_encap_mode_set,
376 .eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get,
377 .rate_leaf_tx_share_set = mlx5_esw_devlink_rate_leaf_tx_share_set,
378 .rate_leaf_tx_max_set = mlx5_esw_devlink_rate_leaf_tx_max_set,
379 .rate_leaf_tc_bw_set = mlx5_esw_devlink_rate_leaf_tc_bw_set,
380 .rate_node_tc_bw_set = mlx5_esw_devlink_rate_node_tc_bw_set,
381 .rate_node_tx_share_set = mlx5_esw_devlink_rate_node_tx_share_set,
382 .rate_node_tx_max_set = mlx5_esw_devlink_rate_node_tx_max_set,
383 .rate_node_new = mlx5_esw_devlink_rate_node_new,
384 .rate_node_del = mlx5_esw_devlink_rate_node_del,
385 .rate_leaf_parent_set = mlx5_esw_devlink_rate_leaf_parent_set,
386 .rate_node_parent_set = mlx5_esw_devlink_rate_node_parent_set,
387 #endif
388 #ifdef CONFIG_MLX5_SF_MANAGER
389 .port_new = mlx5_devlink_sf_port_new,
390 #endif
391 .flash_update = mlx5_devlink_flash_update,
392 .info_get = mlx5_devlink_info_get,
393 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
394 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
395 .reload_limits = BIT(DEVLINK_RELOAD_LIMIT_NO_RESET),
396 .reload_down = mlx5_devlink_reload_down,
397 .reload_up = mlx5_devlink_reload_up,
398 .trap_init = mlx5_devlink_trap_init,
399 .trap_fini = mlx5_devlink_trap_fini,
400 .trap_action_set = mlx5_devlink_trap_action_set,
401 };
402
mlx5_devlink_trap_report(struct mlx5_core_dev * dev,int trap_id,struct sk_buff * skb,struct devlink_port * dl_port)403 void mlx5_devlink_trap_report(struct mlx5_core_dev *dev, int trap_id, struct sk_buff *skb,
404 struct devlink_port *dl_port)
405 {
406 struct devlink *devlink = priv_to_devlink(dev);
407 struct mlx5_devlink_trap *dl_trap;
408
409 dl_trap = mlx5_find_trap_by_id(dev, trap_id);
410 if (!dl_trap) {
411 mlx5_core_err(dev, "Devlink trap: Report on invalid trap id 0x%x", trap_id);
412 return;
413 }
414
415 if (dl_trap->trap.action != DEVLINK_TRAP_ACTION_TRAP) {
416 mlx5_core_dbg(dev, "Devlink trap: Trap id %d has action %d", trap_id,
417 dl_trap->trap.action);
418 return;
419 }
420 devlink_trap_report(devlink, skb, dl_trap->item, dl_port, NULL);
421 }
422
mlx5_devlink_trap_get_num_active(struct mlx5_core_dev * dev)423 int mlx5_devlink_trap_get_num_active(struct mlx5_core_dev *dev)
424 {
425 struct mlx5_devlink_trap *dl_trap;
426 int count = 0;
427
428 list_for_each_entry(dl_trap, &dev->priv.traps, list)
429 if (dl_trap->trap.action == DEVLINK_TRAP_ACTION_TRAP)
430 count++;
431
432 return count;
433 }
434
mlx5_devlink_traps_get_action(struct mlx5_core_dev * dev,int trap_id,enum devlink_trap_action * action)435 int mlx5_devlink_traps_get_action(struct mlx5_core_dev *dev, int trap_id,
436 enum devlink_trap_action *action)
437 {
438 struct mlx5_devlink_trap *dl_trap;
439
440 dl_trap = mlx5_find_trap_by_id(dev, trap_id);
441 if (!dl_trap) {
442 mlx5_core_err(dev, "Devlink trap: Get action on invalid trap id 0x%x",
443 trap_id);
444 return -EINVAL;
445 }
446
447 *action = dl_trap->trap.action;
448 return 0;
449 }
450
mlx5_devlink_alloc(struct device * dev)451 struct devlink *mlx5_devlink_alloc(struct device *dev)
452 {
453 return devlink_alloc(&mlx5_devlink_ops, sizeof(struct mlx5_core_dev),
454 dev);
455 }
456
mlx5_devlink_free(struct devlink * devlink)457 void mlx5_devlink_free(struct devlink *devlink)
458 {
459 devlink_free(devlink);
460 }
461
mlx5_devlink_enable_roce_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)462 static int mlx5_devlink_enable_roce_validate(struct devlink *devlink, u32 id,
463 union devlink_param_value val,
464 struct netlink_ext_ack *extack)
465 {
466 struct mlx5_core_dev *dev = devlink_priv(devlink);
467 bool new_state = val.vbool;
468
469 if (new_state && !MLX5_CAP_GEN(dev, roce) &&
470 !(MLX5_CAP_GEN(dev, roce_rw_supported) && MLX5_CAP_GEN_MAX(dev, roce))) {
471 NL_SET_ERR_MSG_MOD(extack, "Device doesn't support RoCE");
472 return -EOPNOTSUPP;
473 }
474 if (mlx5_core_is_mp_slave(dev) || mlx5_lag_is_active(dev)) {
475 NL_SET_ERR_MSG_MOD(extack, "Multi port slave/Lag device can't configure RoCE");
476 return -EOPNOTSUPP;
477 }
478
479 return 0;
480 }
481
482 #ifdef CONFIG_MLX5_ESWITCH
mlx5_devlink_large_group_num_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)483 static int mlx5_devlink_large_group_num_validate(struct devlink *devlink, u32 id,
484 union devlink_param_value val,
485 struct netlink_ext_ack *extack)
486 {
487 int group_num = val.vu32;
488
489 if (group_num < 1 || group_num > 1024) {
490 NL_SET_ERR_MSG_MOD(extack,
491 "Unsupported group number, supported range is 1-1024");
492 return -EOPNOTSUPP;
493 }
494
495 return 0;
496 }
497 #endif
498
mlx5_devlink_eq_depth_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)499 static int mlx5_devlink_eq_depth_validate(struct devlink *devlink, u32 id,
500 union devlink_param_value val,
501 struct netlink_ext_ack *extack)
502 {
503 return (val.vu32 >= 64 && val.vu32 <= 4096) ? 0 : -EINVAL;
504 }
505
506 static int
mlx5_devlink_hairpin_num_queues_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)507 mlx5_devlink_hairpin_num_queues_validate(struct devlink *devlink, u32 id,
508 union devlink_param_value val,
509 struct netlink_ext_ack *extack)
510 {
511 return val.vu32 ? 0 : -EINVAL;
512 }
513
514 static int
mlx5_devlink_hairpin_queue_size_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)515 mlx5_devlink_hairpin_queue_size_validate(struct devlink *devlink, u32 id,
516 union devlink_param_value val,
517 struct netlink_ext_ack *extack)
518 {
519 struct mlx5_core_dev *dev = devlink_priv(devlink);
520 u32 val32 = val.vu32;
521
522 if (!is_power_of_2(val32)) {
523 NL_SET_ERR_MSG_MOD(extack, "Value is not power of two");
524 return -EINVAL;
525 }
526
527 if (val32 > BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets))) {
528 NL_SET_ERR_MSG_FMT_MOD(
529 extack, "Maximum hairpin queue size is %lu",
530 BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
531 return -EINVAL;
532 }
533
534 return 0;
535 }
536
mlx5_devlink_hairpin_params_init_values(struct devlink * devlink)537 static void mlx5_devlink_hairpin_params_init_values(struct devlink *devlink)
538 {
539 struct mlx5_core_dev *dev = devlink_priv(devlink);
540 union devlink_param_value value;
541 u32 link_speed = 0;
542 u64 link_speed64;
543
544 /* set hairpin pair per each 50Gbs share of the link */
545 mlx5_port_max_linkspeed(dev, &link_speed);
546 link_speed = max_t(u32, link_speed, 50000);
547 link_speed64 = link_speed;
548 do_div(link_speed64, 50000);
549
550 value.vu32 = link_speed64;
551 devl_param_driverinit_value_set(
552 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES, value);
553
554 value.vu32 =
555 BIT(min_t(u32, 16 - MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(dev),
556 MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
557 devl_param_driverinit_value_set(
558 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE, value);
559 }
560
561 static const struct devlink_param mlx5_devlink_params[] = {
562 DEVLINK_PARAM_GENERIC(ENABLE_ROCE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
563 NULL, NULL, mlx5_devlink_enable_roce_validate),
564 #ifdef CONFIG_MLX5_ESWITCH
565 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
566 "fdb_large_groups", DEVLINK_PARAM_TYPE_U32,
567 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
568 NULL, NULL,
569 mlx5_devlink_large_group_num_validate),
570 #endif
571 DEVLINK_PARAM_GENERIC(IO_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
572 NULL, NULL, mlx5_devlink_eq_depth_validate),
573 DEVLINK_PARAM_GENERIC(EVENT_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
574 NULL, NULL, mlx5_devlink_eq_depth_validate),
575 };
576
mlx5_devlink_set_params_init_values(struct devlink * devlink)577 static void mlx5_devlink_set_params_init_values(struct devlink *devlink)
578 {
579 struct mlx5_core_dev *dev = devlink_priv(devlink);
580 union devlink_param_value value;
581
582 value.vbool = MLX5_CAP_GEN(dev, roce) && !mlx5_dev_is_lightweight(dev);
583 devl_param_driverinit_value_set(devlink,
584 DEVLINK_PARAM_GENERIC_ID_ENABLE_ROCE,
585 value);
586
587 #ifdef CONFIG_MLX5_ESWITCH
588 value.vu32 = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;
589 devl_param_driverinit_value_set(devlink,
590 MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
591 value);
592 #endif
593
594 value.vu32 = MLX5_COMP_EQ_SIZE;
595 devl_param_driverinit_value_set(devlink,
596 DEVLINK_PARAM_GENERIC_ID_IO_EQ_SIZE,
597 value);
598
599 value.vu32 = MLX5_NUM_ASYNC_EQE;
600 devl_param_driverinit_value_set(devlink,
601 DEVLINK_PARAM_GENERIC_ID_EVENT_EQ_SIZE,
602 value);
603 }
604
605 static const struct devlink_param mlx5_devlink_eth_params[] = {
606 DEVLINK_PARAM_GENERIC(ENABLE_ETH, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
607 NULL, NULL, NULL),
608 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES,
609 "hairpin_num_queues", DEVLINK_PARAM_TYPE_U32,
610 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
611 mlx5_devlink_hairpin_num_queues_validate),
612 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE,
613 "hairpin_queue_size", DEVLINK_PARAM_TYPE_U32,
614 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
615 mlx5_devlink_hairpin_queue_size_validate),
616 };
617
mlx5_devlink_eth_params_register(struct devlink * devlink)618 static int mlx5_devlink_eth_params_register(struct devlink *devlink)
619 {
620 struct mlx5_core_dev *dev = devlink_priv(devlink);
621 union devlink_param_value value;
622 int err;
623
624 if (!mlx5_eth_supported(dev))
625 return 0;
626
627 err = devl_params_register(devlink, mlx5_devlink_eth_params,
628 ARRAY_SIZE(mlx5_devlink_eth_params));
629 if (err)
630 return err;
631
632 value.vbool = !mlx5_dev_is_lightweight(dev);
633 devl_param_driverinit_value_set(devlink,
634 DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH,
635 value);
636
637 mlx5_devlink_hairpin_params_init_values(devlink);
638
639 return 0;
640 }
641
mlx5_devlink_eth_params_unregister(struct devlink * devlink)642 static void mlx5_devlink_eth_params_unregister(struct devlink *devlink)
643 {
644 struct mlx5_core_dev *dev = devlink_priv(devlink);
645
646 if (!mlx5_eth_supported(dev))
647 return;
648
649 devl_params_unregister(devlink, mlx5_devlink_eth_params,
650 ARRAY_SIZE(mlx5_devlink_eth_params));
651 }
652
mlx5_devlink_enable_rdma_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)653 static int mlx5_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,
654 union devlink_param_value val,
655 struct netlink_ext_ack *extack)
656 {
657 struct mlx5_core_dev *dev = devlink_priv(devlink);
658 bool new_state = val.vbool;
659
660 if (new_state && !mlx5_rdma_supported(dev))
661 return -EOPNOTSUPP;
662 return 0;
663 }
664
665 static const struct devlink_param mlx5_devlink_rdma_params[] = {
666 DEVLINK_PARAM_GENERIC(ENABLE_RDMA, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
667 NULL, NULL, mlx5_devlink_enable_rdma_validate),
668 };
669
mlx5_devlink_rdma_params_register(struct devlink * devlink)670 static int mlx5_devlink_rdma_params_register(struct devlink *devlink)
671 {
672 struct mlx5_core_dev *dev = devlink_priv(devlink);
673 union devlink_param_value value;
674 int err;
675
676 if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
677 return 0;
678
679 err = devl_params_register(devlink, mlx5_devlink_rdma_params,
680 ARRAY_SIZE(mlx5_devlink_rdma_params));
681 if (err)
682 return err;
683
684 value.vbool = !mlx5_dev_is_lightweight(dev);
685 devl_param_driverinit_value_set(devlink,
686 DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,
687 value);
688 return 0;
689 }
690
mlx5_devlink_rdma_params_unregister(struct devlink * devlink)691 static void mlx5_devlink_rdma_params_unregister(struct devlink *devlink)
692 {
693 if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
694 return;
695
696 devl_params_unregister(devlink, mlx5_devlink_rdma_params,
697 ARRAY_SIZE(mlx5_devlink_rdma_params));
698 }
699
700 static const struct devlink_param mlx5_devlink_vnet_params[] = {
701 DEVLINK_PARAM_GENERIC(ENABLE_VNET, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
702 NULL, NULL, NULL),
703 };
704
mlx5_devlink_vnet_params_register(struct devlink * devlink)705 static int mlx5_devlink_vnet_params_register(struct devlink *devlink)
706 {
707 struct mlx5_core_dev *dev = devlink_priv(devlink);
708 union devlink_param_value value;
709 int err;
710
711 if (!mlx5_vnet_supported(dev))
712 return 0;
713
714 err = devl_params_register(devlink, mlx5_devlink_vnet_params,
715 ARRAY_SIZE(mlx5_devlink_vnet_params));
716 if (err)
717 return err;
718
719 value.vbool = !mlx5_dev_is_lightweight(dev);
720 devl_param_driverinit_value_set(devlink,
721 DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET,
722 value);
723 return 0;
724 }
725
mlx5_devlink_vnet_params_unregister(struct devlink * devlink)726 static void mlx5_devlink_vnet_params_unregister(struct devlink *devlink)
727 {
728 struct mlx5_core_dev *dev = devlink_priv(devlink);
729
730 if (!mlx5_vnet_supported(dev))
731 return;
732
733 devl_params_unregister(devlink, mlx5_devlink_vnet_params,
734 ARRAY_SIZE(mlx5_devlink_vnet_params));
735 }
736
mlx5_devlink_auxdev_params_register(struct devlink * devlink)737 static int mlx5_devlink_auxdev_params_register(struct devlink *devlink)
738 {
739 int err;
740
741 err = mlx5_devlink_eth_params_register(devlink);
742 if (err)
743 return err;
744
745 err = mlx5_devlink_rdma_params_register(devlink);
746 if (err)
747 goto rdma_err;
748
749 err = mlx5_devlink_vnet_params_register(devlink);
750 if (err)
751 goto vnet_err;
752 return 0;
753
754 vnet_err:
755 mlx5_devlink_rdma_params_unregister(devlink);
756 rdma_err:
757 mlx5_devlink_eth_params_unregister(devlink);
758 return err;
759 }
760
mlx5_devlink_auxdev_params_unregister(struct devlink * devlink)761 static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink)
762 {
763 mlx5_devlink_vnet_params_unregister(devlink);
764 mlx5_devlink_rdma_params_unregister(devlink);
765 mlx5_devlink_eth_params_unregister(devlink);
766 }
767
mlx5_devlink_max_uc_list_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)768 static int mlx5_devlink_max_uc_list_validate(struct devlink *devlink, u32 id,
769 union devlink_param_value val,
770 struct netlink_ext_ack *extack)
771 {
772 struct mlx5_core_dev *dev = devlink_priv(devlink);
773
774 if (val.vu32 == 0) {
775 NL_SET_ERR_MSG_MOD(extack, "max_macs value must be greater than 0");
776 return -EINVAL;
777 }
778
779 if (!is_power_of_2(val.vu32)) {
780 NL_SET_ERR_MSG_MOD(extack, "Only power of 2 values are supported for max_macs");
781 return -EINVAL;
782 }
783
784 if (ilog2(val.vu32) >
785 MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list)) {
786 NL_SET_ERR_MSG_MOD(extack, "max_macs value is out of the supported range");
787 return -EINVAL;
788 }
789
790 return 0;
791 }
792
793 static const struct devlink_param mlx5_devlink_max_uc_list_params[] = {
794 DEVLINK_PARAM_GENERIC(MAX_MACS, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
795 NULL, NULL, mlx5_devlink_max_uc_list_validate),
796 };
797
mlx5_devlink_max_uc_list_params_register(struct devlink * devlink)798 static int mlx5_devlink_max_uc_list_params_register(struct devlink *devlink)
799 {
800 struct mlx5_core_dev *dev = devlink_priv(devlink);
801 union devlink_param_value value;
802 int err;
803
804 if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
805 return 0;
806
807 err = devl_params_register(devlink, mlx5_devlink_max_uc_list_params,
808 ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
809 if (err)
810 return err;
811
812 value.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);
813 devl_param_driverinit_value_set(devlink,
814 DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
815 value);
816 return 0;
817 }
818
819 static void
mlx5_devlink_max_uc_list_params_unregister(struct devlink * devlink)820 mlx5_devlink_max_uc_list_params_unregister(struct devlink *devlink)
821 {
822 struct mlx5_core_dev *dev = devlink_priv(devlink);
823
824 if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
825 return;
826
827 devl_params_unregister(devlink, mlx5_devlink_max_uc_list_params,
828 ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
829 }
830
831 #define MLX5_TRAP_DROP(_id, _group_id) \
832 DEVLINK_TRAP_GENERIC(DROP, DROP, _id, \
833 DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \
834 DEVLINK_TRAP_METADATA_TYPE_F_IN_PORT)
835
836 static const struct devlink_trap mlx5_traps_arr[] = {
837 MLX5_TRAP_DROP(INGRESS_VLAN_FILTER, L2_DROPS),
838 MLX5_TRAP_DROP(DMAC_FILTER, L2_DROPS),
839 };
840
841 static const struct devlink_trap_group mlx5_trap_groups_arr[] = {
842 DEVLINK_TRAP_GROUP_GENERIC(L2_DROPS, 0),
843 };
844
mlx5_devlink_traps_register(struct devlink * devlink)845 int mlx5_devlink_traps_register(struct devlink *devlink)
846 {
847 struct mlx5_core_dev *core_dev = devlink_priv(devlink);
848 int err;
849
850 err = devl_trap_groups_register(devlink, mlx5_trap_groups_arr,
851 ARRAY_SIZE(mlx5_trap_groups_arr));
852 if (err)
853 return err;
854
855 err = devl_traps_register(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr),
856 &core_dev->priv);
857 if (err)
858 goto err_trap_group;
859 return 0;
860
861 err_trap_group:
862 devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
863 ARRAY_SIZE(mlx5_trap_groups_arr));
864 return err;
865 }
866
mlx5_devlink_traps_unregister(struct devlink * devlink)867 void mlx5_devlink_traps_unregister(struct devlink *devlink)
868 {
869 devl_traps_unregister(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr));
870 devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
871 ARRAY_SIZE(mlx5_trap_groups_arr));
872 }
873
mlx5_devlink_params_register(struct devlink * devlink)874 int mlx5_devlink_params_register(struct devlink *devlink)
875 {
876 int err;
877
878 /* Here only the driver init params should be registered.
879 * Runtime params should be registered by the code which
880 * behaviour they configure.
881 */
882
883 err = devl_params_register(devlink, mlx5_devlink_params,
884 ARRAY_SIZE(mlx5_devlink_params));
885 if (err)
886 return err;
887
888 mlx5_devlink_set_params_init_values(devlink);
889
890 err = mlx5_devlink_auxdev_params_register(devlink);
891 if (err)
892 goto auxdev_reg_err;
893
894 err = mlx5_devlink_max_uc_list_params_register(devlink);
895 if (err)
896 goto max_uc_list_err;
897
898 return 0;
899
900 max_uc_list_err:
901 mlx5_devlink_auxdev_params_unregister(devlink);
902 auxdev_reg_err:
903 devl_params_unregister(devlink, mlx5_devlink_params,
904 ARRAY_SIZE(mlx5_devlink_params));
905 return err;
906 }
907
mlx5_devlink_params_unregister(struct devlink * devlink)908 void mlx5_devlink_params_unregister(struct devlink *devlink)
909 {
910 mlx5_devlink_max_uc_list_params_unregister(devlink);
911 mlx5_devlink_auxdev_params_unregister(devlink);
912 devl_params_unregister(devlink, mlx5_devlink_params,
913 ARRAY_SIZE(mlx5_devlink_params));
914 }
915