xref: /linux/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi (revision 0cac5ce06e524755b3dac1e0a060b05992076d93) 
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Common Device Tree Source for the RZ/T2H and RZ/N2H EVK boards.
4 *
5 * Copyright (C) 2025 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/leds/common.h>
10#include <dt-bindings/net/mscc-phy-vsc8531.h>
11#include <dt-bindings/net/renesas,r9a09g077-pcs-miic.h>
12#include <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h>
13
14/ {
15	aliases {
16		ethernet3 = &gmac1;
17		ethernet2 = &gmac2;
18		i2c0 = &i2c0;
19		i2c1 = &i2c1;
20		mmc0 = &sdhi0;
21		mmc1 = &sdhi1;
22		serial0 = &sci0;
23	};
24
25	chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	reg_1p8v: regulator-1p8v {
30		compatible = "regulator-fixed";
31		regulator-name = "fixed-1.8V";
32		regulator-min-microvolt = <1800000>;
33		regulator-max-microvolt = <1800000>;
34		regulator-boot-on;
35		regulator-always-on;
36	};
37
38	reg_3p3v: regulator-3p3v {
39		compatible = "regulator-fixed";
40		regulator-name = "fixed-3.3V";
41		regulator-min-microvolt = <3300000>;
42		regulator-max-microvolt = <3300000>;
43		regulator-boot-on;
44		regulator-always-on;
45	};
46
47#if SD0_SD
48	vqmmc_sdhi0: regulator-vqmmc-sdhi0 {
49		compatible = "regulator-gpio";
50		regulator-name = "SDHI0 VqmmC";
51		gpios = <&pinctrl RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>;
52		regulator-min-microvolt = <1800000>;
53		regulator-max-microvolt = <3300000>;
54		gpios-states = <0>;
55		states = <3300000 0>, <1800000 1>;
56	};
57#endif
58
59#if SD1_MICRO_SD
60	vccq_sdhi1: regulator-vccq-sdhi1 {
61		compatible = "regulator-gpio";
62		regulator-name = "SDHI1 VccQ";
63		regulator-min-microvolt = <1800000>;
64		regulator-max-microvolt = <3300000>;
65		gpios = <&pinctrl RZT2H_GPIO(8, 6) GPIO_ACTIVE_HIGH>;
66		gpios-states = <0>;
67		states = <3300000 0>, <1800000 1>;
68	};
69#endif
70};
71
72&ehci {
73	dr_mode = "otg";
74	status = "okay";
75};
76
77&ethss {
78	status = "okay";
79
80	renesas,miic-switch-portin = <ETHSS_GMAC0_PORT>;
81};
82
83&extal_clk {
84	clock-frequency = <25000000>;
85};
86
87&gmac1 {
88	pinctrl-0 = <&gmac1_pins>;
89	pinctrl-names = "default";
90	phy-handle = <&mdio1_phy>;
91	phy-mode = "rgmii-id";
92	pcs-handle = <&mii_conv3>;
93	status = "okay";
94};
95
96&gmac2 {
97	pinctrl-0 = <&gmac2_pins>;
98	pinctrl-names = "default";
99	phy-handle = <&mdio2_phy>;
100	phy-mode = "rgmii-id";
101	pcs-handle = <&mii_conv2>;
102	status = "okay";
103};
104
105&hsusb {
106	dr_mode = "otg";
107	status = "okay";
108};
109
110&i2c0 {
111	eeprom: eeprom@50 {
112		compatible = "renesas,r1ex24016", "atmel,24c16";
113		reg = <0x50>;
114		pagesize = <16>;
115	};
116};
117
118&mdio1 {
119	mdio1_phy: ethernet-phy@3 {
120		compatible = "ethernet-phy-id0007.0772", "ethernet-phy-ieee802.3-c22";
121		reg = <3>;
122		vsc8531,led-0-mode = <VSC8531_ACTIVITY>;
123		vsc8531,led-1-mode = <VSC8531_LINK_ACTIVITY>;
124		reset-assert-us = <2000>;
125		reset-deassert-us = <15000>;
126	};
127};
128
129&mdio2 {
130	mdio2_phy: ethernet-phy@2 {
131		compatible = "ethernet-phy-id0007.0772", "ethernet-phy-ieee802.3-c22";
132		reg = <2>;
133		vsc8531,led-0-mode = <VSC8531_ACTIVITY>;
134		vsc8531,led-1-mode = <VSC8531_LINK_ACTIVITY>;
135		reset-assert-us = <2000>;
136		reset-deassert-us = <15000>;
137	};
138};
139
140&mii_conv0 {
141	renesas,miic-input = <ETHSS_ETHSW_PORT0>;
142	status = "okay";
143};
144
145&mii_conv1 {
146	renesas,miic-input = <ETHSS_ETHSW_PORT1>;
147	status = "okay";
148};
149
150&mii_conv2 {
151	renesas,miic-input = <ETHSS_GMAC2_PORT>;
152	status = "okay";
153};
154
155&mii_conv3 {
156	renesas,miic-input = <ETHSS_GMAC1_PORT>;
157	status = "okay";
158};
159
160&ohci {
161	dr_mode = "otg";
162	status = "okay";
163};
164
165&pinctrl {
166	/*
167	 * SCI0 Pin Configuration:
168	 * ------------------------
169	 * Signal     | Pin     | RZ/T2H (SW4) | RZ/N2H (DSW9)
170	 * -----------|---------|--------------|---------------
171	 * SCI0_RXD   | P27_4   | 5: ON, 6: OFF| 1: ON, 2: OFF
172	 * SCI0_TXD   | P27_5   | 7: ON, 8: OFF| 3: ON, 4: OFF
173	 */
174	sci0_pins: sci0-pins {
175		pinmux = <RZT2H_PORT_PINMUX(27, 4, 0x14)>,
176			 <RZT2H_PORT_PINMUX(27, 5, 0x14)>;
177	};
178
179#if SD0_EMMC
180	sdhi0-emmc-iovs-hog {
181		gpio-hog;
182		gpios = <RZT2H_GPIO(2, 6) GPIO_ACTIVE_HIGH>;
183		output-high;
184		line-name = "SD0_IOVS";
185	};
186#endif
187
188	sdhi0_emmc_pins: sd0-emmc-group {
189		data-pins {
190			pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
191				 <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
192				 <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
193				 <RZT2H_PORT_PINMUX(12, 5, 0x29)>, /* SD0_DATA3 */
194				 <RZT2H_PORT_PINMUX(12, 6, 0x29)>, /* SD0_DATA4 */
195				 <RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */
196				 <RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */
197				 <RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */
198		};
199
200		ctrl-pins {
201			pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
202				 <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
203				 <RZT2H_PORT_PINMUX(13, 2, 0x29)>; /* SD0_RST# */
204		};
205	};
206
207#if SD0_SD
208	sdhi0-pwen-hog {
209		gpio-hog;
210		gpios = <RZT2H_GPIO(2, 5) GPIO_ACTIVE_HIGH>;
211		output-high;
212		line-name = "SD0_PWEN";
213	};
214#endif
215
216	sdhi0_sd_pins: sd0-sd-group {
217		data-pins {
218			pinmux = <RZT2H_PORT_PINMUX(12, 2, 0x29)>, /* SD0_DATA0 */
219				 <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
220				 <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
221				 <RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */
222		};
223
224		ctrl-pins {
225			pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
226				 <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
227				 <RZT2H_PORT_PINMUX(22, 5, 0x29)>, /* SD0_CD */
228				 <RZT2H_PORT_PINMUX(22, 6, 0x29)>; /* SD0_WP */
229		};
230	};
231
232#if SD1_MICRO_SD
233	sdhi1-pwen-hog {
234		gpio-hog;
235		gpios = <RZT2H_GPIO(8, 5) GPIO_ACTIVE_HIGH>;
236		output-high;
237		line-name = "SD1_PWEN";
238	};
239#endif
240
241	sdhi1_pins: sd1-group {
242		data-pins {
243			pinmux = <RZT2H_PORT_PINMUX(16, 7, 0x29)>, /* SD1_DATA0 */
244				 <RZT2H_PORT_PINMUX(17, 0, 0x29)>, /* SD1_DATA1 */
245				 <RZT2H_PORT_PINMUX(17, 1, 0x29)>, /* SD1_DATA2 */
246				 <RZT2H_PORT_PINMUX(17, 2, 0x29)>; /* SD1_DATA3 */
247		};
248
249		ctrl-pins {
250			pinmux = <RZT2H_PORT_PINMUX(16, 5, 0x29)>, /* SD1_CLK */
251				 <RZT2H_PORT_PINMUX(16, 6, 0x29)>, /* SD1_CMD */
252				 <RZT2H_PORT_PINMUX(17, 4, 0x29)>; /* SD1_CD */
253		};
254	};
255};
256
257&sci0 {
258	pinctrl-0 = <&sci0_pins>;
259	pinctrl-names = "default";
260	status = "okay";
261};
262
263#if SD0_EMMC
264&sdhi0 {
265	pinctrl-0 = <&sdhi0_emmc_pins>;
266	pinctrl-1 = <&sdhi0_emmc_pins>;
267	pinctrl-names = "default", "state_uhs";
268	vmmc-supply = <&reg_3p3v>;
269	vqmmc-supply = <&reg_1p8v>;
270	bus-width = <8>;
271	non-removable;
272	mmc-hs200-1_8v;
273	fixed-emmc-driver-type = <1>;
274	status = "okay";
275};
276#endif
277
278#if SD0_SD
279&sdhi0 {
280	pinctrl-0 = <&sdhi0_sd_pins>;
281	pinctrl-1 = <&sdhi0_sd_pins>;
282	pinctrl-names = "default", "state_uhs";
283	vmmc-supply = <&reg_3p3v>;
284	vqmmc-supply = <&vqmmc_sdhi0>;
285	bus-width = <4>;
286	sd-uhs-sdr50;
287	sd-uhs-sdr104;
288	status = "okay";
289};
290#endif
291
292#if SD1_MICRO_SD
293&sdhi1 {
294	pinctrl-0 = <&sdhi1_pins>;
295	pinctrl-1 = <&sdhi1_pins>;
296	pinctrl-names = "default", "state_uhs";
297	vmmc-supply = <&reg_3p3v>;
298	vqmmc-supply = <&vccq_sdhi1>;
299	bus-width = <4>;
300	sd-uhs-sdr50;
301	sd-uhs-sdr104;
302	status = "okay";
303};
304#endif
305
306&usb2_phy {
307	pinctrl-0 = <&usb_pins>;
308	pinctrl-names = "default";
309
310	status = "okay";
311};
312
313&wdt2 {
314	status = "okay";
315	timeout-sec = <60>;
316};
317
318/*
319 * ADC0 AN000 can be connected to a potentiometer on the board or
320 * exposed on ADC header.
321 *
322 * T2H:
323 * SW17[1] = ON, SW17[2] = OFF - Potentiometer
324 * SW17[1] = OFF, SW17[2] = ON  - CN41 header
325 * N2H:
326 * DSW6[1] = OFF, DSW6[2] = ON - Potentiometer
327 * DSW6[1] = ON, DSW6[2] = OFF - CN3 header
328 */
329&adc0 {
330	status = "okay";
331
332	channel@0 {
333		reg = <0x0>;
334	};
335
336	channel@1 {
337		reg = <0x1>;
338	};
339
340	channel@2 {
341		reg = <0x2>;
342	};
343
344	channel@3 {
345		reg = <0x3>;
346	};
347};
348
349/*
350 * ADC1 AN100 can be exposed on ADC header or on mikroBUS connector.
351 *
352 * T2H:
353 * SW18[1] = ON, SW18[2] = OFF - CN42 header
354 * SW18[1] = OFF, SW18[2] = ON - mikroBUS
355 * N2H:
356 * DSW6[3] = ON, DSW6[4] = OFF - CN4 header
357 * DSW6[3] = OFF, DSW6[4] = ON - mikroBUS
358 *
359 * ADC1 AN101 can be exposed on ADC header or on Grove2 connector.
360 *
361 * T2H:
362 * SW18[3] = ON, SW18[4] = OFF - CN42 header
363 * SW18[3] = OFF, SW18[4] = ON - Grove2
364 * N2H:
365 * DSW6[5] = ON, DSW6[6] = OFF - CN4 header
366 * DSW6[5] = OFF, DSW6[6] = ON - Grove2
367 *
368 * ADC1 AN102 can be exposed on ADC header or on Grove2 connector.
369 *
370 * T2H:
371 * SW18[5] = ON, SW18[6] = OFF - CN42 header
372 * SW18[5] = OFF, SW18[6] = ON - Grove2
373 * N2H:
374 * DSW6[7] = ON, DSW6[8] = OFF - CN4 header
375 * DSW6[7] = OFF, DSW6[8] = ON - Grove2
376 */
377&adc1 {
378	status = "okay";
379
380	channel@0 {
381		reg = <0x0>;
382	};
383
384	channel@1 {
385		reg = <0x1>;
386	};
387
388	channel@2 {
389		reg = <0x2>;
390	};
391
392	channel@3 {
393		reg = <0x3>;
394	};
395};
396