1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright 2015-16 Golden Delicious Computers
4 *
5 * Author: Nikolaus Schaller <hns@goldelico.com>
6 *
7 * LED driver for the IS31FL319{0,1,3,6,9} to drive 1, 3, 6 or 9 light
8 * effect LEDs.
9 */
10
11 #include <linux/err.h>
12 #include <linux/i2c.h>
13 #include <linux/leds.h>
14 #include <linux/module.h>
15 #include <linux/property.h>
16 #include <linux/regmap.h>
17 #include <linux/slab.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20
21 /* register numbers */
22 #define IS31FL319X_SHUTDOWN 0x00
23
24 /* registers for 3190, 3191 and 3193 */
25 #define IS31FL3190_BREATHING 0x01
26 #define IS31FL3190_LEDMODE 0x02
27 #define IS31FL3190_CURRENT 0x03
28 #define IS31FL3190_PWM(channel) (0x04 + channel)
29 #define IS31FL3190_DATA_UPDATE 0x07
30 #define IS31FL3190_T0(channel) (0x0a + channel)
31 #define IS31FL3190_T1T2(channel) (0x10 + channel)
32 #define IS31FL3190_T3T4(channel) (0x16 + channel)
33 #define IS31FL3190_TIME_UPDATE 0x1c
34 #define IS31FL3190_LEDCONTROL 0x1d
35 #define IS31FL3190_RESET 0x2f
36
37 #define IS31FL3190_CURRENT_uA_MIN 5000
38 #define IS31FL3190_CURRENT_uA_DEFAULT 42000
39 #define IS31FL3190_CURRENT_uA_MAX 42000
40 #define IS31FL3190_CURRENT_SHIFT 2
41 #define IS31FL3190_CURRENT_MASK GENMASK(4, 2)
42 #define IS31FL3190_CURRENT_5_mA 0x02
43 #define IS31FL3190_CURRENT_10_mA 0x01
44 #define IS31FL3190_CURRENT_17dot5_mA 0x04
45 #define IS31FL3190_CURRENT_30_mA 0x03
46 #define IS31FL3190_CURRENT_42_mA 0x00
47
48 /* registers for 3196 and 3199 */
49 #define IS31FL3196_CTRL1 0x01
50 #define IS31FL3196_CTRL2 0x02
51 #define IS31FL3196_CONFIG1 0x03
52 #define IS31FL3196_CONFIG2 0x04
53 #define IS31FL3196_RAMP_MODE 0x05
54 #define IS31FL3196_BREATH_MARK 0x06
55 #define IS31FL3196_PWM(channel) (0x07 + channel)
56 #define IS31FL3196_DATA_UPDATE 0x10
57 #define IS31FL3196_T0(channel) (0x11 + channel)
58 #define IS31FL3196_T123_1 0x1a
59 #define IS31FL3196_T123_2 0x1b
60 #define IS31FL3196_T123_3 0x1c
61 #define IS31FL3196_T4(channel) (0x1d + channel)
62 #define IS31FL3196_TIME_UPDATE 0x26
63 #define IS31FL3196_RESET 0xff
64
65 #define IS31FL3196_REG_CNT (IS31FL3196_RESET + 1)
66
67 #define IS31FL319X_MAX_LEDS 9
68
69 /* CS (Current Setting) in CONFIG2 register */
70 #define IS31FL3196_CONFIG2_CS_SHIFT 4
71 #define IS31FL3196_CONFIG2_CS_MASK GENMASK(2, 0)
72 #define IS31FL3196_CONFIG2_CS_STEP_REF 12
73
74 #define IS31FL3196_CURRENT_uA_MIN 5000
75 #define IS31FL3196_CURRENT_uA_MAX 40000
76 #define IS31FL3196_CURRENT_uA_STEP 5000
77 #define IS31FL3196_CURRENT_uA_DEFAULT 20000
78
79 /* Audio gain in CONFIG2 register */
80 #define IS31FL3196_AUDIO_GAIN_DB_MAX ((u32)21)
81 #define IS31FL3196_AUDIO_GAIN_DB_STEP 3
82
83 /*
84 * regmap is used as a cache of chip's register space,
85 * to avoid reading back brightness values from chip,
86 * which is known to hang.
87 */
88 struct is31fl319x_chip {
89 const struct is31fl319x_chipdef *cdef;
90 struct i2c_client *client;
91 struct gpio_desc *shutdown_gpio;
92 struct regmap *regmap;
93 struct mutex lock;
94 u32 audio_gain_db;
95
96 struct is31fl319x_led {
97 struct is31fl319x_chip *chip;
98 struct led_classdev cdev;
99 u32 max_microamp;
100 struct fwnode_handle *fwnode;
101 } leds[IS31FL319X_MAX_LEDS];
102 };
103
104 struct is31fl319x_chipdef {
105 int num_leds;
106 u8 reset_reg;
107 const struct regmap_config *is31fl319x_regmap_config;
108 int (*brightness_set)(struct led_classdev *cdev, enum led_brightness brightness);
109 u32 current_default;
110 u32 current_min;
111 u32 current_max;
112 bool is_3196or3199;
113 };
114
is31fl319x_readable_reg(struct device * dev,unsigned int reg)115 static bool is31fl319x_readable_reg(struct device *dev, unsigned int reg)
116 {
117 /* we have no readable registers */
118 return false;
119 }
120
is31fl3190_volatile_reg(struct device * dev,unsigned int reg)121 static bool is31fl3190_volatile_reg(struct device *dev, unsigned int reg)
122 {
123 /* volatile registers are not cached */
124 switch (reg) {
125 case IS31FL3190_DATA_UPDATE:
126 case IS31FL3190_TIME_UPDATE:
127 case IS31FL3190_RESET:
128 return true; /* always write-through */
129 default:
130 return false;
131 }
132 }
133
134 static const struct reg_default is31fl3190_reg_defaults[] = {
135 { IS31FL3190_LEDMODE, 0x00 },
136 { IS31FL3190_CURRENT, 0x00 },
137 { IS31FL3190_PWM(0), 0x00 },
138 { IS31FL3190_PWM(1), 0x00 },
139 { IS31FL3190_PWM(2), 0x00 },
140 };
141
142 static const struct regmap_config is31fl3190_regmap_config = {
143 .reg_bits = 8,
144 .val_bits = 8,
145 .max_register = IS31FL3190_RESET,
146 .cache_type = REGCACHE_FLAT,
147 .readable_reg = is31fl319x_readable_reg,
148 .volatile_reg = is31fl3190_volatile_reg,
149 .reg_defaults = is31fl3190_reg_defaults,
150 .num_reg_defaults = ARRAY_SIZE(is31fl3190_reg_defaults),
151 };
152
is31fl3196_volatile_reg(struct device * dev,unsigned int reg)153 static bool is31fl3196_volatile_reg(struct device *dev, unsigned int reg)
154 {
155 /* volatile registers are not cached */
156 switch (reg) {
157 case IS31FL3196_DATA_UPDATE:
158 case IS31FL3196_TIME_UPDATE:
159 case IS31FL3196_RESET:
160 return true; /* always write-through */
161 default:
162 return false;
163 }
164 }
165
166 static const struct reg_default is31fl3196_reg_defaults[] = {
167 { IS31FL3196_CONFIG1, 0x00 },
168 { IS31FL3196_CONFIG2, 0x00 },
169 { IS31FL3196_PWM(0), 0x00 },
170 { IS31FL3196_PWM(1), 0x00 },
171 { IS31FL3196_PWM(2), 0x00 },
172 { IS31FL3196_PWM(3), 0x00 },
173 { IS31FL3196_PWM(4), 0x00 },
174 { IS31FL3196_PWM(5), 0x00 },
175 { IS31FL3196_PWM(6), 0x00 },
176 { IS31FL3196_PWM(7), 0x00 },
177 { IS31FL3196_PWM(8), 0x00 },
178 };
179
180 static const struct regmap_config is31fl3196_regmap_config = {
181 .reg_bits = 8,
182 .val_bits = 8,
183 .max_register = IS31FL3196_REG_CNT,
184 .cache_type = REGCACHE_FLAT,
185 .readable_reg = is31fl319x_readable_reg,
186 .volatile_reg = is31fl3196_volatile_reg,
187 .reg_defaults = is31fl3196_reg_defaults,
188 .num_reg_defaults = ARRAY_SIZE(is31fl3196_reg_defaults),
189 };
190
is31fl3190_brightness_set(struct led_classdev * cdev,enum led_brightness brightness)191 static int is31fl3190_brightness_set(struct led_classdev *cdev,
192 enum led_brightness brightness)
193 {
194 struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
195 struct is31fl319x_chip *is31 = led->chip;
196 int chan = led - is31->leds;
197 int ret;
198 int i;
199 u8 ctrl = 0;
200
201 dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
202
203 mutex_lock(&is31->lock);
204
205 /* update PWM register */
206 ret = regmap_write(is31->regmap, IS31FL3190_PWM(chan), brightness);
207 if (ret < 0)
208 goto out;
209
210 /* read current brightness of all PWM channels */
211 for (i = 0; i < is31->cdef->num_leds; i++) {
212 unsigned int pwm_value;
213 bool on;
214
215 /*
216 * since neither cdev nor the chip can provide
217 * the current setting, we read from the regmap cache
218 */
219
220 ret = regmap_read(is31->regmap, IS31FL3190_PWM(i), &pwm_value);
221 on = ret >= 0 && pwm_value > LED_OFF;
222
223 ctrl |= on << i;
224 }
225
226 if (ctrl > 0) {
227 dev_dbg(&is31->client->dev, "power up %02x\n", ctrl);
228 regmap_write(is31->regmap, IS31FL3190_LEDCONTROL, ctrl);
229 /* update PWMs */
230 regmap_write(is31->regmap, IS31FL3190_DATA_UPDATE, 0x00);
231 /* enable chip from shut down and enable all channels */
232 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x20);
233 } else {
234 dev_dbg(&is31->client->dev, "power down\n");
235 /* shut down (no need to clear LEDCONTROL) */
236 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
237 }
238
239 out:
240 mutex_unlock(&is31->lock);
241
242 return ret;
243 }
244
is31fl3196_brightness_set(struct led_classdev * cdev,enum led_brightness brightness)245 static int is31fl3196_brightness_set(struct led_classdev *cdev,
246 enum led_brightness brightness)
247 {
248 struct is31fl319x_led *led = container_of(cdev, struct is31fl319x_led, cdev);
249 struct is31fl319x_chip *is31 = led->chip;
250 int chan = led - is31->leds;
251 int ret;
252 int i;
253 u8 ctrl1 = 0, ctrl2 = 0;
254
255 dev_dbg(&is31->client->dev, "channel %d: %d\n", chan, brightness);
256
257 mutex_lock(&is31->lock);
258
259 /* update PWM register */
260 ret = regmap_write(is31->regmap, IS31FL3196_PWM(chan), brightness);
261 if (ret < 0)
262 goto out;
263
264 /* read current brightness of all PWM channels */
265 for (i = 0; i < is31->cdef->num_leds; i++) {
266 unsigned int pwm_value;
267 bool on;
268
269 /*
270 * since neither cdev nor the chip can provide
271 * the current setting, we read from the regmap cache
272 */
273
274 ret = regmap_read(is31->regmap, IS31FL3196_PWM(i), &pwm_value);
275 on = ret >= 0 && pwm_value > LED_OFF;
276
277 if (i < 3)
278 ctrl1 |= on << i; /* 0..2 => bit 0..2 */
279 else if (i < 6)
280 ctrl1 |= on << (i + 1); /* 3..5 => bit 4..6 */
281 else
282 ctrl2 |= on << (i - 6); /* 6..8 => bit 0..2 */
283 }
284
285 if (ctrl1 > 0 || ctrl2 > 0) {
286 dev_dbg(&is31->client->dev, "power up %02x %02x\n",
287 ctrl1, ctrl2);
288 regmap_write(is31->regmap, IS31FL3196_CTRL1, ctrl1);
289 regmap_write(is31->regmap, IS31FL3196_CTRL2, ctrl2);
290 /* update PWMs */
291 regmap_write(is31->regmap, IS31FL3196_DATA_UPDATE, 0x00);
292 /* enable chip from shut down */
293 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x01);
294 } else {
295 dev_dbg(&is31->client->dev, "power down\n");
296 /* shut down (no need to clear CTRL1/2) */
297 ret = regmap_write(is31->regmap, IS31FL319X_SHUTDOWN, 0x00);
298 }
299
300 out:
301 mutex_unlock(&is31->lock);
302
303 return ret;
304 }
305
306 static const struct is31fl319x_chipdef is31fl3190_cdef = {
307 .num_leds = 1,
308 .reset_reg = IS31FL3190_RESET,
309 .is31fl319x_regmap_config = &is31fl3190_regmap_config,
310 .brightness_set = is31fl3190_brightness_set,
311 .current_default = IS31FL3190_CURRENT_uA_DEFAULT,
312 .current_min = IS31FL3190_CURRENT_uA_MIN,
313 .current_max = IS31FL3190_CURRENT_uA_MAX,
314 .is_3196or3199 = false,
315 };
316
317 static const struct is31fl319x_chipdef is31fl3193_cdef = {
318 .num_leds = 3,
319 .reset_reg = IS31FL3190_RESET,
320 .is31fl319x_regmap_config = &is31fl3190_regmap_config,
321 .brightness_set = is31fl3190_brightness_set,
322 .current_default = IS31FL3190_CURRENT_uA_DEFAULT,
323 .current_min = IS31FL3190_CURRENT_uA_MIN,
324 .current_max = IS31FL3190_CURRENT_uA_MAX,
325 .is_3196or3199 = false,
326 };
327
328 static const struct is31fl319x_chipdef is31fl3196_cdef = {
329 .num_leds = 6,
330 .reset_reg = IS31FL3196_RESET,
331 .is31fl319x_regmap_config = &is31fl3196_regmap_config,
332 .brightness_set = is31fl3196_brightness_set,
333 .current_default = IS31FL3196_CURRENT_uA_DEFAULT,
334 .current_min = IS31FL3196_CURRENT_uA_MIN,
335 .current_max = IS31FL3196_CURRENT_uA_MAX,
336 .is_3196or3199 = true,
337 };
338
339 static const struct is31fl319x_chipdef is31fl3199_cdef = {
340 .num_leds = 9,
341 .reset_reg = IS31FL3196_RESET,
342 .is31fl319x_regmap_config = &is31fl3196_regmap_config,
343 .brightness_set = is31fl3196_brightness_set,
344 .current_default = IS31FL3196_CURRENT_uA_DEFAULT,
345 .current_min = IS31FL3196_CURRENT_uA_MIN,
346 .current_max = IS31FL3196_CURRENT_uA_MAX,
347 .is_3196or3199 = true,
348 };
349
350 static const struct of_device_id of_is31fl319x_match[] = {
351 { .compatible = "issi,is31fl3190", .data = &is31fl3190_cdef, },
352 { .compatible = "issi,is31fl3191", .data = &is31fl3190_cdef, },
353 { .compatible = "issi,is31fl3193", .data = &is31fl3193_cdef, },
354 { .compatible = "issi,is31fl3196", .data = &is31fl3196_cdef, },
355 { .compatible = "issi,is31fl3199", .data = &is31fl3199_cdef, },
356 { .compatible = "si-en,sn3190", .data = &is31fl3190_cdef, },
357 { .compatible = "si-en,sn3191", .data = &is31fl3190_cdef, },
358 { .compatible = "si-en,sn3193", .data = &is31fl3193_cdef, },
359 { .compatible = "si-en,sn3196", .data = &is31fl3196_cdef, },
360 { .compatible = "si-en,sn3199", .data = &is31fl3199_cdef, },
361 { }
362 };
363 MODULE_DEVICE_TABLE(of, of_is31fl319x_match);
364
is31_free_fwnode(void * data)365 static void is31_free_fwnode(void *data)
366 {
367 struct is31fl319x_chip *is31 = data;
368 int i;
369
370 for (i = 0; i < is31->cdef->num_leds; i++) {
371 if (is31->leds[i].fwnode)
372 fwnode_handle_put(is31->leds[i].fwnode);
373
374 is31->leds[i].fwnode = NULL;
375 }
376 }
377
is31fl319x_parse_fw(struct device * dev,struct is31fl319x_chip * is31)378 static int is31fl319x_parse_fw(struct device *dev, struct is31fl319x_chip *is31)
379 {
380 struct fwnode_handle *fwnode = dev_fwnode(dev);
381 int count;
382 int ret;
383
384 is31->shutdown_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
385 if (IS_ERR(is31->shutdown_gpio))
386 return dev_err_probe(dev, PTR_ERR(is31->shutdown_gpio),
387 "Failed to get shutdown gpio\n");
388
389 is31->cdef = device_get_match_data(dev);
390 if (!is31->cdef)
391 return -ENODEV;
392
393 ret = devm_add_action_or_reset(dev, is31_free_fwnode, is31);
394 if (ret)
395 return ret;
396
397 count = 0;
398 device_for_each_child_node_scoped(dev, child)
399 count++;
400
401 dev_dbg(dev, "probing with %d leds defined in DT\n", count);
402
403 if (!count || count > is31->cdef->num_leds)
404 return dev_err_probe(dev, -ENODEV,
405 "Number of leds defined must be between 1 and %u\n",
406 is31->cdef->num_leds);
407
408 device_for_each_child_node_scoped(dev, child) {
409 struct is31fl319x_led *led;
410 u32 reg;
411
412 ret = fwnode_property_read_u32(child, "reg", ®);
413 if (ret)
414 return dev_err_probe(dev, ret, "Failed to read led 'reg' property\n");
415
416 if (reg < 1 || reg > is31->cdef->num_leds)
417 return dev_err_probe(dev, -EINVAL, "invalid led reg %u\n", reg);
418
419 led = &is31->leds[reg - 1];
420
421 if (led->fwnode)
422 return dev_err_probe(dev, -EINVAL, "led %u is already configured\n", reg);
423
424 led->max_microamp = is31->cdef->current_default;
425 ret = fwnode_property_read_u32(child, "led-max-microamp", &led->max_microamp);
426 if (!ret) {
427 if (led->max_microamp < is31->cdef->current_min)
428 return dev_err_probe(dev, -EINVAL, "invalid maximum current\n");
429
430 led->max_microamp = min(led->max_microamp,
431 is31->cdef->current_max);
432 }
433
434 led->fwnode = fwnode_handle_get(child);
435 }
436
437 is31->audio_gain_db = 0;
438 if (is31->cdef->is_3196or3199) {
439 ret = fwnode_property_read_u32(fwnode, "audio-gain-db", &is31->audio_gain_db);
440 if (!ret)
441 is31->audio_gain_db = min(is31->audio_gain_db,
442 IS31FL3196_AUDIO_GAIN_DB_MAX);
443 }
444
445 return 0;
446 }
447
is31fl3190_microamp_to_cs(struct device * dev,u32 microamp)448 static inline int is31fl3190_microamp_to_cs(struct device *dev, u32 microamp)
449 {
450 switch (microamp) {
451 case 5000:
452 return IS31FL3190_CURRENT_5_mA;
453 case 10000:
454 return IS31FL3190_CURRENT_10_mA;
455 case 17500:
456 return IS31FL3190_CURRENT_17dot5_mA;
457 case 30000:
458 return IS31FL3190_CURRENT_30_mA;
459 case 42000:
460 return IS31FL3190_CURRENT_42_mA;
461 default:
462 dev_warn(dev, "Unsupported current value: %d, using 5000 µA!\n", microamp);
463 return IS31FL3190_CURRENT_5_mA;
464 }
465 }
466
is31fl3196_microamp_to_cs(struct device * dev,u32 microamp)467 static inline int is31fl3196_microamp_to_cs(struct device *dev, u32 microamp)
468 {
469 /* round down to nearest supported value (range check done by caller) */
470 u32 step = microamp / IS31FL3196_CURRENT_uA_STEP;
471
472 return ((IS31FL3196_CONFIG2_CS_STEP_REF - step) &
473 IS31FL3196_CONFIG2_CS_MASK) <<
474 IS31FL3196_CONFIG2_CS_SHIFT; /* CS encoding */
475 }
476
is31fl3196_db_to_gain(u32 dezibel)477 static inline int is31fl3196_db_to_gain(u32 dezibel)
478 {
479 /* round down to nearest supported value (range check done by caller) */
480 return dezibel / IS31FL3196_AUDIO_GAIN_DB_STEP;
481 }
482
is31fl319x_probe(struct i2c_client * client)483 static int is31fl319x_probe(struct i2c_client *client)
484 {
485 struct is31fl319x_chip *is31;
486 struct device *dev = &client->dev;
487 int err;
488 int i = 0;
489 u32 aggregated_led_microamp;
490
491 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
492 return -EIO;
493
494 is31 = devm_kzalloc(&client->dev, sizeof(*is31), GFP_KERNEL);
495 if (!is31)
496 return -ENOMEM;
497
498 err = devm_mutex_init(dev, &is31->lock);
499 if (err)
500 return err;
501
502 err = is31fl319x_parse_fw(&client->dev, is31);
503 if (err)
504 return err;
505
506 if (is31->shutdown_gpio) {
507 gpiod_direction_output(is31->shutdown_gpio, 0);
508 mdelay(5);
509 gpiod_direction_output(is31->shutdown_gpio, 1);
510 }
511
512 is31->client = client;
513 is31->regmap = devm_regmap_init_i2c(client, is31->cdef->is31fl319x_regmap_config);
514 if (IS_ERR(is31->regmap))
515 return dev_err_probe(dev, PTR_ERR(is31->regmap), "failed to allocate register map\n");
516
517 i2c_set_clientdata(client, is31);
518
519 /* check for write-reply from chip (we can't read any registers) */
520 err = regmap_write(is31->regmap, is31->cdef->reset_reg, 0x00);
521 if (err < 0)
522 return dev_err_probe(dev, err, "no response from chip write\n");
523
524 /*
525 * Kernel conventions require per-LED led-max-microamp property.
526 * But the chip does not allow to limit individual LEDs.
527 * So we take minimum from all subnodes for safety of hardware.
528 */
529 aggregated_led_microamp = is31->cdef->current_max;
530 for (i = 0; i < is31->cdef->num_leds; i++)
531 if (is31->leds[i].fwnode &&
532 is31->leds[i].max_microamp < aggregated_led_microamp)
533 aggregated_led_microamp = is31->leds[i].max_microamp;
534
535 if (is31->cdef->is_3196or3199)
536 regmap_write(is31->regmap, IS31FL3196_CONFIG2,
537 is31fl3196_microamp_to_cs(dev, aggregated_led_microamp) |
538 is31fl3196_db_to_gain(is31->audio_gain_db));
539 else
540 regmap_update_bits(is31->regmap, IS31FL3190_CURRENT, IS31FL3190_CURRENT_MASK,
541 is31fl3190_microamp_to_cs(dev, aggregated_led_microamp) << IS31FL3190_CURRENT_SHIFT);
542
543 for (i = 0; i < is31->cdef->num_leds; i++) {
544 struct is31fl319x_led *led = &is31->leds[i];
545 struct led_init_data init_data = {};
546
547 if (!led->fwnode)
548 continue;
549
550 init_data.fwnode = led->fwnode;
551
552 led->chip = is31;
553 led->cdev.brightness_set_blocking = is31->cdef->brightness_set;
554
555 err = devm_led_classdev_register_ext(&client->dev, &led->cdev, &init_data);
556 if (err < 0)
557 return err;
558 }
559
560 return 0;
561 }
562
563 /*
564 * i2c-core (and modalias) requires that id_table be properly filled,
565 * even though it is not used for DeviceTree based instantiation.
566 */
567 static const struct i2c_device_id is31fl319x_id[] = {
568 { .name = "is31fl3190" },
569 { .name = "is31fl3191" },
570 { .name = "is31fl3193" },
571 { .name = "is31fl3196" },
572 { .name = "is31fl3199" },
573 { .name = "sn3190" },
574 { .name = "sn3191" },
575 { .name = "sn3193" },
576 { .name = "sn3196" },
577 { .name = "sn3199" },
578 { }
579 };
580 MODULE_DEVICE_TABLE(i2c, is31fl319x_id);
581
582 static struct i2c_driver is31fl319x_driver = {
583 .driver = {
584 .name = "leds-is31fl319x",
585 .of_match_table = of_is31fl319x_match,
586 },
587 .probe = is31fl319x_probe,
588 .id_table = is31fl319x_id,
589 };
590
591 module_i2c_driver(is31fl319x_driver);
592
593 MODULE_AUTHOR("H. Nikolaus Schaller <hns@goldelico.com>");
594 MODULE_AUTHOR("Andrey Utkin <andrey_utkin@fastmail.com>");
595 MODULE_DESCRIPTION("IS31FL319X LED driver");
596 MODULE_LICENSE("GPL v2");
597